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H A D | r8a779g0-cpg-mssr.h | f2afa78d Mon Apr 25 01:41:56 CDT 2022 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car V4H (R8A779G0) SoC.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220425064201.459633-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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