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/openbmc/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-qmp-qserdes-ln-shrd-v6.h | d38360e1 Wed Feb 08 12:00:16 CST 2023 Abel Vesa <abel.vesa@linaro.org> phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for PCIE g4x2. Add the new lane shared PCIE specific offsets in a dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230208180020.2761766-8-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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H A D | phy-qcom-qmp.h | d38360e1 Wed Feb 08 12:00:16 CST 2023 Abel Vesa <abel.vesa@linaro.org> phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for PCIE g4x2. Add the new lane shared PCIE specific offsets in a dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230208180020.2761766-8-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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