Searched hist:b9bed1b9 (Results 1 – 6 of 6) sorted by relevance
/openbmc/qemu/target/openrisc/ |
H A D | interrupt_helper.c | b9bed1b9 Tue May 22 21:51:00 CDT 2018 Richard Henderson <richard.henderson@linaro.org> target/openrisc: Fix cpu_mmu_index The code in cpu_mmu_index does not properly honor SR_DME. This bug has workarounds elsewhere in that we flush the tlb more often than necessary, on the state changes that should be reflected in a change of mmu_index. Fixing this means that we can respect the mmu_index that is given to tlb_flush. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
|
H A D | interrupt.c | b9bed1b9 Tue May 22 21:51:00 CDT 2018 Richard Henderson <richard.henderson@linaro.org> target/openrisc: Fix cpu_mmu_index The code in cpu_mmu_index does not properly honor SR_DME. This bug has workarounds elsewhere in that we flush the tlb more often than necessary, on the state changes that should be reflected in a change of mmu_index. Fixing this means that we can respect the mmu_index that is given to tlb_flush. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
|
H A D | mmu.c | b9bed1b9 Tue May 22 21:51:00 CDT 2018 Richard Henderson <richard.henderson@linaro.org> target/openrisc: Fix cpu_mmu_index The code in cpu_mmu_index does not properly honor SR_DME. This bug has workarounds elsewhere in that we flush the tlb more often than necessary, on the state changes that should be reflected in a change of mmu_index. Fixing this means that we can respect the mmu_index that is given to tlb_flush. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
|
H A D | sys_helper.c | b9bed1b9 Tue May 22 21:51:00 CDT 2018 Richard Henderson <richard.henderson@linaro.org> target/openrisc: Fix cpu_mmu_index The code in cpu_mmu_index does not properly honor SR_DME. This bug has workarounds elsewhere in that we flush the tlb more often than necessary, on the state changes that should be reflected in a change of mmu_index. Fixing this means that we can respect the mmu_index that is given to tlb_flush. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
|
H A D | cpu.h | b9bed1b9 Tue May 22 21:51:00 CDT 2018 Richard Henderson <richard.henderson@linaro.org> target/openrisc: Fix cpu_mmu_index The code in cpu_mmu_index does not properly honor SR_DME. This bug has workarounds elsewhere in that we flush the tlb more often than necessary, on the state changes that should be reflected in a change of mmu_index. Fixing this means that we can respect the mmu_index that is given to tlb_flush. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
|
H A D | translate.c | b9bed1b9 Tue May 22 21:51:00 CDT 2018 Richard Henderson <richard.henderson@linaro.org> target/openrisc: Fix cpu_mmu_index The code in cpu_mmu_index does not properly honor SR_DME. This bug has workarounds elsewhere in that we flush the tlb more often than necessary, on the state changes that should be reflected in a change of mmu_index. Fixing this means that we can respect the mmu_index that is given to tlb_flush. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
|