Searched hist:ae99fc35 (Results 1 – 3 of 3) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/df/ |
H A D | df_3_6_sh_mask.h | ae99fc35 Thu Jan 09 17:07:12 CST 2020 Joseph Greathouse <Joseph.Greathouse@amd.com> drm/amdgpu: add defines for DF and TCP Hashing
On Arcturus, we need TC channel hashing, which is set by the driver, to match DF hashing, which is set by VBIOS. To match these, we plan to query the DF information and then properly set the TC configuration bits to match them.
This patch adds the required fields to register definitions in preparation for a future patch which will use them.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ae99fc35 Thu Jan 09 17:07:12 CST 2020 Joseph Greathouse <Joseph.Greathouse@amd.com> drm/amdgpu: add defines for DF and TCP Hashing On Arcturus, we need TC channel hashing, which is set by the driver, to match DF hashing, which is set by VBIOS. To match these, we plan to query the DF information and then properly set the TC configuration bits to match them. This patch adds the required fields to register definitions in preparation for a future patch which will use them. Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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H A D | df_3_6_offset.h | ae99fc35 Thu Jan 09 17:07:12 CST 2020 Joseph Greathouse <Joseph.Greathouse@amd.com> drm/amdgpu: add defines for DF and TCP Hashing
On Arcturus, we need TC channel hashing, which is set by the driver, to match DF hashing, which is set by VBIOS. To match these, we plan to query the DF information and then properly set the TC configuration bits to match them.
This patch adds the required fields to register definitions in preparation for a future patch which will use them.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ae99fc35 Thu Jan 09 17:07:12 CST 2020 Joseph Greathouse <Joseph.Greathouse@amd.com> drm/amdgpu: add defines for DF and TCP Hashing On Arcturus, we need TC channel hashing, which is set by the driver, to match DF hashing, which is set by VBIOS. To match these, we plan to query the DF information and then properly set the TC configuration bits to match them. This patch adds the required fields to register definitions in preparation for a future patch which will use them. Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_sh_mask.h | ae99fc35 Thu Jan 09 17:07:12 CST 2020 Joseph Greathouse <Joseph.Greathouse@amd.com> drm/amdgpu: add defines for DF and TCP Hashing
On Arcturus, we need TC channel hashing, which is set by the driver, to match DF hashing, which is set by VBIOS. To match these, we plan to query the DF information and then properly set the TC configuration bits to match them.
This patch adds the required fields to register definitions in preparation for a future patch which will use them.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ae99fc35 Thu Jan 09 17:07:12 CST 2020 Joseph Greathouse <Joseph.Greathouse@amd.com> drm/amdgpu: add defines for DF and TCP Hashing On Arcturus, we need TC channel hashing, which is set by the driver, to match DF hashing, which is set by VBIOS. To match these, we plan to query the DF information and then properly set the TC configuration bits to match them. This patch adds the required fields to register definitions in preparation for a future patch which will use them. Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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