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H A Dhdq1w.c9e1b7498 Tue May 08 12:34:27 CDT 2012 Paul Walmsley <paul@pwsan.com> ARM: OMAP2+: HDQ1W: add custom reset function

Implement a custom reset function for the HDQ1W IP block. This is
because the HDQ1W IP block, like I2C, has an internal clock gating bit
that needs to be toggled after setting the SOFTRESET bit to allow the
reset to propagate.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Avinash.H.M <avinashhm@ti.com>
Tested-by: NeilBrown <neilb@suse.de>
9e1b7498 Tue May 08 12:34:27 CDT 2012 Paul Walmsley <paul@pwsan.com> ARM: OMAP2+: HDQ1W: add custom reset function

Implement a custom reset function for the HDQ1W IP block. This is
because the HDQ1W IP block, like I2C, has an internal clock gating bit
that needs to be toggled after setting the SOFTRESET bit to allow the
reset to propagate.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Avinash.H.M <avinashhm@ti.com>
Tested-by: NeilBrown <neilb@suse.de>
H A DMakefile9e1b7498 Tue May 08 12:34:27 CDT 2012 Paul Walmsley <paul@pwsan.com> ARM: OMAP2+: HDQ1W: add custom reset function

Implement a custom reset function for the HDQ1W IP block. This is
because the HDQ1W IP block, like I2C, has an internal clock gating bit
that needs to be toggled after setting the SOFTRESET bit to allow the
reset to propagate.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Avinash.H.M <avinashhm@ti.com>
Tested-by: NeilBrown <neilb@suse.de>
9e1b7498 Tue May 08 12:34:27 CDT 2012 Paul Walmsley <paul@pwsan.com> ARM: OMAP2+: HDQ1W: add custom reset function

Implement a custom reset function for the HDQ1W IP block. This is
because the HDQ1W IP block, like I2C, has an internal clock gating bit
that needs to be toggled after setting the SOFTRESET bit to allow the
reset to propagate.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Avinash.H.M <avinashhm@ti.com>
Tested-by: NeilBrown <neilb@suse.de>