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H A D | tegra210.dtsi | 9168e1db Wed Jun 29 06:07:33 CDT 2016 Jon Hunter <jonathanh@nvidia.com> arm64: tegra: Correct Tegra210 XUSB mailbox interrupt
The XUSB mailbox interrupt for Tegra210 is 40 and not 49 which is for the XUSB pad controller. For some Tegra210 boards, this is causing USB connect and disconnect events to go undetected. Fix this by changing the interrupt number for the XUSB mailbox to 40.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 9168e1db Wed Jun 29 06:07:33 CDT 2016 Jon Hunter <jonathanh@nvidia.com> arm64: tegra: Correct Tegra210 XUSB mailbox interrupt The XUSB mailbox interrupt for Tegra210 is 40 and not 49 which is for the XUSB pad controller. For some Tegra210 boards, this is causing USB connect and disconnect events to go undetected. Fix this by changing the interrupt number for the XUSB mailbox to 40. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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