Searched hist:"846 dbb40" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | r8a77995-cpg-mssr.h | 846dbb40 Tue Nov 20 09:46:38 CST 2018 Geert Uytterhoeven <geert+renesas@glider.be> clk: renesas: r8a77995: Remove non-existent SSP clocks
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.
As these definitions were never used, they can just be removed.
The freed slots in the DT bindings header must not be reused, though.
Fixes: 714c53aa2e2d6d60 ("clk: renesas: Add r8a77995 CPG Core Clock Definitions")
Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
846dbb40 Tue Nov 20 09:46:38 CST 2018 Geert Uytterhoeven <geert+renesas@glider.be> clk: renesas: r8a77995: Remove non-existent SSP clocks
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.
As these definitions were never used, they can just be removed.
The freed slots in the DT bindings header must not be reused, though.
Fixes: 714c53aa2e2d6d60 ("clk: renesas: Add r8a77995 CPG Core Clock Definitions")
Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
|
| /openbmc/linux/drivers/clk/renesas/ |
| H A D | r8a77995-cpg-mssr.c | 846dbb40 Tue Nov 20 09:46:38 CST 2018 Geert Uytterhoeven <geert+renesas@glider.be> clk: renesas: r8a77995: Remove non-existent SSP clocks
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.
As these definitions were never used, they can just be removed.
The freed slots in the DT bindings header must not be reused, though.
Fixes: 714c53aa2e2d6d60 ("clk: renesas: Add r8a77995 CPG Core Clock Definitions")
Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
846dbb40 Tue Nov 20 09:46:38 CST 2018 Geert Uytterhoeven <geert+renesas@glider.be> clk: renesas: r8a77995: Remove non-existent SSP clocks
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.
As these definitions were never used, they can just be removed.
The freed slots in the DT bindings header must not be reused, though.
Fixes: 714c53aa2e2d6d60 ("clk: renesas: Add r8a77995 CPG Core Clock Definitions")
Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
|