Searched hist:"7 e0810c9" (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/include/dt-bindings/clock/ |
H A D | lpc32xx-clock.h | 7e0810c9 Wed Feb 10 12:52:32 CST 2016 Sylvain Lemieux <slemieux@tycoint.com> clk: lpc32xx: add HCLK PLL output configuration
This patch add the support to setup the HCLK PLL output using the "assigned-clock-rates" parameter in the device tree.
If the option is not use, the clock setup by the kickstart and/or bootloader remain unchanged.
The previous kernel version did not change the clock frequency output setup by the kickstart and/or bootloader; this version always setup the clock frequency output to 208MHz.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> 7e0810c9 Wed Feb 10 12:52:32 CST 2016 Sylvain Lemieux <slemieux@tycoint.com> clk: lpc32xx: add HCLK PLL output configuration This patch add the support to setup the HCLK PLL output using the "assigned-clock-rates" parameter in the device tree. If the option is not use, the clock setup by the kickstart and/or bootloader remain unchanged. The previous kernel version did not change the clock frequency output setup by the kickstart and/or bootloader; this version always setup the clock frequency output to 208MHz. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
/openbmc/linux/drivers/clk/nxp/ |
H A D | clk-lpc32xx.c | 7e0810c9 Wed Feb 10 12:52:32 CST 2016 Sylvain Lemieux <slemieux@tycoint.com> clk: lpc32xx: add HCLK PLL output configuration
This patch add the support to setup the HCLK PLL output using the "assigned-clock-rates" parameter in the device tree.
If the option is not use, the clock setup by the kickstart and/or bootloader remain unchanged.
The previous kernel version did not change the clock frequency output setup by the kickstart and/or bootloader; this version always setup the clock frequency output to 208MHz.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> 7e0810c9 Wed Feb 10 12:52:32 CST 2016 Sylvain Lemieux <slemieux@tycoint.com> clk: lpc32xx: add HCLK PLL output configuration This patch add the support to setup the HCLK PLL output using the "assigned-clock-rates" parameter in the device tree. If the option is not use, the clock setup by the kickstart and/or bootloader remain unchanged. The previous kernel version did not change the clock frequency output setup by the kickstart and/or bootloader; this version always setup the clock frequency output to 208MHz. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|