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/openbmc/qemu/target/riscv/kvm/
H A Dkvm-cpu.c742cc269 Sat Feb 03 04:11:09 CST 2024 Akihiko Odaki <akihiko.odaki@daynix.com> target/riscv: Move misa_mxl_max to class

misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
/openbmc/qemu/target/riscv/
H A Dmachine.c742cc269 Sat Feb 03 04:11:09 CST 2024 Akihiko Odaki <akihiko.odaki@daynix.com> target/riscv: Move misa_mxl_max to class

misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
H A Dgdbstub.c742cc269 Sat Feb 03 04:11:09 CST 2024 Akihiko Odaki <akihiko.odaki@daynix.com> target/riscv: Move misa_mxl_max to class

misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
H A Dtranslate.c742cc269 Sat Feb 03 04:11:09 CST 2024 Akihiko Odaki <akihiko.odaki@daynix.com> target/riscv: Move misa_mxl_max to class

misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
H A Dcpu.h742cc269 Sat Feb 03 04:11:09 CST 2024 Akihiko Odaki <akihiko.odaki@daynix.com> target/riscv: Move misa_mxl_max to class

misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
H A Dcpu.c742cc269 Sat Feb 03 04:11:09 CST 2024 Akihiko Odaki <akihiko.odaki@daynix.com> target/riscv: Move misa_mxl_max to class

misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
/openbmc/qemu/target/riscv/tcg/
H A Dtcg-cpu.c742cc269 Sat Feb 03 04:11:09 CST 2024 Akihiko Odaki <akihiko.odaki@daynix.com> target/riscv: Move misa_mxl_max to class

misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
/openbmc/qemu/hw/riscv/
H A Dboot.c742cc269 Sat Feb 03 04:11:09 CST 2024 Akihiko Odaki <akihiko.odaki@daynix.com> target/riscv: Move misa_mxl_max to class

misa_mxl_max is common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240203-riscv-v11-2-a23f4848a628@daynix.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>