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H A D | idle.c | 5b10a0e8 Tue Sep 22 13:24:20 CDT 2015 Paul Burton <paul.burton@imgtec.com> MIPS: Always use r4k_wait_irqoff for MIPSr6
Prior to release 6 of the MIPS architecture it has been implementation dependent whether masked interrupts cause a wait instruction to return, so the kernel has effectively had to maintain a whitelist of cores upon which it is safe to use the r4k_wait_irqoff cpu_wait implementation. With MIPSr6 this is no longer implementation dependent and r4k_wait_irqoff can always be used.
Remove the existing I6400 case which will no longer ever be hit, and was incorrect anyway since I6400 & r6 in general doesn't have the WII bit.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11210/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 5b10a0e8 Tue Sep 22 13:24:20 CDT 2015 Paul Burton <paul.burton@imgtec.com> MIPS: Always use r4k_wait_irqoff for MIPSr6 Prior to release 6 of the MIPS architecture it has been implementation dependent whether masked interrupts cause a wait instruction to return, so the kernel has effectively had to maintain a whitelist of cores upon which it is safe to use the r4k_wait_irqoff cpu_wait implementation. With MIPSr6 this is no longer implementation dependent and r4k_wait_irqoff can always be used. Remove the existing I6400 case which will no longer ever be hit, and was incorrect anyway since I6400 & r6 in general doesn't have the WII bit. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11210/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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