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/openbmc/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxbb-p201.dts | 23edd1b2 Sun Feb 19 15:41:47 CST 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com> ARM64: dts: meson-gxbb-p201: fix ethernet support
Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with the reset GPIO being GPIOZ_14). However our P201 board .dts simply inherits the phy-mode setting from from meson-gx.dtsi where it defaults to RGMII mode. Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only specifies the RGMII pins which are only valid for the P200 board. Instead we add the ethmac node to the meson-gxbb-p201.dts and configure the pinctrl property and the phy-mode for an RMII PHY.
An MDIO node (which would also specify the PHY) is not added since we don't know which PHY is being used (and thus which PHY address would have to be used).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> 23edd1b2 Sun Feb 19 15:41:47 CST 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com> ARM64: dts: meson-gxbb-p201: fix ethernet support Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with the reset GPIO being GPIOZ_14). However our P201 board .dts simply inherits the phy-mode setting from from meson-gx.dtsi where it defaults to RGMII mode. Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only specifies the RGMII pins which are only valid for the P200 board. Instead we add the ethmac node to the meson-gxbb-p201.dts and configure the pinctrl property and the phy-mode for an RMII PHY. An MDIO node (which would also specify the PHY) is not added since we don't know which PHY is being used (and thus which PHY address would have to be used). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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H A D | meson-gxbb-p20x.dtsi | 23edd1b2 Sun Feb 19 15:41:47 CST 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com> ARM64: dts: meson-gxbb-p201: fix ethernet support
Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with the reset GPIO being GPIOZ_14). However our P201 board .dts simply inherits the phy-mode setting from from meson-gx.dtsi where it defaults to RGMII mode. Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only specifies the RGMII pins which are only valid for the P200 board. Instead we add the ethmac node to the meson-gxbb-p201.dts and configure the pinctrl property and the phy-mode for an RMII PHY.
An MDIO node (which would also specify the PHY) is not added since we don't know which PHY is being used (and thus which PHY address would have to be used).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> 23edd1b2 Sun Feb 19 15:41:47 CST 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com> ARM64: dts: meson-gxbb-p201: fix ethernet support Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with the reset GPIO being GPIOZ_14). However our P201 board .dts simply inherits the phy-mode setting from from meson-gx.dtsi where it defaults to RGMII mode. Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only specifies the RGMII pins which are only valid for the P200 board. Instead we add the ethmac node to the meson-gxbb-p201.dts and configure the pinctrl property and the phy-mode for an RMII PHY. An MDIO node (which would also specify the PHY) is not added since we don't know which PHY is being used (and thus which PHY address would have to be used). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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