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/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | b4860si-post.dtsi | 0e3d4373 Tue Jul 30 21:59:07 CDT 2013 Minghuan Lian <Minghuan.Lian@freescale.com> powerpc/dts: fix sRIO error interrupt for b4860
For B4 platform, MPIC EISR register is in reversed bitmap order, instead of "Error interrupt source 0-31. Bit 0 represents SRC0." the correct ordering is "Error interrupt source 0-31. Bit 0 represents SRC31." This patch is to fix sRIO EISR bit value of error interrupt in dts node.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> 0e3d4373 Tue Jul 30 21:59:07 CDT 2013 Minghuan Lian <Minghuan.Lian@freescale.com> powerpc/dts: fix sRIO error interrupt for b4860 For B4 platform, MPIC EISR register is in reversed bitmap order, instead of "Error interrupt source 0-31. Bit 0 represents SRC0." the correct ordering is "Error interrupt source 0-31. Bit 0 represents SRC31." This patch is to fix sRIO EISR bit value of error interrupt in dts node. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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