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/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3188.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3188-cru.h>
10 #include <dt-bindings/power/rk3188-power.h>
14 compatible = "rockchip,rk3188";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
[all …]
H A Drk3188-px3-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include "rk3188.dtsi"
11 model = "Rockchip PX3-EVB";
12 compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
20 stdout-path = "serial2:115200n8";
28 gpio-keys {
29 compatible = "gpio-keys";
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H A Drk3188-radxarock.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include "rk3188.dtsi"
12 compatible = "radxa,rock", "rockchip,rk3188";
23 gpio-keys {
24 compatible = "gpio-keys";
27 key-power {
30 label = "GPIO Key Power";
31 linux,input-type = <1>;
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H A Drk3188-bqedison2qc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "rk3188.dtsi"
14 model = "BQ Edison2 Quad-Core";
15 compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188";
29 compatible = "pwm-backlight";
30 power-supply = <&vsys>;
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/openbmc/linux/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3566-pipe-grf
19 - rockchip,rk3568-pcie3-phy-grf
20 - rockchip,rk3568-pipe-grf
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drockchip-spdif.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Heiko Stuebner <heiko@sntech.de>
20 - const: rockchip,rk3066-spdif
21 - const: rockchip,rk3228-spdif
22 - const: rockchip,rk3328-spdif
23 - const: rockchip,rk3366-spdif
24 - const: rockchip,rk3368-spdif
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H A Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
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/openbmc/linux/Documentation/devicetree/bindings/power/
H A Drockchip-io-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
29 should have power or not have power
42 to report their voltage. The IO Voltage Domain for any non-specified
48 - rockchip,px30-io-voltage-domain
49 - rockchip,px30-pmu-io-voltage-domain
50 - rockchip,rk3188-io-voltage-domain
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H A Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3188-radxarock.dts1 // SPDX-License-Identifier: GPL-2.0+ OR X11
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include "rk3188.dtsi"
9 #include "rk3188-radxarock-u-boot.dtsi"
13 compatible = "radxa,rock", "rockchip,rk3188";
16 /* stdout-path = &uart2; */
17 stdout-path = "serial2:115200n8";
21 u-boot,dm-pre-reloc;
22 u-boot,boot-led = "rock:red:power";
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/openbmc/linux/Documentation/devicetree/bindings/gpu/
H A Darm,mali-utgard.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
11 - Maxime Ripard <mripard@kernel.org>
12 - Heiko Stuebner <heiko@sntech.de>
16 pattern: '^gpu@[a-f0-9]+$'
19 - items:
20 - const: allwinner,sun8i-a23-mali
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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-rockchip.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: spi-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rk3036-spi
24 - const: rockchip,rk3066-spi
25 - const: rockchip,rk3228-spi
26 - const: rockchip,rv1108-spi
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/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Drockchip,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml#
13 - Heiko Stuebner <heiko@sntech.de>
18 - const: rockchip,px30-nfc
19 - const: rockchip,rk2928-nfc
20 - const: rockchip,rv1108-nfc
21 - items:
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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Drockchip-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ezequiel Garcia <ezequiel@collabora.com>
19 - enum:
20 - rockchip,rk3036-vpu
21 - rockchip,rk3066-vpu
22 - rockchip,rk3288-vpu
23 - rockchip,rk3328-vpu
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/openbmc/u-boot/doc/
H A DREADME.rockchip1 # SPDX-License-Identifier: GPL-2.0+
6 U-Boot on Rockchip
9 A wide range of Rockchip SoCs are supported in mainline U-Boot
17 - Firefly RK3288 board or something else with a supported RockChip SoC
18 - Power connection to 5V using the supplied micro-USB power cable
19 - Separate USB serial cable attached to your computer and the Firefly
20 (connect to the micro-USB connector below the logo)
21 - rkflashtool [3]
22 - openssl (sudo apt-get install openssl)
23 - Serial UART connection [4]
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Drockchip-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3066a-usb-phy
16 - rockchip,rk3188-usb-phy
17 - rockchip,rk3288-usb-phy
19 "#address-cells":
22 "#size-cells":
[all …]
/openbmc/u-boot/arch/arm/mach-rockchip/
H A Drk3188-board-spl.c1 // SPDX-License-Identifier: GPL-2.0+
30 #include <power/regulator.h>
37 const void *blob = gd->fdt_blob; in spl_boot_device()
43 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0"); in spl_boot_device()
59 debug("Found device %s\n", dev->name); in spl_boot_device()
98 /* Enable early UART on the RK3188 */ in board_debug_uart_init()
113 /* Enable early UART on the RK3188 */ in board_debug_uart_init()
114 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
137 printascii("U-Boot SPL board init"); in board_init_f()
141 rk_clrsetreg(&grf->uoc0_con[0], in board_init_f()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip-vop.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <heiko@sntech.de>
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
23 - rockchip,rk3036-vop
24 - rockchip,rk3066-vop
[all …]
/openbmc/linux/drivers/phy/rockchip/
H A Dphy-rockchip-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com>
10 #include <linux/clk-provider.h>
40 /* bits present on rk3188 and rk3288 phys */
85 return regmap_write(phy->base->reg_base, phy->reg_offset, val); in rockchip_usb_phy_power()
100 if (phy->vbus) in rockchip_usb_phy480m_disable()
101 regulator_disable(phy->vbus); in rockchip_usb_phy480m_disable()
103 /* Power down usb phy analog blocks by set siddq 1 */ in rockchip_usb_phy480m_disable()
113 /* Power up usb phy analog blocks by set siddq 0 */ in rockchip_usb_phy480m_enable()
125 ret = regmap_read(phy->base->reg_base, phy->reg_offset, &val); in rockchip_usb_phy480m_is_enabled()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
[all …]
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3188.c1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
12 #include <dt-structs.h>
103 rk_clrsetreg(&cru->cru_softrst_con[5], in ddr_reset()
116 rk_clrsetreg(&cru->cru_softrst_con[5], in ddr_phy_ctl_reset()
128 clrbits_le32(&publ->acdllcr, ACDLLCR_DLLSRST); in phy_pctrl_reset()
130 clrbits_le32(&publ->datx8[i].dxdllcr, DXDLLCR_DLLSRST); in phy_pctrl_reset()
133 setbits_le32(&publ->acdllcr, ACDLLCR_DLLSRST); in phy_pctrl_reset()
135 setbits_le32(&publ->datx8[i].dxdllcr, DXDLLCR_DLLSRST); in phy_pctrl_reset()
151 clrbits_le32(&publ->dllgcr, SBIAS_BYPASS); in phy_dll_bypass_set()
153 setbits_le32(&publ->dllgcr, SBIAS_BYPASS); in phy_dll_bypass_set()
[all …]
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3188.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <clk-uclass.h>
10 #include <dt-structs.h>
19 #include <dt-bindings/clock/rk3188-cru.h>
20 #include <dm/device-internal.h>
22 #include <dm/uclass-internal.h>
79 /* Keep divisors as low as possible to reduce jitter and power usage */
89 struct rk3188_pll *pll = &cru->pll[pll_id]; in rkclk_set_pll()
91 uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; in rkclk_set_pll()
92 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
[all …]
/openbmc/linux/drivers/mtd/nand/raw/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
102 selected to save power. This will mean there is a small delay
104 approximately 5mA of power when there is nothing happening.
126 include NAND flash controllers with built-in hardware ECC
161 - PXA3xx processors (NFCv1)
162 - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2)
163 - 64-bit Aramda platforms (7k, 8k, ac5) (NFCv2)
229 Controller Module with built-in hardware ECC capabilities.
240 with built-in hardware ECC capabilities.
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/openbmc/linux/drivers/pmdomain/rockchip/
H A Dpm-domains.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip Generic power domain support.
21 #include <dt-bindings/power/px30-power.h>
22 #include <dt-bindings/power/rockchip,rv1126-power.h>
23 #include <dt-bindings/power/rk3036-power.h>
24 #include <dt-bindings/power/rk3066-power.h>
25 #include <dt-bindings/power/rk3128-power.h>
26 #include <dt-bindings/power/rk3188-power.h>
27 #include <dt-bindings/power/rk3228-power.h>
28 #include <dt-bindings/power/rk3288-power.h>
[all …]
/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A Dsdio_ops.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
164 adapter = intfhdl->padapter; in sdio_read32()
171 (adapter_to_pwrctl(adapter)->fw_current_in_ps_mode) in sdio_read32()
208 adapter = intfhdl->padapter; in sdio_readN()
217 (adapter_to_pwrctl(adapter)->fw_current_in_ps_mode) in sdio_readN()
233 return -1; in sdio_readN()
275 adapter = intfhdl->padapter; in sdio_write32()
284 (adapter_to_pwrctl(adapter)->fw_current_in_ps_mode) in sdio_write32()
312 adapter = intfhdl->padapter; in sdio_writeN()
[all …]

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