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/openbmc/linux/drivers/net/ethernet/pensando/ionic/
H A Dionic_phc.c79 if (!lif->phc || !lif->phc->ptp) in ionic_lif_hwstamp_set_ts_config()
82 mutex_lock(&lif->phc->config_lock); in ionic_lif_hwstamp_set_ts_config()
94 memcpy(config, &lif->phc->ts_config, sizeof(*config)); in ionic_lif_hwstamp_set_ts_config()
95 memset(&lif->phc->ts_config, 0, sizeof(lif->phc->ts_config)); in ionic_lif_hwstamp_set_ts_config()
96 lif->phc->ts_config_tx_mode = 0; in ionic_lif_hwstamp_set_ts_config()
97 lif->phc->ts_config_rx_filt = 0; in ionic_lif_hwstamp_set_ts_config()
137 if (tx_mode != lif->phc->ts_config_tx_mode) { in ionic_lif_hwstamp_set_ts_config()
143 if (rx_filt != lif->phc->ts_config_rx_filt) { in ionic_lif_hwstamp_set_ts_config()
149 if (rx_all != (lif->phc->ts_config.rx_filter == HWTSTAMP_FILTER_ALL)) { in ionic_lif_hwstamp_set_ts_config()
155 memcpy(&lif->phc->ts_config, config, sizeof(*config)); in ionic_lif_hwstamp_set_ts_config()
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/openbmc/linux/drivers/ptp/
H A Dptp_mock.c51 struct mock_phc *phc = info_to_phc(info); in mock_phc_adjfine() local
57 spin_lock(&phc->lock); in mock_phc_adjfine()
58 timecounter_read(&phc->tc); in mock_phc_adjfine()
59 phc->cc.mult = MOCK_PHC_CC_MULT + adj; in mock_phc_adjfine()
60 spin_unlock(&phc->lock); in mock_phc_adjfine()
67 struct mock_phc *phc = info_to_phc(info); in mock_phc_adjtime() local
69 spin_lock(&phc->lock); in mock_phc_adjtime()
70 timecounter_adjtime(&phc->tc, delta); in mock_phc_adjtime()
71 spin_unlock(&phc->lock); in mock_phc_adjtime()
79 struct mock_phc *phc = info_to_phc(info); in mock_phc_settime64() local
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/openbmc/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_ptp.c265 struct lan966x_phc *phc; in lan966x_ptp_hwtstamp_set() local
308 phc = &lan966x->phc[LAN966X_PHC_PORT]; in lan966x_ptp_hwtstamp_set()
309 phc->hwtstamp_config = *cfg; in lan966x_ptp_hwtstamp_set()
319 struct lan966x_phc *phc; in lan966x_ptp_hwtstamp_get() local
321 phc = &lan966x->phc[LAN966X_PHC_PORT]; in lan966x_ptp_hwtstamp_get()
322 *cfg = phc->hwtstamp_config; in lan966x_ptp_hwtstamp_get()
542 struct lan966x_phc *phc; in lan966x_ptp_ext_irq_handler() local
556 phc = &lan966x->phc[i]; in lan966x_ptp_ext_irq_handler()
557 pin = ptp_find_pin_unlocked(phc->clock, PTP_PF_EXTTS, 0); in lan966x_ptp_ext_irq_handler()
590 ptp_clock_event(phc->clock, &ptp_event); in lan966x_ptp_ext_irq_handler()
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/openbmc/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_ptp.c82 struct sparx5_phc *phc; in sparx5_ptp_hwtstamp_set() local
131 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_hwtstamp_set()
132 phc->hwtstamp_config = *cfg; in sparx5_ptp_hwtstamp_set()
142 struct sparx5_phc *phc; in sparx5_ptp_hwtstamp_get() local
144 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_hwtstamp_get()
145 *cfg = phc->hwtstamp_config; in sparx5_ptp_hwtstamp_get()
393 struct sparx5_phc *phc = container_of(ptp, struct sparx5_phc, info); in sparx5_ptp_adjfine() local
394 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_adjfine()
420 spx5_rmw(PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS_SET(1 << BIT(phc->index)), in sparx5_ptp_adjfine()
425 PTP_CLK_PER_CFG(phc->index, 0)); in sparx5_ptp_adjfine()
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/openbmc/linux/include/linux/
H A Dptp_mock.h17 void mock_phc_destroy(struct mock_phc *phc);
18 int mock_phc_index(struct mock_phc *phc);
27 static inline void mock_phc_destroy(struct mock_phc *phc) in mock_phc_destroy() argument
31 static inline int mock_phc_index(struct mock_phc *phc) in mock_phc_index() argument
H A Dptp_clock_kernel.h47 * struct ptp_system_timestamp - system time corresponding to a PHC timestamp
48 * @pre_ts: system timestamp before capturing PHC
49 * @post_ts: system timestamp after capturing PHC
80 * @adjphase: Indicates that the PHC should use an internal servo
82 * parameter delta: PHC servo phase adjustment target
99 * parameter ts: Holds the PHC timestamp.
102 * reading the lowest bits of the PHC timestamp and the second
125 * parameter ts: Holds the PHC timestamp.
128 * reading the lowest bits of the PHC timestamp and the second
145 * array on behalf of the drivers, but the PHC subsystem
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-timecard17 Description: (RO) The list of available time sources that the PHC
58 PHC output PPS is from the PHC clock
62 IRIG output is from the PHC, in IRIG-B format
63 DCF output is from the PHC, in DCF format
76 the PHC. May be changed by writing one of the listed
246 Description: (RW) When retrieving the PHC with the PTP SYS_OFFSET_EXTENDED
247 ioctl, a system timestamp is made before and after the PHC
250 with the PHC time. This estimate may be wrong, as it depends
251 on PCI latencies, and when the PHC time was latched
255 retrieved PHC time.
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/openbmc/linux/Documentation/driver-api/
H A Dptp.rst80 This function has a set of requirements from the PHC in order to be
83 * The PHC implements a servo algorithm internally that is used to
85 * When other PTP adjustment functions are called, the PHC servo
89 that 'jumps' the PHC clock time based on the provided offset. It
117 - Up to 4 independent PHC channels
124 … - Lock to GNSS input, automatic switching between GNSS and user-space PHC control (optional)
135 - PHC instances
/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp.c469 /* Read the system timestamp pre PHC read */ in ice_ptp_read_src_clk_reg()
474 /* Read the system timestamp post PHC read */ in ice_ptp_read_src_clk_reg()
495 * @cached_phc_time: recently cached copy of PHC time
506 * 1) have a recently cached copy of the PHC time
508 * seconds) before or after the PHC time was captured.
511 * captured after the PHC time. In this case, the full timestamp is just
512 * the cached PHC time plus the delta.
514 * timestamp was captured *before* the PHC time, i.e. because the PHC
518 * This algorithm works even if the PHC time was updated after a Tx timestamp
522 * This calculation primarily relies on keeping the cached PHC time up to
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H A Dice_ptp_hw.c995 * ice_ptp_init_phc_e822 - Perform E822 specific PHC initialization
998 * Perform PHC initialization steps specific to E822 devices.
1499 * Program the conversion ration of Serdes clock "unit intervals" (UIs) to PHC
1603 * To calculate the conversion, we use the PHC clock frequency (cycles per
1636 /* Calculate TUs per cycle of the PHC clock */ in ice_phy_cfg_parpcs_e822()
2193 * ice_read_phy_and_phc_time_e822 - Simultaneously capture PHC and PHY time
2197 * @phc_time: on return, the lower 64bits of PHC time
2199 * Issue a READ_TIME timer command to simultaneously capture the PHY and PHC
2213 /* Prepare the PHC timer for a READ_TIME capture command */ in ice_read_phy_and_phc_time_e822()
2224 /* Read the captured PHC time from the shadow time registers */ in ice_read_phy_and_phc_time_e822()
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/openbmc/linux/drivers/net/netdevsim/
H A Dnetdev.c321 struct mock_phc *phc; in nsim_init_netdevsim() local
324 phc = mock_phc_create(&ns->nsim_bus_dev->dev); in nsim_init_netdevsim()
325 if (IS_ERR(phc)) in nsim_init_netdevsim()
326 return PTR_ERR(phc); in nsim_init_netdevsim()
328 ns->phc = phc; in nsim_init_netdevsim()
357 mock_phc_destroy(ns->phc); in nsim_init_netdevsim()
375 mock_phc_destroy(ns->phc); in nsim_exit_netdevsim()
/openbmc/linux/drivers/mfd/
H A Drsmu_core.c27 .name = "8a3400x-phc",
36 .name = "82p33x1x-phc",
45 .name = "8v19n85x-phc",
/openbmc/linux/drivers/net/ethernet/intel/e1000e/
H A Dptp.c4 /* PTP 1588 Hardware Clock (PHC)
22 * Adjust the frequency of the PHC cycle counter by the indicated delta from
155 * @ts: timespec structure to hold the current PHC time
215 * Enable (or disable) ancillary features of the PHC subsystem.
333 e_info("registered PHC clock\n"); in e1000e_ptp_init()
353 e_info("removed PHC\n"); in e1000e_ptp_remove()
/openbmc/linux/drivers/net/ethernet/mellanox/mlx4/
H A Den_clock.c93 mlx4_info(mdev, "removed PHC\n"); in mlx4_en_remove_timestamp()
123 * Adjust the frequency of the PHC cycle counter by the indicated scaled_ppm
220 * Enable (or disable) ancillary features of the PHC subsystem.
288 /* Configure the PHC */ in mlx4_en_init_timestamp()
298 mlx4_info(mdev, "registered PHC clock\n"); in mlx4_en_init_timestamp()
/openbmc/linux/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dptp.c166 IWL_ERR(mvm, "No PHC clock registered\n"); in iwl_mvm_phc_get_crosstimestamp()
286 /* Give a short 'friendly name' to identify the PHC clock */ in iwl_mvm_ptp_init()
297 IWL_ERR(mvm, "Failed to register PHC clock (%ld)\n", in iwl_mvm_ptp_init()
301 IWL_INFO(mvm, "Registered PHC clock: %s, with index: %d\n", in iwl_mvm_ptp_init()
315 IWL_INFO(mvm, "Unregistering PHC clock: %s, with index: %d\n", in iwl_mvm_ptp_remove()
/openbmc/linux/include/uapi/linux/
H A Dnet_tstamp.h86 * PHC index. Note this PHC index is not stable as when there
88 * will be the PHC index.
/openbmc/linux/drivers/net/usb/
H A Dkalmia.c216 "Sending package with length %i and padding %i. Header: %6phC.", in kalmia_tx_fixup()
255 "Received expected unknown frame header: %6phC. Package length: %i\n", in kalmia_rx_fixup()
261 "Received unknown frame header: %6phC. Package length: %i\n", in kalmia_rx_fixup()
269 "Received header: %6phC. Package length: %i\n", in kalmia_rx_fixup()
293 "End header: %6phC. Package length: %i\n", in kalmia_rx_fixup()
/openbmc/linux/tools/testing/selftests/ptp/
H A Dtestptp.c127 " -k val measure the time offset between system and phc clock\n" in usage()
137 " -o val phase offset (in nanoseconds) to be provided to the PHC servo\n" in usage()
532 puts("system and phc clock time offset request okay"); in main()
544 printf("phc time: %lld.%09u\n", in main()
548 printf("system/phc clock time offset is %" PRId64 " ns\n" in main()
574 printf(" phc time: %lld.%09u\n", in main()
594 puts("system and phc crosstimestamping request okay"); in main()
H A DMakefile5 TEST_PROGS = phc.sh
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ptp.c272 * i40e_ptp_read - Read the PHC time from the device
275 * @sts: structure to hold the system time before and after reading the PHC
300 * i40e_ptp_write - Write the PHC time to the device
338 * i40e_ptp_adjfine - Adjust the PHC frequency
342 * Adjust the frequency of the PHC by the indicated delta from the base
396 * i40e_ptp_adjtime - Adjust the PHC time
398 * @delta: Offset in nanoseconds to adjust the PHC time by
441 * i40e_ptp_gettimex - Get the time of the PHC
444 * @sts: structure to hold the system time before and after reading the PHC
462 * i40e_ptp_settime - Set the time of the PHC
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/openbmc/linux/drivers/net/ethernet/qlogic/qede/
H A Dqede_ptp.c121 /* Enable (or disable) ancillary features of the phc subsystem */
132 DP_ERR(edev, "PHC ancillary features are not supported\n"); in qede_ptp_ancillary_feature_enable()
183 /* Read the PHC. This API is invoked with ptp_lock held. */
195 WARN_ONCE(1, "PHC read err %d\n", rc); in qede_ptp_read_cc()
197 DP_VERBOSE(edev, QED_MSG_DEBUG, "PHC read cycles = %llu\n", phc_cycles); in qede_ptp_read_cc()
/openbmc/linux/Documentation/netlink/specs/
H A Dethtool.yaml587 name: phc-index
855 name: phc-vclocks
1395 - phc-index
1523 name: phc-vclocks-get
1524 doc: Get PHC VCLOCKs.
1526 attribute-set: phc-vclocks
1528 do: &phc-vclocks-get-op
1536 dump: *phc-vclocks-get-op
/openbmc/linux/Documentation/networking/
H A Dtimestamping.rst627 There are situations when there may be more than one PHC (PTP Hardware Clock)
629 user to select which PHC to use for timestamping Ethernet frames. Instead, the
630 assumption is that the outermost PHC is always the most preferable, and that
652 I/O, they do have their own PHC). It is typical, but not mandatory, for all
653 interfaces of a DSA switch to share the same PHC.
773 But a MAC driver that is unaware of PHC stacking might get tripped up by
784 described above, in the case of a stacked PHC system, this condition should
785 never trigger, as this MAC is certainly not the outermost PHC. But this is
792 PHC system, this is incorrect because this MAC driver is not the only entity
800 that PTP timestamping is not enabled for anything other than the outermost PHC,
/openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_ptp.c160 /* synchronize the time of phc */ in hclge_ptp_settime()
364 dev_err(&hdev->pdev->dev, "phc is unsupported\n"); in hclge_ptp_set_cfg()
387 dev_err(&hdev->pdev->dev, "phc is unsupported\n"); in hclge_ptp_get_ts_info()
518 dev_info(&hdev->pdev->dev, "phc initializes ok!\n"); in hclge_ptp_init()
542 dev_err(&hdev->pdev->dev, "failed to disable phc\n"); in hclge_ptp_uninit()
/openbmc/linux/drivers/scsi/qla2xxx/
H A Dqla_init.c236 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", in qla2x00_async_iocb_timeout()
302 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); in qla2x00_async_login_sp_done()
334 "%s: %8phC - not sending command.\n", in qla2x00_async_login()
374 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", in qla2x00_async_login()
429 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n", in qla2x00_async_logout()
514 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", in qla24xx_handle_adisc_event()
524 "%s %8phC: adisc fail: post delete\n", in qla24xx_handle_adisc_event()
545 "%s %8phC generation changed\n", in qla24xx_handle_adisc_event()
578 "Async done-%s res %x %8phC\n", in qla2x00_async_adisc_sp_done()
609 "%s: %8phC is being delete - not sending command.\n", in qla2x00_async_adisc()
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