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Searched full:gpio15 (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/board/Arcturus/ucp1020/
H A Ducp1020.h26 #define GPIO15 16 macro
36 #define GPIO_WD GPIO15
/openbmc/u-boot/board/technexion/tao3530/
H A Dtao3530.c137 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); in misc_init_r()
143 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); in misc_init_r()
/openbmc/phosphor-power/phosphor-power-sequencer/src/
H A Ducd90160_device.cpp41 "GPIO14", "GPIO15", "TDO_GPIO20", "TCK_GPIO19",
/openbmc/phosphor-power/phosphor-power-sequencer/test/
H A Ducd90160_device_tests.cpp123 logInfoMsg("[GPIO14, GPIO15, TDO_GPIO20, TCK_GPIO19]: " in TEST()
193 EXPECT_EQ(additionalData["GPIO15"], "0"); in TEST()
/openbmc/u-boot/board/ti/beagle/
H A Dbeagle.c489 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); in misc_init_r()
494 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); in misc_init_r()
/openbmc/openbmc/meta-ibm/recipes-phosphor/chassis/power-workarounds/witherspoon/
H A Dpower-workarounds.sh63 #GPO_CONFIG_1 (GPIO15) : mem 0 reg enables
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Domap.h124 #define GPIO15 (0x1 << 15) macro
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dpxaregs.c113 { "PWER_WE15", 0x40F0000C, 15, 0x00000001, 'd', "PM wake up due to GPIO15 edge detect enabled" },
132 { "PRER_RE15", 0x40F00010, 15, 0x00000001, 'd', "PM wake up due to GPIO15 rising edge detect enable…
150 { "PFER_FE15", 0x40F00014, 15, 0x00000001, 'd', "PM wake up due to GPIO15 falling edge detect enabl…
168 { "PEDR_ED15", 0x40F00018, 15, 0x00000001, 'd', "PM wake up due to edge on GPIO15 detected" },
/openbmc/u-boot/arch/arm/dts/
H A Dstih407-pinctrl.dtsi31 gpio15 = &pio19;
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1331 #define GPIO15 0x40e102b0 macro
1524 #define GPIO15 0x40e102ac macro