| /openbmc/linux/drivers/media/i2c/ |
| H A D | ov02a10.c | 107 struct clk *eclk; member
135 * eclk 24Mhz
412 ret = clk_prepare_enable(ov02a10->eclk); in ov02a10_power_on()
414 dev_err(dev, "failed to enable eclk\n"); in ov02a10_power_on()
442 clk_disable_unprepare(ov02a10->eclk); in ov02a10_power_on()
454 clk_disable_unprepare(ov02a10->eclk); in ov02a10_power_off()
886 ov02a10->eclk = devm_clk_get(dev, "eclk"); in ov02a10_probe()
887 if (IS_ERR(ov02a10->eclk)) in ov02a10_probe()
888 return dev_err_probe(dev, PTR_ERR(ov02a10->eclk), in ov02a10_probe()
889 "failed to get eclk\n"); in ov02a10_probe()
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | aspeed-video.txt | 13 - clock-names: "vclk" and "eclk"
29 clock-names = "vclk", "eclk";
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| /openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | ovti,ov02a10.yaml | 37 - const: eclk
41 Frequency of the eclk clock in Hz.
135 clock-names = "eclk";
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| /openbmc/linux/Documentation/devicetree/bindings/mtd/ |
| H A D | renesas-nandc.yaml | 37 - const: eclk
62 clock-names = "hclk", "eclk";
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| /openbmc/linux/drivers/gpu/drm/exynos/ |
| H A D | exynos7_drm_decon.c | 49 struct clk *eclk; member
716 ctx->eclk = devm_clk_get(dev, "decon0_eclk"); in decon_probe()
717 if (IS_ERR(ctx->eclk)) { in decon_probe()
719 ret = PTR_ERR(ctx->eclk); in decon_probe()
786 clk_disable_unprepare(ctx->eclk); in exynos7_decon_suspend()
812 ret = clk_prepare_enable(ctx->eclk); in exynos7_decon_resume()
814 DRM_DEV_ERROR(dev, "Failed to prepare_enable the eclk [%d]\n", in exynos7_decon_resume()
829 clk_disable_unprepare(ctx->eclk); in exynos7_decon_resume()
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| /openbmc/linux/arch/arm/boot/dts/calxeda/ |
| H A D | ecx-common.dtsi | 42 clocks = <&eclk>;
180 eclk: eclk { label
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-aspeed.c | 49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
515 hw = clk_hw_register_mux(dev, "eclk-mux", eclk_parent_names, in aspeed_clk_probe()
523 hw = clk_hw_register_divider_table(dev, "eclk", "eclk-mux", 0, in aspeed_clk_probe()
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| H A D | clk-aspeed.h | 73 * @eclk_div_table: Divider lookup table for ECLK
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| H A D | clk-ast2600.c | 105 [ASPEED_CLK_GATE_ECLK] = { 1, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
681 hw = clk_hw_register_divider_table(dev, "eclk", NULL, 0, in aspeed_g6_clk_probe()
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| /openbmc/linux/drivers/media/platform/aspeed/ |
| H A D | aspeed-video.c | 287 struct clk *eclk; member
664 clk_disable(video->eclk); in aspeed_video_off()
677 clk_enable(video->eclk); in aspeed_video_on()
2100 video->eclk = devm_clk_get(dev, "eclk"); in aspeed_video_init()
2101 if (IS_ERR(video->eclk)) { in aspeed_video_init()
2102 dev_err(dev, "Unable to get ECLK\n"); in aspeed_video_init()
2103 return PTR_ERR(video->eclk); in aspeed_video_init()
2106 rc = clk_prepare(video->eclk); in aspeed_video_init()
2146 clk_unprepare(video->eclk); in aspeed_video_init()
2197 clk_unprepare(video->eclk); in aspeed_video_probe()
[all …]
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| /openbmc/linux/drivers/mtd/nand/raw/ |
| H A D | renesas-nand-controller.c | 1322 struct clk *eclk; in rnandc_probe() local
1345 eclk = clk_get(&pdev->dev, "eclk"); in rnandc_probe()
1346 if (IS_ERR(eclk)) { in rnandc_probe()
1347 ret = PTR_ERR(eclk); in rnandc_probe()
1351 rnandc->ext_clk_rate = clk_get_rate(eclk); in rnandc_probe()
1352 clk_put(eclk); in rnandc_probe()
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/knightslanding/ |
| H A D | uncore-memory.json | 43 "BriefDescription": "ECLK count",
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | hwmgr_ppt.h | 61 uint32_t eclk; /* VCE clock */ member
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| H A D | vega12_hwmgr.c | 692 /* eclk */ in vega12_setup_default_dpm_tables()
697 "[SetupDefaultDpmTable] failed to get eclk dpm levels!", in vega12_setup_default_dpm_tables()
1220 "Failed to set soft min eclk!", in vega12_upload_dpm_min_level()
1304 "Failed to set soft max eclk!", in vega12_upload_dpm_max_level()
2496 /* eclk */ in vega12_apply_clocks_adjust_rules()
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| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | smu7.h | 46 #define SMU7_MAX_LEVELS_VCE 8 // ECLK levels for VCE.
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| H A D | smu7.h | 46 #define SMU7_MAX_LEVELS_VCE 8 // ECLK levels for VCE.
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| H A D | smu72.h | 114 #define SMU72_MAX_LEVELS_VCE 8 /* ECLK levels for VCE. */
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| H A D | smu74.h | 139 #define SMU74_MAX_LEVELS_VCE 8 /* ECLK levels for VCE */
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| H A D | smu73.h | 110 #define SMU73_MAX_LEVELS_VCE 8 // ECLK levels for VCE.
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| /openbmc/linux/arch/mips/cavium-octeon/executive/ |
| H A D | cvmx-helper-jtag.c | 59 * Clock divider for QLM JTAG operations. eclk is divided by in cvmx_helper_qlm_jtag_init()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dm_services_types.h | 65 struct dm_pp_clock_range eclk; member
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| /openbmc/linux/arch/x86/events/intel/ |
| H A D | uncore_snbep.c | 2445 * 0x7835 EDC0 EClk, EDC1 EClk, EDC2 EClk, EDC3 EClk,
2446 * EDC4 EClk, EDC5 EClk, EDC6 EClk, EDC7 EClk
2516 { /* EDC0 EClk */
2520 { /* EDC1 EClk */
2524 { /* EDC2 EClk */
2528 { /* EDC3 EClk */
2532 { /* EDC4 EClk */
2536 { /* EDC5 EClk */
2540 { /* EDC6 EClk */
2544 { /* EDC7 EClk */
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| /openbmc/qemu/include/hw/misc/ |
| H A D | aspeed_scu.h | 113 * 3:2 ECLK clock source selection
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| /openbmc/linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini-dlink-dir-685.dts | 113 /* Collides with LPC_LAD[2], UART DSR, SSP ECLK pins */
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| /openbmc/linux/sound/pci/asihpi/ |
| H A D | hpi6000.c | 843 4 TRRD = 0b = 2 ECLK (tRRD = 14ns) in hpi6000_adapter_boot_load_dsp()
844 3-1 TRAS = 5-1 = 100b (Tras=42ns = 5 ECLK) in hpi6000_adapter_boot_load_dsp()
845 1 CAS latency = 3 ECLK in hpi6000_adapter_boot_load_dsp()
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