| /openbmc/linux/drivers/zorro/ |
| H A D | zorro.ids | 21 0000 Stormbringer [Accelerator]
22 1300 Warp Engine [Accelerator, SCSI Host Adapter and RAM Expansion]
40 5000 A2620 68020 [Accelerator and RAM Expansion]
41 5100 A2630 68030 [Accelerator and RAM Expansion]
52 6900 A2000 68040 [Accelerator]
53 9600 68040 [Accelerator]
76 4500 VXL-30 [Accelerator]
90 3900 Hurricane 2800 [Accelerator and RAM Expansion]
91 5700 Hurricane 2800 [Accelerator and RAM Expansion]
112 1100 Magnum 40 [Accelerator and SCSI Host Adapter]
[all …]
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| /openbmc/linux/drivers/crypto/ |
| H A D | Kconfig | 75 or Accelerator (CEXxA) mode.
176 tristate "Driver HIFN 795x crypto accelerator chips"
232 tristate "Driver AMCC PPC4xx crypto accelerator"
263 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
272 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
286 OMAP processors have AES module accelerator. Select this if you
296 OMAP processors have DES/3DES module accelerator. Select this if you
304 tristate "Support for SAHARA crypto accelerator"
310 This option enables support for the SAHARA HW crypto accelerator
329 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
[all …]
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| /openbmc/linux/drivers/crypto/hisilicon/ |
| H A D | Kconfig | 4 tristate "Support for Hisilicon SEC crypto block cipher accelerator"
18 tristate "Support for HiSilicon SEC2 crypto block cipher accelerator"
49 HiSilicon accelerator engines use a common queue management
53 tristate "Support for HiSilicon ZIP accelerator"
64 tristate "Support for HISI HPRE accelerator"
76 accelerator, which can accelerate RSA and DH algorithms.
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| /openbmc/linux/Documentation/devicetree/bindings/crypto/ |
| H A D | img-hash.txt | 1 Imagination Technologies hardware hash accelerator
3 The hash accelerator provides hardware hashing acceleration for
8 - compatible : "img,hash-accelerator"
15 "hash" Used to clock data through the accelerator
20 compatible = "img,hash-accelerator";
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| /openbmc/qemu/tests/functional/qemu_test/ |
| H A D | testcase.py | 139 def require_accelerator(self, accelerator): argument
141 Requires an accelerator to be available for the test to continue
146 for the given accelerator is not available, the test is also
149 :param accelerator: name of the accelerator, such as "kvm" or "tcg"
150 :type accelerator: str
153 'kvm': kvm_available}.get(accelerator)
156 "of accelerator %s" % accelerator)
158 self.skipTest("%s accelerator does not seem to be "
159 "available" % accelerator)
|
| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | stericsson,db8500-prcmu.yaml | 123 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
124 voltage regulator. This is the voltage for the accelerator DSP
131 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
138 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
145 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
146 voltage regulator. This is the voltage for the accelerator DSP
153 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
160 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
167 description: Smart Graphics Accelerator (SGA) voltage regulator.
169 accelerator block.
|
| /openbmc/linux/Documentation/devicetree/bindings/dma/ |
| H A D | stericsson,dma40.yaml | 70 48: Crypto Accelerator 1
71 49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX
72 50: Hash Accelerator 1 TX
83 61: Crypto Accelerator 0
84 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
85 63: Hash Accelerator 0 TX
|
| /openbmc/linux/arch/powerpc/platforms/book3s/ |
| H A D | Kconfig | 3 bool "IBM Virtual Accelerator Switchboard (VAS)"
7 This enables support for IBM Virtual Accelerator Switchboard (VAS).
10 provide access to accelerator coprocessors such as NX-GZIP and
12 and user-mode APIs for the NX-GZIP accelerator on POWER9 PowerNV
|
| /openbmc/linux/drivers/staging/media/atomisp/pci/isp/kernels/sdis/common/ |
| H A D | ia_css_sdis_common_types.h | 114 /* DVS statistics generated by accelerator global configuration
125 /* DVS statistics generated by accelerator level grid
139 /* DVS statistics generated by accelerator level grid start
151 /* DVS statistics generated by accelerator level grid end
161 /* DVS statistics generated by accelerator Feature Extraction
175 /* DVS statistics generated by accelerator public configuration
186 /* DVS statistics grid generated by accelerator
198 /* DVS statistics generated by accelerator default grid info
215 /** DVS statistics produced by accelerator grid info */
|
| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/ |
| H A D | Accelerator.interface.yaml | 2 Implement to provide hardware accelerator attributes. A hardware accelerator
12 The type of accelerator.
17 Possible accelerator type
|
| /openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/ |
| H A D | 0013-CC312-ADAC-Add-PSA_WANT_ALG_SHA_256-definition.patch | 18 platform/ext/accelerator/cc312/psa-adac/CMakeLists.txt | 3 ++-
21 diff --git a/platform/ext/accelerator/cc312/psa-adac/CMakeLists.txt b/platform/ext/accelerator/cc31…
23 --- a/platform/ext/accelerator/cc312/psa-adac/CMakeLists.txt
24 +++ b/platform/ext/accelerator/cc312/psa-adac/CMakeLists.txt
|
| /openbmc/qemu/include/sysemu/ |
| H A D | accel-ops.h | 2 * Accelerator OPS, used for cpus.c module
24 * struct AccelOpsClass - accelerator interfaces
26 * This structure is used to abstract accelerator differences from the
56 * These allow the timer subsystem to defer to the accelerator to
57 * fetch time. The set function is needed if the accelerator wants
|
| /openbmc/u-boot/lib/rsa/ |
| H A D | Kconfig | 32 bool "Enable RSA Modular Exponentiation with FSL crypto accelerator"
36 accelerator - CAAM.
39 bool "Enable RSA Modular Exponentiation with ASPEED crypto accelerator"
43 accelerator - ARCY
|
| /openbmc/qemu/docs/devel/migration/ |
| H A D | uadk-compression.rst | 2 User Space Accelerator Development Kit (UADK) Compression
4 UADK is a general-purpose user space accelerator framework that uses shared
8 UADK includes Unified/User-space-access-intended Accelerator Framework (UACCE),
22 the hardware accelerator to support SVA, and the operating system to support
101 Here's an example to enable UACCE with hardware accelerator in HiSilicon
115 Accelerator dev node permissions
117 Hardware accelerators (eg: HiSilicon Kunpeng Zip accelerator) gets registered to
119 on hardware accelerator devices, write permission should be provided to user.
|
| /openbmc/linux/Documentation/misc-devices/ |
| H A D | uacce.rst | 6 Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
8 So accelerator can access any data structure of the main cpu.
13 Uacce takes the hardware accelerator as a heterogeneous processor, while
21 | User application (CPU) | | Hardware Accelerator |
95 The accelerator device present itself as an Uacce object, which exports as
175 match the right accelerator accordingly.
|
| /openbmc/qemu/tests/avocado/avocado_qemu/ |
| H A D | __init__.py | 282 def require_accelerator(self, accelerator): argument
284 Requires an accelerator to be available for the test to continue
289 for the given accelerator is not available, the test is also
292 :param accelerator: name of the accelerator, such as "kvm" or "tcg"
293 :type accelerator: str
296 'kvm': kvm_available}.get(accelerator)
299 "of accelerator %s" % accelerator)
301 self.cancel("%s accelerator does not seem to be "
302 "available" % accelerator)
|
| /openbmc/linux/drivers/crypto/stm32/ |
| H A D | Kconfig | 8 This enables support for the CRC32 hw accelerator which can be found
23 This enables support for the HASH hw accelerator which can be found
33 This enables support for the CRYP (AES/DES/TDES) hw accelerator which
|
| /openbmc/linux/drivers/misc/ocxl/ |
| H A D | Kconfig | 3 # Open Coherent Accelerator (OCXL) compatible devices
11 tristate "OpenCAPI coherent accelerator support"
17 Coherent Accelerator Processor Interface (OpenCAPI) devices.
|
| /openbmc/linux/Documentation/powerpc/ |
| H A D | cxl.rst | 2 Coherent Accelerator Interface (CXL)
8 The coherent accelerator interface is designed to allow the
11 Accelerator Interface Architecture (CAIA).
13 IBM refers to this as the Coherent Accelerator Processor Interface
17 Coherent in this context means that the accelerator and CPUs can
46 The POWER Service Layer (PSL) and the Accelerator Function Unit
52 The AFU is the core part of the accelerator (eg. the compression,
86 this mode, only one userspace process can use the accelerator at
91 applications may use the accelerator (although specific AFUs may
102 A portion of the accelerator MMIO space can be directly mapped
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/powerpc/4xx/ |
| H A D | ppc440spe-adma.txt | 1 PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator)
60 iii) XOR Accelerator node
64 - compatible : "amcc,xor-accelerator";
71 compatible = "amcc,xor-accelerator";
|
| /openbmc/linux/drivers/crypto/marvell/ |
| H A D | Kconfig | 19 Security Accelerator (CESA) which can be found on MVEBU and ORION
35 Accelerator Unit(CPT) found in OcteonTX series of processors.
55 Accelerator Unit(CPT) found in OcteonTX2 series of processors.
|
| /openbmc/qemu/include/hw/core/ |
| H A D | accel-cpu.h | 2 * Accelerator interface, specializes CPUClass
15 * This header is used to define new accelerator-specific target-specific
16 * accelerator cpu subclasses.
|
| /openbmc/linux/drivers/net/ethernet/chelsio/inline_crypto/ |
| H A D | Kconfig | 22 Support Chelsio Inline TLS with Chelsio crypto accelerator.
34 Support Chelsio Inline IPsec with Chelsio crypto accelerator.
48 crypto accelerator. CONFIG_CHELSIO_TLS_DEVICE flag can be enabled
|
| /openbmc/qemu/accel/ |
| H A D | accel-system.c | 37 ms->accelerator = accel; in accel_init_machine()
41 ms->accelerator = NULL; in accel_init_machine()
52 return current_machine->accelerator; in current_accel()
57 AccelState *accel = ms->accelerator; in accel_setup_post()
|
| /openbmc/linux/Documentation/accel/ |
| H A D | introduction.rst | 16 Typically, a compute accelerator will belong to one of the following
54 devices. In addition, new features that will be added for the accelerator
61 from trying to use an accelerator as a GPU, the compute accelerators will be
67 The accelerator devices will be exposed to the user space with the dedicated
85 To expose your device as an accelerator, two changes are needed to
|