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/openbmc/linux/arch/x86/lib/
H A Datomic64_386_32.S27 IRQ_SAVE v;
32 IRQ_RESTORE v; \
35 #define v %ecx macro
37 movl (v), %eax
38 movl 4(v), %edx
41 #undef v
43 #define v %esi macro
45 movl %ebx, (v)
46 movl %ecx, 4(v)
49 #undef v
[all …]
/openbmc/qemu/target/s390x/tcg/
H A Dinsn-format.h.inc9 F4(RIE_b, R(1, 8), R(2,12), M(3,32), I(4,16,16))
10 F4(RIE_c, R(1, 8), I(2,32, 8), M(3,12), I(4,16,16))
13 F5(RIE_f, R(1, 8), R(2,12), I(3,16,8), I(4,24,8), I(5,32,8))
18 F4(RIS, R(1, 8), I(2,32, 8), M(3,12), BD(4,16,20))
25 F4(RRF_a, R(1,24), R(2,28), R(3,16), M(4,20))
26 F4(RRF_b, R(1,24), R(2,28), R(3,16), M(4,20))
27 F4(RRF_c, R(1,24), R(2,28), M(3,16), M(4,20))
28 F4(RRF_d, R(1,24), R(2,28), M(3,16), M(4,20))
29 F4(RRF_e, R(1,24), R(2,28), M(3,16), M(4,20))
30 F4(RRS, R(1, 8), R(2,12), M(3,32), BD(4,16,20))
[all …]
/openbmc/linux/lib/crypto/
H A Dblake2s-generic.c20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
29 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/openbmc/linux/sound/soc/fsl/
H A Dfsl_easrc.h17 #define REG_EASRC_WRFIFO(ctx) (0x000 + 4 * (ctx))
19 #define REG_EASRC_RDFIFO(ctx) (0x010 + 4 * (ctx))
21 #define REG_EASRC_CC(ctx) (0x020 + 4 * (ctx))
23 #define REG_EASRC_CCE1(ctx) (0x030 + 4 * (ctx))
25 #define REG_EASRC_CCE2(ctx) (0x040 + 4 * (ctx))
27 #define REG_EASRC_CIA(ctx) (0x050 + 4 * (ctx))
29 #define REG_EASRC_DPCS0R0(ctx) (0x060 + 4 * (ctx))
30 #define REG_EASRC_DPCS0R1(ctx) (0x070 + 4 * (ctx))
31 #define REG_EASRC_DPCS0R2(ctx) (0x080 + 4 * (ctx))
32 #define REG_EASRC_DPCS0R3(ctx) (0x090 + 4 * (ctx))
[all …]
/openbmc/linux/drivers/staging/media/sunxi/sun6i-isp/
H A Dsun6i_isp_reg.h21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
29 #define SUN6I_ISP_FE_CTRL_LENS_UPDATE BIT(4)
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
41 #define SUN6I_ISP_FE_INT_EN_SRC0_FIFO BIT(4)
52 #define SUN6I_ISP_FE_INT_STA_SRC0_FIFO BIT(4)
82 #define SUN6I_ISP_MODULE_EN_BDNF BIT(4)
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
[all …]
/openbmc/linux/arch/powerpc/lib/
H A Dxor_vmx.c24 #define DEFINE(V) \ argument
25 unative_t *V = (unative_t *)V##_in; \
26 unative_t V##_0, V##_1, V##_2, V##_3
28 #define LOAD(V) \ argument
30 V##_0 = V[0]; \
31 V##_1 = V[1]; \
32 V##_2 = V[2]; \
33 V##_3 = V[3]; \
36 #define STORE(V) \ argument
38 V[0] = V##_0; \
[all …]
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dsubdev-formats.rst123 :widths: 3 1 4
260 - 4
476 - r\ :sub:`4`
481 - g\ :sub:`4`
513 - b\ :sub:`4`
550 - b\ :sub:`4`
583 - r\ :sub:`4`
588 - g\ :sub:`4`
611 - r\ :sub:`4`
617 - g\ :sub:`4`
[all …]
/openbmc/qemu/hw/display/
H A Dvga-helpers.h31 ((uint32_t *)d)[3] = (-((font_data >> 4) & 1) & xorcol) ^ bgcol; in vga_draw_glyph_line()
32 ((uint32_t *)d)[4] = (-((font_data >> 3) & 1) & xorcol) ^ bgcol; in vga_draw_glyph_line()
48 font_ptr += 4; in vga_draw_glyph8()
62 vga_draw_glyph_line(d, expand4to8[font_data >> 4], in vga_draw_glyph16()
66 font_ptr += 4; in vga_draw_glyph16()
75 uint32_t font_data, xorcol, v; in vga_draw_glyph9() local
83 ((uint32_t *)d)[3] = (-((font_data >> 4) & 1) & xorcol) ^ bgcol; in vga_draw_glyph9()
84 ((uint32_t *)d)[4] = (-((font_data >> 3) & 1) & xorcol) ^ bgcol; in vga_draw_glyph9()
87 v = (-((font_data >> 0) & 1) & xorcol) ^ bgcol; in vga_draw_glyph9()
88 ((uint32_t *)d)[7] = v; in vga_draw_glyph9()
[all …]
/openbmc/linux/arch/microblaze/lib/
H A Dfastcopy.S43 addi r4, r0, 4 /* n = 4 */
51 /* n = 4 - n (yields 3, 2, 1 transfers for 1, 2, 3 addr offset) */
52 rsubi r4, r4, 4
81 lwi r10, r6, 4 /* t2 = *(s + 4) */
85 swi r10, r5, 4 /* *(d + 4) = t2 */
115 lwi r12, r8, 4 /* v = *(as + 4) */
116 bsrli r9, r12, 8 /* t1 = v >> 8 */
119 bslli r11, r12, 24 /* h = v << 24 */
120 lwi r12, r8, 8 /* v = *(as + 8) */
121 bsrli r9, r12, 8 /* t1 = v >> 8 */
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dcrm_regs.h80 #define MXC_CCM_CCR_OSCNT(v) ((v) & 0xFF) argument
92 #define MXC_CCM_CCSR_STEP_SEL(v) (((v) & 0x3) << 7) argument
96 #define MXC_CCM_CCSR_PLL2_DIV_PODF(v) (((v) & 0x3) << 5) argument
100 #define MXC_CCM_CCSR_PLL3_DIV_PODF(v) (((v) & 0x3) << 3) argument
109 #define MXC_CCM_CACRR_ARM_PODF(v) ((v) & 0x7) argument
116 #define MXC_CCM_CBCDR_DDR_PODF(v) (((v) & 0x7) << 27) argument
122 #define MXC_CCM_CBCDR_EMI_PODF(v) (((v) & 0x7) << 22) argument
126 #define MXC_CCM_CBCDR_AXI_B_PODF(v) (((v) & 0x7) << 19) argument
130 #define MXC_CCM_CBCDR_AXI_A_PODF(v) (((v) & 0x7) << 16) argument
134 #define MXC_CCM_CBCDR_NFC_PODF(v) (((v) & 0x7) << 13) argument
[all …]
/openbmc/linux/arch/arm/crypto/
H A Dblake2s-core.S29 ldr \b, [\src, #\offset + 4]
38 str \b, [\dst, #\offset + 4]
70 ldr M_0, [sp, #32 + 4 * \s0]
71 ldr M_1, [sp, #32 + 4 * \s2]
91 ldr M_0, [sp, #32 + 4 * \s1]
92 ldr M_1, [sp, #32 + 4 * \s3]
113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
115 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
132 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
133 __ldrd r10, r11, sp, 16 // load v[12] and v[13]
[all …]
H A Dblake2b-neon-core.S47 .align 4
53 .byte 3, 4, 5, 6, 7, 0, 1, 2
55 .byte 2, 3, 4, 5, 6, 7, 0, 1
63 // Execute one round of BLAKE2b by updating the state matrix v[0..15] in the
73 // (v[0], v[4], v[8], v[12]), (v[1], v[5], v[9], v[13]),
74 // (v[2], v[6], v[10], v[14]), and (v[3], v[7], v[11], v[15]).
145 // (v[0], v[5], v[10], v[15]), (v[1], v[6], v[11], v[12]),
146 // (v[2], v[7], v[8], v[13]), and (v[3], v[4], v[9], v[14]).
260 vld1.64 {q2-q3}, [ip]! // Load h[4..7]
266 vld1.64 {q6-q7}, [r10] // Load IV[4..7]
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_ids.c28 LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS),
29 LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS),
30 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS),
31 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS),
32 LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS),
33 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS),
35 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS),
42 {"TC58NVG0S3E 1G 3.3V 8-bit",
46 {"TC58NVG2S0F 4G 3.3V 8-bit",
48 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
[all …]
/openbmc/linux/crypto/
H A Dblake2b_generic.c26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
32 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
33 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
34 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
35 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/openbmc/qemu/tests/unit/
H A Dtest-fifo.c31 * head --v-- tail used = 0 in test_fifo8_pop_bufptr_wrap()
37 * head --v ]-- tail used = 4 in test_fifo8_pop_bufptr_wrap()
38 * FIFO: [ 1 2 3 4 . . . . ] in test_fifo8_pop_bufptr_wrap()
42 * head --v ]-- tail used = 2 in test_fifo8_pop_bufptr_wrap()
43 * FIFO: [ 1 2 3 4 . . . . ] in test_fifo8_pop_bufptr_wrap()
51 * tail --]v-- head used = 8 in test_fifo8_pop_bufptr_wrap()
52 * FIFO: [ 9 a 3 4 5 6 7 8 ] in test_fifo8_pop_bufptr_wrap()
56 * head --v ]-- tail used = 2 in test_fifo8_pop_bufptr_wrap()
57 * FIFO: [ 9 a 3 4 5 6 7 8 ] in test_fifo8_pop_bufptr_wrap()
62 buf[3] == 0x6 && buf[4] == 0x7 && buf[5] == 0x8); in test_fifo8_pop_bufptr_wrap()
[all …]
/openbmc/linux/tools/testing/selftests/rseq/
H A Drseq-arm64-bits.h15 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
20 RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
27 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
29 RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) in RSEQ_TEMPLATE_IDENTIFIER()
30 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
33 RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) in RSEQ_TEMPLATE_IDENTIFIER()
35 RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) in RSEQ_TEMPLATE_IDENTIFIER()
37 RSEQ_ASM_DEFINE_ABORT(4, abort) in RSEQ_TEMPLATE_IDENTIFIER()
42 [v] "Qo" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
72 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpnev_storeoffp_load)(intptr_t *v, intptr_t expectnot, in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-riscv-bits.h9 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
13 __asm__ __volatile__ goto(RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
20 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
22 RSEQ_ASM_OP_CMPEQ(v, expect, "%l[cmpfail]") in RSEQ_TEMPLATE_IDENTIFIER()
23 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
26 RSEQ_ASM_OP_CMPEQ(v, expect, "%l[error2]") in RSEQ_TEMPLATE_IDENTIFIER()
28 RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) in RSEQ_TEMPLATE_IDENTIFIER()
30 RSEQ_ASM_DEFINE_ABORT(4, abort) in RSEQ_TEMPLATE_IDENTIFIER()
35 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
62 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpnev_storeoffp_load)(intptr_t *v, intptr_t expectnot, in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-mips-bits.h14 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
19 RSEQ_ASM_DEFINE_TABLE(9, 1f, 2f, 4f) /* start, commit, abort */ in RSEQ_TEMPLATE_IDENTIFIER()
27 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
29 LONG_L " $4, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
30 "bne $4, %[expect], %l[cmpfail]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
31 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
34 LONG_L " $4, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
35 "bne $4, %[expect], %l[error2]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
38 LONG_S " %[newv], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
42 RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-ppc-bits.h15 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
20 RSEQ_ASM_DEFINE_TABLE(3, 1f, 2f, 4f) /* start, commit, abort */ in RSEQ_TEMPLATE_IDENTIFIER()
29 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
31 /* cmp @v equal to @expect */ in RSEQ_TEMPLATE_IDENTIFIER()
32 RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) in RSEQ_TEMPLATE_IDENTIFIER()
33 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
37 /* cmp @v equal to @expect */ in RSEQ_TEMPLATE_IDENTIFIER()
38 RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) in RSEQ_TEMPLATE_IDENTIFIER()
41 RSEQ_ASM_OP_FINAL_STORE(newv, v, 2) in RSEQ_TEMPLATE_IDENTIFIER()
43 RSEQ_ASM_DEFINE_ABORT(4, abort) in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-x86-bits.h16 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
21 RSEQ_ASM_DEFINE_TABLE(3, 1f, 2f, 4f) /* start, commit, abort */ in RSEQ_TEMPLATE_IDENTIFIER()
29 RSEQ_ASM_CMP_CPU_ID(cpu_id, RSEQ_ASM_TP_SEGMENT:RSEQ_TEMPLATE_CPU_ID_OFFSET(%[rseq_offset]), 4f) in RSEQ_TEMPLATE_IDENTIFIER()
31 "cmpq %[v], %[expect]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
33 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
36 "cmpq %[v], %[expect]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
40 "movq %[newv], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
43 RSEQ_ASM_DEFINE_ABORT(4, "", abort) in RSEQ_TEMPLATE_IDENTIFIER()
47 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
77 * Compare @v against @expectnot. When it does _not_ match, load @v
[all …]
/openbmc/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
76 #define VE_PRIMARY_OUT_FMT_TILED_32_NV12 (0x00 << 4)
77 #define VE_PRIMARY_OUT_FMT_TILED_128_NV12 (0x01 << 4)
78 #define VE_PRIMARY_OUT_FMT_YU12 (0x02 << 4)
79 #define VE_PRIMARY_OUT_FMT_YV12 (0x03 << 4)
80 #define VE_PRIMARY_OUT_FMT_NV12 (0x04 << 4)
81 #define VE_PRIMARY_OUT_FMT_NV21 (0x05 << 4)
96 #define VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) (24 - 4 * (y) - 8 * (x))
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
[all …]
/openbmc/linux/drivers/mtd/nand/raw/
H A Dnand_ids.c29 {"TC58NVG0S3E 1G 3.3V 8-bit",
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNQGAMA 64G 3.3V 8-bit",
50 {"SDTNRGAMA 64G 3.3V 8-bit",
[all …]
/openbmc/linux/drivers/media/platform/verisilicon/
H A Drockchip_vpu2_hw_h264_dec.c21 #define VDPU_SWREG(nr) ((nr) * 4)
28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dsiul.h21 #define SIUL2_IFMCRn(i) (SIUL2_IFMCR_BASE + 4 * (i))
29 #define SIUL2_MSCRn(i) (SIUL2_MSCR_BASE + 4 * (i))
32 #define SIUL2_IMCRn(i) (SIUL2_IMCR_BASE + 4 * (i))
35 #define SIUL2_GPDOn(i) (SIUL2_GPDO_BASE + 4 * (i))
38 #define SIUL2_GPDIn(i) (SIUL2_GPDI_BASE + 4 * (i))
47 #define SIUL2_MPGPDOn(i) (SIUL2_MPGPDO_BASE + 4 * (i))
50 #define SIUL2_MSCR_DDR_DO_TRIM(v) ((v) & 0xC0000000) argument
56 #define SIUL2_MSCR_DDR_INPUT(v) ((v) & 0x20000000) argument
60 #define SIUL2_MSCR_DDR_SEL(v) ((v) & 0x18000000) argument
64 #define SIUL2_MSCR_DDR_ODT(v) ((v) & 0x07000000) argument
[all …]
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Dmsm_media_info.h20 * YUV 4:2:0 image with a plane of 8 bit Y samples followed
21 * by an interleaved U/V plane containing 8 bit 2x2 subsampled
33 * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V |
37 * . . . . . . . . . . . . . . . . V
38 * U V U V U V U V U V U V . . . . ^
39 * U V U V U V U V U V U V . . . . |
40 * U V U V U V U V U V U V . . . . |
41 * U V U V U V U V U V U V . . . . UV_Scanlines
43 * . . . . . . . . . . . . . . . . V
58 * YUV 4:2:0 image with a plane of 8 bit Y samples followed
[all …]

12345678910>>...54