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/openbmc/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dhi6220-domain-ctrl.yaml52 reg = <0xf7800000 0x2000>;
59 reg = <0xf4410000 0x1000>;
65 reg = <0xf7032000 0x1000>;
/openbmc/u-boot/arch/arm/dts/
H A Dhi6220.dtsi23 #size-cells = <0>;
56 cpu0: cpu@0 {
59 reg = <0x0 0x0>;
66 reg = <0x0 0x1>;
73 reg = <0x0 0x2>;
80 reg = <0x0 0x3>;
87 reg = <0x0 0x100>;
94 reg = <0x0 0x101>;
101 reg = <0x0 0x102>;
108 reg = <0x0 0x103>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220.dtsi27 #size-cells = <0>;
66 arm,psci-suspend-param = <0x0010000>;
75 arm,psci-suspend-param = <0x1010000>;
83 cpu0: cpu@0 {
86 reg = <0x0 0x0>;
89 clocks = <&stub_clock 0>;
99 reg = <0x0 0x1>;
102 clocks = <&stub_clock 0>;
112 reg = <0x0 0x2>;
115 clocks = <&stub_clock 0>;
[all …]