Searched +full:0 +full:x8000f000 (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | stericsson,u8500-clks.yaml | 54 wants, possible values are 0 thru 31.
68 values are 0 thru 31.
82 it wants to control, possible values are 0 thru 31.
97 const: 0
108 const: 0
122 possible values are 0 (CLKOUT1) and 1 (CLKOUT2).
124 possible values are 0 thru 7, see the defines for the different
147 reg = <0x8012f000 0x1000>, <0x8011f000 0x1000>,
148 <0x8000f000 0x1000>, <0xa03ff000 0x1000>,
149 <0xa03cf000 0x1000>;
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| /openbmc/qemu/hw/mips/ |
| H A D | jazz.c | 78 address_space_read(&address_space_memory, 0x90000071, in rtc_read()
86 uint8_t buf = val & 0xff; in rtc_write()
87 address_space_write(&address_space_memory, 0x90000071, in rtc_write()
104 return 0xff; in dma_dummy_read()
144 sysbus_mmio_map(sysbus, 0, 0x80001000); in mips_jazz_init_net()
145 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 4)); in mips_jazz_init_net()
149 checksum = 0; in mips_jazz_init_net()
150 for (i = 0; i < 6; i++) { in mips_jazz_init_net()
153 if (checksum > 0xff) { in mips_jazz_init_net()
154 checksum = (checksum + 1) & 0xff; in mips_jazz_init_net()
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| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | ste-dbx5x0.dtsi | 40 #size-cells = <0>;
56 reg = <0x300>;
65 reg = <0x301>;
81 polling-delay = <0>;
93 hysteresis = <0>;
121 /* The first (always on) ESRAM 0, 128 KB */
123 reg = <0x40000000 0x20000>;
126 ranges = <0 0x40000000 0x20000>;
128 sram@0 {
130 reg = <0x0 0x10000>;
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| /openbmc/qemu/disas/ |
| H A D | nanomips.c | 62 return g_strdup_printf("0x%" PRIx64, a); in to_string()
97 * 1 0
98 * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
107 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
108 * 3 2 1 0
123 sizeof(register_list) / sizeof(register_list[0]), info); in decode_gpr_gpr4()
132 * 1 0
133 * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
142 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
143 * 3 2 1 0
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