Searched +full:0 +full:x10009 (Results 1 – 14 of 14) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/perf/ |
H A D | riscv,pmu.yaml | 78 value of variant must be 0xffffffff_ffffffff. 104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>; 105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>, 106 <0x00002 0x00002 0x00000004>, 107 <0x00003 0x0000A 0x00000ff8>, 108 <0x10000 0x10033 0x000ff000>; 110 /* For event ID 0x0002 */ 111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>, 112 /* For event ID 0-4 */ 113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>, [all …]
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8994-huawei-angler-rev-101.dts | 17 qcom,msm-id = <207 0x20000>; 18 qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>; 19 qcom,board-id = <8026 0>; 35 reg = <0 0x03401000 0 0x1000000>; 40 reg = <0 0x04800000 0 0x1900000>; 45 reg = <0 0x06300000 0 0x700000>; 54 pinctrl-0 = <&blsp1_uart2_default>;
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H A D | msm8992-lg-bullhead.dtsi | 26 qcom,msm-id = <251 0>, <252 0>; 27 qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>; 47 reg = <0x0 0x1ff00000 0x0 0x40000>; 48 console-size = <0x10000>; 49 record-size = <0x10000>; 50 ftrace-size = <0x10000>; 51 pmsg-size = <0x20000>; 55 reg = <0 0x03400000 0 0xc00000>; 60 reg = <0x0 0x05000000 0x0 0x1a00000>; 71 pm8994_regulators: regulators-0 {
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H A D | msm8994-sony-xperia-kitakami.dtsi | 16 * We support MSM8994 v2 (0x20000) and v2.1 (0x20001). 17 * The V1 chip (0x0 and 0x10000) is significantly different 21 qcom,msm-id = <207 0x20000>, <207 0x20001>; 23 qcom,pmic-id = <0x10009 0x1000a 0x00 0x00>; 25 qcom,board-id = <8 0>; 34 button-0 { 75 reg = <0 0x1fe00000 0 0x200000>; 76 console-size = <0x100000>; 77 record-size = <0x10000>; 78 ftrace-size = <0x10000>; [all …]
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/openbmc/u-boot/tools/ |
H A D | mtk_image.h | 22 uint8_t pad[0x200]; 47 uint8_t data[0x80]; 68 #define BRLYT_MAGIC 0x42424242 71 BRLYT_TYPE_INVALID = 0, 72 BRLYT_TYPE_NAND = 0x10002, 73 BRLYT_TYPE_EMMC = 0x10005, 74 BRLYT_TYPE_NOR = 0x10007, 75 BRLYT_TYPE_SDMMC = 0x10008, 76 BRLYT_TYPE_SNAND = 0x10009 85 uint8_t brlyt_pad[0x400]; [all …]
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/openbmc/linux/drivers/media/platform/qcom/venus/ |
H A D | hfi_cmds.h | 12 #define HFI_CMD_SYS_INIT 0x10001 13 #define HFI_CMD_SYS_PC_PREP 0x10002 14 #define HFI_CMD_SYS_SET_RESOURCE 0x10003 15 #define HFI_CMD_SYS_RELEASE_RESOURCE 0x10004 16 #define HFI_CMD_SYS_SET_PROPERTY 0x10005 17 #define HFI_CMD_SYS_GET_PROPERTY 0x10006 18 #define HFI_CMD_SYS_SESSION_INIT 0x10007 19 #define HFI_CMD_SYS_SESSION_END 0x10008 20 #define HFI_CMD_SYS_SET_BUFFERS 0x10009 21 #define HFI_CMD_SYS_TEST_SSR 0x10101 [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6q-marsboard.dts | 52 reg = <0x10000000 0x40000000>; 74 pinctrl-0 = <&pinctrl_led>; 93 pinctrl-0 = <&pinctrl_audmux>; 99 pinctrl-0 = <&pinctrl_ecspi1>; 103 flash@0 { 106 reg = <0>; 112 pinctrl-0 = <&pinctrl_enet>; 119 #size-cells = <0>; 140 pinctrl-0 = <&pinctrl_i2c1>; 147 pinctrl-0 = <&pinctrl_i2c2>; [all …]
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/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/ |
H A D | sdio.h | 13 #define SDIOD_FBR_SIZE 0x100 16 #define SDIO_FUNC_ENABLE_1 0x02 17 #define SDIO_FUNC_ENABLE_2 0x04 20 #define SDIO_FUNC_READY_1 0x02 21 #define SDIO_FUNC_READY_2 0x04 24 #define INTR_STATUS_FUNC1 0x2 25 #define INTR_STATUS_FUNC2 0x4 28 #define REG_F0_REG_MASK 0x7FF 29 #define REG_F1_MISC_MASK 0x1FFFF 31 /* function 0 vendor specific CCCR registers */ [all …]
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/openbmc/linux/drivers/perf/hisilicon/ |
H A D | hns3_pmu.c | 29 #define HNS3_PMU_REG_GLOBAL_CTRL 0x0000 30 #define HNS3_PMU_REG_CLOCK_FREQ 0x0020 31 #define HNS3_PMU_REG_BDF 0x0fe0 32 #define HNS3_PMU_REG_VERSION 0x0fe4 33 #define HNS3_PMU_REG_DEVICE_ID 0x0fe8 35 #define HNS3_PMU_REG_EVENT_OFFSET 0x1000 36 #define HNS3_PMU_REG_EVENT_SIZE 0x1000 37 #define HNS3_PMU_REG_EVENT_CTRL_LOW 0x00 38 #define HNS3_PMU_REG_EVENT_CTRL_HIGH 0x04 39 #define HNS3_PMU_REG_EVENT_INTR_STATUS 0x08 [all …]
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/ |
H A D | nbio_7_9_0_offset.h | 29 // base address: 0x0 30 …BIF_BX0_PCIE_INDEX 0x000c 31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 0 32 …BIF_BX0_PCIE_DATA 0x000d 33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 0 34 …BIF_BX0_PCIE_INDEX2 0x000e 35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 0 36 …BIF_BX0_PCIE_DATA2 0x000f 37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 0 38 …BIF_BX0_PCIE_INDEX_HI 0x0010 [all …]
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H A D | nbio_4_3_0_offset.h | 29 // base address: 0x0 30 …BIF_BX0_PCIE_INDEX 0x000c 31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 0 32 …BIF_BX0_PCIE_DATA 0x000d 33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 0 34 …BIF_BX0_PCIE_INDEX2 0x000e 35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 0 36 …BIF_BX0_PCIE_DATA2 0x000f 37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 0 38 …BIF_BX0_PCIE_INDEX_HI 0x0010 [all …]
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H A D | nbio_7_2_0_offset.h | 26 // base address: 0x0 27 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000 28 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002 29 …BIF_CFG_DEV0_RC_COMMAND 0x0004 30 …BIF_CFG_DEV0_RC_STATUS 0x0006 31 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008 32 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009 33 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a 34 …BIF_CFG_DEV0_RC_BASE_CLASS 0x000b 35 …BIF_CFG_DEV0_RC_CACHE_LINE 0x000c [all …]
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H A D | nbio_7_7_0_offset.h | 29 // base address: 0x0 30 …NBCFG_SCRATCH_4 0x0078 34 // base address: 0x0 35 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000 36 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002 37 …BIF_CFG_DEV0_RC_COMMAND 0x0004 38 …BIF_CFG_DEV0_RC_STATUS 0x0006 39 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008 40 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009 41 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a [all …]
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/openbmc/linux/drivers/scsi/qla2xxx/ |
H A D | qla_target.c | 37 "Enables Sequence level error recovery (aka FC Tape). Default is 0 - no SLER. 1 - Enable SLER."); 67 FCP_TMF_CMPL = 0, 79 #define FCP_PTA_SIMPLE 0 /* simple task attribute */ 85 #define FCP_PRI_RESVD_MASK 0x80 /* reserved bits in priority field */ 167 if (unlikely(vha->marker_needed != 0)) { in qlt_issue_marker() 171 ql_dbg(ql_dbg_tgt, vha, 0xe03d, in qlt_issue_marker() 195 ql_dbg(ql_dbg_tgt_mgt + ql_dbg_verbose, vha, 0xf005, in qla_find_host_by_d_id() 231 ql_dbg(ql_dbg_async, vha, 0x502c, in qlt_queue_unknown_atio() 255 qlt_send_term_exchange(vha->hw->base_qpair, NULL, atio, ha_locked, 0); in qlt_queue_unknown_atio() 266 uint8_t queued = 0; in qlt_try_to_dequeue_unknown_atios() [all …]
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