1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * driver for Microchip PQI-based storage controllers
4 * Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries
5 * Copyright (c) 2016-2018 Microsemi Corporation
6 * Copyright (c) 2016 PMC-Sierra, Inc.
7 *
8 * Questions/Comments/Bugfixes to storagedev@microchip.com
9 *
10 */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/pci.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/sched.h>
18 #include <linux/rtc.h>
19 #include <linux/bcd.h>
20 #include <linux/reboot.h>
21 #include <linux/cciss_ioctl.h>
22 #include <linux/blk-mq-pci.h>
23 #include <scsi/scsi_host.h>
24 #include <scsi/scsi_cmnd.h>
25 #include <scsi/scsi_device.h>
26 #include <scsi/scsi_eh.h>
27 #include <scsi/scsi_transport_sas.h>
28 #include <asm/unaligned.h>
29 #include "smartpqi.h"
30 #include "smartpqi_sis.h"
31
32 #if !defined(BUILD_TIMESTAMP)
33 #define BUILD_TIMESTAMP
34 #endif
35
36 #define DRIVER_VERSION "2.1.24-046"
37 #define DRIVER_MAJOR 2
38 #define DRIVER_MINOR 1
39 #define DRIVER_RELEASE 24
40 #define DRIVER_REVISION 46
41
42 #define DRIVER_NAME "Microchip SmartPQI Driver (v" \
43 DRIVER_VERSION BUILD_TIMESTAMP ")"
44 #define DRIVER_NAME_SHORT "smartpqi"
45
46 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor))
47
48 #define PQI_POST_RESET_DELAY_SECS 5
49 #define PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS 10
50
51 #define PQI_NO_COMPLETION ((void *)-1)
52
53 MODULE_AUTHOR("Microchip");
54 MODULE_DESCRIPTION("Driver for Microchip Smart Family Controller version "
55 DRIVER_VERSION);
56 MODULE_VERSION(DRIVER_VERSION);
57 MODULE_LICENSE("GPL");
58
59 struct pqi_cmd_priv {
60 int this_residual;
61 };
62
pqi_cmd_priv(struct scsi_cmnd * cmd)63 static struct pqi_cmd_priv *pqi_cmd_priv(struct scsi_cmnd *cmd)
64 {
65 return scsi_cmd_priv(cmd);
66 }
67
68 static void pqi_verify_structures(void);
69 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info,
70 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason);
71 static void pqi_ctrl_offline_worker(struct work_struct *work);
72 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info);
73 static void pqi_scan_start(struct Scsi_Host *shost);
74 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
75 struct pqi_queue_group *queue_group, enum pqi_io_path path,
76 struct pqi_io_request *io_request);
77 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
78 struct pqi_iu_header *request, unsigned int flags,
79 struct pqi_raid_error_info *error_info);
80 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
81 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
82 unsigned int cdb_length, struct pqi_queue_group *queue_group,
83 struct pqi_encryption_info *encryption_info, bool raid_bypass, bool io_high_prio);
84 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info,
85 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
86 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
87 struct pqi_scsi_dev_raid_map_data *rmd);
88 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info,
89 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
90 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
91 struct pqi_scsi_dev_raid_map_data *rmd);
92 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info);
93 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info);
94 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs);
95 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info);
96 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info);
97 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info);
98 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
99 struct pqi_scsi_dev *device, u8 lun, unsigned long timeout_msecs);
100 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info);
101 static void pqi_tmf_worker(struct work_struct *work);
102
103 /* for flags argument to pqi_submit_raid_request_synchronous() */
104 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1
105
106 static struct scsi_transport_template *pqi_sas_transport_template;
107
108 static atomic_t pqi_controller_count = ATOMIC_INIT(0);
109
110 enum pqi_lockup_action {
111 NONE,
112 REBOOT,
113 PANIC
114 };
115
116 static enum pqi_lockup_action pqi_lockup_action = NONE;
117
118 static struct {
119 enum pqi_lockup_action action;
120 char *name;
121 } pqi_lockup_actions[] = {
122 {
123 .action = NONE,
124 .name = "none",
125 },
126 {
127 .action = REBOOT,
128 .name = "reboot",
129 },
130 {
131 .action = PANIC,
132 .name = "panic",
133 },
134 };
135
136 static unsigned int pqi_supported_event_types[] = {
137 PQI_EVENT_TYPE_HOTPLUG,
138 PQI_EVENT_TYPE_HARDWARE,
139 PQI_EVENT_TYPE_PHYSICAL_DEVICE,
140 PQI_EVENT_TYPE_LOGICAL_DEVICE,
141 PQI_EVENT_TYPE_OFA,
142 PQI_EVENT_TYPE_AIO_STATE_CHANGE,
143 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE,
144 };
145
146 static int pqi_disable_device_id_wildcards;
147 module_param_named(disable_device_id_wildcards,
148 pqi_disable_device_id_wildcards, int, 0644);
149 MODULE_PARM_DESC(disable_device_id_wildcards,
150 "Disable device ID wildcards.");
151
152 static int pqi_disable_heartbeat;
153 module_param_named(disable_heartbeat,
154 pqi_disable_heartbeat, int, 0644);
155 MODULE_PARM_DESC(disable_heartbeat,
156 "Disable heartbeat.");
157
158 static int pqi_disable_ctrl_shutdown;
159 module_param_named(disable_ctrl_shutdown,
160 pqi_disable_ctrl_shutdown, int, 0644);
161 MODULE_PARM_DESC(disable_ctrl_shutdown,
162 "Disable controller shutdown when controller locked up.");
163
164 static char *pqi_lockup_action_param;
165 module_param_named(lockup_action,
166 pqi_lockup_action_param, charp, 0644);
167 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n"
168 "\t\tSupported: none, reboot, panic\n"
169 "\t\tDefault: none");
170
171 static int pqi_expose_ld_first;
172 module_param_named(expose_ld_first,
173 pqi_expose_ld_first, int, 0644);
174 MODULE_PARM_DESC(expose_ld_first, "Expose logical drives before physical drives.");
175
176 static int pqi_hide_vsep;
177 module_param_named(hide_vsep,
178 pqi_hide_vsep, int, 0644);
179 MODULE_PARM_DESC(hide_vsep, "Hide the virtual SEP for direct attached drives.");
180
181 static int pqi_disable_managed_interrupts;
182 module_param_named(disable_managed_interrupts,
183 pqi_disable_managed_interrupts, int, 0644);
184 MODULE_PARM_DESC(disable_managed_interrupts,
185 "Disable the kernel automatically assigning SMP affinity to IRQs.");
186
187 static unsigned int pqi_ctrl_ready_timeout_secs;
188 module_param_named(ctrl_ready_timeout,
189 pqi_ctrl_ready_timeout_secs, uint, 0644);
190 MODULE_PARM_DESC(ctrl_ready_timeout,
191 "Timeout in seconds for driver to wait for controller ready.");
192
193 static char *raid_levels[] = {
194 "RAID-0",
195 "RAID-4",
196 "RAID-1(1+0)",
197 "RAID-5",
198 "RAID-5+1",
199 "RAID-6",
200 "RAID-1(Triple)",
201 };
202
pqi_raid_level_to_string(u8 raid_level)203 static char *pqi_raid_level_to_string(u8 raid_level)
204 {
205 if (raid_level < ARRAY_SIZE(raid_levels))
206 return raid_levels[raid_level];
207
208 return "RAID UNKNOWN";
209 }
210
211 #define SA_RAID_0 0
212 #define SA_RAID_4 1
213 #define SA_RAID_1 2 /* also used for RAID 10 */
214 #define SA_RAID_5 3 /* also used for RAID 50 */
215 #define SA_RAID_51 4
216 #define SA_RAID_6 5 /* also used for RAID 60 */
217 #define SA_RAID_TRIPLE 6 /* also used for RAID 1+0 Triple */
218 #define SA_RAID_MAX SA_RAID_TRIPLE
219 #define SA_RAID_UNKNOWN 0xff
220
pqi_scsi_done(struct scsi_cmnd * scmd)221 static inline void pqi_scsi_done(struct scsi_cmnd *scmd)
222 {
223 pqi_prep_for_scsi_done(scmd);
224 scsi_done(scmd);
225 }
226
pqi_disable_write_same(struct scsi_device * sdev)227 static inline void pqi_disable_write_same(struct scsi_device *sdev)
228 {
229 sdev->no_write_same = 1;
230 }
231
pqi_scsi3addr_equal(u8 * scsi3addr1,u8 * scsi3addr2)232 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2)
233 {
234 return memcmp(scsi3addr1, scsi3addr2, 8) == 0;
235 }
236
pqi_is_logical_device(struct pqi_scsi_dev * device)237 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device)
238 {
239 return !device->is_physical_device;
240 }
241
pqi_is_external_raid_addr(u8 * scsi3addr)242 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr)
243 {
244 return scsi3addr[2] != 0;
245 }
246
pqi_ctrl_offline(struct pqi_ctrl_info * ctrl_info)247 static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info)
248 {
249 return !ctrl_info->controller_online;
250 }
251
pqi_check_ctrl_health(struct pqi_ctrl_info * ctrl_info)252 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info)
253 {
254 if (ctrl_info->controller_online)
255 if (!sis_is_firmware_running(ctrl_info))
256 pqi_take_ctrl_offline(ctrl_info, PQI_FIRMWARE_KERNEL_NOT_UP);
257 }
258
pqi_is_hba_lunid(u8 * scsi3addr)259 static inline bool pqi_is_hba_lunid(u8 *scsi3addr)
260 {
261 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID);
262 }
263
264 #define PQI_DRIVER_SCRATCH_PQI_MODE 0x1
265 #define PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED 0x2
266
pqi_get_ctrl_mode(struct pqi_ctrl_info * ctrl_info)267 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(struct pqi_ctrl_info *ctrl_info)
268 {
269 return sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_PQI_MODE ? PQI_MODE : SIS_MODE;
270 }
271
pqi_save_ctrl_mode(struct pqi_ctrl_info * ctrl_info,enum pqi_ctrl_mode mode)272 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info,
273 enum pqi_ctrl_mode mode)
274 {
275 u32 driver_scratch;
276
277 driver_scratch = sis_read_driver_scratch(ctrl_info);
278
279 if (mode == PQI_MODE)
280 driver_scratch |= PQI_DRIVER_SCRATCH_PQI_MODE;
281 else
282 driver_scratch &= ~PQI_DRIVER_SCRATCH_PQI_MODE;
283
284 sis_write_driver_scratch(ctrl_info, driver_scratch);
285 }
286
pqi_is_fw_triage_supported(struct pqi_ctrl_info * ctrl_info)287 static inline bool pqi_is_fw_triage_supported(struct pqi_ctrl_info *ctrl_info)
288 {
289 return (sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED) != 0;
290 }
291
pqi_save_fw_triage_setting(struct pqi_ctrl_info * ctrl_info,bool is_supported)292 static inline void pqi_save_fw_triage_setting(struct pqi_ctrl_info *ctrl_info, bool is_supported)
293 {
294 u32 driver_scratch;
295
296 driver_scratch = sis_read_driver_scratch(ctrl_info);
297
298 if (is_supported)
299 driver_scratch |= PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED;
300 else
301 driver_scratch &= ~PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED;
302
303 sis_write_driver_scratch(ctrl_info, driver_scratch);
304 }
305
pqi_ctrl_block_scan(struct pqi_ctrl_info * ctrl_info)306 static inline void pqi_ctrl_block_scan(struct pqi_ctrl_info *ctrl_info)
307 {
308 ctrl_info->scan_blocked = true;
309 mutex_lock(&ctrl_info->scan_mutex);
310 }
311
pqi_ctrl_unblock_scan(struct pqi_ctrl_info * ctrl_info)312 static inline void pqi_ctrl_unblock_scan(struct pqi_ctrl_info *ctrl_info)
313 {
314 ctrl_info->scan_blocked = false;
315 mutex_unlock(&ctrl_info->scan_mutex);
316 }
317
pqi_ctrl_scan_blocked(struct pqi_ctrl_info * ctrl_info)318 static inline bool pqi_ctrl_scan_blocked(struct pqi_ctrl_info *ctrl_info)
319 {
320 return ctrl_info->scan_blocked;
321 }
322
pqi_ctrl_block_device_reset(struct pqi_ctrl_info * ctrl_info)323 static inline void pqi_ctrl_block_device_reset(struct pqi_ctrl_info *ctrl_info)
324 {
325 mutex_lock(&ctrl_info->lun_reset_mutex);
326 }
327
pqi_ctrl_unblock_device_reset(struct pqi_ctrl_info * ctrl_info)328 static inline void pqi_ctrl_unblock_device_reset(struct pqi_ctrl_info *ctrl_info)
329 {
330 mutex_unlock(&ctrl_info->lun_reset_mutex);
331 }
332
pqi_scsi_block_requests(struct pqi_ctrl_info * ctrl_info)333 static inline void pqi_scsi_block_requests(struct pqi_ctrl_info *ctrl_info)
334 {
335 struct Scsi_Host *shost;
336 unsigned int num_loops;
337 int msecs_sleep;
338
339 shost = ctrl_info->scsi_host;
340
341 scsi_block_requests(shost);
342
343 num_loops = 0;
344 msecs_sleep = 20;
345 while (scsi_host_busy(shost)) {
346 num_loops++;
347 if (num_loops == 10)
348 msecs_sleep = 500;
349 msleep(msecs_sleep);
350 }
351 }
352
pqi_scsi_unblock_requests(struct pqi_ctrl_info * ctrl_info)353 static inline void pqi_scsi_unblock_requests(struct pqi_ctrl_info *ctrl_info)
354 {
355 scsi_unblock_requests(ctrl_info->scsi_host);
356 }
357
pqi_ctrl_busy(struct pqi_ctrl_info * ctrl_info)358 static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info)
359 {
360 atomic_inc(&ctrl_info->num_busy_threads);
361 }
362
pqi_ctrl_unbusy(struct pqi_ctrl_info * ctrl_info)363 static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info)
364 {
365 atomic_dec(&ctrl_info->num_busy_threads);
366 }
367
pqi_ctrl_blocked(struct pqi_ctrl_info * ctrl_info)368 static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info)
369 {
370 return ctrl_info->block_requests;
371 }
372
pqi_ctrl_block_requests(struct pqi_ctrl_info * ctrl_info)373 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info)
374 {
375 ctrl_info->block_requests = true;
376 }
377
pqi_ctrl_unblock_requests(struct pqi_ctrl_info * ctrl_info)378 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info)
379 {
380 ctrl_info->block_requests = false;
381 wake_up_all(&ctrl_info->block_requests_wait);
382 }
383
pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info * ctrl_info)384 static void pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info)
385 {
386 if (!pqi_ctrl_blocked(ctrl_info))
387 return;
388
389 atomic_inc(&ctrl_info->num_blocked_threads);
390 wait_event(ctrl_info->block_requests_wait,
391 !pqi_ctrl_blocked(ctrl_info));
392 atomic_dec(&ctrl_info->num_blocked_threads);
393 }
394
395 #define PQI_QUIESCE_WARNING_TIMEOUT_SECS 10
396
pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info * ctrl_info)397 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info)
398 {
399 unsigned long start_jiffies;
400 unsigned long warning_timeout;
401 bool displayed_warning;
402
403 displayed_warning = false;
404 start_jiffies = jiffies;
405 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * HZ) + start_jiffies;
406
407 while (atomic_read(&ctrl_info->num_busy_threads) >
408 atomic_read(&ctrl_info->num_blocked_threads)) {
409 if (time_after(jiffies, warning_timeout)) {
410 dev_warn(&ctrl_info->pci_dev->dev,
411 "waiting %u seconds for driver activity to quiesce\n",
412 jiffies_to_msecs(jiffies - start_jiffies) / 1000);
413 displayed_warning = true;
414 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * HZ) + jiffies;
415 }
416 usleep_range(1000, 2000);
417 }
418
419 if (displayed_warning)
420 dev_warn(&ctrl_info->pci_dev->dev,
421 "driver activity quiesced after waiting for %u seconds\n",
422 jiffies_to_msecs(jiffies - start_jiffies) / 1000);
423 }
424
pqi_device_offline(struct pqi_scsi_dev * device)425 static inline bool pqi_device_offline(struct pqi_scsi_dev *device)
426 {
427 return device->device_offline;
428 }
429
pqi_ctrl_ofa_start(struct pqi_ctrl_info * ctrl_info)430 static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info)
431 {
432 mutex_lock(&ctrl_info->ofa_mutex);
433 }
434
pqi_ctrl_ofa_done(struct pqi_ctrl_info * ctrl_info)435 static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info)
436 {
437 mutex_unlock(&ctrl_info->ofa_mutex);
438 }
439
pqi_wait_until_ofa_finished(struct pqi_ctrl_info * ctrl_info)440 static inline void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info)
441 {
442 mutex_lock(&ctrl_info->ofa_mutex);
443 mutex_unlock(&ctrl_info->ofa_mutex);
444 }
445
pqi_ofa_in_progress(struct pqi_ctrl_info * ctrl_info)446 static inline bool pqi_ofa_in_progress(struct pqi_ctrl_info *ctrl_info)
447 {
448 return mutex_is_locked(&ctrl_info->ofa_mutex);
449 }
450
pqi_device_remove_start(struct pqi_scsi_dev * device)451 static inline void pqi_device_remove_start(struct pqi_scsi_dev *device)
452 {
453 device->in_remove = true;
454 }
455
pqi_device_in_remove(struct pqi_scsi_dev * device)456 static inline bool pqi_device_in_remove(struct pqi_scsi_dev *device)
457 {
458 return device->in_remove;
459 }
460
pqi_device_reset_start(struct pqi_scsi_dev * device,u8 lun)461 static inline void pqi_device_reset_start(struct pqi_scsi_dev *device, u8 lun)
462 {
463 device->in_reset[lun] = true;
464 }
465
pqi_device_reset_done(struct pqi_scsi_dev * device,u8 lun)466 static inline void pqi_device_reset_done(struct pqi_scsi_dev *device, u8 lun)
467 {
468 device->in_reset[lun] = false;
469 }
470
pqi_device_in_reset(struct pqi_scsi_dev * device,u8 lun)471 static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device, u8 lun)
472 {
473 return device->in_reset[lun];
474 }
475
pqi_event_type_to_event_index(unsigned int event_type)476 static inline int pqi_event_type_to_event_index(unsigned int event_type)
477 {
478 int index;
479
480 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++)
481 if (event_type == pqi_supported_event_types[index])
482 return index;
483
484 return -1;
485 }
486
pqi_is_supported_event(unsigned int event_type)487 static inline bool pqi_is_supported_event(unsigned int event_type)
488 {
489 return pqi_event_type_to_event_index(event_type) != -1;
490 }
491
pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info * ctrl_info,unsigned long delay)492 static inline void pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info *ctrl_info,
493 unsigned long delay)
494 {
495 if (pqi_ctrl_offline(ctrl_info))
496 return;
497
498 schedule_delayed_work(&ctrl_info->rescan_work, delay);
499 }
500
pqi_schedule_rescan_worker(struct pqi_ctrl_info * ctrl_info)501 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info)
502 {
503 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0);
504 }
505
506 #define PQI_RESCAN_WORK_DELAY (10 * HZ)
507
pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info * ctrl_info)508 static inline void pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info *ctrl_info)
509 {
510 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY);
511 }
512
pqi_cancel_rescan_worker(struct pqi_ctrl_info * ctrl_info)513 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info)
514 {
515 cancel_delayed_work_sync(&ctrl_info->rescan_work);
516 }
517
pqi_read_heartbeat_counter(struct pqi_ctrl_info * ctrl_info)518 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info)
519 {
520 if (!ctrl_info->heartbeat_counter)
521 return 0;
522
523 return readl(ctrl_info->heartbeat_counter);
524 }
525
pqi_read_soft_reset_status(struct pqi_ctrl_info * ctrl_info)526 static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info)
527 {
528 return readb(ctrl_info->soft_reset_status);
529 }
530
pqi_clear_soft_reset_status(struct pqi_ctrl_info * ctrl_info)531 static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info)
532 {
533 u8 status;
534
535 status = pqi_read_soft_reset_status(ctrl_info);
536 status &= ~PQI_SOFT_RESET_ABORT;
537 writeb(status, ctrl_info->soft_reset_status);
538 }
539
pqi_is_io_high_priority(struct pqi_scsi_dev * device,struct scsi_cmnd * scmd)540 static inline bool pqi_is_io_high_priority(struct pqi_scsi_dev *device, struct scsi_cmnd *scmd)
541 {
542 bool io_high_prio;
543 int priority_class;
544
545 io_high_prio = false;
546
547 if (device->ncq_prio_enable) {
548 priority_class =
549 IOPRIO_PRIO_CLASS(req_get_ioprio(scsi_cmd_to_rq(scmd)));
550 if (priority_class == IOPRIO_CLASS_RT) {
551 /* Set NCQ priority for read/write commands. */
552 switch (scmd->cmnd[0]) {
553 case WRITE_16:
554 case READ_16:
555 case WRITE_12:
556 case READ_12:
557 case WRITE_10:
558 case READ_10:
559 case WRITE_6:
560 case READ_6:
561 io_high_prio = true;
562 break;
563 }
564 }
565 }
566
567 return io_high_prio;
568 }
569
pqi_map_single(struct pci_dev * pci_dev,struct pqi_sg_descriptor * sg_descriptor,void * buffer,size_t buffer_length,enum dma_data_direction data_direction)570 static int pqi_map_single(struct pci_dev *pci_dev,
571 struct pqi_sg_descriptor *sg_descriptor, void *buffer,
572 size_t buffer_length, enum dma_data_direction data_direction)
573 {
574 dma_addr_t bus_address;
575
576 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE)
577 return 0;
578
579 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length,
580 data_direction);
581 if (dma_mapping_error(&pci_dev->dev, bus_address))
582 return -ENOMEM;
583
584 put_unaligned_le64((u64)bus_address, &sg_descriptor->address);
585 put_unaligned_le32(buffer_length, &sg_descriptor->length);
586 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
587
588 return 0;
589 }
590
pqi_pci_unmap(struct pci_dev * pci_dev,struct pqi_sg_descriptor * descriptors,int num_descriptors,enum dma_data_direction data_direction)591 static void pqi_pci_unmap(struct pci_dev *pci_dev,
592 struct pqi_sg_descriptor *descriptors, int num_descriptors,
593 enum dma_data_direction data_direction)
594 {
595 int i;
596
597 if (data_direction == DMA_NONE)
598 return;
599
600 for (i = 0; i < num_descriptors; i++)
601 dma_unmap_single(&pci_dev->dev,
602 (dma_addr_t)get_unaligned_le64(&descriptors[i].address),
603 get_unaligned_le32(&descriptors[i].length),
604 data_direction);
605 }
606
pqi_build_raid_path_request(struct pqi_ctrl_info * ctrl_info,struct pqi_raid_path_request * request,u8 cmd,u8 * scsi3addr,void * buffer,size_t buffer_length,u16 vpd_page,enum dma_data_direction * dir)607 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info,
608 struct pqi_raid_path_request *request, u8 cmd,
609 u8 *scsi3addr, void *buffer, size_t buffer_length,
610 u16 vpd_page, enum dma_data_direction *dir)
611 {
612 u8 *cdb;
613 size_t cdb_length = buffer_length;
614
615 memset(request, 0, sizeof(*request));
616
617 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
618 put_unaligned_le16(offsetof(struct pqi_raid_path_request,
619 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH,
620 &request->header.iu_length);
621 put_unaligned_le32(buffer_length, &request->buffer_length);
622 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number));
623 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
624 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
625
626 cdb = request->cdb;
627
628 switch (cmd) {
629 case INQUIRY:
630 request->data_direction = SOP_READ_FLAG;
631 cdb[0] = INQUIRY;
632 if (vpd_page & VPD_PAGE) {
633 cdb[1] = 0x1;
634 cdb[2] = (u8)vpd_page;
635 }
636 cdb[4] = (u8)cdb_length;
637 break;
638 case CISS_REPORT_LOG:
639 case CISS_REPORT_PHYS:
640 request->data_direction = SOP_READ_FLAG;
641 cdb[0] = cmd;
642 if (cmd == CISS_REPORT_PHYS) {
643 if (ctrl_info->rpl_extended_format_4_5_supported)
644 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4;
645 else
646 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2;
647 } else {
648 cdb[1] = ctrl_info->ciss_report_log_flags;
649 }
650 put_unaligned_be32(cdb_length, &cdb[6]);
651 break;
652 case CISS_GET_RAID_MAP:
653 request->data_direction = SOP_READ_FLAG;
654 cdb[0] = CISS_READ;
655 cdb[1] = CISS_GET_RAID_MAP;
656 put_unaligned_be32(cdb_length, &cdb[6]);
657 break;
658 case SA_FLUSH_CACHE:
659 request->header.driver_flags = PQI_DRIVER_NONBLOCKABLE_REQUEST;
660 request->data_direction = SOP_WRITE_FLAG;
661 cdb[0] = BMIC_WRITE;
662 cdb[6] = BMIC_FLUSH_CACHE;
663 put_unaligned_be16(cdb_length, &cdb[7]);
664 break;
665 case BMIC_SENSE_DIAG_OPTIONS:
666 cdb_length = 0;
667 fallthrough;
668 case BMIC_IDENTIFY_CONTROLLER:
669 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
670 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
671 case BMIC_SENSE_FEATURE:
672 request->data_direction = SOP_READ_FLAG;
673 cdb[0] = BMIC_READ;
674 cdb[6] = cmd;
675 put_unaligned_be16(cdb_length, &cdb[7]);
676 break;
677 case BMIC_SET_DIAG_OPTIONS:
678 cdb_length = 0;
679 fallthrough;
680 case BMIC_WRITE_HOST_WELLNESS:
681 request->data_direction = SOP_WRITE_FLAG;
682 cdb[0] = BMIC_WRITE;
683 cdb[6] = cmd;
684 put_unaligned_be16(cdb_length, &cdb[7]);
685 break;
686 case BMIC_CSMI_PASSTHRU:
687 request->data_direction = SOP_BIDIRECTIONAL;
688 cdb[0] = BMIC_WRITE;
689 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU;
690 cdb[6] = cmd;
691 put_unaligned_be16(cdb_length, &cdb[7]);
692 break;
693 default:
694 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", cmd);
695 break;
696 }
697
698 switch (request->data_direction) {
699 case SOP_READ_FLAG:
700 *dir = DMA_FROM_DEVICE;
701 break;
702 case SOP_WRITE_FLAG:
703 *dir = DMA_TO_DEVICE;
704 break;
705 case SOP_NO_DIRECTION_FLAG:
706 *dir = DMA_NONE;
707 break;
708 default:
709 *dir = DMA_BIDIRECTIONAL;
710 break;
711 }
712
713 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0],
714 buffer, buffer_length, *dir);
715 }
716
pqi_reinit_io_request(struct pqi_io_request * io_request)717 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request)
718 {
719 io_request->scmd = NULL;
720 io_request->status = 0;
721 io_request->error_info = NULL;
722 io_request->raid_bypass = false;
723 }
724
pqi_alloc_io_request(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd)725 static inline struct pqi_io_request *pqi_alloc_io_request(struct pqi_ctrl_info *ctrl_info, struct scsi_cmnd *scmd)
726 {
727 struct pqi_io_request *io_request;
728 u16 i;
729
730 if (scmd) { /* SML I/O request */
731 u32 blk_tag = blk_mq_unique_tag(scsi_cmd_to_rq(scmd));
732
733 i = blk_mq_unique_tag_to_tag(blk_tag);
734 io_request = &ctrl_info->io_request_pool[i];
735 if (atomic_inc_return(&io_request->refcount) > 1) {
736 atomic_dec(&io_request->refcount);
737 return NULL;
738 }
739 } else { /* IOCTL or driver internal request */
740 /*
741 * benignly racy - may have to wait for an open slot.
742 * command slot range is scsi_ml_can_queue -
743 * [scsi_ml_can_queue + (PQI_RESERVED_IO_SLOTS - 1)]
744 */
745 i = 0;
746 while (1) {
747 io_request = &ctrl_info->io_request_pool[ctrl_info->scsi_ml_can_queue + i];
748 if (atomic_inc_return(&io_request->refcount) == 1)
749 break;
750 atomic_dec(&io_request->refcount);
751 i = (i + 1) % PQI_RESERVED_IO_SLOTS;
752 }
753 }
754
755 if (io_request)
756 pqi_reinit_io_request(io_request);
757
758 return io_request;
759 }
760
pqi_free_io_request(struct pqi_io_request * io_request)761 static void pqi_free_io_request(struct pqi_io_request *io_request)
762 {
763 atomic_dec(&io_request->refcount);
764 }
765
pqi_send_scsi_raid_request(struct pqi_ctrl_info * ctrl_info,u8 cmd,u8 * scsi3addr,void * buffer,size_t buffer_length,u16 vpd_page,struct pqi_raid_error_info * error_info)766 static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd,
767 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page,
768 struct pqi_raid_error_info *error_info)
769 {
770 int rc;
771 struct pqi_raid_path_request request;
772 enum dma_data_direction dir;
773
774 rc = pqi_build_raid_path_request(ctrl_info, &request, cmd, scsi3addr,
775 buffer, buffer_length, vpd_page, &dir);
776 if (rc)
777 return rc;
778
779 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, error_info);
780
781 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
782
783 return rc;
784 }
785
786 /* helper functions for pqi_send_scsi_raid_request */
787
pqi_send_ctrl_raid_request(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length)788 static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info,
789 u8 cmd, void *buffer, size_t buffer_length)
790 {
791 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
792 buffer, buffer_length, 0, NULL);
793 }
794
pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length,struct pqi_raid_error_info * error_info)795 static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info,
796 u8 cmd, void *buffer, size_t buffer_length,
797 struct pqi_raid_error_info *error_info)
798 {
799 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
800 buffer, buffer_length, 0, error_info);
801 }
802
pqi_identify_controller(struct pqi_ctrl_info * ctrl_info,struct bmic_identify_controller * buffer)803 static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info,
804 struct bmic_identify_controller *buffer)
805 {
806 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER,
807 buffer, sizeof(*buffer));
808 }
809
pqi_sense_subsystem_info(struct pqi_ctrl_info * ctrl_info,struct bmic_sense_subsystem_info * sense_info)810 static inline int pqi_sense_subsystem_info(struct pqi_ctrl_info *ctrl_info,
811 struct bmic_sense_subsystem_info *sense_info)
812 {
813 return pqi_send_ctrl_raid_request(ctrl_info,
814 BMIC_SENSE_SUBSYSTEM_INFORMATION, sense_info,
815 sizeof(*sense_info));
816 }
817
pqi_scsi_inquiry(struct pqi_ctrl_info * ctrl_info,u8 * scsi3addr,u16 vpd_page,void * buffer,size_t buffer_length)818 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info,
819 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length)
820 {
821 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr,
822 buffer, buffer_length, vpd_page, NULL);
823 }
824
pqi_identify_physical_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * buffer,size_t buffer_length)825 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info,
826 struct pqi_scsi_dev *device,
827 struct bmic_identify_physical_device *buffer, size_t buffer_length)
828 {
829 int rc;
830 enum dma_data_direction dir;
831 u16 bmic_device_index;
832 struct pqi_raid_path_request request;
833
834 rc = pqi_build_raid_path_request(ctrl_info, &request,
835 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer,
836 buffer_length, 0, &dir);
837 if (rc)
838 return rc;
839
840 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr);
841 request.cdb[2] = (u8)bmic_device_index;
842 request.cdb[9] = (u8)(bmic_device_index >> 8);
843
844 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
845
846 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
847
848 return rc;
849 }
850
pqi_aio_limit_to_bytes(__le16 * limit)851 static inline u32 pqi_aio_limit_to_bytes(__le16 *limit)
852 {
853 u32 bytes;
854
855 bytes = get_unaligned_le16(limit);
856 if (bytes == 0)
857 bytes = ~0;
858 else
859 bytes *= 1024;
860
861 return bytes;
862 }
863
864 #pragma pack(1)
865
866 struct bmic_sense_feature_buffer {
867 struct bmic_sense_feature_buffer_header header;
868 struct bmic_sense_feature_io_page_aio_subpage aio_subpage;
869 };
870
871 #pragma pack()
872
873 #define MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH \
874 offsetofend(struct bmic_sense_feature_buffer, \
875 aio_subpage.max_write_raid_1_10_3drive)
876
877 #define MINIMUM_AIO_SUBPAGE_LENGTH \
878 (offsetofend(struct bmic_sense_feature_io_page_aio_subpage, \
879 max_write_raid_1_10_3drive) - \
880 sizeof_field(struct bmic_sense_feature_io_page_aio_subpage, header))
881
pqi_get_advanced_raid_bypass_config(struct pqi_ctrl_info * ctrl_info)882 static int pqi_get_advanced_raid_bypass_config(struct pqi_ctrl_info *ctrl_info)
883 {
884 int rc;
885 enum dma_data_direction dir;
886 struct pqi_raid_path_request request;
887 struct bmic_sense_feature_buffer *buffer;
888
889 buffer = kmalloc(sizeof(*buffer), GFP_KERNEL);
890 if (!buffer)
891 return -ENOMEM;
892
893 rc = pqi_build_raid_path_request(ctrl_info, &request, BMIC_SENSE_FEATURE, RAID_CTLR_LUNID,
894 buffer, sizeof(*buffer), 0, &dir);
895 if (rc)
896 goto error;
897
898 request.cdb[2] = BMIC_SENSE_FEATURE_IO_PAGE;
899 request.cdb[3] = BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE;
900
901 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
902
903 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
904
905 if (rc)
906 goto error;
907
908 if (buffer->header.page_code != BMIC_SENSE_FEATURE_IO_PAGE ||
909 buffer->header.subpage_code !=
910 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE ||
911 get_unaligned_le16(&buffer->header.buffer_length) <
912 MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH ||
913 buffer->aio_subpage.header.page_code !=
914 BMIC_SENSE_FEATURE_IO_PAGE ||
915 buffer->aio_subpage.header.subpage_code !=
916 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE ||
917 get_unaligned_le16(&buffer->aio_subpage.header.page_length) <
918 MINIMUM_AIO_SUBPAGE_LENGTH) {
919 goto error;
920 }
921
922 ctrl_info->max_transfer_encrypted_sas_sata =
923 pqi_aio_limit_to_bytes(
924 &buffer->aio_subpage.max_transfer_encrypted_sas_sata);
925
926 ctrl_info->max_transfer_encrypted_nvme =
927 pqi_aio_limit_to_bytes(
928 &buffer->aio_subpage.max_transfer_encrypted_nvme);
929
930 ctrl_info->max_write_raid_5_6 =
931 pqi_aio_limit_to_bytes(
932 &buffer->aio_subpage.max_write_raid_5_6);
933
934 ctrl_info->max_write_raid_1_10_2drive =
935 pqi_aio_limit_to_bytes(
936 &buffer->aio_subpage.max_write_raid_1_10_2drive);
937
938 ctrl_info->max_write_raid_1_10_3drive =
939 pqi_aio_limit_to_bytes(
940 &buffer->aio_subpage.max_write_raid_1_10_3drive);
941
942 error:
943 kfree(buffer);
944
945 return rc;
946 }
947
pqi_flush_cache(struct pqi_ctrl_info * ctrl_info,enum bmic_flush_cache_shutdown_event shutdown_event)948 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info,
949 enum bmic_flush_cache_shutdown_event shutdown_event)
950 {
951 int rc;
952 struct bmic_flush_cache *flush_cache;
953
954 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL);
955 if (!flush_cache)
956 return -ENOMEM;
957
958 flush_cache->shutdown_event = shutdown_event;
959
960 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache,
961 sizeof(*flush_cache));
962
963 kfree(flush_cache);
964
965 return rc;
966 }
967
pqi_csmi_smp_passthru(struct pqi_ctrl_info * ctrl_info,struct bmic_csmi_smp_passthru_buffer * buffer,size_t buffer_length,struct pqi_raid_error_info * error_info)968 int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info,
969 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length,
970 struct pqi_raid_error_info *error_info)
971 {
972 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU,
973 buffer, buffer_length, error_info);
974 }
975
976 #define PQI_FETCH_PTRAID_DATA (1 << 31)
977
pqi_set_diag_rescan(struct pqi_ctrl_info * ctrl_info)978 static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info)
979 {
980 int rc;
981 struct bmic_diag_options *diag;
982
983 diag = kzalloc(sizeof(*diag), GFP_KERNEL);
984 if (!diag)
985 return -ENOMEM;
986
987 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS,
988 diag, sizeof(*diag));
989 if (rc)
990 goto out;
991
992 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA);
993
994 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS, diag,
995 sizeof(*diag));
996
997 out:
998 kfree(diag);
999
1000 return rc;
1001 }
1002
pqi_write_host_wellness(struct pqi_ctrl_info * ctrl_info,void * buffer,size_t buffer_length)1003 static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info,
1004 void *buffer, size_t buffer_length)
1005 {
1006 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS,
1007 buffer, buffer_length);
1008 }
1009
1010 #pragma pack(1)
1011
1012 struct bmic_host_wellness_driver_version {
1013 u8 start_tag[4];
1014 u8 driver_version_tag[2];
1015 __le16 driver_version_length;
1016 char driver_version[32];
1017 u8 dont_write_tag[2];
1018 u8 end_tag[2];
1019 };
1020
1021 #pragma pack()
1022
pqi_write_driver_version_to_host_wellness(struct pqi_ctrl_info * ctrl_info)1023 static int pqi_write_driver_version_to_host_wellness(
1024 struct pqi_ctrl_info *ctrl_info)
1025 {
1026 int rc;
1027 struct bmic_host_wellness_driver_version *buffer;
1028 size_t buffer_length;
1029
1030 buffer_length = sizeof(*buffer);
1031
1032 buffer = kmalloc(buffer_length, GFP_KERNEL);
1033 if (!buffer)
1034 return -ENOMEM;
1035
1036 buffer->start_tag[0] = '<';
1037 buffer->start_tag[1] = 'H';
1038 buffer->start_tag[2] = 'W';
1039 buffer->start_tag[3] = '>';
1040 buffer->driver_version_tag[0] = 'D';
1041 buffer->driver_version_tag[1] = 'V';
1042 put_unaligned_le16(sizeof(buffer->driver_version),
1043 &buffer->driver_version_length);
1044 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION,
1045 sizeof(buffer->driver_version) - 1);
1046 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0';
1047 buffer->dont_write_tag[0] = 'D';
1048 buffer->dont_write_tag[1] = 'W';
1049 buffer->end_tag[0] = 'Z';
1050 buffer->end_tag[1] = 'Z';
1051
1052 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
1053
1054 kfree(buffer);
1055
1056 return rc;
1057 }
1058
1059 #pragma pack(1)
1060
1061 struct bmic_host_wellness_time {
1062 u8 start_tag[4];
1063 u8 time_tag[2];
1064 __le16 time_length;
1065 u8 time[8];
1066 u8 dont_write_tag[2];
1067 u8 end_tag[2];
1068 };
1069
1070 #pragma pack()
1071
pqi_write_current_time_to_host_wellness(struct pqi_ctrl_info * ctrl_info)1072 static int pqi_write_current_time_to_host_wellness(
1073 struct pqi_ctrl_info *ctrl_info)
1074 {
1075 int rc;
1076 struct bmic_host_wellness_time *buffer;
1077 size_t buffer_length;
1078 time64_t local_time;
1079 unsigned int year;
1080 struct tm tm;
1081
1082 buffer_length = sizeof(*buffer);
1083
1084 buffer = kmalloc(buffer_length, GFP_KERNEL);
1085 if (!buffer)
1086 return -ENOMEM;
1087
1088 buffer->start_tag[0] = '<';
1089 buffer->start_tag[1] = 'H';
1090 buffer->start_tag[2] = 'W';
1091 buffer->start_tag[3] = '>';
1092 buffer->time_tag[0] = 'T';
1093 buffer->time_tag[1] = 'D';
1094 put_unaligned_le16(sizeof(buffer->time),
1095 &buffer->time_length);
1096
1097 local_time = ktime_get_real_seconds();
1098 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm);
1099 year = tm.tm_year + 1900;
1100
1101 buffer->time[0] = bin2bcd(tm.tm_hour);
1102 buffer->time[1] = bin2bcd(tm.tm_min);
1103 buffer->time[2] = bin2bcd(tm.tm_sec);
1104 buffer->time[3] = 0;
1105 buffer->time[4] = bin2bcd(tm.tm_mon + 1);
1106 buffer->time[5] = bin2bcd(tm.tm_mday);
1107 buffer->time[6] = bin2bcd(year / 100);
1108 buffer->time[7] = bin2bcd(year % 100);
1109
1110 buffer->dont_write_tag[0] = 'D';
1111 buffer->dont_write_tag[1] = 'W';
1112 buffer->end_tag[0] = 'Z';
1113 buffer->end_tag[1] = 'Z';
1114
1115 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
1116
1117 kfree(buffer);
1118
1119 return rc;
1120 }
1121
1122 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * HZ)
1123
pqi_update_time_worker(struct work_struct * work)1124 static void pqi_update_time_worker(struct work_struct *work)
1125 {
1126 int rc;
1127 struct pqi_ctrl_info *ctrl_info;
1128
1129 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
1130 update_time_work);
1131
1132 rc = pqi_write_current_time_to_host_wellness(ctrl_info);
1133 if (rc)
1134 dev_warn(&ctrl_info->pci_dev->dev,
1135 "error updating time on controller\n");
1136
1137 schedule_delayed_work(&ctrl_info->update_time_work,
1138 PQI_UPDATE_TIME_WORK_INTERVAL);
1139 }
1140
pqi_schedule_update_time_worker(struct pqi_ctrl_info * ctrl_info)1141 static inline void pqi_schedule_update_time_worker(struct pqi_ctrl_info *ctrl_info)
1142 {
1143 schedule_delayed_work(&ctrl_info->update_time_work, 0);
1144 }
1145
pqi_cancel_update_time_worker(struct pqi_ctrl_info * ctrl_info)1146 static inline void pqi_cancel_update_time_worker(struct pqi_ctrl_info *ctrl_info)
1147 {
1148 cancel_delayed_work_sync(&ctrl_info->update_time_work);
1149 }
1150
pqi_report_luns(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length)1151 static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void *buffer,
1152 size_t buffer_length)
1153 {
1154 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer, buffer_length);
1155 }
1156
pqi_report_phys_logical_luns(struct pqi_ctrl_info * ctrl_info,u8 cmd,void ** buffer)1157 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void **buffer)
1158 {
1159 int rc;
1160 size_t lun_list_length;
1161 size_t lun_data_length;
1162 size_t new_lun_list_length;
1163 void *lun_data = NULL;
1164 struct report_lun_header *report_lun_header;
1165
1166 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL);
1167 if (!report_lun_header) {
1168 rc = -ENOMEM;
1169 goto out;
1170 }
1171
1172 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, sizeof(*report_lun_header));
1173 if (rc)
1174 goto out;
1175
1176 lun_list_length = get_unaligned_be32(&report_lun_header->list_length);
1177
1178 again:
1179 lun_data_length = sizeof(struct report_lun_header) + lun_list_length;
1180
1181 lun_data = kmalloc(lun_data_length, GFP_KERNEL);
1182 if (!lun_data) {
1183 rc = -ENOMEM;
1184 goto out;
1185 }
1186
1187 if (lun_list_length == 0) {
1188 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header));
1189 goto out;
1190 }
1191
1192 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length);
1193 if (rc)
1194 goto out;
1195
1196 new_lun_list_length =
1197 get_unaligned_be32(&((struct report_lun_header *)lun_data)->list_length);
1198
1199 if (new_lun_list_length > lun_list_length) {
1200 lun_list_length = new_lun_list_length;
1201 kfree(lun_data);
1202 goto again;
1203 }
1204
1205 out:
1206 kfree(report_lun_header);
1207
1208 if (rc) {
1209 kfree(lun_data);
1210 lun_data = NULL;
1211 }
1212
1213 *buffer = lun_data;
1214
1215 return rc;
1216 }
1217
pqi_report_phys_luns(struct pqi_ctrl_info * ctrl_info,void ** buffer)1218 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, void **buffer)
1219 {
1220 int rc;
1221 unsigned int i;
1222 u8 rpl_response_format;
1223 u32 num_physicals;
1224 void *rpl_list;
1225 struct report_lun_header *rpl_header;
1226 struct report_phys_lun_8byte_wwid_list *rpl_8byte_wwid_list;
1227 struct report_phys_lun_16byte_wwid_list *rpl_16byte_wwid_list;
1228
1229 rc = pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, &rpl_list);
1230 if (rc)
1231 return rc;
1232
1233 if (ctrl_info->rpl_extended_format_4_5_supported) {
1234 rpl_header = rpl_list;
1235 rpl_response_format = rpl_header->flags & CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_MASK;
1236 if (rpl_response_format == CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4) {
1237 *buffer = rpl_list;
1238 return 0;
1239 } else if (rpl_response_format != CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2) {
1240 dev_err(&ctrl_info->pci_dev->dev,
1241 "RPL returned unsupported data format %u\n",
1242 rpl_response_format);
1243 return -EINVAL;
1244 } else {
1245 dev_warn(&ctrl_info->pci_dev->dev,
1246 "RPL returned extended format 2 instead of 4\n");
1247 }
1248 }
1249
1250 rpl_8byte_wwid_list = rpl_list;
1251 num_physicals = get_unaligned_be32(&rpl_8byte_wwid_list->header.list_length) / sizeof(rpl_8byte_wwid_list->lun_entries[0]);
1252
1253 rpl_16byte_wwid_list = kmalloc(struct_size(rpl_16byte_wwid_list, lun_entries,
1254 num_physicals), GFP_KERNEL);
1255 if (!rpl_16byte_wwid_list)
1256 return -ENOMEM;
1257
1258 put_unaligned_be32(num_physicals * sizeof(struct report_phys_lun_16byte_wwid),
1259 &rpl_16byte_wwid_list->header.list_length);
1260 rpl_16byte_wwid_list->header.flags = rpl_8byte_wwid_list->header.flags;
1261
1262 for (i = 0; i < num_physicals; i++) {
1263 memcpy(&rpl_16byte_wwid_list->lun_entries[i].lunid, &rpl_8byte_wwid_list->lun_entries[i].lunid, sizeof(rpl_8byte_wwid_list->lun_entries[i].lunid));
1264 memcpy(&rpl_16byte_wwid_list->lun_entries[i].wwid[0], &rpl_8byte_wwid_list->lun_entries[i].wwid, sizeof(rpl_8byte_wwid_list->lun_entries[i].wwid));
1265 memset(&rpl_16byte_wwid_list->lun_entries[i].wwid[8], 0, 8);
1266 rpl_16byte_wwid_list->lun_entries[i].device_type = rpl_8byte_wwid_list->lun_entries[i].device_type;
1267 rpl_16byte_wwid_list->lun_entries[i].device_flags = rpl_8byte_wwid_list->lun_entries[i].device_flags;
1268 rpl_16byte_wwid_list->lun_entries[i].lun_count = rpl_8byte_wwid_list->lun_entries[i].lun_count;
1269 rpl_16byte_wwid_list->lun_entries[i].redundant_paths = rpl_8byte_wwid_list->lun_entries[i].redundant_paths;
1270 rpl_16byte_wwid_list->lun_entries[i].aio_handle = rpl_8byte_wwid_list->lun_entries[i].aio_handle;
1271 }
1272
1273 kfree(rpl_8byte_wwid_list);
1274 *buffer = rpl_16byte_wwid_list;
1275
1276 return 0;
1277 }
1278
pqi_report_logical_luns(struct pqi_ctrl_info * ctrl_info,void ** buffer)1279 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, void **buffer)
1280 {
1281 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer);
1282 }
1283
pqi_get_device_lists(struct pqi_ctrl_info * ctrl_info,struct report_phys_lun_16byte_wwid_list ** physdev_list,struct report_log_lun_list ** logdev_list)1284 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info,
1285 struct report_phys_lun_16byte_wwid_list **physdev_list,
1286 struct report_log_lun_list **logdev_list)
1287 {
1288 int rc;
1289 size_t logdev_list_length;
1290 size_t logdev_data_length;
1291 struct report_log_lun_list *internal_logdev_list;
1292 struct report_log_lun_list *logdev_data;
1293 struct report_lun_header report_lun_header;
1294
1295 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list);
1296 if (rc)
1297 dev_err(&ctrl_info->pci_dev->dev,
1298 "report physical LUNs failed\n");
1299
1300 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list);
1301 if (rc)
1302 dev_err(&ctrl_info->pci_dev->dev,
1303 "report logical LUNs failed\n");
1304
1305 /*
1306 * Tack the controller itself onto the end of the logical device list
1307 * by adding a list entry that is all zeros.
1308 */
1309
1310 logdev_data = *logdev_list;
1311
1312 if (logdev_data) {
1313 logdev_list_length =
1314 get_unaligned_be32(&logdev_data->header.list_length);
1315 } else {
1316 memset(&report_lun_header, 0, sizeof(report_lun_header));
1317 logdev_data =
1318 (struct report_log_lun_list *)&report_lun_header;
1319 logdev_list_length = 0;
1320 }
1321
1322 logdev_data_length = sizeof(struct report_lun_header) +
1323 logdev_list_length;
1324
1325 internal_logdev_list = kmalloc(logdev_data_length +
1326 sizeof(struct report_log_lun), GFP_KERNEL);
1327 if (!internal_logdev_list) {
1328 kfree(*logdev_list);
1329 *logdev_list = NULL;
1330 return -ENOMEM;
1331 }
1332
1333 memcpy(internal_logdev_list, logdev_data, logdev_data_length);
1334 memset((u8 *)internal_logdev_list + logdev_data_length, 0,
1335 sizeof(struct report_log_lun));
1336 put_unaligned_be32(logdev_list_length +
1337 sizeof(struct report_log_lun),
1338 &internal_logdev_list->header.list_length);
1339
1340 kfree(*logdev_list);
1341 *logdev_list = internal_logdev_list;
1342
1343 return 0;
1344 }
1345
pqi_set_bus_target_lun(struct pqi_scsi_dev * device,int bus,int target,int lun)1346 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device,
1347 int bus, int target, int lun)
1348 {
1349 device->bus = bus;
1350 device->target = target;
1351 device->lun = lun;
1352 }
1353
pqi_assign_bus_target_lun(struct pqi_scsi_dev * device)1354 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device)
1355 {
1356 u8 *scsi3addr;
1357 u32 lunid;
1358 int bus;
1359 int target;
1360 int lun;
1361
1362 scsi3addr = device->scsi3addr;
1363 lunid = get_unaligned_le32(scsi3addr);
1364
1365 if (pqi_is_hba_lunid(scsi3addr)) {
1366 /* The specified device is the controller. */
1367 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff);
1368 device->target_lun_valid = true;
1369 return;
1370 }
1371
1372 if (pqi_is_logical_device(device)) {
1373 if (device->is_external_raid_device) {
1374 bus = PQI_EXTERNAL_RAID_VOLUME_BUS;
1375 target = (lunid >> 16) & 0x3fff;
1376 lun = lunid & 0xff;
1377 } else {
1378 bus = PQI_RAID_VOLUME_BUS;
1379 target = 0;
1380 lun = lunid & 0x3fff;
1381 }
1382 pqi_set_bus_target_lun(device, bus, target, lun);
1383 device->target_lun_valid = true;
1384 return;
1385 }
1386
1387 /*
1388 * Defer target and LUN assignment for non-controller physical devices
1389 * because the SAS transport layer will make these assignments later.
1390 */
1391 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0);
1392 }
1393
pqi_get_raid_level(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1394 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info,
1395 struct pqi_scsi_dev *device)
1396 {
1397 int rc;
1398 u8 raid_level;
1399 u8 *buffer;
1400
1401 raid_level = SA_RAID_UNKNOWN;
1402
1403 buffer = kmalloc(64, GFP_KERNEL);
1404 if (buffer) {
1405 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1406 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64);
1407 if (rc == 0) {
1408 raid_level = buffer[8];
1409 if (raid_level > SA_RAID_MAX)
1410 raid_level = SA_RAID_UNKNOWN;
1411 }
1412 kfree(buffer);
1413 }
1414
1415 device->raid_level = raid_level;
1416 }
1417
pqi_validate_raid_map(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct raid_map * raid_map)1418 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info,
1419 struct pqi_scsi_dev *device, struct raid_map *raid_map)
1420 {
1421 char *err_msg;
1422 u32 raid_map_size;
1423 u32 r5or6_blocks_per_row;
1424
1425 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1426
1427 if (raid_map_size < offsetof(struct raid_map, disk_data)) {
1428 err_msg = "RAID map too small";
1429 goto bad_raid_map;
1430 }
1431
1432 if (device->raid_level == SA_RAID_1) {
1433 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) {
1434 err_msg = "invalid RAID-1 map";
1435 goto bad_raid_map;
1436 }
1437 } else if (device->raid_level == SA_RAID_TRIPLE) {
1438 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) {
1439 err_msg = "invalid RAID-1(Triple) map";
1440 goto bad_raid_map;
1441 }
1442 } else if ((device->raid_level == SA_RAID_5 ||
1443 device->raid_level == SA_RAID_6) &&
1444 get_unaligned_le16(&raid_map->layout_map_count) > 1) {
1445 /* RAID 50/60 */
1446 r5or6_blocks_per_row =
1447 get_unaligned_le16(&raid_map->strip_size) *
1448 get_unaligned_le16(&raid_map->data_disks_per_row);
1449 if (r5or6_blocks_per_row == 0) {
1450 err_msg = "invalid RAID-5 or RAID-6 map";
1451 goto bad_raid_map;
1452 }
1453 }
1454
1455 return 0;
1456
1457 bad_raid_map:
1458 dev_warn(&ctrl_info->pci_dev->dev,
1459 "logical device %08x%08x %s\n",
1460 *((u32 *)&device->scsi3addr),
1461 *((u32 *)&device->scsi3addr[4]), err_msg);
1462
1463 return -EINVAL;
1464 }
1465
pqi_get_raid_map(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1466 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info,
1467 struct pqi_scsi_dev *device)
1468 {
1469 int rc;
1470 u32 raid_map_size;
1471 struct raid_map *raid_map;
1472
1473 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL);
1474 if (!raid_map)
1475 return -ENOMEM;
1476
1477 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1478 device->scsi3addr, raid_map, sizeof(*raid_map), 0, NULL);
1479 if (rc)
1480 goto error;
1481
1482 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1483
1484 if (raid_map_size > sizeof(*raid_map)) {
1485
1486 kfree(raid_map);
1487
1488 raid_map = kmalloc(raid_map_size, GFP_KERNEL);
1489 if (!raid_map)
1490 return -ENOMEM;
1491
1492 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1493 device->scsi3addr, raid_map, raid_map_size, 0, NULL);
1494 if (rc)
1495 goto error;
1496
1497 if (get_unaligned_le32(&raid_map->structure_size)
1498 != raid_map_size) {
1499 dev_warn(&ctrl_info->pci_dev->dev,
1500 "requested %u bytes, received %u bytes\n",
1501 raid_map_size,
1502 get_unaligned_le32(&raid_map->structure_size));
1503 rc = -EINVAL;
1504 goto error;
1505 }
1506 }
1507
1508 rc = pqi_validate_raid_map(ctrl_info, device, raid_map);
1509 if (rc)
1510 goto error;
1511
1512 device->raid_map = raid_map;
1513
1514 return 0;
1515
1516 error:
1517 kfree(raid_map);
1518
1519 return rc;
1520 }
1521
pqi_set_max_transfer_encrypted(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1522 static void pqi_set_max_transfer_encrypted(struct pqi_ctrl_info *ctrl_info,
1523 struct pqi_scsi_dev *device)
1524 {
1525 if (!ctrl_info->lv_drive_type_mix_valid) {
1526 device->max_transfer_encrypted = ~0;
1527 return;
1528 }
1529
1530 switch (LV_GET_DRIVE_TYPE_MIX(device->scsi3addr)) {
1531 case LV_DRIVE_TYPE_MIX_SAS_HDD_ONLY:
1532 case LV_DRIVE_TYPE_MIX_SATA_HDD_ONLY:
1533 case LV_DRIVE_TYPE_MIX_SAS_OR_SATA_SSD_ONLY:
1534 case LV_DRIVE_TYPE_MIX_SAS_SSD_ONLY:
1535 case LV_DRIVE_TYPE_MIX_SATA_SSD_ONLY:
1536 case LV_DRIVE_TYPE_MIX_SAS_ONLY:
1537 case LV_DRIVE_TYPE_MIX_SATA_ONLY:
1538 device->max_transfer_encrypted =
1539 ctrl_info->max_transfer_encrypted_sas_sata;
1540 break;
1541 case LV_DRIVE_TYPE_MIX_NVME_ONLY:
1542 device->max_transfer_encrypted =
1543 ctrl_info->max_transfer_encrypted_nvme;
1544 break;
1545 case LV_DRIVE_TYPE_MIX_UNKNOWN:
1546 case LV_DRIVE_TYPE_MIX_NO_RESTRICTION:
1547 default:
1548 device->max_transfer_encrypted =
1549 min(ctrl_info->max_transfer_encrypted_sas_sata,
1550 ctrl_info->max_transfer_encrypted_nvme);
1551 break;
1552 }
1553 }
1554
pqi_get_raid_bypass_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1555 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info,
1556 struct pqi_scsi_dev *device)
1557 {
1558 int rc;
1559 u8 *buffer;
1560 u8 bypass_status;
1561
1562 buffer = kmalloc(64, GFP_KERNEL);
1563 if (!buffer)
1564 return;
1565
1566 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1567 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64);
1568 if (rc)
1569 goto out;
1570
1571 #define RAID_BYPASS_STATUS 4
1572 #define RAID_BYPASS_CONFIGURED 0x1
1573 #define RAID_BYPASS_ENABLED 0x2
1574
1575 bypass_status = buffer[RAID_BYPASS_STATUS];
1576 device->raid_bypass_configured =
1577 (bypass_status & RAID_BYPASS_CONFIGURED) != 0;
1578 if (device->raid_bypass_configured &&
1579 (bypass_status & RAID_BYPASS_ENABLED) &&
1580 pqi_get_raid_map(ctrl_info, device) == 0) {
1581 device->raid_bypass_enabled = true;
1582 if (get_unaligned_le16(&device->raid_map->flags) &
1583 RAID_MAP_ENCRYPTION_ENABLED)
1584 pqi_set_max_transfer_encrypted(ctrl_info, device);
1585 }
1586
1587 out:
1588 kfree(buffer);
1589 }
1590
1591 /*
1592 * Use vendor-specific VPD to determine online/offline status of a volume.
1593 */
1594
pqi_get_volume_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1595 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info,
1596 struct pqi_scsi_dev *device)
1597 {
1598 int rc;
1599 size_t page_length;
1600 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE;
1601 bool volume_offline = true;
1602 u32 volume_flags;
1603 struct ciss_vpd_logical_volume_status *vpd;
1604
1605 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL);
1606 if (!vpd)
1607 goto no_buffer;
1608
1609 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1610 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd));
1611 if (rc)
1612 goto out;
1613
1614 if (vpd->page_code != CISS_VPD_LV_STATUS)
1615 goto out;
1616
1617 page_length = offsetof(struct ciss_vpd_logical_volume_status,
1618 volume_status) + vpd->page_length;
1619 if (page_length < sizeof(*vpd))
1620 goto out;
1621
1622 volume_status = vpd->volume_status;
1623 volume_flags = get_unaligned_be32(&vpd->flags);
1624 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0;
1625
1626 out:
1627 kfree(vpd);
1628 no_buffer:
1629 device->volume_status = volume_status;
1630 device->volume_offline = volume_offline;
1631 }
1632
1633 #define PQI_DEVICE_NCQ_PRIO_SUPPORTED 0x01
1634 #define PQI_DEVICE_PHY_MAP_SUPPORTED 0x10
1635 #define PQI_DEVICE_ERASE_IN_PROGRESS 0x10
1636
pqi_get_physical_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * id_phys)1637 static int pqi_get_physical_device_info(struct pqi_ctrl_info *ctrl_info,
1638 struct pqi_scsi_dev *device,
1639 struct bmic_identify_physical_device *id_phys)
1640 {
1641 int rc;
1642
1643 memset(id_phys, 0, sizeof(*id_phys));
1644
1645 rc = pqi_identify_physical_device(ctrl_info, device,
1646 id_phys, sizeof(*id_phys));
1647 if (rc) {
1648 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH;
1649 return rc;
1650 }
1651
1652 scsi_sanitize_inquiry_string(&id_phys->model[0], 8);
1653 scsi_sanitize_inquiry_string(&id_phys->model[8], 16);
1654
1655 memcpy(device->vendor, &id_phys->model[0], sizeof(device->vendor));
1656 memcpy(device->model, &id_phys->model[8], sizeof(device->model));
1657
1658 device->box_index = id_phys->box_index;
1659 device->phys_box_on_bus = id_phys->phys_box_on_bus;
1660 device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0];
1661 device->queue_depth =
1662 get_unaligned_le16(&id_phys->current_queue_depth_limit);
1663 device->active_path_index = id_phys->active_path_number;
1664 device->path_map = id_phys->redundant_path_present_map;
1665 memcpy(&device->box,
1666 &id_phys->alternate_paths_phys_box_on_port,
1667 sizeof(device->box));
1668 memcpy(&device->phys_connector,
1669 &id_phys->alternate_paths_phys_connector,
1670 sizeof(device->phys_connector));
1671 device->bay = id_phys->phys_bay_in_box;
1672 device->lun_count = id_phys->multi_lun_device_lun_count;
1673 if ((id_phys->even_more_flags & PQI_DEVICE_PHY_MAP_SUPPORTED) &&
1674 id_phys->phy_count)
1675 device->phy_id =
1676 id_phys->phy_to_phy_map[device->active_path_index];
1677 else
1678 device->phy_id = 0xFF;
1679
1680 device->ncq_prio_support =
1681 ((get_unaligned_le32(&id_phys->misc_drive_flags) >> 16) &
1682 PQI_DEVICE_NCQ_PRIO_SUPPORTED);
1683
1684 device->erase_in_progress = !!(get_unaligned_le16(&id_phys->extra_physical_drive_flags) & PQI_DEVICE_ERASE_IN_PROGRESS);
1685
1686 return 0;
1687 }
1688
pqi_get_logical_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1689 static int pqi_get_logical_device_info(struct pqi_ctrl_info *ctrl_info,
1690 struct pqi_scsi_dev *device)
1691 {
1692 int rc;
1693 u8 *buffer;
1694
1695 buffer = kmalloc(64, GFP_KERNEL);
1696 if (!buffer)
1697 return -ENOMEM;
1698
1699 /* Send an inquiry to the device to see what it is. */
1700 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64);
1701 if (rc)
1702 goto out;
1703
1704 scsi_sanitize_inquiry_string(&buffer[8], 8);
1705 scsi_sanitize_inquiry_string(&buffer[16], 16);
1706
1707 device->devtype = buffer[0] & 0x1f;
1708 memcpy(device->vendor, &buffer[8], sizeof(device->vendor));
1709 memcpy(device->model, &buffer[16], sizeof(device->model));
1710
1711 if (device->devtype == TYPE_DISK) {
1712 if (device->is_external_raid_device) {
1713 device->raid_level = SA_RAID_UNKNOWN;
1714 device->volume_status = CISS_LV_OK;
1715 device->volume_offline = false;
1716 } else {
1717 pqi_get_raid_level(ctrl_info, device);
1718 pqi_get_raid_bypass_status(ctrl_info, device);
1719 pqi_get_volume_status(ctrl_info, device);
1720 }
1721 }
1722
1723 out:
1724 kfree(buffer);
1725
1726 return rc;
1727 }
1728
1729 /*
1730 * Prevent adding drive to OS for some corner cases such as a drive
1731 * undergoing a sanitize (erase) operation. Some OSes will continue to poll
1732 * the drive until the sanitize completes, which can take hours,
1733 * resulting in long bootup delays. Commands such as TUR, READ_CAP
1734 * are allowed, but READ/WRITE cause check condition. So the OS
1735 * cannot check/read the partition table.
1736 * Note: devices that have completed sanitize must be re-enabled
1737 * using the management utility.
1738 */
pqi_keep_device_offline(struct pqi_scsi_dev * device)1739 static inline bool pqi_keep_device_offline(struct pqi_scsi_dev *device)
1740 {
1741 return device->erase_in_progress;
1742 }
1743
pqi_get_device_info_phys_logical(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * id_phys)1744 static int pqi_get_device_info_phys_logical(struct pqi_ctrl_info *ctrl_info,
1745 struct pqi_scsi_dev *device,
1746 struct bmic_identify_physical_device *id_phys)
1747 {
1748 int rc;
1749
1750 if (device->is_expander_smp_device)
1751 return 0;
1752
1753 if (pqi_is_logical_device(device))
1754 rc = pqi_get_logical_device_info(ctrl_info, device);
1755 else
1756 rc = pqi_get_physical_device_info(ctrl_info, device, id_phys);
1757
1758 return rc;
1759 }
1760
pqi_get_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * id_phys)1761 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info,
1762 struct pqi_scsi_dev *device,
1763 struct bmic_identify_physical_device *id_phys)
1764 {
1765 int rc;
1766
1767 rc = pqi_get_device_info_phys_logical(ctrl_info, device, id_phys);
1768
1769 if (rc == 0 && device->lun_count == 0)
1770 device->lun_count = 1;
1771
1772 return rc;
1773 }
1774
pqi_show_volume_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1775 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info,
1776 struct pqi_scsi_dev *device)
1777 {
1778 char *status;
1779 static const char unknown_state_str[] =
1780 "Volume is in an unknown state (%u)";
1781 char unknown_state_buffer[sizeof(unknown_state_str) + 10];
1782
1783 switch (device->volume_status) {
1784 case CISS_LV_OK:
1785 status = "Volume online";
1786 break;
1787 case CISS_LV_FAILED:
1788 status = "Volume failed";
1789 break;
1790 case CISS_LV_NOT_CONFIGURED:
1791 status = "Volume not configured";
1792 break;
1793 case CISS_LV_DEGRADED:
1794 status = "Volume degraded";
1795 break;
1796 case CISS_LV_READY_FOR_RECOVERY:
1797 status = "Volume ready for recovery operation";
1798 break;
1799 case CISS_LV_UNDERGOING_RECOVERY:
1800 status = "Volume undergoing recovery";
1801 break;
1802 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED:
1803 status = "Wrong physical drive was replaced";
1804 break;
1805 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM:
1806 status = "A physical drive not properly connected";
1807 break;
1808 case CISS_LV_HARDWARE_OVERHEATING:
1809 status = "Hardware is overheating";
1810 break;
1811 case CISS_LV_HARDWARE_HAS_OVERHEATED:
1812 status = "Hardware has overheated";
1813 break;
1814 case CISS_LV_UNDERGOING_EXPANSION:
1815 status = "Volume undergoing expansion";
1816 break;
1817 case CISS_LV_NOT_AVAILABLE:
1818 status = "Volume waiting for transforming volume";
1819 break;
1820 case CISS_LV_QUEUED_FOR_EXPANSION:
1821 status = "Volume queued for expansion";
1822 break;
1823 case CISS_LV_DISABLED_SCSI_ID_CONFLICT:
1824 status = "Volume disabled due to SCSI ID conflict";
1825 break;
1826 case CISS_LV_EJECTED:
1827 status = "Volume has been ejected";
1828 break;
1829 case CISS_LV_UNDERGOING_ERASE:
1830 status = "Volume undergoing background erase";
1831 break;
1832 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD:
1833 status = "Volume ready for predictive spare rebuild";
1834 break;
1835 case CISS_LV_UNDERGOING_RPI:
1836 status = "Volume undergoing rapid parity initialization";
1837 break;
1838 case CISS_LV_PENDING_RPI:
1839 status = "Volume queued for rapid parity initialization";
1840 break;
1841 case CISS_LV_ENCRYPTED_NO_KEY:
1842 status = "Encrypted volume inaccessible - key not present";
1843 break;
1844 case CISS_LV_UNDERGOING_ENCRYPTION:
1845 status = "Volume undergoing encryption process";
1846 break;
1847 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING:
1848 status = "Volume undergoing encryption re-keying process";
1849 break;
1850 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1851 status = "Volume encrypted but encryption is disabled";
1852 break;
1853 case CISS_LV_PENDING_ENCRYPTION:
1854 status = "Volume pending migration to encrypted state";
1855 break;
1856 case CISS_LV_PENDING_ENCRYPTION_REKEYING:
1857 status = "Volume pending encryption rekeying";
1858 break;
1859 case CISS_LV_NOT_SUPPORTED:
1860 status = "Volume not supported on this controller";
1861 break;
1862 case CISS_LV_STATUS_UNAVAILABLE:
1863 status = "Volume status not available";
1864 break;
1865 default:
1866 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer),
1867 unknown_state_str, device->volume_status);
1868 status = unknown_state_buffer;
1869 break;
1870 }
1871
1872 dev_info(&ctrl_info->pci_dev->dev,
1873 "scsi %d:%d:%d:%d %s\n",
1874 ctrl_info->scsi_host->host_no,
1875 device->bus, device->target, device->lun, status);
1876 }
1877
pqi_rescan_worker(struct work_struct * work)1878 static void pqi_rescan_worker(struct work_struct *work)
1879 {
1880 struct pqi_ctrl_info *ctrl_info;
1881
1882 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
1883 rescan_work);
1884
1885 pqi_scan_scsi_devices(ctrl_info);
1886 }
1887
pqi_add_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1888 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info,
1889 struct pqi_scsi_dev *device)
1890 {
1891 int rc;
1892
1893 if (pqi_is_logical_device(device))
1894 rc = scsi_add_device(ctrl_info->scsi_host, device->bus,
1895 device->target, device->lun);
1896 else
1897 rc = pqi_add_sas_device(ctrl_info->sas_host, device);
1898
1899 return rc;
1900 }
1901
1902 #define PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS (20 * 1000)
1903
pqi_remove_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1904 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device)
1905 {
1906 int rc;
1907 int lun;
1908
1909 for (lun = 0; lun < device->lun_count; lun++) {
1910 rc = pqi_device_wait_for_pending_io(ctrl_info, device, lun,
1911 PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS);
1912 if (rc)
1913 dev_err(&ctrl_info->pci_dev->dev,
1914 "scsi %d:%d:%d:%d removing device with %d outstanding command(s)\n",
1915 ctrl_info->scsi_host->host_no, device->bus,
1916 device->target, lun,
1917 atomic_read(&device->scsi_cmds_outstanding[lun]));
1918 }
1919
1920 if (pqi_is_logical_device(device))
1921 scsi_remove_device(device->sdev);
1922 else
1923 pqi_remove_sas_device(device);
1924
1925 pqi_device_remove_start(device);
1926 }
1927
1928 /* Assumes the SCSI device list lock is held. */
1929
pqi_find_scsi_dev(struct pqi_ctrl_info * ctrl_info,int bus,int target,int lun)1930 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info,
1931 int bus, int target, int lun)
1932 {
1933 struct pqi_scsi_dev *device;
1934
1935 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry)
1936 if (device->bus == bus && device->target == target && device->lun == lun)
1937 return device;
1938
1939 return NULL;
1940 }
1941
pqi_device_equal(struct pqi_scsi_dev * dev1,struct pqi_scsi_dev * dev2)1942 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, struct pqi_scsi_dev *dev2)
1943 {
1944 if (dev1->is_physical_device != dev2->is_physical_device)
1945 return false;
1946
1947 if (dev1->is_physical_device)
1948 return memcmp(dev1->wwid, dev2->wwid, sizeof(dev1->wwid)) == 0;
1949
1950 return memcmp(dev1->volume_id, dev2->volume_id, sizeof(dev1->volume_id)) == 0;
1951 }
1952
1953 enum pqi_find_result {
1954 DEVICE_NOT_FOUND,
1955 DEVICE_CHANGED,
1956 DEVICE_SAME,
1957 };
1958
pqi_scsi_find_entry(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device_to_find,struct pqi_scsi_dev ** matching_device)1959 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info,
1960 struct pqi_scsi_dev *device_to_find, struct pqi_scsi_dev **matching_device)
1961 {
1962 struct pqi_scsi_dev *device;
1963
1964 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) {
1965 if (pqi_scsi3addr_equal(device_to_find->scsi3addr, device->scsi3addr)) {
1966 *matching_device = device;
1967 if (pqi_device_equal(device_to_find, device)) {
1968 if (device_to_find->volume_offline)
1969 return DEVICE_CHANGED;
1970 return DEVICE_SAME;
1971 }
1972 return DEVICE_CHANGED;
1973 }
1974 }
1975
1976 return DEVICE_NOT_FOUND;
1977 }
1978
pqi_device_type(struct pqi_scsi_dev * device)1979 static inline const char *pqi_device_type(struct pqi_scsi_dev *device)
1980 {
1981 if (device->is_expander_smp_device)
1982 return "Enclosure SMP ";
1983
1984 return scsi_device_type(device->devtype);
1985 }
1986
1987 #define PQI_DEV_INFO_BUFFER_LENGTH 128
1988
pqi_dev_info(struct pqi_ctrl_info * ctrl_info,char * action,struct pqi_scsi_dev * device)1989 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info,
1990 char *action, struct pqi_scsi_dev *device)
1991 {
1992 ssize_t count;
1993 char buffer[PQI_DEV_INFO_BUFFER_LENGTH];
1994
1995 count = scnprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH,
1996 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus);
1997
1998 if (device->target_lun_valid)
1999 count += scnprintf(buffer + count,
2000 PQI_DEV_INFO_BUFFER_LENGTH - count,
2001 "%d:%d",
2002 device->target,
2003 device->lun);
2004 else
2005 count += scnprintf(buffer + count,
2006 PQI_DEV_INFO_BUFFER_LENGTH - count,
2007 "-:-");
2008
2009 if (pqi_is_logical_device(device))
2010 count += scnprintf(buffer + count,
2011 PQI_DEV_INFO_BUFFER_LENGTH - count,
2012 " %08x%08x",
2013 *((u32 *)&device->scsi3addr),
2014 *((u32 *)&device->scsi3addr[4]));
2015 else
2016 count += scnprintf(buffer + count,
2017 PQI_DEV_INFO_BUFFER_LENGTH - count,
2018 " %016llx%016llx",
2019 get_unaligned_be64(&device->wwid[0]),
2020 get_unaligned_be64(&device->wwid[8]));
2021
2022 count += scnprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count,
2023 " %s %.8s %.16s ",
2024 pqi_device_type(device),
2025 device->vendor,
2026 device->model);
2027
2028 if (pqi_is_logical_device(device)) {
2029 if (device->devtype == TYPE_DISK)
2030 count += scnprintf(buffer + count,
2031 PQI_DEV_INFO_BUFFER_LENGTH - count,
2032 "SSDSmartPathCap%c En%c %-12s",
2033 device->raid_bypass_configured ? '+' : '-',
2034 device->raid_bypass_enabled ? '+' : '-',
2035 pqi_raid_level_to_string(device->raid_level));
2036 } else {
2037 count += scnprintf(buffer + count,
2038 PQI_DEV_INFO_BUFFER_LENGTH - count,
2039 "AIO%c", device->aio_enabled ? '+' : '-');
2040 if (device->devtype == TYPE_DISK ||
2041 device->devtype == TYPE_ZBC)
2042 count += scnprintf(buffer + count,
2043 PQI_DEV_INFO_BUFFER_LENGTH - count,
2044 " qd=%-6d", device->queue_depth);
2045 }
2046
2047 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer);
2048 }
2049
pqi_raid_maps_equal(struct raid_map * raid_map1,struct raid_map * raid_map2)2050 static bool pqi_raid_maps_equal(struct raid_map *raid_map1, struct raid_map *raid_map2)
2051 {
2052 u32 raid_map1_size;
2053 u32 raid_map2_size;
2054
2055 if (raid_map1 == NULL || raid_map2 == NULL)
2056 return raid_map1 == raid_map2;
2057
2058 raid_map1_size = get_unaligned_le32(&raid_map1->structure_size);
2059 raid_map2_size = get_unaligned_le32(&raid_map2->structure_size);
2060
2061 if (raid_map1_size != raid_map2_size)
2062 return false;
2063
2064 return memcmp(raid_map1, raid_map2, raid_map1_size) == 0;
2065 }
2066
2067 /* Assumes the SCSI device list lock is held. */
2068
pqi_scsi_update_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * existing_device,struct pqi_scsi_dev * new_device)2069 static void pqi_scsi_update_device(struct pqi_ctrl_info *ctrl_info,
2070 struct pqi_scsi_dev *existing_device, struct pqi_scsi_dev *new_device)
2071 {
2072 existing_device->device_type = new_device->device_type;
2073 existing_device->bus = new_device->bus;
2074 if (new_device->target_lun_valid) {
2075 existing_device->target = new_device->target;
2076 existing_device->lun = new_device->lun;
2077 existing_device->target_lun_valid = true;
2078 }
2079
2080 /* By definition, the scsi3addr and wwid fields are already the same. */
2081
2082 existing_device->is_physical_device = new_device->is_physical_device;
2083 memcpy(existing_device->vendor, new_device->vendor, sizeof(existing_device->vendor));
2084 memcpy(existing_device->model, new_device->model, sizeof(existing_device->model));
2085 existing_device->sas_address = new_device->sas_address;
2086 existing_device->queue_depth = new_device->queue_depth;
2087 existing_device->device_offline = false;
2088 existing_device->lun_count = new_device->lun_count;
2089
2090 if (pqi_is_logical_device(existing_device)) {
2091 existing_device->is_external_raid_device = new_device->is_external_raid_device;
2092
2093 if (existing_device->devtype == TYPE_DISK) {
2094 existing_device->raid_level = new_device->raid_level;
2095 existing_device->volume_status = new_device->volume_status;
2096 memset(existing_device->next_bypass_group, 0, sizeof(existing_device->next_bypass_group));
2097 if (!pqi_raid_maps_equal(existing_device->raid_map, new_device->raid_map)) {
2098 kfree(existing_device->raid_map);
2099 existing_device->raid_map = new_device->raid_map;
2100 /* To prevent this from being freed later. */
2101 new_device->raid_map = NULL;
2102 }
2103 existing_device->raid_bypass_configured = new_device->raid_bypass_configured;
2104 existing_device->raid_bypass_enabled = new_device->raid_bypass_enabled;
2105 }
2106 } else {
2107 existing_device->aio_enabled = new_device->aio_enabled;
2108 existing_device->aio_handle = new_device->aio_handle;
2109 existing_device->is_expander_smp_device = new_device->is_expander_smp_device;
2110 existing_device->active_path_index = new_device->active_path_index;
2111 existing_device->phy_id = new_device->phy_id;
2112 existing_device->path_map = new_device->path_map;
2113 existing_device->bay = new_device->bay;
2114 existing_device->box_index = new_device->box_index;
2115 existing_device->phys_box_on_bus = new_device->phys_box_on_bus;
2116 existing_device->phy_connected_dev_type = new_device->phy_connected_dev_type;
2117 memcpy(existing_device->box, new_device->box, sizeof(existing_device->box));
2118 memcpy(existing_device->phys_connector, new_device->phys_connector, sizeof(existing_device->phys_connector));
2119 }
2120 }
2121
pqi_free_device(struct pqi_scsi_dev * device)2122 static inline void pqi_free_device(struct pqi_scsi_dev *device)
2123 {
2124 if (device) {
2125 kfree(device->raid_map);
2126 kfree(device);
2127 }
2128 }
2129
2130 /*
2131 * Called when exposing a new device to the OS fails in order to re-adjust
2132 * our internal SCSI device list to match the SCSI ML's view.
2133 */
2134
pqi_fixup_botched_add(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)2135 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info,
2136 struct pqi_scsi_dev *device)
2137 {
2138 unsigned long flags;
2139
2140 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
2141 list_del(&device->scsi_device_list_entry);
2142 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
2143
2144 /* Allow the device structure to be freed later. */
2145 device->keep_device = false;
2146 }
2147
pqi_is_device_added(struct pqi_scsi_dev * device)2148 static inline bool pqi_is_device_added(struct pqi_scsi_dev *device)
2149 {
2150 if (device->is_expander_smp_device)
2151 return device->sas_port != NULL;
2152
2153 return device->sdev != NULL;
2154 }
2155
pqi_init_device_tmf_work(struct pqi_scsi_dev * device)2156 static inline void pqi_init_device_tmf_work(struct pqi_scsi_dev *device)
2157 {
2158 unsigned int lun;
2159 struct pqi_tmf_work *tmf_work;
2160
2161 for (lun = 0, tmf_work = device->tmf_work; lun < PQI_MAX_LUNS_PER_DEVICE; lun++, tmf_work++)
2162 INIT_WORK(&tmf_work->work_struct, pqi_tmf_worker);
2163 }
2164
pqi_volume_rescan_needed(struct pqi_scsi_dev * device)2165 static inline bool pqi_volume_rescan_needed(struct pqi_scsi_dev *device)
2166 {
2167 if (pqi_device_in_remove(device))
2168 return false;
2169
2170 if (device->sdev == NULL)
2171 return false;
2172
2173 if (!scsi_device_online(device->sdev))
2174 return false;
2175
2176 return device->rescan;
2177 }
2178
pqi_update_device_list(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * new_device_list[],unsigned int num_new_devices)2179 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info,
2180 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices)
2181 {
2182 int rc;
2183 unsigned int i;
2184 unsigned long flags;
2185 enum pqi_find_result find_result;
2186 struct pqi_scsi_dev *device;
2187 struct pqi_scsi_dev *next;
2188 struct pqi_scsi_dev *matching_device;
2189 LIST_HEAD(add_list);
2190 LIST_HEAD(delete_list);
2191
2192 /*
2193 * The idea here is to do as little work as possible while holding the
2194 * spinlock. That's why we go to great pains to defer anything other
2195 * than updating the internal device list until after we release the
2196 * spinlock.
2197 */
2198
2199 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
2200
2201 /* Assume that all devices in the existing list have gone away. */
2202 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry)
2203 device->device_gone = true;
2204
2205 for (i = 0; i < num_new_devices; i++) {
2206 device = new_device_list[i];
2207
2208 find_result = pqi_scsi_find_entry(ctrl_info, device,
2209 &matching_device);
2210
2211 switch (find_result) {
2212 case DEVICE_SAME:
2213 /*
2214 * The newly found device is already in the existing
2215 * device list.
2216 */
2217 device->new_device = false;
2218 matching_device->device_gone = false;
2219 pqi_scsi_update_device(ctrl_info, matching_device, device);
2220 break;
2221 case DEVICE_NOT_FOUND:
2222 /*
2223 * The newly found device is NOT in the existing device
2224 * list.
2225 */
2226 device->new_device = true;
2227 break;
2228 case DEVICE_CHANGED:
2229 /*
2230 * The original device has gone away and we need to add
2231 * the new device.
2232 */
2233 device->new_device = true;
2234 break;
2235 }
2236 }
2237
2238 /* Process all devices that have gone away. */
2239 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list,
2240 scsi_device_list_entry) {
2241 if (device->device_gone) {
2242 list_del(&device->scsi_device_list_entry);
2243 list_add_tail(&device->delete_list_entry, &delete_list);
2244 }
2245 }
2246
2247 /* Process all new devices. */
2248 for (i = 0; i < num_new_devices; i++) {
2249 device = new_device_list[i];
2250 if (!device->new_device)
2251 continue;
2252 if (device->volume_offline)
2253 continue;
2254 list_add_tail(&device->scsi_device_list_entry,
2255 &ctrl_info->scsi_device_list);
2256 list_add_tail(&device->add_list_entry, &add_list);
2257 /* To prevent this device structure from being freed later. */
2258 device->keep_device = true;
2259 pqi_init_device_tmf_work(device);
2260 }
2261
2262 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
2263
2264 /*
2265 * If OFA is in progress and there are devices that need to be deleted,
2266 * allow any pending reset operations to continue and unblock any SCSI
2267 * requests before removal.
2268 */
2269 if (pqi_ofa_in_progress(ctrl_info)) {
2270 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry)
2271 if (pqi_is_device_added(device))
2272 pqi_device_remove_start(device);
2273 pqi_ctrl_unblock_device_reset(ctrl_info);
2274 pqi_scsi_unblock_requests(ctrl_info);
2275 }
2276
2277 /* Remove all devices that have gone away. */
2278 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) {
2279 if (device->volume_offline) {
2280 pqi_dev_info(ctrl_info, "offline", device);
2281 pqi_show_volume_status(ctrl_info, device);
2282 } else {
2283 pqi_dev_info(ctrl_info, "removed", device);
2284 }
2285 if (pqi_is_device_added(device))
2286 pqi_remove_device(ctrl_info, device);
2287 list_del(&device->delete_list_entry);
2288 pqi_free_device(device);
2289 }
2290
2291 /*
2292 * Notify the SML of any existing device changes such as;
2293 * queue depth, device size.
2294 */
2295 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) {
2296 if (device->sdev && device->queue_depth != device->advertised_queue_depth) {
2297 device->advertised_queue_depth = device->queue_depth;
2298 scsi_change_queue_depth(device->sdev, device->advertised_queue_depth);
2299 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
2300 if (pqi_volume_rescan_needed(device)) {
2301 device->rescan = false;
2302 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
2303 scsi_rescan_device(device->sdev);
2304 } else {
2305 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
2306 }
2307 }
2308 }
2309
2310 /* Expose any new devices. */
2311 list_for_each_entry_safe(device, next, &add_list, add_list_entry) {
2312 if (!pqi_is_device_added(device)) {
2313 rc = pqi_add_device(ctrl_info, device);
2314 if (rc == 0) {
2315 pqi_dev_info(ctrl_info, "added", device);
2316 } else {
2317 dev_warn(&ctrl_info->pci_dev->dev,
2318 "scsi %d:%d:%d:%d addition failed, device not added\n",
2319 ctrl_info->scsi_host->host_no,
2320 device->bus, device->target,
2321 device->lun);
2322 pqi_fixup_botched_add(ctrl_info, device);
2323 }
2324 }
2325 }
2326
2327 }
2328
pqi_is_supported_device(struct pqi_scsi_dev * device)2329 static inline bool pqi_is_supported_device(struct pqi_scsi_dev *device)
2330 {
2331 /*
2332 * Only support the HBA controller itself as a RAID
2333 * controller. If it's a RAID controller other than
2334 * the HBA itself (an external RAID controller, for
2335 * example), we don't support it.
2336 */
2337 if (device->device_type == SA_DEVICE_TYPE_CONTROLLER &&
2338 !pqi_is_hba_lunid(device->scsi3addr))
2339 return false;
2340
2341 return true;
2342 }
2343
pqi_skip_device(u8 * scsi3addr)2344 static inline bool pqi_skip_device(u8 *scsi3addr)
2345 {
2346 /* Ignore all masked devices. */
2347 if (MASKED_DEVICE(scsi3addr))
2348 return true;
2349
2350 return false;
2351 }
2352
pqi_mask_device(u8 * scsi3addr)2353 static inline void pqi_mask_device(u8 *scsi3addr)
2354 {
2355 scsi3addr[3] |= 0xc0;
2356 }
2357
pqi_expose_device(struct pqi_scsi_dev * device)2358 static inline bool pqi_expose_device(struct pqi_scsi_dev *device)
2359 {
2360 return !device->is_physical_device || !pqi_skip_device(device->scsi3addr);
2361 }
2362
pqi_update_scsi_devices(struct pqi_ctrl_info * ctrl_info)2363 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2364 {
2365 int i;
2366 int rc;
2367 LIST_HEAD(new_device_list_head);
2368 struct report_phys_lun_16byte_wwid_list *physdev_list = NULL;
2369 struct report_log_lun_list *logdev_list = NULL;
2370 struct report_phys_lun_16byte_wwid *phys_lun;
2371 struct report_log_lun *log_lun;
2372 struct bmic_identify_physical_device *id_phys = NULL;
2373 u32 num_physicals;
2374 u32 num_logicals;
2375 struct pqi_scsi_dev **new_device_list = NULL;
2376 struct pqi_scsi_dev *device;
2377 struct pqi_scsi_dev *next;
2378 unsigned int num_new_devices;
2379 unsigned int num_valid_devices;
2380 bool is_physical_device;
2381 u8 *scsi3addr;
2382 unsigned int physical_index;
2383 unsigned int logical_index;
2384 static char *out_of_memory_msg =
2385 "failed to allocate memory, device discovery stopped";
2386
2387 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list);
2388 if (rc)
2389 goto out;
2390
2391 if (physdev_list)
2392 num_physicals =
2393 get_unaligned_be32(&physdev_list->header.list_length)
2394 / sizeof(physdev_list->lun_entries[0]);
2395 else
2396 num_physicals = 0;
2397
2398 if (logdev_list)
2399 num_logicals =
2400 get_unaligned_be32(&logdev_list->header.list_length)
2401 / sizeof(logdev_list->lun_entries[0]);
2402 else
2403 num_logicals = 0;
2404
2405 if (num_physicals) {
2406 /*
2407 * We need this buffer for calls to pqi_get_physical_disk_info()
2408 * below. We allocate it here instead of inside
2409 * pqi_get_physical_disk_info() because it's a fairly large
2410 * buffer.
2411 */
2412 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL);
2413 if (!id_phys) {
2414 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2415 out_of_memory_msg);
2416 rc = -ENOMEM;
2417 goto out;
2418 }
2419
2420 if (pqi_hide_vsep) {
2421 for (i = num_physicals - 1; i >= 0; i--) {
2422 phys_lun = &physdev_list->lun_entries[i];
2423 if (CISS_GET_DRIVE_NUMBER(phys_lun->lunid) == PQI_VSEP_CISS_BTL) {
2424 pqi_mask_device(phys_lun->lunid);
2425 break;
2426 }
2427 }
2428 }
2429 }
2430
2431 if (num_logicals &&
2432 (logdev_list->header.flags & CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX))
2433 ctrl_info->lv_drive_type_mix_valid = true;
2434
2435 num_new_devices = num_physicals + num_logicals;
2436
2437 new_device_list = kmalloc_array(num_new_devices,
2438 sizeof(*new_device_list),
2439 GFP_KERNEL);
2440 if (!new_device_list) {
2441 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg);
2442 rc = -ENOMEM;
2443 goto out;
2444 }
2445
2446 for (i = 0; i < num_new_devices; i++) {
2447 device = kzalloc(sizeof(*device), GFP_KERNEL);
2448 if (!device) {
2449 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2450 out_of_memory_msg);
2451 rc = -ENOMEM;
2452 goto out;
2453 }
2454 list_add_tail(&device->new_device_list_entry,
2455 &new_device_list_head);
2456 }
2457
2458 device = NULL;
2459 num_valid_devices = 0;
2460 physical_index = 0;
2461 logical_index = 0;
2462
2463 for (i = 0; i < num_new_devices; i++) {
2464
2465 if ((!pqi_expose_ld_first && i < num_physicals) ||
2466 (pqi_expose_ld_first && i >= num_logicals)) {
2467 is_physical_device = true;
2468 phys_lun = &physdev_list->lun_entries[physical_index++];
2469 log_lun = NULL;
2470 scsi3addr = phys_lun->lunid;
2471 } else {
2472 is_physical_device = false;
2473 phys_lun = NULL;
2474 log_lun = &logdev_list->lun_entries[logical_index++];
2475 scsi3addr = log_lun->lunid;
2476 }
2477
2478 if (is_physical_device && pqi_skip_device(scsi3addr))
2479 continue;
2480
2481 if (device)
2482 device = list_next_entry(device, new_device_list_entry);
2483 else
2484 device = list_first_entry(&new_device_list_head,
2485 struct pqi_scsi_dev, new_device_list_entry);
2486
2487 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
2488 device->is_physical_device = is_physical_device;
2489 if (is_physical_device) {
2490 device->device_type = phys_lun->device_type;
2491 if (device->device_type == SA_DEVICE_TYPE_EXPANDER_SMP)
2492 device->is_expander_smp_device = true;
2493 } else {
2494 device->is_external_raid_device =
2495 pqi_is_external_raid_addr(scsi3addr);
2496 }
2497
2498 if (!pqi_is_supported_device(device))
2499 continue;
2500
2501 /* Gather information about the device. */
2502 rc = pqi_get_device_info(ctrl_info, device, id_phys);
2503 if (rc == -ENOMEM) {
2504 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2505 out_of_memory_msg);
2506 goto out;
2507 }
2508 if (rc) {
2509 if (device->is_physical_device)
2510 dev_warn(&ctrl_info->pci_dev->dev,
2511 "obtaining device info failed, skipping physical device %016llx%016llx\n",
2512 get_unaligned_be64(&phys_lun->wwid[0]),
2513 get_unaligned_be64(&phys_lun->wwid[8]));
2514 else
2515 dev_warn(&ctrl_info->pci_dev->dev,
2516 "obtaining device info failed, skipping logical device %08x%08x\n",
2517 *((u32 *)&device->scsi3addr),
2518 *((u32 *)&device->scsi3addr[4]));
2519 rc = 0;
2520 continue;
2521 }
2522
2523 /* Do not present disks that the OS cannot fully probe. */
2524 if (pqi_keep_device_offline(device))
2525 continue;
2526
2527 pqi_assign_bus_target_lun(device);
2528
2529 if (device->is_physical_device) {
2530 memcpy(device->wwid, phys_lun->wwid, sizeof(device->wwid));
2531 if ((phys_lun->device_flags &
2532 CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED) &&
2533 phys_lun->aio_handle) {
2534 device->aio_enabled = true;
2535 device->aio_handle =
2536 phys_lun->aio_handle;
2537 }
2538 } else {
2539 memcpy(device->volume_id, log_lun->volume_id,
2540 sizeof(device->volume_id));
2541 }
2542
2543 device->sas_address = get_unaligned_be64(&device->wwid[0]);
2544
2545 new_device_list[num_valid_devices++] = device;
2546 }
2547
2548 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices);
2549
2550 out:
2551 list_for_each_entry_safe(device, next, &new_device_list_head,
2552 new_device_list_entry) {
2553 if (device->keep_device)
2554 continue;
2555 list_del(&device->new_device_list_entry);
2556 pqi_free_device(device);
2557 }
2558
2559 kfree(new_device_list);
2560 kfree(physdev_list);
2561 kfree(logdev_list);
2562 kfree(id_phys);
2563
2564 return rc;
2565 }
2566
pqi_scan_scsi_devices(struct pqi_ctrl_info * ctrl_info)2567 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2568 {
2569 int rc;
2570 int mutex_acquired;
2571
2572 if (pqi_ctrl_offline(ctrl_info))
2573 return -ENXIO;
2574
2575 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex);
2576
2577 if (!mutex_acquired) {
2578 if (pqi_ctrl_scan_blocked(ctrl_info))
2579 return -EBUSY;
2580 pqi_schedule_rescan_worker_delayed(ctrl_info);
2581 return -EINPROGRESS;
2582 }
2583
2584 rc = pqi_update_scsi_devices(ctrl_info);
2585 if (rc && !pqi_ctrl_scan_blocked(ctrl_info))
2586 pqi_schedule_rescan_worker_delayed(ctrl_info);
2587
2588 mutex_unlock(&ctrl_info->scan_mutex);
2589
2590 return rc;
2591 }
2592
pqi_scan_start(struct Scsi_Host * shost)2593 static void pqi_scan_start(struct Scsi_Host *shost)
2594 {
2595 struct pqi_ctrl_info *ctrl_info;
2596
2597 ctrl_info = shost_to_hba(shost);
2598
2599 pqi_scan_scsi_devices(ctrl_info);
2600 }
2601
2602 /* Returns TRUE if scan is finished. */
2603
pqi_scan_finished(struct Scsi_Host * shost,unsigned long elapsed_time)2604 static int pqi_scan_finished(struct Scsi_Host *shost,
2605 unsigned long elapsed_time)
2606 {
2607 struct pqi_ctrl_info *ctrl_info;
2608
2609 ctrl_info = shost_priv(shost);
2610
2611 return !mutex_is_locked(&ctrl_info->scan_mutex);
2612 }
2613
pqi_set_encryption_info(struct pqi_encryption_info * encryption_info,struct raid_map * raid_map,u64 first_block)2614 static inline void pqi_set_encryption_info(struct pqi_encryption_info *encryption_info,
2615 struct raid_map *raid_map, u64 first_block)
2616 {
2617 u32 volume_blk_size;
2618
2619 /*
2620 * Set the encryption tweak values based on logical block address.
2621 * If the block size is 512, the tweak value is equal to the LBA.
2622 * For other block sizes, tweak value is (LBA * block size) / 512.
2623 */
2624 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size);
2625 if (volume_blk_size != 512)
2626 first_block = (first_block * volume_blk_size) / 512;
2627
2628 encryption_info->data_encryption_key_index =
2629 get_unaligned_le16(&raid_map->data_encryption_key_index);
2630 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block);
2631 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block);
2632 }
2633
2634 /*
2635 * Attempt to perform RAID bypass mapping for a logical volume I/O.
2636 */
2637
pqi_aio_raid_level_supported(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev_raid_map_data * rmd)2638 static bool pqi_aio_raid_level_supported(struct pqi_ctrl_info *ctrl_info,
2639 struct pqi_scsi_dev_raid_map_data *rmd)
2640 {
2641 bool is_supported = true;
2642
2643 switch (rmd->raid_level) {
2644 case SA_RAID_0:
2645 break;
2646 case SA_RAID_1:
2647 if (rmd->is_write && (!ctrl_info->enable_r1_writes ||
2648 rmd->data_length > ctrl_info->max_write_raid_1_10_2drive))
2649 is_supported = false;
2650 break;
2651 case SA_RAID_TRIPLE:
2652 if (rmd->is_write && (!ctrl_info->enable_r1_writes ||
2653 rmd->data_length > ctrl_info->max_write_raid_1_10_3drive))
2654 is_supported = false;
2655 break;
2656 case SA_RAID_5:
2657 if (rmd->is_write && (!ctrl_info->enable_r5_writes ||
2658 rmd->data_length > ctrl_info->max_write_raid_5_6))
2659 is_supported = false;
2660 break;
2661 case SA_RAID_6:
2662 if (rmd->is_write && (!ctrl_info->enable_r6_writes ||
2663 rmd->data_length > ctrl_info->max_write_raid_5_6))
2664 is_supported = false;
2665 break;
2666 default:
2667 is_supported = false;
2668 break;
2669 }
2670
2671 return is_supported;
2672 }
2673
2674 #define PQI_RAID_BYPASS_INELIGIBLE 1
2675
pqi_get_aio_lba_and_block_count(struct scsi_cmnd * scmd,struct pqi_scsi_dev_raid_map_data * rmd)2676 static int pqi_get_aio_lba_and_block_count(struct scsi_cmnd *scmd,
2677 struct pqi_scsi_dev_raid_map_data *rmd)
2678 {
2679 /* Check for valid opcode, get LBA and block count. */
2680 switch (scmd->cmnd[0]) {
2681 case WRITE_6:
2682 rmd->is_write = true;
2683 fallthrough;
2684 case READ_6:
2685 rmd->first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) |
2686 (scmd->cmnd[2] << 8) | scmd->cmnd[3]);
2687 rmd->block_cnt = (u32)scmd->cmnd[4];
2688 if (rmd->block_cnt == 0)
2689 rmd->block_cnt = 256;
2690 break;
2691 case WRITE_10:
2692 rmd->is_write = true;
2693 fallthrough;
2694 case READ_10:
2695 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2696 rmd->block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]);
2697 break;
2698 case WRITE_12:
2699 rmd->is_write = true;
2700 fallthrough;
2701 case READ_12:
2702 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2703 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[6]);
2704 break;
2705 case WRITE_16:
2706 rmd->is_write = true;
2707 fallthrough;
2708 case READ_16:
2709 rmd->first_block = get_unaligned_be64(&scmd->cmnd[2]);
2710 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[10]);
2711 break;
2712 default:
2713 /* Process via normal I/O path. */
2714 return PQI_RAID_BYPASS_INELIGIBLE;
2715 }
2716
2717 put_unaligned_le32(scsi_bufflen(scmd), &rmd->data_length);
2718
2719 return 0;
2720 }
2721
pci_get_aio_common_raid_map_values(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev_raid_map_data * rmd,struct raid_map * raid_map)2722 static int pci_get_aio_common_raid_map_values(struct pqi_ctrl_info *ctrl_info,
2723 struct pqi_scsi_dev_raid_map_data *rmd, struct raid_map *raid_map)
2724 {
2725 #if BITS_PER_LONG == 32
2726 u64 tmpdiv;
2727 #endif
2728
2729 rmd->last_block = rmd->first_block + rmd->block_cnt - 1;
2730
2731 /* Check for invalid block or wraparound. */
2732 if (rmd->last_block >=
2733 get_unaligned_le64(&raid_map->volume_blk_cnt) ||
2734 rmd->last_block < rmd->first_block)
2735 return PQI_RAID_BYPASS_INELIGIBLE;
2736
2737 rmd->data_disks_per_row =
2738 get_unaligned_le16(&raid_map->data_disks_per_row);
2739 rmd->strip_size = get_unaligned_le16(&raid_map->strip_size);
2740 rmd->layout_map_count = get_unaligned_le16(&raid_map->layout_map_count);
2741
2742 /* Calculate stripe information for the request. */
2743 rmd->blocks_per_row = rmd->data_disks_per_row * rmd->strip_size;
2744 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */
2745 return PQI_RAID_BYPASS_INELIGIBLE;
2746 #if BITS_PER_LONG == 32
2747 tmpdiv = rmd->first_block;
2748 do_div(tmpdiv, rmd->blocks_per_row);
2749 rmd->first_row = tmpdiv;
2750 tmpdiv = rmd->last_block;
2751 do_div(tmpdiv, rmd->blocks_per_row);
2752 rmd->last_row = tmpdiv;
2753 rmd->first_row_offset = (u32)(rmd->first_block - (rmd->first_row * rmd->blocks_per_row));
2754 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * rmd->blocks_per_row));
2755 tmpdiv = rmd->first_row_offset;
2756 do_div(tmpdiv, rmd->strip_size);
2757 rmd->first_column = tmpdiv;
2758 tmpdiv = rmd->last_row_offset;
2759 do_div(tmpdiv, rmd->strip_size);
2760 rmd->last_column = tmpdiv;
2761 #else
2762 rmd->first_row = rmd->first_block / rmd->blocks_per_row;
2763 rmd->last_row = rmd->last_block / rmd->blocks_per_row;
2764 rmd->first_row_offset = (u32)(rmd->first_block -
2765 (rmd->first_row * rmd->blocks_per_row));
2766 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row *
2767 rmd->blocks_per_row));
2768 rmd->first_column = rmd->first_row_offset / rmd->strip_size;
2769 rmd->last_column = rmd->last_row_offset / rmd->strip_size;
2770 #endif
2771
2772 /* If this isn't a single row/column then give to the controller. */
2773 if (rmd->first_row != rmd->last_row ||
2774 rmd->first_column != rmd->last_column)
2775 return PQI_RAID_BYPASS_INELIGIBLE;
2776
2777 /* Proceeding with driver mapping. */
2778 rmd->total_disks_per_row = rmd->data_disks_per_row +
2779 get_unaligned_le16(&raid_map->metadata_disks_per_row);
2780 rmd->map_row = ((u32)(rmd->first_row >>
2781 raid_map->parity_rotation_shift)) %
2782 get_unaligned_le16(&raid_map->row_cnt);
2783 rmd->map_index = (rmd->map_row * rmd->total_disks_per_row) +
2784 rmd->first_column;
2785
2786 return 0;
2787 }
2788
pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data * rmd,struct raid_map * raid_map)2789 static int pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data *rmd,
2790 struct raid_map *raid_map)
2791 {
2792 #if BITS_PER_LONG == 32
2793 u64 tmpdiv;
2794 #endif
2795
2796 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */
2797 return PQI_RAID_BYPASS_INELIGIBLE;
2798
2799 /* RAID 50/60 */
2800 /* Verify first and last block are in same RAID group. */
2801 rmd->stripesize = rmd->blocks_per_row * rmd->layout_map_count;
2802 #if BITS_PER_LONG == 32
2803 tmpdiv = rmd->first_block;
2804 rmd->first_group = do_div(tmpdiv, rmd->stripesize);
2805 tmpdiv = rmd->first_group;
2806 do_div(tmpdiv, rmd->blocks_per_row);
2807 rmd->first_group = tmpdiv;
2808 tmpdiv = rmd->last_block;
2809 rmd->last_group = do_div(tmpdiv, rmd->stripesize);
2810 tmpdiv = rmd->last_group;
2811 do_div(tmpdiv, rmd->blocks_per_row);
2812 rmd->last_group = tmpdiv;
2813 #else
2814 rmd->first_group = (rmd->first_block % rmd->stripesize) / rmd->blocks_per_row;
2815 rmd->last_group = (rmd->last_block % rmd->stripesize) / rmd->blocks_per_row;
2816 #endif
2817 if (rmd->first_group != rmd->last_group)
2818 return PQI_RAID_BYPASS_INELIGIBLE;
2819
2820 /* Verify request is in a single row of RAID 5/6. */
2821 #if BITS_PER_LONG == 32
2822 tmpdiv = rmd->first_block;
2823 do_div(tmpdiv, rmd->stripesize);
2824 rmd->first_row = tmpdiv;
2825 rmd->r5or6_first_row = tmpdiv;
2826 tmpdiv = rmd->last_block;
2827 do_div(tmpdiv, rmd->stripesize);
2828 rmd->r5or6_last_row = tmpdiv;
2829 #else
2830 rmd->first_row = rmd->r5or6_first_row =
2831 rmd->first_block / rmd->stripesize;
2832 rmd->r5or6_last_row = rmd->last_block / rmd->stripesize;
2833 #endif
2834 if (rmd->r5or6_first_row != rmd->r5or6_last_row)
2835 return PQI_RAID_BYPASS_INELIGIBLE;
2836
2837 /* Verify request is in a single column. */
2838 #if BITS_PER_LONG == 32
2839 tmpdiv = rmd->first_block;
2840 rmd->first_row_offset = do_div(tmpdiv, rmd->stripesize);
2841 tmpdiv = rmd->first_row_offset;
2842 rmd->first_row_offset = (u32)do_div(tmpdiv, rmd->blocks_per_row);
2843 rmd->r5or6_first_row_offset = rmd->first_row_offset;
2844 tmpdiv = rmd->last_block;
2845 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->stripesize);
2846 tmpdiv = rmd->r5or6_last_row_offset;
2847 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->blocks_per_row);
2848 tmpdiv = rmd->r5or6_first_row_offset;
2849 do_div(tmpdiv, rmd->strip_size);
2850 rmd->first_column = rmd->r5or6_first_column = tmpdiv;
2851 tmpdiv = rmd->r5or6_last_row_offset;
2852 do_div(tmpdiv, rmd->strip_size);
2853 rmd->r5or6_last_column = tmpdiv;
2854 #else
2855 rmd->first_row_offset = rmd->r5or6_first_row_offset =
2856 (u32)((rmd->first_block % rmd->stripesize) %
2857 rmd->blocks_per_row);
2858
2859 rmd->r5or6_last_row_offset =
2860 (u32)((rmd->last_block % rmd->stripesize) %
2861 rmd->blocks_per_row);
2862
2863 rmd->first_column =
2864 rmd->r5or6_first_row_offset / rmd->strip_size;
2865 rmd->r5or6_first_column = rmd->first_column;
2866 rmd->r5or6_last_column = rmd->r5or6_last_row_offset / rmd->strip_size;
2867 #endif
2868 if (rmd->r5or6_first_column != rmd->r5or6_last_column)
2869 return PQI_RAID_BYPASS_INELIGIBLE;
2870
2871 /* Request is eligible. */
2872 rmd->map_row =
2873 ((u32)(rmd->first_row >> raid_map->parity_rotation_shift)) %
2874 get_unaligned_le16(&raid_map->row_cnt);
2875
2876 rmd->map_index = (rmd->first_group *
2877 (get_unaligned_le16(&raid_map->row_cnt) *
2878 rmd->total_disks_per_row)) +
2879 (rmd->map_row * rmd->total_disks_per_row) + rmd->first_column;
2880
2881 if (rmd->is_write) {
2882 u32 index;
2883
2884 /*
2885 * p_parity_it_nexus and q_parity_it_nexus are pointers to the
2886 * parity entries inside the device's raid_map.
2887 *
2888 * A device's RAID map is bounded by: number of RAID disks squared.
2889 *
2890 * The devices RAID map size is checked during device
2891 * initialization.
2892 */
2893 index = DIV_ROUND_UP(rmd->map_index + 1, rmd->total_disks_per_row);
2894 index *= rmd->total_disks_per_row;
2895 index -= get_unaligned_le16(&raid_map->metadata_disks_per_row);
2896
2897 rmd->p_parity_it_nexus = raid_map->disk_data[index].aio_handle;
2898 if (rmd->raid_level == SA_RAID_6) {
2899 rmd->q_parity_it_nexus = raid_map->disk_data[index + 1].aio_handle;
2900 rmd->xor_mult = raid_map->disk_data[rmd->map_index].xor_mult[1];
2901 }
2902 #if BITS_PER_LONG == 32
2903 tmpdiv = rmd->first_block;
2904 do_div(tmpdiv, rmd->blocks_per_row);
2905 rmd->row = tmpdiv;
2906 #else
2907 rmd->row = rmd->first_block / rmd->blocks_per_row;
2908 #endif
2909 }
2910
2911 return 0;
2912 }
2913
pqi_set_aio_cdb(struct pqi_scsi_dev_raid_map_data * rmd)2914 static void pqi_set_aio_cdb(struct pqi_scsi_dev_raid_map_data *rmd)
2915 {
2916 /* Build the new CDB for the physical disk I/O. */
2917 if (rmd->disk_block > 0xffffffff) {
2918 rmd->cdb[0] = rmd->is_write ? WRITE_16 : READ_16;
2919 rmd->cdb[1] = 0;
2920 put_unaligned_be64(rmd->disk_block, &rmd->cdb[2]);
2921 put_unaligned_be32(rmd->disk_block_cnt, &rmd->cdb[10]);
2922 rmd->cdb[14] = 0;
2923 rmd->cdb[15] = 0;
2924 rmd->cdb_length = 16;
2925 } else {
2926 rmd->cdb[0] = rmd->is_write ? WRITE_10 : READ_10;
2927 rmd->cdb[1] = 0;
2928 put_unaligned_be32((u32)rmd->disk_block, &rmd->cdb[2]);
2929 rmd->cdb[6] = 0;
2930 put_unaligned_be16((u16)rmd->disk_block_cnt, &rmd->cdb[7]);
2931 rmd->cdb[9] = 0;
2932 rmd->cdb_length = 10;
2933 }
2934 }
2935
pqi_calc_aio_r1_nexus(struct raid_map * raid_map,struct pqi_scsi_dev_raid_map_data * rmd)2936 static void pqi_calc_aio_r1_nexus(struct raid_map *raid_map,
2937 struct pqi_scsi_dev_raid_map_data *rmd)
2938 {
2939 u32 index;
2940 u32 group;
2941
2942 group = rmd->map_index / rmd->data_disks_per_row;
2943
2944 index = rmd->map_index - (group * rmd->data_disks_per_row);
2945 rmd->it_nexus[0] = raid_map->disk_data[index].aio_handle;
2946 index += rmd->data_disks_per_row;
2947 rmd->it_nexus[1] = raid_map->disk_data[index].aio_handle;
2948 if (rmd->layout_map_count > 2) {
2949 index += rmd->data_disks_per_row;
2950 rmd->it_nexus[2] = raid_map->disk_data[index].aio_handle;
2951 }
2952
2953 rmd->num_it_nexus_entries = rmd->layout_map_count;
2954 }
2955
pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)2956 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
2957 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
2958 struct pqi_queue_group *queue_group)
2959 {
2960 int rc;
2961 struct raid_map *raid_map;
2962 u32 group;
2963 u32 next_bypass_group;
2964 struct pqi_encryption_info *encryption_info_ptr;
2965 struct pqi_encryption_info encryption_info;
2966 struct pqi_scsi_dev_raid_map_data rmd = { 0 };
2967
2968 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd);
2969 if (rc)
2970 return PQI_RAID_BYPASS_INELIGIBLE;
2971
2972 rmd.raid_level = device->raid_level;
2973
2974 if (!pqi_aio_raid_level_supported(ctrl_info, &rmd))
2975 return PQI_RAID_BYPASS_INELIGIBLE;
2976
2977 if (unlikely(rmd.block_cnt == 0))
2978 return PQI_RAID_BYPASS_INELIGIBLE;
2979
2980 raid_map = device->raid_map;
2981
2982 rc = pci_get_aio_common_raid_map_values(ctrl_info, &rmd, raid_map);
2983 if (rc)
2984 return PQI_RAID_BYPASS_INELIGIBLE;
2985
2986 if (device->raid_level == SA_RAID_1 ||
2987 device->raid_level == SA_RAID_TRIPLE) {
2988 if (rmd.is_write) {
2989 pqi_calc_aio_r1_nexus(raid_map, &rmd);
2990 } else {
2991 group = device->next_bypass_group[rmd.map_index];
2992 next_bypass_group = group + 1;
2993 if (next_bypass_group >= rmd.layout_map_count)
2994 next_bypass_group = 0;
2995 device->next_bypass_group[rmd.map_index] = next_bypass_group;
2996 rmd.map_index += group * rmd.data_disks_per_row;
2997 }
2998 } else if ((device->raid_level == SA_RAID_5 ||
2999 device->raid_level == SA_RAID_6) &&
3000 (rmd.layout_map_count > 1 || rmd.is_write)) {
3001 rc = pqi_calc_aio_r5_or_r6(&rmd, raid_map);
3002 if (rc)
3003 return PQI_RAID_BYPASS_INELIGIBLE;
3004 }
3005
3006 if (unlikely(rmd.map_index >= RAID_MAP_MAX_ENTRIES))
3007 return PQI_RAID_BYPASS_INELIGIBLE;
3008
3009 rmd.aio_handle = raid_map->disk_data[rmd.map_index].aio_handle;
3010 rmd.disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) +
3011 rmd.first_row * rmd.strip_size +
3012 (rmd.first_row_offset - rmd.first_column * rmd.strip_size);
3013 rmd.disk_block_cnt = rmd.block_cnt;
3014
3015 /* Handle differing logical/physical block sizes. */
3016 if (raid_map->phys_blk_shift) {
3017 rmd.disk_block <<= raid_map->phys_blk_shift;
3018 rmd.disk_block_cnt <<= raid_map->phys_blk_shift;
3019 }
3020
3021 if (unlikely(rmd.disk_block_cnt > 0xffff))
3022 return PQI_RAID_BYPASS_INELIGIBLE;
3023
3024 pqi_set_aio_cdb(&rmd);
3025
3026 if (get_unaligned_le16(&raid_map->flags) & RAID_MAP_ENCRYPTION_ENABLED) {
3027 if (rmd.data_length > device->max_transfer_encrypted)
3028 return PQI_RAID_BYPASS_INELIGIBLE;
3029 pqi_set_encryption_info(&encryption_info, raid_map, rmd.first_block);
3030 encryption_info_ptr = &encryption_info;
3031 } else {
3032 encryption_info_ptr = NULL;
3033 }
3034
3035 if (rmd.is_write) {
3036 switch (device->raid_level) {
3037 case SA_RAID_1:
3038 case SA_RAID_TRIPLE:
3039 return pqi_aio_submit_r1_write_io(ctrl_info, scmd, queue_group,
3040 encryption_info_ptr, device, &rmd);
3041 case SA_RAID_5:
3042 case SA_RAID_6:
3043 return pqi_aio_submit_r56_write_io(ctrl_info, scmd, queue_group,
3044 encryption_info_ptr, device, &rmd);
3045 }
3046 }
3047
3048 return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle,
3049 rmd.cdb, rmd.cdb_length, queue_group,
3050 encryption_info_ptr, true, false);
3051 }
3052
3053 #define PQI_STATUS_IDLE 0x0
3054
3055 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1
3056 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2
3057
3058 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0
3059 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1
3060 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2
3061 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3
3062 #define PQI_DEVICE_STATE_ERROR 0x4
3063
3064 #define PQI_MODE_READY_TIMEOUT_SECS 30
3065 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1
3066
pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info * ctrl_info)3067 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info)
3068 {
3069 struct pqi_device_registers __iomem *pqi_registers;
3070 unsigned long timeout;
3071 u64 signature;
3072 u8 status;
3073
3074 pqi_registers = ctrl_info->pqi_registers;
3075 timeout = (PQI_MODE_READY_TIMEOUT_SECS * HZ) + jiffies;
3076
3077 while (1) {
3078 signature = readq(&pqi_registers->signature);
3079 if (memcmp(&signature, PQI_DEVICE_SIGNATURE,
3080 sizeof(signature)) == 0)
3081 break;
3082 if (time_after(jiffies, timeout)) {
3083 dev_err(&ctrl_info->pci_dev->dev,
3084 "timed out waiting for PQI signature\n");
3085 return -ETIMEDOUT;
3086 }
3087 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
3088 }
3089
3090 while (1) {
3091 status = readb(&pqi_registers->function_and_status_code);
3092 if (status == PQI_STATUS_IDLE)
3093 break;
3094 if (time_after(jiffies, timeout)) {
3095 dev_err(&ctrl_info->pci_dev->dev,
3096 "timed out waiting for PQI IDLE\n");
3097 return -ETIMEDOUT;
3098 }
3099 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
3100 }
3101
3102 while (1) {
3103 if (readl(&pqi_registers->device_status) ==
3104 PQI_DEVICE_STATE_ALL_REGISTERS_READY)
3105 break;
3106 if (time_after(jiffies, timeout)) {
3107 dev_err(&ctrl_info->pci_dev->dev,
3108 "timed out waiting for PQI all registers ready\n");
3109 return -ETIMEDOUT;
3110 }
3111 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
3112 }
3113
3114 return 0;
3115 }
3116
pqi_aio_path_disabled(struct pqi_io_request * io_request)3117 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request)
3118 {
3119 struct pqi_scsi_dev *device;
3120
3121 device = io_request->scmd->device->hostdata;
3122 device->raid_bypass_enabled = false;
3123 device->aio_enabled = false;
3124 }
3125
pqi_take_device_offline(struct scsi_device * sdev,char * path)3126 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path)
3127 {
3128 struct pqi_ctrl_info *ctrl_info;
3129 struct pqi_scsi_dev *device;
3130
3131 device = sdev->hostdata;
3132 if (device->device_offline)
3133 return;
3134
3135 device->device_offline = true;
3136 ctrl_info = shost_to_hba(sdev->host);
3137 pqi_schedule_rescan_worker(ctrl_info);
3138 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n",
3139 path, ctrl_info->scsi_host->host_no, device->bus,
3140 device->target, device->lun);
3141 }
3142
pqi_process_raid_io_error(struct pqi_io_request * io_request)3143 static void pqi_process_raid_io_error(struct pqi_io_request *io_request)
3144 {
3145 u8 scsi_status;
3146 u8 host_byte;
3147 struct scsi_cmnd *scmd;
3148 struct pqi_raid_error_info *error_info;
3149 size_t sense_data_length;
3150 int residual_count;
3151 int xfer_count;
3152 struct scsi_sense_hdr sshdr;
3153
3154 scmd = io_request->scmd;
3155 if (!scmd)
3156 return;
3157
3158 error_info = io_request->error_info;
3159 scsi_status = error_info->status;
3160 host_byte = DID_OK;
3161
3162 switch (error_info->data_out_result) {
3163 case PQI_DATA_IN_OUT_GOOD:
3164 break;
3165 case PQI_DATA_IN_OUT_UNDERFLOW:
3166 xfer_count =
3167 get_unaligned_le32(&error_info->data_out_transferred);
3168 residual_count = scsi_bufflen(scmd) - xfer_count;
3169 scsi_set_resid(scmd, residual_count);
3170 if (xfer_count < scmd->underflow)
3171 host_byte = DID_SOFT_ERROR;
3172 break;
3173 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
3174 case PQI_DATA_IN_OUT_ABORTED:
3175 host_byte = DID_ABORT;
3176 break;
3177 case PQI_DATA_IN_OUT_TIMEOUT:
3178 host_byte = DID_TIME_OUT;
3179 break;
3180 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
3181 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
3182 case PQI_DATA_IN_OUT_BUFFER_ERROR:
3183 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
3184 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
3185 case PQI_DATA_IN_OUT_ERROR:
3186 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
3187 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
3188 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
3189 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
3190 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
3191 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
3192 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
3193 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
3194 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
3195 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
3196 default:
3197 host_byte = DID_ERROR;
3198 break;
3199 }
3200
3201 sense_data_length = get_unaligned_le16(&error_info->sense_data_length);
3202 if (sense_data_length == 0)
3203 sense_data_length =
3204 get_unaligned_le16(&error_info->response_data_length);
3205 if (sense_data_length) {
3206 if (sense_data_length > sizeof(error_info->data))
3207 sense_data_length = sizeof(error_info->data);
3208
3209 if (scsi_status == SAM_STAT_CHECK_CONDITION &&
3210 scsi_normalize_sense(error_info->data,
3211 sense_data_length, &sshdr) &&
3212 sshdr.sense_key == HARDWARE_ERROR &&
3213 sshdr.asc == 0x3e) {
3214 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host);
3215 struct pqi_scsi_dev *device = scmd->device->hostdata;
3216
3217 switch (sshdr.ascq) {
3218 case 0x1: /* LOGICAL UNIT FAILURE */
3219 if (printk_ratelimit())
3220 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n",
3221 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
3222 pqi_take_device_offline(scmd->device, "RAID");
3223 host_byte = DID_NO_CONNECT;
3224 break;
3225
3226 default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */
3227 if (printk_ratelimit())
3228 scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n",
3229 sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
3230 break;
3231 }
3232 }
3233
3234 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
3235 sense_data_length = SCSI_SENSE_BUFFERSIZE;
3236 memcpy(scmd->sense_buffer, error_info->data,
3237 sense_data_length);
3238 }
3239
3240 scmd->result = scsi_status;
3241 set_host_byte(scmd, host_byte);
3242 }
3243
pqi_process_aio_io_error(struct pqi_io_request * io_request)3244 static void pqi_process_aio_io_error(struct pqi_io_request *io_request)
3245 {
3246 u8 scsi_status;
3247 u8 host_byte;
3248 struct scsi_cmnd *scmd;
3249 struct pqi_aio_error_info *error_info;
3250 size_t sense_data_length;
3251 int residual_count;
3252 int xfer_count;
3253 bool device_offline;
3254
3255 scmd = io_request->scmd;
3256 error_info = io_request->error_info;
3257 host_byte = DID_OK;
3258 sense_data_length = 0;
3259 device_offline = false;
3260
3261 switch (error_info->service_response) {
3262 case PQI_AIO_SERV_RESPONSE_COMPLETE:
3263 scsi_status = error_info->status;
3264 break;
3265 case PQI_AIO_SERV_RESPONSE_FAILURE:
3266 switch (error_info->status) {
3267 case PQI_AIO_STATUS_IO_ABORTED:
3268 scsi_status = SAM_STAT_TASK_ABORTED;
3269 break;
3270 case PQI_AIO_STATUS_UNDERRUN:
3271 scsi_status = SAM_STAT_GOOD;
3272 residual_count = get_unaligned_le32(
3273 &error_info->residual_count);
3274 scsi_set_resid(scmd, residual_count);
3275 xfer_count = scsi_bufflen(scmd) - residual_count;
3276 if (xfer_count < scmd->underflow)
3277 host_byte = DID_SOFT_ERROR;
3278 break;
3279 case PQI_AIO_STATUS_OVERRUN:
3280 scsi_status = SAM_STAT_GOOD;
3281 break;
3282 case PQI_AIO_STATUS_AIO_PATH_DISABLED:
3283 pqi_aio_path_disabled(io_request);
3284 scsi_status = SAM_STAT_GOOD;
3285 io_request->status = -EAGAIN;
3286 break;
3287 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE:
3288 case PQI_AIO_STATUS_INVALID_DEVICE:
3289 if (!io_request->raid_bypass) {
3290 device_offline = true;
3291 pqi_take_device_offline(scmd->device, "AIO");
3292 host_byte = DID_NO_CONNECT;
3293 }
3294 scsi_status = SAM_STAT_CHECK_CONDITION;
3295 break;
3296 case PQI_AIO_STATUS_IO_ERROR:
3297 default:
3298 scsi_status = SAM_STAT_CHECK_CONDITION;
3299 break;
3300 }
3301 break;
3302 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE:
3303 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED:
3304 scsi_status = SAM_STAT_GOOD;
3305 break;
3306 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED:
3307 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN:
3308 default:
3309 scsi_status = SAM_STAT_CHECK_CONDITION;
3310 break;
3311 }
3312
3313 if (error_info->data_present) {
3314 sense_data_length =
3315 get_unaligned_le16(&error_info->data_length);
3316 if (sense_data_length) {
3317 if (sense_data_length > sizeof(error_info->data))
3318 sense_data_length = sizeof(error_info->data);
3319 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
3320 sense_data_length = SCSI_SENSE_BUFFERSIZE;
3321 memcpy(scmd->sense_buffer, error_info->data,
3322 sense_data_length);
3323 }
3324 }
3325
3326 if (device_offline && sense_data_length == 0)
3327 scsi_build_sense(scmd, 0, HARDWARE_ERROR, 0x3e, 0x1);
3328
3329 scmd->result = scsi_status;
3330 set_host_byte(scmd, host_byte);
3331 }
3332
pqi_process_io_error(unsigned int iu_type,struct pqi_io_request * io_request)3333 static void pqi_process_io_error(unsigned int iu_type,
3334 struct pqi_io_request *io_request)
3335 {
3336 switch (iu_type) {
3337 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
3338 pqi_process_raid_io_error(io_request);
3339 break;
3340 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
3341 pqi_process_aio_io_error(io_request);
3342 break;
3343 }
3344 }
3345
pqi_interpret_task_management_response(struct pqi_ctrl_info * ctrl_info,struct pqi_task_management_response * response)3346 static int pqi_interpret_task_management_response(struct pqi_ctrl_info *ctrl_info,
3347 struct pqi_task_management_response *response)
3348 {
3349 int rc;
3350
3351 switch (response->response_code) {
3352 case SOP_TMF_COMPLETE:
3353 case SOP_TMF_FUNCTION_SUCCEEDED:
3354 rc = 0;
3355 break;
3356 case SOP_TMF_REJECTED:
3357 rc = -EAGAIN;
3358 break;
3359 case SOP_TMF_INCORRECT_LOGICAL_UNIT:
3360 rc = -ENODEV;
3361 break;
3362 default:
3363 rc = -EIO;
3364 break;
3365 }
3366
3367 if (rc)
3368 dev_err(&ctrl_info->pci_dev->dev,
3369 "Task Management Function error: %d (response code: %u)\n", rc, response->response_code);
3370
3371 return rc;
3372 }
3373
pqi_invalid_response(struct pqi_ctrl_info * ctrl_info,enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason)3374 static inline void pqi_invalid_response(struct pqi_ctrl_info *ctrl_info,
3375 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason)
3376 {
3377 pqi_take_ctrl_offline(ctrl_info, ctrl_shutdown_reason);
3378 }
3379
pqi_process_io_intr(struct pqi_ctrl_info * ctrl_info,struct pqi_queue_group * queue_group)3380 static int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, struct pqi_queue_group *queue_group)
3381 {
3382 int num_responses;
3383 pqi_index_t oq_pi;
3384 pqi_index_t oq_ci;
3385 struct pqi_io_request *io_request;
3386 struct pqi_io_response *response;
3387 u16 request_id;
3388
3389 num_responses = 0;
3390 oq_ci = queue_group->oq_ci_copy;
3391
3392 while (1) {
3393 oq_pi = readl(queue_group->oq_pi);
3394 if (oq_pi >= ctrl_info->num_elements_per_oq) {
3395 pqi_invalid_response(ctrl_info, PQI_IO_PI_OUT_OF_RANGE);
3396 dev_err(&ctrl_info->pci_dev->dev,
3397 "I/O interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n",
3398 oq_pi, ctrl_info->num_elements_per_oq - 1, oq_ci);
3399 return -1;
3400 }
3401 if (oq_pi == oq_ci)
3402 break;
3403
3404 num_responses++;
3405 response = queue_group->oq_element_array +
3406 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
3407
3408 request_id = get_unaligned_le16(&response->request_id);
3409 if (request_id >= ctrl_info->max_io_slots) {
3410 pqi_invalid_response(ctrl_info, PQI_INVALID_REQ_ID);
3411 dev_err(&ctrl_info->pci_dev->dev,
3412 "request ID in response (%u) out of range (0-%u): producer index: %u consumer index: %u\n",
3413 request_id, ctrl_info->max_io_slots - 1, oq_pi, oq_ci);
3414 return -1;
3415 }
3416
3417 io_request = &ctrl_info->io_request_pool[request_id];
3418 if (atomic_read(&io_request->refcount) == 0) {
3419 pqi_invalid_response(ctrl_info, PQI_UNMATCHED_REQ_ID);
3420 dev_err(&ctrl_info->pci_dev->dev,
3421 "request ID in response (%u) does not match an outstanding I/O request: producer index: %u consumer index: %u\n",
3422 request_id, oq_pi, oq_ci);
3423 return -1;
3424 }
3425
3426 switch (response->header.iu_type) {
3427 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS:
3428 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS:
3429 if (io_request->scmd)
3430 io_request->scmd->result = 0;
3431 fallthrough;
3432 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT:
3433 break;
3434 case PQI_RESPONSE_IU_VENDOR_GENERAL:
3435 io_request->status =
3436 get_unaligned_le16(
3437 &((struct pqi_vendor_general_response *)response)->status);
3438 break;
3439 case PQI_RESPONSE_IU_TASK_MANAGEMENT:
3440 io_request->status = pqi_interpret_task_management_response(ctrl_info,
3441 (void *)response);
3442 break;
3443 case PQI_RESPONSE_IU_AIO_PATH_DISABLED:
3444 pqi_aio_path_disabled(io_request);
3445 io_request->status = -EAGAIN;
3446 break;
3447 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
3448 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
3449 io_request->error_info = ctrl_info->error_buffer +
3450 (get_unaligned_le16(&response->error_index) *
3451 PQI_ERROR_BUFFER_ELEMENT_LENGTH);
3452 pqi_process_io_error(response->header.iu_type, io_request);
3453 break;
3454 default:
3455 pqi_invalid_response(ctrl_info, PQI_UNEXPECTED_IU_TYPE);
3456 dev_err(&ctrl_info->pci_dev->dev,
3457 "unexpected IU type: 0x%x: producer index: %u consumer index: %u\n",
3458 response->header.iu_type, oq_pi, oq_ci);
3459 return -1;
3460 }
3461
3462 io_request->io_complete_callback(io_request, io_request->context);
3463
3464 /*
3465 * Note that the I/O request structure CANNOT BE TOUCHED after
3466 * returning from the I/O completion callback!
3467 */
3468 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq;
3469 }
3470
3471 if (num_responses) {
3472 queue_group->oq_ci_copy = oq_ci;
3473 writel(oq_ci, queue_group->oq_ci);
3474 }
3475
3476 return num_responses;
3477 }
3478
pqi_num_elements_free(unsigned int pi,unsigned int ci,unsigned int elements_in_queue)3479 static inline unsigned int pqi_num_elements_free(unsigned int pi,
3480 unsigned int ci, unsigned int elements_in_queue)
3481 {
3482 unsigned int num_elements_used;
3483
3484 if (pi >= ci)
3485 num_elements_used = pi - ci;
3486 else
3487 num_elements_used = elements_in_queue - ci + pi;
3488
3489 return elements_in_queue - num_elements_used - 1;
3490 }
3491
pqi_send_event_ack(struct pqi_ctrl_info * ctrl_info,struct pqi_event_acknowledge_request * iu,size_t iu_length)3492 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info,
3493 struct pqi_event_acknowledge_request *iu, size_t iu_length)
3494 {
3495 pqi_index_t iq_pi;
3496 pqi_index_t iq_ci;
3497 unsigned long flags;
3498 void *next_element;
3499 struct pqi_queue_group *queue_group;
3500
3501 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP];
3502 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id);
3503
3504 while (1) {
3505 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags);
3506
3507 iq_pi = queue_group->iq_pi_copy[RAID_PATH];
3508 iq_ci = readl(queue_group->iq_ci[RAID_PATH]);
3509
3510 if (pqi_num_elements_free(iq_pi, iq_ci,
3511 ctrl_info->num_elements_per_iq))
3512 break;
3513
3514 spin_unlock_irqrestore(
3515 &queue_group->submit_lock[RAID_PATH], flags);
3516
3517 if (pqi_ctrl_offline(ctrl_info))
3518 return;
3519 }
3520
3521 next_element = queue_group->iq_element_array[RAID_PATH] +
3522 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3523
3524 memcpy(next_element, iu, iu_length);
3525
3526 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq;
3527 queue_group->iq_pi_copy[RAID_PATH] = iq_pi;
3528
3529 /*
3530 * This write notifies the controller that an IU is available to be
3531 * processed.
3532 */
3533 writel(iq_pi, queue_group->iq_pi[RAID_PATH]);
3534
3535 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags);
3536 }
3537
pqi_acknowledge_event(struct pqi_ctrl_info * ctrl_info,struct pqi_event * event)3538 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info,
3539 struct pqi_event *event)
3540 {
3541 struct pqi_event_acknowledge_request request;
3542
3543 memset(&request, 0, sizeof(request));
3544
3545 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT;
3546 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
3547 &request.header.iu_length);
3548 request.event_type = event->event_type;
3549 put_unaligned_le16(event->event_id, &request.event_id);
3550 put_unaligned_le32(event->additional_event_id, &request.additional_event_id);
3551
3552 pqi_send_event_ack(ctrl_info, &request, sizeof(request));
3553 }
3554
3555 #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30
3556 #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1
3557
pqi_poll_for_soft_reset_status(struct pqi_ctrl_info * ctrl_info)3558 static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status(
3559 struct pqi_ctrl_info *ctrl_info)
3560 {
3561 u8 status;
3562 unsigned long timeout;
3563
3564 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * HZ) + jiffies;
3565
3566 while (1) {
3567 status = pqi_read_soft_reset_status(ctrl_info);
3568 if (status & PQI_SOFT_RESET_INITIATE)
3569 return RESET_INITIATE_DRIVER;
3570
3571 if (status & PQI_SOFT_RESET_ABORT)
3572 return RESET_ABORT;
3573
3574 if (!sis_is_firmware_running(ctrl_info))
3575 return RESET_NORESPONSE;
3576
3577 if (time_after(jiffies, timeout)) {
3578 dev_warn(&ctrl_info->pci_dev->dev,
3579 "timed out waiting for soft reset status\n");
3580 return RESET_TIMEDOUT;
3581 }
3582
3583 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS);
3584 }
3585 }
3586
pqi_process_soft_reset(struct pqi_ctrl_info * ctrl_info)3587 static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info)
3588 {
3589 int rc;
3590 unsigned int delay_secs;
3591 enum pqi_soft_reset_status reset_status;
3592
3593 if (ctrl_info->soft_reset_handshake_supported)
3594 reset_status = pqi_poll_for_soft_reset_status(ctrl_info);
3595 else
3596 reset_status = RESET_INITIATE_FIRMWARE;
3597
3598 delay_secs = PQI_POST_RESET_DELAY_SECS;
3599
3600 switch (reset_status) {
3601 case RESET_TIMEDOUT:
3602 delay_secs = PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS;
3603 fallthrough;
3604 case RESET_INITIATE_DRIVER:
3605 dev_info(&ctrl_info->pci_dev->dev,
3606 "Online Firmware Activation: resetting controller\n");
3607 sis_soft_reset(ctrl_info);
3608 fallthrough;
3609 case RESET_INITIATE_FIRMWARE:
3610 ctrl_info->pqi_mode_enabled = false;
3611 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
3612 rc = pqi_ofa_ctrl_restart(ctrl_info, delay_secs);
3613 pqi_ofa_free_host_buffer(ctrl_info);
3614 pqi_ctrl_ofa_done(ctrl_info);
3615 dev_info(&ctrl_info->pci_dev->dev,
3616 "Online Firmware Activation: %s\n",
3617 rc == 0 ? "SUCCESS" : "FAILED");
3618 break;
3619 case RESET_ABORT:
3620 dev_info(&ctrl_info->pci_dev->dev,
3621 "Online Firmware Activation ABORTED\n");
3622 if (ctrl_info->soft_reset_handshake_supported)
3623 pqi_clear_soft_reset_status(ctrl_info);
3624 pqi_ofa_free_host_buffer(ctrl_info);
3625 pqi_ctrl_ofa_done(ctrl_info);
3626 pqi_ofa_ctrl_unquiesce(ctrl_info);
3627 break;
3628 case RESET_NORESPONSE:
3629 fallthrough;
3630 default:
3631 dev_err(&ctrl_info->pci_dev->dev,
3632 "unexpected Online Firmware Activation reset status: 0x%x\n",
3633 reset_status);
3634 pqi_ofa_free_host_buffer(ctrl_info);
3635 pqi_ctrl_ofa_done(ctrl_info);
3636 pqi_ofa_ctrl_unquiesce(ctrl_info);
3637 pqi_take_ctrl_offline(ctrl_info, PQI_OFA_RESPONSE_TIMEOUT);
3638 break;
3639 }
3640 }
3641
pqi_ofa_memory_alloc_worker(struct work_struct * work)3642 static void pqi_ofa_memory_alloc_worker(struct work_struct *work)
3643 {
3644 struct pqi_ctrl_info *ctrl_info;
3645
3646 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_memory_alloc_work);
3647
3648 pqi_ctrl_ofa_start(ctrl_info);
3649 pqi_ofa_setup_host_buffer(ctrl_info);
3650 pqi_ofa_host_memory_update(ctrl_info);
3651 }
3652
pqi_ofa_quiesce_worker(struct work_struct * work)3653 static void pqi_ofa_quiesce_worker(struct work_struct *work)
3654 {
3655 struct pqi_ctrl_info *ctrl_info;
3656 struct pqi_event *event;
3657
3658 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_quiesce_work);
3659
3660 event = &ctrl_info->events[pqi_event_type_to_event_index(PQI_EVENT_TYPE_OFA)];
3661
3662 pqi_ofa_ctrl_quiesce(ctrl_info);
3663 pqi_acknowledge_event(ctrl_info, event);
3664 pqi_process_soft_reset(ctrl_info);
3665 }
3666
pqi_ofa_process_event(struct pqi_ctrl_info * ctrl_info,struct pqi_event * event)3667 static bool pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info,
3668 struct pqi_event *event)
3669 {
3670 bool ack_event;
3671
3672 ack_event = true;
3673
3674 switch (event->event_id) {
3675 case PQI_EVENT_OFA_MEMORY_ALLOCATION:
3676 dev_info(&ctrl_info->pci_dev->dev,
3677 "received Online Firmware Activation memory allocation request\n");
3678 schedule_work(&ctrl_info->ofa_memory_alloc_work);
3679 break;
3680 case PQI_EVENT_OFA_QUIESCE:
3681 dev_info(&ctrl_info->pci_dev->dev,
3682 "received Online Firmware Activation quiesce request\n");
3683 schedule_work(&ctrl_info->ofa_quiesce_work);
3684 ack_event = false;
3685 break;
3686 case PQI_EVENT_OFA_CANCELED:
3687 dev_info(&ctrl_info->pci_dev->dev,
3688 "received Online Firmware Activation cancel request: reason: %u\n",
3689 ctrl_info->ofa_cancel_reason);
3690 pqi_ofa_free_host_buffer(ctrl_info);
3691 pqi_ctrl_ofa_done(ctrl_info);
3692 break;
3693 default:
3694 dev_err(&ctrl_info->pci_dev->dev,
3695 "received unknown Online Firmware Activation request: event ID: %u\n",
3696 event->event_id);
3697 break;
3698 }
3699
3700 return ack_event;
3701 }
3702
pqi_mark_volumes_for_rescan(struct pqi_ctrl_info * ctrl_info)3703 static void pqi_mark_volumes_for_rescan(struct pqi_ctrl_info *ctrl_info)
3704 {
3705 unsigned long flags;
3706 struct pqi_scsi_dev *device;
3707
3708 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
3709
3710 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) {
3711 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK)
3712 device->rescan = true;
3713 }
3714
3715 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
3716 }
3717
pqi_disable_raid_bypass(struct pqi_ctrl_info * ctrl_info)3718 static void pqi_disable_raid_bypass(struct pqi_ctrl_info *ctrl_info)
3719 {
3720 unsigned long flags;
3721 struct pqi_scsi_dev *device;
3722
3723 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
3724
3725 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry)
3726 if (device->raid_bypass_enabled)
3727 device->raid_bypass_enabled = false;
3728
3729 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
3730 }
3731
pqi_event_worker(struct work_struct * work)3732 static void pqi_event_worker(struct work_struct *work)
3733 {
3734 unsigned int i;
3735 bool rescan_needed;
3736 struct pqi_ctrl_info *ctrl_info;
3737 struct pqi_event *event;
3738 bool ack_event;
3739
3740 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work);
3741
3742 pqi_ctrl_busy(ctrl_info);
3743 pqi_wait_if_ctrl_blocked(ctrl_info);
3744 if (pqi_ctrl_offline(ctrl_info))
3745 goto out;
3746
3747 rescan_needed = false;
3748 event = ctrl_info->events;
3749 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) {
3750 if (event->pending) {
3751 event->pending = false;
3752 if (event->event_type == PQI_EVENT_TYPE_OFA) {
3753 ack_event = pqi_ofa_process_event(ctrl_info, event);
3754 } else {
3755 ack_event = true;
3756 rescan_needed = true;
3757 if (event->event_type == PQI_EVENT_TYPE_LOGICAL_DEVICE)
3758 pqi_mark_volumes_for_rescan(ctrl_info);
3759 else if (event->event_type == PQI_EVENT_TYPE_AIO_STATE_CHANGE)
3760 pqi_disable_raid_bypass(ctrl_info);
3761 }
3762 if (ack_event)
3763 pqi_acknowledge_event(ctrl_info, event);
3764 }
3765 event++;
3766 }
3767
3768 #define PQI_RESCAN_WORK_FOR_EVENT_DELAY (5 * HZ)
3769
3770 if (rescan_needed)
3771 pqi_schedule_rescan_worker_with_delay(ctrl_info,
3772 PQI_RESCAN_WORK_FOR_EVENT_DELAY);
3773
3774 out:
3775 pqi_ctrl_unbusy(ctrl_info);
3776 }
3777
3778 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * HZ)
3779
pqi_heartbeat_timer_handler(struct timer_list * t)3780 static void pqi_heartbeat_timer_handler(struct timer_list *t)
3781 {
3782 int num_interrupts;
3783 u32 heartbeat_count;
3784 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t, heartbeat_timer);
3785
3786 pqi_check_ctrl_health(ctrl_info);
3787 if (pqi_ctrl_offline(ctrl_info))
3788 return;
3789
3790 num_interrupts = atomic_read(&ctrl_info->num_interrupts);
3791 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info);
3792
3793 if (num_interrupts == ctrl_info->previous_num_interrupts) {
3794 if (heartbeat_count == ctrl_info->previous_heartbeat_count) {
3795 dev_err(&ctrl_info->pci_dev->dev,
3796 "no heartbeat detected - last heartbeat count: %u\n",
3797 heartbeat_count);
3798 pqi_take_ctrl_offline(ctrl_info, PQI_NO_HEARTBEAT);
3799 return;
3800 }
3801 } else {
3802 ctrl_info->previous_num_interrupts = num_interrupts;
3803 }
3804
3805 ctrl_info->previous_heartbeat_count = heartbeat_count;
3806 mod_timer(&ctrl_info->heartbeat_timer,
3807 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL);
3808 }
3809
pqi_start_heartbeat_timer(struct pqi_ctrl_info * ctrl_info)3810 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3811 {
3812 if (!ctrl_info->heartbeat_counter)
3813 return;
3814
3815 ctrl_info->previous_num_interrupts =
3816 atomic_read(&ctrl_info->num_interrupts);
3817 ctrl_info->previous_heartbeat_count =
3818 pqi_read_heartbeat_counter(ctrl_info);
3819
3820 ctrl_info->heartbeat_timer.expires =
3821 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL;
3822 add_timer(&ctrl_info->heartbeat_timer);
3823 }
3824
pqi_stop_heartbeat_timer(struct pqi_ctrl_info * ctrl_info)3825 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3826 {
3827 del_timer_sync(&ctrl_info->heartbeat_timer);
3828 }
3829
pqi_ofa_capture_event_payload(struct pqi_ctrl_info * ctrl_info,struct pqi_event * event,struct pqi_event_response * response)3830 static void pqi_ofa_capture_event_payload(struct pqi_ctrl_info *ctrl_info,
3831 struct pqi_event *event, struct pqi_event_response *response)
3832 {
3833 switch (event->event_id) {
3834 case PQI_EVENT_OFA_MEMORY_ALLOCATION:
3835 ctrl_info->ofa_bytes_requested =
3836 get_unaligned_le32(&response->data.ofa_memory_allocation.bytes_requested);
3837 break;
3838 case PQI_EVENT_OFA_CANCELED:
3839 ctrl_info->ofa_cancel_reason =
3840 get_unaligned_le16(&response->data.ofa_cancelled.reason);
3841 break;
3842 }
3843 }
3844
pqi_process_event_intr(struct pqi_ctrl_info * ctrl_info)3845 static int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info)
3846 {
3847 int num_events;
3848 pqi_index_t oq_pi;
3849 pqi_index_t oq_ci;
3850 struct pqi_event_queue *event_queue;
3851 struct pqi_event_response *response;
3852 struct pqi_event *event;
3853 int event_index;
3854
3855 event_queue = &ctrl_info->event_queue;
3856 num_events = 0;
3857 oq_ci = event_queue->oq_ci_copy;
3858
3859 while (1) {
3860 oq_pi = readl(event_queue->oq_pi);
3861 if (oq_pi >= PQI_NUM_EVENT_QUEUE_ELEMENTS) {
3862 pqi_invalid_response(ctrl_info, PQI_EVENT_PI_OUT_OF_RANGE);
3863 dev_err(&ctrl_info->pci_dev->dev,
3864 "event interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n",
3865 oq_pi, PQI_NUM_EVENT_QUEUE_ELEMENTS - 1, oq_ci);
3866 return -1;
3867 }
3868
3869 if (oq_pi == oq_ci)
3870 break;
3871
3872 num_events++;
3873 response = event_queue->oq_element_array + (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH);
3874
3875 event_index = pqi_event_type_to_event_index(response->event_type);
3876
3877 if (event_index >= 0 && response->request_acknowledge) {
3878 event = &ctrl_info->events[event_index];
3879 event->pending = true;
3880 event->event_type = response->event_type;
3881 event->event_id = get_unaligned_le16(&response->event_id);
3882 event->additional_event_id =
3883 get_unaligned_le32(&response->additional_event_id);
3884 if (event->event_type == PQI_EVENT_TYPE_OFA)
3885 pqi_ofa_capture_event_payload(ctrl_info, event, response);
3886 }
3887
3888 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS;
3889 }
3890
3891 if (num_events) {
3892 event_queue->oq_ci_copy = oq_ci;
3893 writel(oq_ci, event_queue->oq_ci);
3894 schedule_work(&ctrl_info->event_work);
3895 }
3896
3897 return num_events;
3898 }
3899
3900 #define PQI_LEGACY_INTX_MASK 0x1
3901
pqi_configure_legacy_intx(struct pqi_ctrl_info * ctrl_info,bool enable_intx)3902 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info, bool enable_intx)
3903 {
3904 u32 intx_mask;
3905 struct pqi_device_registers __iomem *pqi_registers;
3906 volatile void __iomem *register_addr;
3907
3908 pqi_registers = ctrl_info->pqi_registers;
3909
3910 if (enable_intx)
3911 register_addr = &pqi_registers->legacy_intx_mask_clear;
3912 else
3913 register_addr = &pqi_registers->legacy_intx_mask_set;
3914
3915 intx_mask = readl(register_addr);
3916 intx_mask |= PQI_LEGACY_INTX_MASK;
3917 writel(intx_mask, register_addr);
3918 }
3919
pqi_change_irq_mode(struct pqi_ctrl_info * ctrl_info,enum pqi_irq_mode new_mode)3920 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info,
3921 enum pqi_irq_mode new_mode)
3922 {
3923 switch (ctrl_info->irq_mode) {
3924 case IRQ_MODE_MSIX:
3925 switch (new_mode) {
3926 case IRQ_MODE_MSIX:
3927 break;
3928 case IRQ_MODE_INTX:
3929 pqi_configure_legacy_intx(ctrl_info, true);
3930 sis_enable_intx(ctrl_info);
3931 break;
3932 case IRQ_MODE_NONE:
3933 break;
3934 }
3935 break;
3936 case IRQ_MODE_INTX:
3937 switch (new_mode) {
3938 case IRQ_MODE_MSIX:
3939 pqi_configure_legacy_intx(ctrl_info, false);
3940 sis_enable_msix(ctrl_info);
3941 break;
3942 case IRQ_MODE_INTX:
3943 break;
3944 case IRQ_MODE_NONE:
3945 pqi_configure_legacy_intx(ctrl_info, false);
3946 break;
3947 }
3948 break;
3949 case IRQ_MODE_NONE:
3950 switch (new_mode) {
3951 case IRQ_MODE_MSIX:
3952 sis_enable_msix(ctrl_info);
3953 break;
3954 case IRQ_MODE_INTX:
3955 pqi_configure_legacy_intx(ctrl_info, true);
3956 sis_enable_intx(ctrl_info);
3957 break;
3958 case IRQ_MODE_NONE:
3959 break;
3960 }
3961 break;
3962 }
3963
3964 ctrl_info->irq_mode = new_mode;
3965 }
3966
3967 #define PQI_LEGACY_INTX_PENDING 0x1
3968
pqi_is_valid_irq(struct pqi_ctrl_info * ctrl_info)3969 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info)
3970 {
3971 bool valid_irq;
3972 u32 intx_status;
3973
3974 switch (ctrl_info->irq_mode) {
3975 case IRQ_MODE_MSIX:
3976 valid_irq = true;
3977 break;
3978 case IRQ_MODE_INTX:
3979 intx_status = readl(&ctrl_info->pqi_registers->legacy_intx_status);
3980 if (intx_status & PQI_LEGACY_INTX_PENDING)
3981 valid_irq = true;
3982 else
3983 valid_irq = false;
3984 break;
3985 case IRQ_MODE_NONE:
3986 default:
3987 valid_irq = false;
3988 break;
3989 }
3990
3991 return valid_irq;
3992 }
3993
pqi_irq_handler(int irq,void * data)3994 static irqreturn_t pqi_irq_handler(int irq, void *data)
3995 {
3996 struct pqi_ctrl_info *ctrl_info;
3997 struct pqi_queue_group *queue_group;
3998 int num_io_responses_handled;
3999 int num_events_handled;
4000
4001 queue_group = data;
4002 ctrl_info = queue_group->ctrl_info;
4003
4004 if (!pqi_is_valid_irq(ctrl_info))
4005 return IRQ_NONE;
4006
4007 num_io_responses_handled = pqi_process_io_intr(ctrl_info, queue_group);
4008 if (num_io_responses_handled < 0)
4009 goto out;
4010
4011 if (irq == ctrl_info->event_irq) {
4012 num_events_handled = pqi_process_event_intr(ctrl_info);
4013 if (num_events_handled < 0)
4014 goto out;
4015 } else {
4016 num_events_handled = 0;
4017 }
4018
4019 if (num_io_responses_handled + num_events_handled > 0)
4020 atomic_inc(&ctrl_info->num_interrupts);
4021
4022 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL);
4023 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL);
4024
4025 out:
4026 return IRQ_HANDLED;
4027 }
4028
pqi_request_irqs(struct pqi_ctrl_info * ctrl_info)4029 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info)
4030 {
4031 struct pci_dev *pci_dev = ctrl_info->pci_dev;
4032 int i;
4033 int rc;
4034
4035 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0);
4036
4037 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) {
4038 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0,
4039 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]);
4040 if (rc) {
4041 dev_err(&pci_dev->dev,
4042 "irq %u init failed with error %d\n",
4043 pci_irq_vector(pci_dev, i), rc);
4044 return rc;
4045 }
4046 ctrl_info->num_msix_vectors_initialized++;
4047 }
4048
4049 return 0;
4050 }
4051
pqi_free_irqs(struct pqi_ctrl_info * ctrl_info)4052 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info)
4053 {
4054 int i;
4055
4056 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++)
4057 free_irq(pci_irq_vector(ctrl_info->pci_dev, i),
4058 &ctrl_info->queue_groups[i]);
4059
4060 ctrl_info->num_msix_vectors_initialized = 0;
4061 }
4062
pqi_enable_msix_interrupts(struct pqi_ctrl_info * ctrl_info)4063 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
4064 {
4065 int num_vectors_enabled;
4066 unsigned int flags = PCI_IRQ_MSIX;
4067
4068 if (!pqi_disable_managed_interrupts)
4069 flags |= PCI_IRQ_AFFINITY;
4070
4071 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev,
4072 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups,
4073 flags);
4074 if (num_vectors_enabled < 0) {
4075 dev_err(&ctrl_info->pci_dev->dev,
4076 "MSI-X init failed with error %d\n",
4077 num_vectors_enabled);
4078 return num_vectors_enabled;
4079 }
4080
4081 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled;
4082 ctrl_info->irq_mode = IRQ_MODE_MSIX;
4083 return 0;
4084 }
4085
pqi_disable_msix_interrupts(struct pqi_ctrl_info * ctrl_info)4086 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
4087 {
4088 if (ctrl_info->num_msix_vectors_enabled) {
4089 pci_free_irq_vectors(ctrl_info->pci_dev);
4090 ctrl_info->num_msix_vectors_enabled = 0;
4091 }
4092 }
4093
pqi_alloc_operational_queues(struct pqi_ctrl_info * ctrl_info)4094 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info)
4095 {
4096 unsigned int i;
4097 size_t alloc_length;
4098 size_t element_array_length_per_iq;
4099 size_t element_array_length_per_oq;
4100 void *element_array;
4101 void __iomem *next_queue_index;
4102 void *aligned_pointer;
4103 unsigned int num_inbound_queues;
4104 unsigned int num_outbound_queues;
4105 unsigned int num_queue_indexes;
4106 struct pqi_queue_group *queue_group;
4107
4108 element_array_length_per_iq =
4109 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH *
4110 ctrl_info->num_elements_per_iq;
4111 element_array_length_per_oq =
4112 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH *
4113 ctrl_info->num_elements_per_oq;
4114 num_inbound_queues = ctrl_info->num_queue_groups * 2;
4115 num_outbound_queues = ctrl_info->num_queue_groups;
4116 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1;
4117
4118 aligned_pointer = NULL;
4119
4120 for (i = 0; i < num_inbound_queues; i++) {
4121 aligned_pointer = PTR_ALIGN(aligned_pointer,
4122 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4123 aligned_pointer += element_array_length_per_iq;
4124 }
4125
4126 for (i = 0; i < num_outbound_queues; i++) {
4127 aligned_pointer = PTR_ALIGN(aligned_pointer,
4128 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4129 aligned_pointer += element_array_length_per_oq;
4130 }
4131
4132 aligned_pointer = PTR_ALIGN(aligned_pointer,
4133 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4134 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS *
4135 PQI_EVENT_OQ_ELEMENT_LENGTH;
4136
4137 for (i = 0; i < num_queue_indexes; i++) {
4138 aligned_pointer = PTR_ALIGN(aligned_pointer,
4139 PQI_OPERATIONAL_INDEX_ALIGNMENT);
4140 aligned_pointer += sizeof(pqi_index_t);
4141 }
4142
4143 alloc_length = (size_t)aligned_pointer +
4144 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
4145
4146 alloc_length += PQI_EXTRA_SGL_MEMORY;
4147
4148 ctrl_info->queue_memory_base =
4149 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
4150 &ctrl_info->queue_memory_base_dma_handle,
4151 GFP_KERNEL);
4152
4153 if (!ctrl_info->queue_memory_base)
4154 return -ENOMEM;
4155
4156 ctrl_info->queue_memory_length = alloc_length;
4157
4158 element_array = PTR_ALIGN(ctrl_info->queue_memory_base,
4159 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4160
4161 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4162 queue_group = &ctrl_info->queue_groups[i];
4163 queue_group->iq_element_array[RAID_PATH] = element_array;
4164 queue_group->iq_element_array_bus_addr[RAID_PATH] =
4165 ctrl_info->queue_memory_base_dma_handle +
4166 (element_array - ctrl_info->queue_memory_base);
4167 element_array += element_array_length_per_iq;
4168 element_array = PTR_ALIGN(element_array,
4169 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4170 queue_group->iq_element_array[AIO_PATH] = element_array;
4171 queue_group->iq_element_array_bus_addr[AIO_PATH] =
4172 ctrl_info->queue_memory_base_dma_handle +
4173 (element_array - ctrl_info->queue_memory_base);
4174 element_array += element_array_length_per_iq;
4175 element_array = PTR_ALIGN(element_array,
4176 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4177 }
4178
4179 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4180 queue_group = &ctrl_info->queue_groups[i];
4181 queue_group->oq_element_array = element_array;
4182 queue_group->oq_element_array_bus_addr =
4183 ctrl_info->queue_memory_base_dma_handle +
4184 (element_array - ctrl_info->queue_memory_base);
4185 element_array += element_array_length_per_oq;
4186 element_array = PTR_ALIGN(element_array,
4187 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4188 }
4189
4190 ctrl_info->event_queue.oq_element_array = element_array;
4191 ctrl_info->event_queue.oq_element_array_bus_addr =
4192 ctrl_info->queue_memory_base_dma_handle +
4193 (element_array - ctrl_info->queue_memory_base);
4194 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS *
4195 PQI_EVENT_OQ_ELEMENT_LENGTH;
4196
4197 next_queue_index = (void __iomem *)PTR_ALIGN(element_array,
4198 PQI_OPERATIONAL_INDEX_ALIGNMENT);
4199
4200 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4201 queue_group = &ctrl_info->queue_groups[i];
4202 queue_group->iq_ci[RAID_PATH] = next_queue_index;
4203 queue_group->iq_ci_bus_addr[RAID_PATH] =
4204 ctrl_info->queue_memory_base_dma_handle +
4205 (next_queue_index -
4206 (void __iomem *)ctrl_info->queue_memory_base);
4207 next_queue_index += sizeof(pqi_index_t);
4208 next_queue_index = PTR_ALIGN(next_queue_index,
4209 PQI_OPERATIONAL_INDEX_ALIGNMENT);
4210 queue_group->iq_ci[AIO_PATH] = next_queue_index;
4211 queue_group->iq_ci_bus_addr[AIO_PATH] =
4212 ctrl_info->queue_memory_base_dma_handle +
4213 (next_queue_index -
4214 (void __iomem *)ctrl_info->queue_memory_base);
4215 next_queue_index += sizeof(pqi_index_t);
4216 next_queue_index = PTR_ALIGN(next_queue_index,
4217 PQI_OPERATIONAL_INDEX_ALIGNMENT);
4218 queue_group->oq_pi = next_queue_index;
4219 queue_group->oq_pi_bus_addr =
4220 ctrl_info->queue_memory_base_dma_handle +
4221 (next_queue_index -
4222 (void __iomem *)ctrl_info->queue_memory_base);
4223 next_queue_index += sizeof(pqi_index_t);
4224 next_queue_index = PTR_ALIGN(next_queue_index,
4225 PQI_OPERATIONAL_INDEX_ALIGNMENT);
4226 }
4227
4228 ctrl_info->event_queue.oq_pi = next_queue_index;
4229 ctrl_info->event_queue.oq_pi_bus_addr =
4230 ctrl_info->queue_memory_base_dma_handle +
4231 (next_queue_index -
4232 (void __iomem *)ctrl_info->queue_memory_base);
4233
4234 return 0;
4235 }
4236
pqi_init_operational_queues(struct pqi_ctrl_info * ctrl_info)4237 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info)
4238 {
4239 unsigned int i;
4240 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
4241 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
4242
4243 /*
4244 * Initialize the backpointers to the controller structure in
4245 * each operational queue group structure.
4246 */
4247 for (i = 0; i < ctrl_info->num_queue_groups; i++)
4248 ctrl_info->queue_groups[i].ctrl_info = ctrl_info;
4249
4250 /*
4251 * Assign IDs to all operational queues. Note that the IDs
4252 * assigned to operational IQs are independent of the IDs
4253 * assigned to operational OQs.
4254 */
4255 ctrl_info->event_queue.oq_id = next_oq_id++;
4256 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4257 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++;
4258 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++;
4259 ctrl_info->queue_groups[i].oq_id = next_oq_id++;
4260 }
4261
4262 /*
4263 * Assign MSI-X table entry indexes to all queues. Note that the
4264 * interrupt for the event queue is shared with the first queue group.
4265 */
4266 ctrl_info->event_queue.int_msg_num = 0;
4267 for (i = 0; i < ctrl_info->num_queue_groups; i++)
4268 ctrl_info->queue_groups[i].int_msg_num = i;
4269
4270 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4271 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]);
4272 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]);
4273 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]);
4274 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]);
4275 }
4276 }
4277
pqi_alloc_admin_queues(struct pqi_ctrl_info * ctrl_info)4278 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info)
4279 {
4280 size_t alloc_length;
4281 struct pqi_admin_queues_aligned *admin_queues_aligned;
4282 struct pqi_admin_queues *admin_queues;
4283
4284 alloc_length = sizeof(struct pqi_admin_queues_aligned) +
4285 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
4286
4287 ctrl_info->admin_queue_memory_base =
4288 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
4289 &ctrl_info->admin_queue_memory_base_dma_handle,
4290 GFP_KERNEL);
4291
4292 if (!ctrl_info->admin_queue_memory_base)
4293 return -ENOMEM;
4294
4295 ctrl_info->admin_queue_memory_length = alloc_length;
4296
4297 admin_queues = &ctrl_info->admin_queues;
4298 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base,
4299 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4300 admin_queues->iq_element_array =
4301 &admin_queues_aligned->iq_element_array;
4302 admin_queues->oq_element_array =
4303 &admin_queues_aligned->oq_element_array;
4304 admin_queues->iq_ci =
4305 (pqi_index_t __iomem *)&admin_queues_aligned->iq_ci;
4306 admin_queues->oq_pi =
4307 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi;
4308
4309 admin_queues->iq_element_array_bus_addr =
4310 ctrl_info->admin_queue_memory_base_dma_handle +
4311 (admin_queues->iq_element_array -
4312 ctrl_info->admin_queue_memory_base);
4313 admin_queues->oq_element_array_bus_addr =
4314 ctrl_info->admin_queue_memory_base_dma_handle +
4315 (admin_queues->oq_element_array -
4316 ctrl_info->admin_queue_memory_base);
4317 admin_queues->iq_ci_bus_addr =
4318 ctrl_info->admin_queue_memory_base_dma_handle +
4319 ((void __iomem *)admin_queues->iq_ci -
4320 (void __iomem *)ctrl_info->admin_queue_memory_base);
4321 admin_queues->oq_pi_bus_addr =
4322 ctrl_info->admin_queue_memory_base_dma_handle +
4323 ((void __iomem *)admin_queues->oq_pi -
4324 (void __iomem *)ctrl_info->admin_queue_memory_base);
4325
4326 return 0;
4327 }
4328
4329 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES HZ
4330 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1
4331
pqi_create_admin_queues(struct pqi_ctrl_info * ctrl_info)4332 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info)
4333 {
4334 struct pqi_device_registers __iomem *pqi_registers;
4335 struct pqi_admin_queues *admin_queues;
4336 unsigned long timeout;
4337 u8 status;
4338 u32 reg;
4339
4340 pqi_registers = ctrl_info->pqi_registers;
4341 admin_queues = &ctrl_info->admin_queues;
4342
4343 writeq((u64)admin_queues->iq_element_array_bus_addr,
4344 &pqi_registers->admin_iq_element_array_addr);
4345 writeq((u64)admin_queues->oq_element_array_bus_addr,
4346 &pqi_registers->admin_oq_element_array_addr);
4347 writeq((u64)admin_queues->iq_ci_bus_addr,
4348 &pqi_registers->admin_iq_ci_addr);
4349 writeq((u64)admin_queues->oq_pi_bus_addr,
4350 &pqi_registers->admin_oq_pi_addr);
4351
4352 reg = PQI_ADMIN_IQ_NUM_ELEMENTS |
4353 (PQI_ADMIN_OQ_NUM_ELEMENTS << 8) |
4354 (admin_queues->int_msg_num << 16);
4355 writel(reg, &pqi_registers->admin_iq_num_elements);
4356
4357 writel(PQI_CREATE_ADMIN_QUEUE_PAIR,
4358 &pqi_registers->function_and_status_code);
4359
4360 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies;
4361 while (1) {
4362 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS);
4363 status = readb(&pqi_registers->function_and_status_code);
4364 if (status == PQI_STATUS_IDLE)
4365 break;
4366 if (time_after(jiffies, timeout))
4367 return -ETIMEDOUT;
4368 }
4369
4370 /*
4371 * The offset registers are not initialized to the correct
4372 * offsets until *after* the create admin queue pair command
4373 * completes successfully.
4374 */
4375 admin_queues->iq_pi = ctrl_info->iomem_base +
4376 PQI_DEVICE_REGISTERS_OFFSET +
4377 readq(&pqi_registers->admin_iq_pi_offset);
4378 admin_queues->oq_ci = ctrl_info->iomem_base +
4379 PQI_DEVICE_REGISTERS_OFFSET +
4380 readq(&pqi_registers->admin_oq_ci_offset);
4381
4382 return 0;
4383 }
4384
pqi_submit_admin_request(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_request * request)4385 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info,
4386 struct pqi_general_admin_request *request)
4387 {
4388 struct pqi_admin_queues *admin_queues;
4389 void *next_element;
4390 pqi_index_t iq_pi;
4391
4392 admin_queues = &ctrl_info->admin_queues;
4393 iq_pi = admin_queues->iq_pi_copy;
4394
4395 next_element = admin_queues->iq_element_array +
4396 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH);
4397
4398 memcpy(next_element, request, sizeof(*request));
4399
4400 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS;
4401 admin_queues->iq_pi_copy = iq_pi;
4402
4403 /*
4404 * This write notifies the controller that an IU is available to be
4405 * processed.
4406 */
4407 writel(iq_pi, admin_queues->iq_pi);
4408 }
4409
4410 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60
4411
pqi_poll_for_admin_response(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_response * response)4412 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info,
4413 struct pqi_general_admin_response *response)
4414 {
4415 struct pqi_admin_queues *admin_queues;
4416 pqi_index_t oq_pi;
4417 pqi_index_t oq_ci;
4418 unsigned long timeout;
4419
4420 admin_queues = &ctrl_info->admin_queues;
4421 oq_ci = admin_queues->oq_ci_copy;
4422
4423 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * HZ) + jiffies;
4424
4425 while (1) {
4426 oq_pi = readl(admin_queues->oq_pi);
4427 if (oq_pi != oq_ci)
4428 break;
4429 if (time_after(jiffies, timeout)) {
4430 dev_err(&ctrl_info->pci_dev->dev,
4431 "timed out waiting for admin response\n");
4432 return -ETIMEDOUT;
4433 }
4434 if (!sis_is_firmware_running(ctrl_info))
4435 return -ENXIO;
4436 usleep_range(1000, 2000);
4437 }
4438
4439 memcpy(response, admin_queues->oq_element_array +
4440 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response));
4441
4442 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS;
4443 admin_queues->oq_ci_copy = oq_ci;
4444 writel(oq_ci, admin_queues->oq_ci);
4445
4446 return 0;
4447 }
4448
pqi_start_io(struct pqi_ctrl_info * ctrl_info,struct pqi_queue_group * queue_group,enum pqi_io_path path,struct pqi_io_request * io_request)4449 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
4450 struct pqi_queue_group *queue_group, enum pqi_io_path path,
4451 struct pqi_io_request *io_request)
4452 {
4453 struct pqi_io_request *next;
4454 void *next_element;
4455 pqi_index_t iq_pi;
4456 pqi_index_t iq_ci;
4457 size_t iu_length;
4458 unsigned long flags;
4459 unsigned int num_elements_needed;
4460 unsigned int num_elements_to_end_of_queue;
4461 size_t copy_count;
4462 struct pqi_iu_header *request;
4463
4464 spin_lock_irqsave(&queue_group->submit_lock[path], flags);
4465
4466 if (io_request) {
4467 io_request->queue_group = queue_group;
4468 list_add_tail(&io_request->request_list_entry,
4469 &queue_group->request_list[path]);
4470 }
4471
4472 iq_pi = queue_group->iq_pi_copy[path];
4473
4474 list_for_each_entry_safe(io_request, next,
4475 &queue_group->request_list[path], request_list_entry) {
4476
4477 request = io_request->iu;
4478
4479 iu_length = get_unaligned_le16(&request->iu_length) +
4480 PQI_REQUEST_HEADER_LENGTH;
4481 num_elements_needed =
4482 DIV_ROUND_UP(iu_length,
4483 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4484
4485 iq_ci = readl(queue_group->iq_ci[path]);
4486
4487 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci,
4488 ctrl_info->num_elements_per_iq))
4489 break;
4490
4491 put_unaligned_le16(queue_group->oq_id,
4492 &request->response_queue_id);
4493
4494 next_element = queue_group->iq_element_array[path] +
4495 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4496
4497 num_elements_to_end_of_queue =
4498 ctrl_info->num_elements_per_iq - iq_pi;
4499
4500 if (num_elements_needed <= num_elements_to_end_of_queue) {
4501 memcpy(next_element, request, iu_length);
4502 } else {
4503 copy_count = num_elements_to_end_of_queue *
4504 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
4505 memcpy(next_element, request, copy_count);
4506 memcpy(queue_group->iq_element_array[path],
4507 (u8 *)request + copy_count,
4508 iu_length - copy_count);
4509 }
4510
4511 iq_pi = (iq_pi + num_elements_needed) %
4512 ctrl_info->num_elements_per_iq;
4513
4514 list_del(&io_request->request_list_entry);
4515 }
4516
4517 if (iq_pi != queue_group->iq_pi_copy[path]) {
4518 queue_group->iq_pi_copy[path] = iq_pi;
4519 /*
4520 * This write notifies the controller that one or more IUs are
4521 * available to be processed.
4522 */
4523 writel(iq_pi, queue_group->iq_pi[path]);
4524 }
4525
4526 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags);
4527 }
4528
4529 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10
4530
pqi_wait_for_completion_io(struct pqi_ctrl_info * ctrl_info,struct completion * wait)4531 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info,
4532 struct completion *wait)
4533 {
4534 int rc;
4535
4536 while (1) {
4537 if (wait_for_completion_io_timeout(wait,
4538 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * HZ)) {
4539 rc = 0;
4540 break;
4541 }
4542
4543 pqi_check_ctrl_health(ctrl_info);
4544 if (pqi_ctrl_offline(ctrl_info)) {
4545 rc = -ENXIO;
4546 break;
4547 }
4548 }
4549
4550 return rc;
4551 }
4552
pqi_raid_synchronous_complete(struct pqi_io_request * io_request,void * context)4553 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request,
4554 void *context)
4555 {
4556 struct completion *waiting = context;
4557
4558 complete(waiting);
4559 }
4560
pqi_process_raid_io_error_synchronous(struct pqi_raid_error_info * error_info)4561 static int pqi_process_raid_io_error_synchronous(
4562 struct pqi_raid_error_info *error_info)
4563 {
4564 int rc = -EIO;
4565
4566 switch (error_info->data_out_result) {
4567 case PQI_DATA_IN_OUT_GOOD:
4568 if (error_info->status == SAM_STAT_GOOD)
4569 rc = 0;
4570 break;
4571 case PQI_DATA_IN_OUT_UNDERFLOW:
4572 if (error_info->status == SAM_STAT_GOOD ||
4573 error_info->status == SAM_STAT_CHECK_CONDITION)
4574 rc = 0;
4575 break;
4576 case PQI_DATA_IN_OUT_ABORTED:
4577 rc = PQI_CMD_STATUS_ABORTED;
4578 break;
4579 }
4580
4581 return rc;
4582 }
4583
pqi_is_blockable_request(struct pqi_iu_header * request)4584 static inline bool pqi_is_blockable_request(struct pqi_iu_header *request)
4585 {
4586 return (request->driver_flags & PQI_DRIVER_NONBLOCKABLE_REQUEST) == 0;
4587 }
4588
pqi_submit_raid_request_synchronous(struct pqi_ctrl_info * ctrl_info,struct pqi_iu_header * request,unsigned int flags,struct pqi_raid_error_info * error_info)4589 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
4590 struct pqi_iu_header *request, unsigned int flags,
4591 struct pqi_raid_error_info *error_info)
4592 {
4593 int rc = 0;
4594 struct pqi_io_request *io_request;
4595 size_t iu_length;
4596 DECLARE_COMPLETION_ONSTACK(wait);
4597
4598 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) {
4599 if (down_interruptible(&ctrl_info->sync_request_sem))
4600 return -ERESTARTSYS;
4601 } else {
4602 down(&ctrl_info->sync_request_sem);
4603 }
4604
4605 pqi_ctrl_busy(ctrl_info);
4606 /*
4607 * Wait for other admin queue updates such as;
4608 * config table changes, OFA memory updates, ...
4609 */
4610 if (pqi_is_blockable_request(request))
4611 pqi_wait_if_ctrl_blocked(ctrl_info);
4612
4613 if (pqi_ctrl_offline(ctrl_info)) {
4614 rc = -ENXIO;
4615 goto out;
4616 }
4617
4618 io_request = pqi_alloc_io_request(ctrl_info, NULL);
4619
4620 put_unaligned_le16(io_request->index,
4621 &(((struct pqi_raid_path_request *)request)->request_id));
4622
4623 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO)
4624 ((struct pqi_raid_path_request *)request)->error_index =
4625 ((struct pqi_raid_path_request *)request)->request_id;
4626
4627 iu_length = get_unaligned_le16(&request->iu_length) +
4628 PQI_REQUEST_HEADER_LENGTH;
4629 memcpy(io_request->iu, request, iu_length);
4630
4631 io_request->io_complete_callback = pqi_raid_synchronous_complete;
4632 io_request->context = &wait;
4633
4634 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
4635 io_request);
4636
4637 pqi_wait_for_completion_io(ctrl_info, &wait);
4638
4639 if (error_info) {
4640 if (io_request->error_info)
4641 memcpy(error_info, io_request->error_info, sizeof(*error_info));
4642 else
4643 memset(error_info, 0, sizeof(*error_info));
4644 } else if (rc == 0 && io_request->error_info) {
4645 rc = pqi_process_raid_io_error_synchronous(io_request->error_info);
4646 }
4647
4648 pqi_free_io_request(io_request);
4649
4650 out:
4651 pqi_ctrl_unbusy(ctrl_info);
4652 up(&ctrl_info->sync_request_sem);
4653
4654 return rc;
4655 }
4656
pqi_validate_admin_response(struct pqi_general_admin_response * response,u8 expected_function_code)4657 static int pqi_validate_admin_response(
4658 struct pqi_general_admin_response *response, u8 expected_function_code)
4659 {
4660 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN)
4661 return -EINVAL;
4662
4663 if (get_unaligned_le16(&response->header.iu_length) !=
4664 PQI_GENERAL_ADMIN_IU_LENGTH)
4665 return -EINVAL;
4666
4667 if (response->function_code != expected_function_code)
4668 return -EINVAL;
4669
4670 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS)
4671 return -EINVAL;
4672
4673 return 0;
4674 }
4675
pqi_submit_admin_request_synchronous(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_request * request,struct pqi_general_admin_response * response)4676 static int pqi_submit_admin_request_synchronous(
4677 struct pqi_ctrl_info *ctrl_info,
4678 struct pqi_general_admin_request *request,
4679 struct pqi_general_admin_response *response)
4680 {
4681 int rc;
4682
4683 pqi_submit_admin_request(ctrl_info, request);
4684
4685 rc = pqi_poll_for_admin_response(ctrl_info, response);
4686
4687 if (rc == 0)
4688 rc = pqi_validate_admin_response(response, request->function_code);
4689
4690 return rc;
4691 }
4692
pqi_report_device_capability(struct pqi_ctrl_info * ctrl_info)4693 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info)
4694 {
4695 int rc;
4696 struct pqi_general_admin_request request;
4697 struct pqi_general_admin_response response;
4698 struct pqi_device_capability *capability;
4699 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor;
4700
4701 capability = kmalloc(sizeof(*capability), GFP_KERNEL);
4702 if (!capability)
4703 return -ENOMEM;
4704
4705 memset(&request, 0, sizeof(request));
4706
4707 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4708 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4709 &request.header.iu_length);
4710 request.function_code =
4711 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY;
4712 put_unaligned_le32(sizeof(*capability),
4713 &request.data.report_device_capability.buffer_length);
4714
4715 rc = pqi_map_single(ctrl_info->pci_dev,
4716 &request.data.report_device_capability.sg_descriptor,
4717 capability, sizeof(*capability),
4718 DMA_FROM_DEVICE);
4719 if (rc)
4720 goto out;
4721
4722 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, &response);
4723
4724 pqi_pci_unmap(ctrl_info->pci_dev,
4725 &request.data.report_device_capability.sg_descriptor, 1,
4726 DMA_FROM_DEVICE);
4727
4728 if (rc)
4729 goto out;
4730
4731 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) {
4732 rc = -EIO;
4733 goto out;
4734 }
4735
4736 ctrl_info->max_inbound_queues =
4737 get_unaligned_le16(&capability->max_inbound_queues);
4738 ctrl_info->max_elements_per_iq =
4739 get_unaligned_le16(&capability->max_elements_per_iq);
4740 ctrl_info->max_iq_element_length =
4741 get_unaligned_le16(&capability->max_iq_element_length)
4742 * 16;
4743 ctrl_info->max_outbound_queues =
4744 get_unaligned_le16(&capability->max_outbound_queues);
4745 ctrl_info->max_elements_per_oq =
4746 get_unaligned_le16(&capability->max_elements_per_oq);
4747 ctrl_info->max_oq_element_length =
4748 get_unaligned_le16(&capability->max_oq_element_length)
4749 * 16;
4750
4751 sop_iu_layer_descriptor =
4752 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP];
4753
4754 ctrl_info->max_inbound_iu_length_per_firmware =
4755 get_unaligned_le16(
4756 &sop_iu_layer_descriptor->max_inbound_iu_length);
4757 ctrl_info->inbound_spanning_supported =
4758 sop_iu_layer_descriptor->inbound_spanning_supported;
4759 ctrl_info->outbound_spanning_supported =
4760 sop_iu_layer_descriptor->outbound_spanning_supported;
4761
4762 out:
4763 kfree(capability);
4764
4765 return rc;
4766 }
4767
pqi_validate_device_capability(struct pqi_ctrl_info * ctrl_info)4768 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info)
4769 {
4770 if (ctrl_info->max_iq_element_length <
4771 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4772 dev_err(&ctrl_info->pci_dev->dev,
4773 "max. inbound queue element length of %d is less than the required length of %d\n",
4774 ctrl_info->max_iq_element_length,
4775 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4776 return -EINVAL;
4777 }
4778
4779 if (ctrl_info->max_oq_element_length <
4780 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) {
4781 dev_err(&ctrl_info->pci_dev->dev,
4782 "max. outbound queue element length of %d is less than the required length of %d\n",
4783 ctrl_info->max_oq_element_length,
4784 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
4785 return -EINVAL;
4786 }
4787
4788 if (ctrl_info->max_inbound_iu_length_per_firmware <
4789 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4790 dev_err(&ctrl_info->pci_dev->dev,
4791 "max. inbound IU length of %u is less than the min. required length of %d\n",
4792 ctrl_info->max_inbound_iu_length_per_firmware,
4793 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4794 return -EINVAL;
4795 }
4796
4797 if (!ctrl_info->inbound_spanning_supported) {
4798 dev_err(&ctrl_info->pci_dev->dev,
4799 "the controller does not support inbound spanning\n");
4800 return -EINVAL;
4801 }
4802
4803 if (ctrl_info->outbound_spanning_supported) {
4804 dev_err(&ctrl_info->pci_dev->dev,
4805 "the controller supports outbound spanning but this driver does not\n");
4806 return -EINVAL;
4807 }
4808
4809 return 0;
4810 }
4811
pqi_create_event_queue(struct pqi_ctrl_info * ctrl_info)4812 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info)
4813 {
4814 int rc;
4815 struct pqi_event_queue *event_queue;
4816 struct pqi_general_admin_request request;
4817 struct pqi_general_admin_response response;
4818
4819 event_queue = &ctrl_info->event_queue;
4820
4821 /*
4822 * Create OQ (Outbound Queue - device to host queue) to dedicate
4823 * to events.
4824 */
4825 memset(&request, 0, sizeof(request));
4826 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4827 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4828 &request.header.iu_length);
4829 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4830 put_unaligned_le16(event_queue->oq_id,
4831 &request.data.create_operational_oq.queue_id);
4832 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr,
4833 &request.data.create_operational_oq.element_array_addr);
4834 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr,
4835 &request.data.create_operational_oq.pi_addr);
4836 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS,
4837 &request.data.create_operational_oq.num_elements);
4838 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16,
4839 &request.data.create_operational_oq.element_length);
4840 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4841 put_unaligned_le16(event_queue->int_msg_num,
4842 &request.data.create_operational_oq.int_msg_num);
4843
4844 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4845 &response);
4846 if (rc)
4847 return rc;
4848
4849 event_queue->oq_ci = ctrl_info->iomem_base +
4850 PQI_DEVICE_REGISTERS_OFFSET +
4851 get_unaligned_le64(
4852 &response.data.create_operational_oq.oq_ci_offset);
4853
4854 return 0;
4855 }
4856
pqi_create_queue_group(struct pqi_ctrl_info * ctrl_info,unsigned int group_number)4857 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info,
4858 unsigned int group_number)
4859 {
4860 int rc;
4861 struct pqi_queue_group *queue_group;
4862 struct pqi_general_admin_request request;
4863 struct pqi_general_admin_response response;
4864
4865 queue_group = &ctrl_info->queue_groups[group_number];
4866
4867 /*
4868 * Create IQ (Inbound Queue - host to device queue) for
4869 * RAID path.
4870 */
4871 memset(&request, 0, sizeof(request));
4872 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4873 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4874 &request.header.iu_length);
4875 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4876 put_unaligned_le16(queue_group->iq_id[RAID_PATH],
4877 &request.data.create_operational_iq.queue_id);
4878 put_unaligned_le64(
4879 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH],
4880 &request.data.create_operational_iq.element_array_addr);
4881 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH],
4882 &request.data.create_operational_iq.ci_addr);
4883 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4884 &request.data.create_operational_iq.num_elements);
4885 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4886 &request.data.create_operational_iq.element_length);
4887 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4888
4889 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4890 &response);
4891 if (rc) {
4892 dev_err(&ctrl_info->pci_dev->dev,
4893 "error creating inbound RAID queue\n");
4894 return rc;
4895 }
4896
4897 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base +
4898 PQI_DEVICE_REGISTERS_OFFSET +
4899 get_unaligned_le64(
4900 &response.data.create_operational_iq.iq_pi_offset);
4901
4902 /*
4903 * Create IQ (Inbound Queue - host to device queue) for
4904 * Advanced I/O (AIO) path.
4905 */
4906 memset(&request, 0, sizeof(request));
4907 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4908 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4909 &request.header.iu_length);
4910 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4911 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4912 &request.data.create_operational_iq.queue_id);
4913 put_unaligned_le64((u64)queue_group->
4914 iq_element_array_bus_addr[AIO_PATH],
4915 &request.data.create_operational_iq.element_array_addr);
4916 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH],
4917 &request.data.create_operational_iq.ci_addr);
4918 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4919 &request.data.create_operational_iq.num_elements);
4920 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4921 &request.data.create_operational_iq.element_length);
4922 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4923
4924 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4925 &response);
4926 if (rc) {
4927 dev_err(&ctrl_info->pci_dev->dev,
4928 "error creating inbound AIO queue\n");
4929 return rc;
4930 }
4931
4932 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base +
4933 PQI_DEVICE_REGISTERS_OFFSET +
4934 get_unaligned_le64(
4935 &response.data.create_operational_iq.iq_pi_offset);
4936
4937 /*
4938 * Designate the 2nd IQ as the AIO path. By default, all IQs are
4939 * assumed to be for RAID path I/O unless we change the queue's
4940 * property.
4941 */
4942 memset(&request, 0, sizeof(request));
4943 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4944 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4945 &request.header.iu_length);
4946 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY;
4947 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4948 &request.data.change_operational_iq_properties.queue_id);
4949 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE,
4950 &request.data.change_operational_iq_properties.vendor_specific);
4951
4952 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4953 &response);
4954 if (rc) {
4955 dev_err(&ctrl_info->pci_dev->dev,
4956 "error changing queue property\n");
4957 return rc;
4958 }
4959
4960 /*
4961 * Create OQ (Outbound Queue - device to host queue).
4962 */
4963 memset(&request, 0, sizeof(request));
4964 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4965 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4966 &request.header.iu_length);
4967 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4968 put_unaligned_le16(queue_group->oq_id,
4969 &request.data.create_operational_oq.queue_id);
4970 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr,
4971 &request.data.create_operational_oq.element_array_addr);
4972 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr,
4973 &request.data.create_operational_oq.pi_addr);
4974 put_unaligned_le16(ctrl_info->num_elements_per_oq,
4975 &request.data.create_operational_oq.num_elements);
4976 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16,
4977 &request.data.create_operational_oq.element_length);
4978 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4979 put_unaligned_le16(queue_group->int_msg_num,
4980 &request.data.create_operational_oq.int_msg_num);
4981
4982 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4983 &response);
4984 if (rc) {
4985 dev_err(&ctrl_info->pci_dev->dev,
4986 "error creating outbound queue\n");
4987 return rc;
4988 }
4989
4990 queue_group->oq_ci = ctrl_info->iomem_base +
4991 PQI_DEVICE_REGISTERS_OFFSET +
4992 get_unaligned_le64(
4993 &response.data.create_operational_oq.oq_ci_offset);
4994
4995 return 0;
4996 }
4997
pqi_create_queues(struct pqi_ctrl_info * ctrl_info)4998 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info)
4999 {
5000 int rc;
5001 unsigned int i;
5002
5003 rc = pqi_create_event_queue(ctrl_info);
5004 if (rc) {
5005 dev_err(&ctrl_info->pci_dev->dev,
5006 "error creating event queue\n");
5007 return rc;
5008 }
5009
5010 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5011 rc = pqi_create_queue_group(ctrl_info, i);
5012 if (rc) {
5013 dev_err(&ctrl_info->pci_dev->dev,
5014 "error creating queue group number %u/%u\n",
5015 i, ctrl_info->num_queue_groups);
5016 return rc;
5017 }
5018 }
5019
5020 return 0;
5021 }
5022
5023 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \
5024 struct_size_t(struct pqi_event_config, descriptors, PQI_MAX_EVENT_DESCRIPTORS)
5025
pqi_configure_events(struct pqi_ctrl_info * ctrl_info,bool enable_events)5026 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info,
5027 bool enable_events)
5028 {
5029 int rc;
5030 unsigned int i;
5031 struct pqi_event_config *event_config;
5032 struct pqi_event_descriptor *event_descriptor;
5033 struct pqi_general_management_request request;
5034
5035 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
5036 GFP_KERNEL);
5037 if (!event_config)
5038 return -ENOMEM;
5039
5040 memset(&request, 0, sizeof(request));
5041
5042 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG;
5043 put_unaligned_le16(offsetof(struct pqi_general_management_request,
5044 data.report_event_configuration.sg_descriptors[1]) -
5045 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
5046 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
5047 &request.data.report_event_configuration.buffer_length);
5048
5049 rc = pqi_map_single(ctrl_info->pci_dev,
5050 request.data.report_event_configuration.sg_descriptors,
5051 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
5052 DMA_FROM_DEVICE);
5053 if (rc)
5054 goto out;
5055
5056 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
5057
5058 pqi_pci_unmap(ctrl_info->pci_dev,
5059 request.data.report_event_configuration.sg_descriptors, 1,
5060 DMA_FROM_DEVICE);
5061
5062 if (rc)
5063 goto out;
5064
5065 for (i = 0; i < event_config->num_event_descriptors; i++) {
5066 event_descriptor = &event_config->descriptors[i];
5067 if (enable_events &&
5068 pqi_is_supported_event(event_descriptor->event_type))
5069 put_unaligned_le16(ctrl_info->event_queue.oq_id,
5070 &event_descriptor->oq_id);
5071 else
5072 put_unaligned_le16(0, &event_descriptor->oq_id);
5073 }
5074
5075 memset(&request, 0, sizeof(request));
5076
5077 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG;
5078 put_unaligned_le16(offsetof(struct pqi_general_management_request,
5079 data.report_event_configuration.sg_descriptors[1]) -
5080 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
5081 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
5082 &request.data.report_event_configuration.buffer_length);
5083
5084 rc = pqi_map_single(ctrl_info->pci_dev,
5085 request.data.report_event_configuration.sg_descriptors,
5086 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
5087 DMA_TO_DEVICE);
5088 if (rc)
5089 goto out;
5090
5091 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
5092
5093 pqi_pci_unmap(ctrl_info->pci_dev,
5094 request.data.report_event_configuration.sg_descriptors, 1,
5095 DMA_TO_DEVICE);
5096
5097 out:
5098 kfree(event_config);
5099
5100 return rc;
5101 }
5102
pqi_enable_events(struct pqi_ctrl_info * ctrl_info)5103 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info)
5104 {
5105 return pqi_configure_events(ctrl_info, true);
5106 }
5107
pqi_free_all_io_requests(struct pqi_ctrl_info * ctrl_info)5108 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info)
5109 {
5110 unsigned int i;
5111 struct device *dev;
5112 size_t sg_chain_buffer_length;
5113 struct pqi_io_request *io_request;
5114
5115 if (!ctrl_info->io_request_pool)
5116 return;
5117
5118 dev = &ctrl_info->pci_dev->dev;
5119 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
5120 io_request = ctrl_info->io_request_pool;
5121
5122 for (i = 0; i < ctrl_info->max_io_slots; i++) {
5123 kfree(io_request->iu);
5124 if (!io_request->sg_chain_buffer)
5125 break;
5126 dma_free_coherent(dev, sg_chain_buffer_length,
5127 io_request->sg_chain_buffer,
5128 io_request->sg_chain_buffer_dma_handle);
5129 io_request++;
5130 }
5131
5132 kfree(ctrl_info->io_request_pool);
5133 ctrl_info->io_request_pool = NULL;
5134 }
5135
pqi_alloc_error_buffer(struct pqi_ctrl_info * ctrl_info)5136 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info)
5137 {
5138 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev,
5139 ctrl_info->error_buffer_length,
5140 &ctrl_info->error_buffer_dma_handle,
5141 GFP_KERNEL);
5142 if (!ctrl_info->error_buffer)
5143 return -ENOMEM;
5144
5145 return 0;
5146 }
5147
pqi_alloc_io_resources(struct pqi_ctrl_info * ctrl_info)5148 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info)
5149 {
5150 unsigned int i;
5151 void *sg_chain_buffer;
5152 size_t sg_chain_buffer_length;
5153 dma_addr_t sg_chain_buffer_dma_handle;
5154 struct device *dev;
5155 struct pqi_io_request *io_request;
5156
5157 ctrl_info->io_request_pool = kcalloc(ctrl_info->max_io_slots,
5158 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL);
5159
5160 if (!ctrl_info->io_request_pool) {
5161 dev_err(&ctrl_info->pci_dev->dev,
5162 "failed to allocate I/O request pool\n");
5163 goto error;
5164 }
5165
5166 dev = &ctrl_info->pci_dev->dev;
5167 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
5168 io_request = ctrl_info->io_request_pool;
5169
5170 for (i = 0; i < ctrl_info->max_io_slots; i++) {
5171 io_request->iu = kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL);
5172
5173 if (!io_request->iu) {
5174 dev_err(&ctrl_info->pci_dev->dev,
5175 "failed to allocate IU buffers\n");
5176 goto error;
5177 }
5178
5179 sg_chain_buffer = dma_alloc_coherent(dev,
5180 sg_chain_buffer_length, &sg_chain_buffer_dma_handle,
5181 GFP_KERNEL);
5182
5183 if (!sg_chain_buffer) {
5184 dev_err(&ctrl_info->pci_dev->dev,
5185 "failed to allocate PQI scatter-gather chain buffers\n");
5186 goto error;
5187 }
5188
5189 io_request->index = i;
5190 io_request->sg_chain_buffer = sg_chain_buffer;
5191 io_request->sg_chain_buffer_dma_handle = sg_chain_buffer_dma_handle;
5192 io_request++;
5193 }
5194
5195 return 0;
5196
5197 error:
5198 pqi_free_all_io_requests(ctrl_info);
5199
5200 return -ENOMEM;
5201 }
5202
5203 /*
5204 * Calculate required resources that are sized based on max. outstanding
5205 * requests and max. transfer size.
5206 */
5207
pqi_calculate_io_resources(struct pqi_ctrl_info * ctrl_info)5208 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info)
5209 {
5210 u32 max_transfer_size;
5211 u32 max_sg_entries;
5212
5213 ctrl_info->scsi_ml_can_queue =
5214 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS;
5215 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests;
5216
5217 ctrl_info->error_buffer_length =
5218 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH;
5219
5220 if (reset_devices)
5221 max_transfer_size = min(ctrl_info->max_transfer_size,
5222 PQI_MAX_TRANSFER_SIZE_KDUMP);
5223 else
5224 max_transfer_size = min(ctrl_info->max_transfer_size,
5225 PQI_MAX_TRANSFER_SIZE);
5226
5227 max_sg_entries = max_transfer_size / PAGE_SIZE;
5228
5229 /* +1 to cover when the buffer is not page-aligned. */
5230 max_sg_entries++;
5231
5232 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries);
5233
5234 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE;
5235
5236 ctrl_info->sg_chain_buffer_length =
5237 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) +
5238 PQI_EXTRA_SGL_MEMORY;
5239 ctrl_info->sg_tablesize = max_sg_entries;
5240 ctrl_info->max_sectors = max_transfer_size / 512;
5241 }
5242
pqi_calculate_queue_resources(struct pqi_ctrl_info * ctrl_info)5243 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info)
5244 {
5245 int num_queue_groups;
5246 u16 num_elements_per_iq;
5247 u16 num_elements_per_oq;
5248
5249 if (reset_devices) {
5250 num_queue_groups = 1;
5251 } else {
5252 int num_cpus;
5253 int max_queue_groups;
5254
5255 max_queue_groups = min(ctrl_info->max_inbound_queues / 2,
5256 ctrl_info->max_outbound_queues - 1);
5257 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS);
5258
5259 num_cpus = num_online_cpus();
5260 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors);
5261 num_queue_groups = min(num_queue_groups, max_queue_groups);
5262 }
5263
5264 ctrl_info->num_queue_groups = num_queue_groups;
5265
5266 /*
5267 * Make sure that the max. inbound IU length is an even multiple
5268 * of our inbound element length.
5269 */
5270 ctrl_info->max_inbound_iu_length =
5271 (ctrl_info->max_inbound_iu_length_per_firmware /
5272 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) *
5273 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
5274
5275 num_elements_per_iq =
5276 (ctrl_info->max_inbound_iu_length /
5277 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
5278
5279 /* Add one because one element in each queue is unusable. */
5280 num_elements_per_iq++;
5281
5282 num_elements_per_iq = min(num_elements_per_iq,
5283 ctrl_info->max_elements_per_iq);
5284
5285 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1;
5286 num_elements_per_oq = min(num_elements_per_oq,
5287 ctrl_info->max_elements_per_oq);
5288
5289 ctrl_info->num_elements_per_iq = num_elements_per_iq;
5290 ctrl_info->num_elements_per_oq = num_elements_per_oq;
5291
5292 ctrl_info->max_sg_per_iu =
5293 ((ctrl_info->max_inbound_iu_length -
5294 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
5295 sizeof(struct pqi_sg_descriptor)) +
5296 PQI_MAX_EMBEDDED_SG_DESCRIPTORS;
5297
5298 ctrl_info->max_sg_per_r56_iu =
5299 ((ctrl_info->max_inbound_iu_length -
5300 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
5301 sizeof(struct pqi_sg_descriptor)) +
5302 PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS;
5303 }
5304
pqi_set_sg_descriptor(struct pqi_sg_descriptor * sg_descriptor,struct scatterlist * sg)5305 static inline void pqi_set_sg_descriptor(struct pqi_sg_descriptor *sg_descriptor,
5306 struct scatterlist *sg)
5307 {
5308 u64 address = (u64)sg_dma_address(sg);
5309 unsigned int length = sg_dma_len(sg);
5310
5311 put_unaligned_le64(address, &sg_descriptor->address);
5312 put_unaligned_le32(length, &sg_descriptor->length);
5313 put_unaligned_le32(0, &sg_descriptor->flags);
5314 }
5315
pqi_build_sg_list(struct pqi_sg_descriptor * sg_descriptor,struct scatterlist * sg,int sg_count,struct pqi_io_request * io_request,int max_sg_per_iu,bool * chained)5316 static unsigned int pqi_build_sg_list(struct pqi_sg_descriptor *sg_descriptor,
5317 struct scatterlist *sg, int sg_count, struct pqi_io_request *io_request,
5318 int max_sg_per_iu, bool *chained)
5319 {
5320 int i;
5321 unsigned int num_sg_in_iu;
5322
5323 *chained = false;
5324 i = 0;
5325 num_sg_in_iu = 0;
5326 max_sg_per_iu--; /* Subtract 1 to leave room for chain marker. */
5327
5328 while (1) {
5329 pqi_set_sg_descriptor(sg_descriptor, sg);
5330 if (!*chained)
5331 num_sg_in_iu++;
5332 i++;
5333 if (i == sg_count)
5334 break;
5335 sg_descriptor++;
5336 if (i == max_sg_per_iu) {
5337 put_unaligned_le64((u64)io_request->sg_chain_buffer_dma_handle,
5338 &sg_descriptor->address);
5339 put_unaligned_le32((sg_count - num_sg_in_iu) * sizeof(*sg_descriptor),
5340 &sg_descriptor->length);
5341 put_unaligned_le32(CISS_SG_CHAIN, &sg_descriptor->flags);
5342 *chained = true;
5343 num_sg_in_iu++;
5344 sg_descriptor = io_request->sg_chain_buffer;
5345 }
5346 sg = sg_next(sg);
5347 }
5348
5349 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
5350
5351 return num_sg_in_iu;
5352 }
5353
pqi_build_raid_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_raid_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)5354 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info,
5355 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd,
5356 struct pqi_io_request *io_request)
5357 {
5358 u16 iu_length;
5359 int sg_count;
5360 bool chained;
5361 unsigned int num_sg_in_iu;
5362 struct scatterlist *sg;
5363 struct pqi_sg_descriptor *sg_descriptor;
5364
5365 sg_count = scsi_dma_map(scmd);
5366 if (sg_count < 0)
5367 return sg_count;
5368
5369 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
5370 PQI_REQUEST_HEADER_LENGTH;
5371
5372 if (sg_count == 0)
5373 goto out;
5374
5375 sg = scsi_sglist(scmd);
5376 sg_descriptor = request->sg_descriptors;
5377
5378 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
5379 ctrl_info->max_sg_per_iu, &chained);
5380
5381 request->partial = chained;
5382 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
5383
5384 out:
5385 put_unaligned_le16(iu_length, &request->header.iu_length);
5386
5387 return 0;
5388 }
5389
pqi_build_aio_r1_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_aio_r1_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)5390 static int pqi_build_aio_r1_sg_list(struct pqi_ctrl_info *ctrl_info,
5391 struct pqi_aio_r1_path_request *request, struct scsi_cmnd *scmd,
5392 struct pqi_io_request *io_request)
5393 {
5394 u16 iu_length;
5395 int sg_count;
5396 bool chained;
5397 unsigned int num_sg_in_iu;
5398 struct scatterlist *sg;
5399 struct pqi_sg_descriptor *sg_descriptor;
5400
5401 sg_count = scsi_dma_map(scmd);
5402 if (sg_count < 0)
5403 return sg_count;
5404
5405 iu_length = offsetof(struct pqi_aio_r1_path_request, sg_descriptors) -
5406 PQI_REQUEST_HEADER_LENGTH;
5407 num_sg_in_iu = 0;
5408
5409 if (sg_count == 0)
5410 goto out;
5411
5412 sg = scsi_sglist(scmd);
5413 sg_descriptor = request->sg_descriptors;
5414
5415 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
5416 ctrl_info->max_sg_per_iu, &chained);
5417
5418 request->partial = chained;
5419 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
5420
5421 out:
5422 put_unaligned_le16(iu_length, &request->header.iu_length);
5423 request->num_sg_descriptors = num_sg_in_iu;
5424
5425 return 0;
5426 }
5427
pqi_build_aio_r56_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_aio_r56_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)5428 static int pqi_build_aio_r56_sg_list(struct pqi_ctrl_info *ctrl_info,
5429 struct pqi_aio_r56_path_request *request, struct scsi_cmnd *scmd,
5430 struct pqi_io_request *io_request)
5431 {
5432 u16 iu_length;
5433 int sg_count;
5434 bool chained;
5435 unsigned int num_sg_in_iu;
5436 struct scatterlist *sg;
5437 struct pqi_sg_descriptor *sg_descriptor;
5438
5439 sg_count = scsi_dma_map(scmd);
5440 if (sg_count < 0)
5441 return sg_count;
5442
5443 iu_length = offsetof(struct pqi_aio_r56_path_request, sg_descriptors) -
5444 PQI_REQUEST_HEADER_LENGTH;
5445 num_sg_in_iu = 0;
5446
5447 if (sg_count != 0) {
5448 sg = scsi_sglist(scmd);
5449 sg_descriptor = request->sg_descriptors;
5450
5451 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
5452 ctrl_info->max_sg_per_r56_iu, &chained);
5453
5454 request->partial = chained;
5455 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
5456 }
5457
5458 put_unaligned_le16(iu_length, &request->header.iu_length);
5459 request->num_sg_descriptors = num_sg_in_iu;
5460
5461 return 0;
5462 }
5463
pqi_build_aio_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_aio_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)5464 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info,
5465 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd,
5466 struct pqi_io_request *io_request)
5467 {
5468 u16 iu_length;
5469 int sg_count;
5470 bool chained;
5471 unsigned int num_sg_in_iu;
5472 struct scatterlist *sg;
5473 struct pqi_sg_descriptor *sg_descriptor;
5474
5475 sg_count = scsi_dma_map(scmd);
5476 if (sg_count < 0)
5477 return sg_count;
5478
5479 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) -
5480 PQI_REQUEST_HEADER_LENGTH;
5481 num_sg_in_iu = 0;
5482
5483 if (sg_count == 0)
5484 goto out;
5485
5486 sg = scsi_sglist(scmd);
5487 sg_descriptor = request->sg_descriptors;
5488
5489 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
5490 ctrl_info->max_sg_per_iu, &chained);
5491
5492 request->partial = chained;
5493 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
5494
5495 out:
5496 put_unaligned_le16(iu_length, &request->header.iu_length);
5497 request->num_sg_descriptors = num_sg_in_iu;
5498
5499 return 0;
5500 }
5501
pqi_raid_io_complete(struct pqi_io_request * io_request,void * context)5502 static void pqi_raid_io_complete(struct pqi_io_request *io_request,
5503 void *context)
5504 {
5505 struct scsi_cmnd *scmd;
5506
5507 scmd = io_request->scmd;
5508 pqi_free_io_request(io_request);
5509 scsi_dma_unmap(scmd);
5510 pqi_scsi_done(scmd);
5511 }
5512
pqi_raid_submit_io(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group,bool io_high_prio)5513 static int pqi_raid_submit_io(struct pqi_ctrl_info *ctrl_info,
5514 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5515 struct pqi_queue_group *queue_group, bool io_high_prio)
5516 {
5517 int rc;
5518 size_t cdb_length;
5519 struct pqi_io_request *io_request;
5520 struct pqi_raid_path_request *request;
5521
5522 io_request = pqi_alloc_io_request(ctrl_info, scmd);
5523 if (!io_request)
5524 return SCSI_MLQUEUE_HOST_BUSY;
5525
5526 io_request->io_complete_callback = pqi_raid_io_complete;
5527 io_request->scmd = scmd;
5528
5529 request = io_request->iu;
5530 memset(request, 0, offsetof(struct pqi_raid_path_request, sg_descriptors));
5531
5532 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
5533 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
5534 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5535 request->command_priority = io_high_prio;
5536 put_unaligned_le16(io_request->index, &request->request_id);
5537 request->error_index = request->request_id;
5538 memcpy(request->lun_number, device->scsi3addr, sizeof(request->lun_number));
5539 request->ml_device_lun_number = (u8)scmd->device->lun;
5540
5541 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb));
5542 memcpy(request->cdb, scmd->cmnd, cdb_length);
5543
5544 switch (cdb_length) {
5545 case 6:
5546 case 10:
5547 case 12:
5548 case 16:
5549 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
5550 break;
5551 case 20:
5552 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_4;
5553 break;
5554 case 24:
5555 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_8;
5556 break;
5557 case 28:
5558 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_12;
5559 break;
5560 case 32:
5561 default:
5562 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_16;
5563 break;
5564 }
5565
5566 switch (scmd->sc_data_direction) {
5567 case DMA_FROM_DEVICE:
5568 request->data_direction = SOP_READ_FLAG;
5569 break;
5570 case DMA_TO_DEVICE:
5571 request->data_direction = SOP_WRITE_FLAG;
5572 break;
5573 case DMA_NONE:
5574 request->data_direction = SOP_NO_DIRECTION_FLAG;
5575 break;
5576 case DMA_BIDIRECTIONAL:
5577 request->data_direction = SOP_BIDIRECTIONAL;
5578 break;
5579 default:
5580 dev_err(&ctrl_info->pci_dev->dev,
5581 "unknown data direction: %d\n",
5582 scmd->sc_data_direction);
5583 break;
5584 }
5585
5586 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request);
5587 if (rc) {
5588 pqi_free_io_request(io_request);
5589 return SCSI_MLQUEUE_HOST_BUSY;
5590 }
5591
5592 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request);
5593
5594 return 0;
5595 }
5596
pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)5597 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5598 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5599 struct pqi_queue_group *queue_group)
5600 {
5601 bool io_high_prio;
5602
5603 io_high_prio = pqi_is_io_high_priority(device, scmd);
5604
5605 return pqi_raid_submit_io(ctrl_info, device, scmd, queue_group, io_high_prio);
5606 }
5607
pqi_raid_bypass_retry_needed(struct pqi_io_request * io_request)5608 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request)
5609 {
5610 struct scsi_cmnd *scmd;
5611 struct pqi_scsi_dev *device;
5612 struct pqi_ctrl_info *ctrl_info;
5613
5614 if (!io_request->raid_bypass)
5615 return false;
5616
5617 scmd = io_request->scmd;
5618 if ((scmd->result & 0xff) == SAM_STAT_GOOD)
5619 return false;
5620 if (host_byte(scmd->result) == DID_NO_CONNECT)
5621 return false;
5622
5623 device = scmd->device->hostdata;
5624 if (pqi_device_offline(device) || pqi_device_in_remove(device))
5625 return false;
5626
5627 ctrl_info = shost_to_hba(scmd->device->host);
5628 if (pqi_ctrl_offline(ctrl_info))
5629 return false;
5630
5631 return true;
5632 }
5633
pqi_aio_io_complete(struct pqi_io_request * io_request,void * context)5634 static void pqi_aio_io_complete(struct pqi_io_request *io_request,
5635 void *context)
5636 {
5637 struct scsi_cmnd *scmd;
5638
5639 scmd = io_request->scmd;
5640 scsi_dma_unmap(scmd);
5641 if (io_request->status == -EAGAIN || pqi_raid_bypass_retry_needed(io_request)) {
5642 set_host_byte(scmd, DID_IMM_RETRY);
5643 pqi_cmd_priv(scmd)->this_residual++;
5644 }
5645
5646 pqi_free_io_request(io_request);
5647 pqi_scsi_done(scmd);
5648 }
5649
pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)5650 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5651 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5652 struct pqi_queue_group *queue_group)
5653 {
5654 bool io_high_prio;
5655
5656 io_high_prio = pqi_is_io_high_priority(device, scmd);
5657
5658 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle,
5659 scmd->cmnd, scmd->cmd_len, queue_group, NULL,
5660 false, io_high_prio);
5661 }
5662
pqi_aio_submit_io(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd,u32 aio_handle,u8 * cdb,unsigned int cdb_length,struct pqi_queue_group * queue_group,struct pqi_encryption_info * encryption_info,bool raid_bypass,bool io_high_prio)5663 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
5664 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
5665 unsigned int cdb_length, struct pqi_queue_group *queue_group,
5666 struct pqi_encryption_info *encryption_info, bool raid_bypass,
5667 bool io_high_prio)
5668 {
5669 int rc;
5670 struct pqi_io_request *io_request;
5671 struct pqi_aio_path_request *request;
5672
5673 io_request = pqi_alloc_io_request(ctrl_info, scmd);
5674 if (!io_request)
5675 return SCSI_MLQUEUE_HOST_BUSY;
5676
5677 io_request->io_complete_callback = pqi_aio_io_complete;
5678 io_request->scmd = scmd;
5679 io_request->raid_bypass = raid_bypass;
5680
5681 request = io_request->iu;
5682 memset(request, 0, offsetof(struct pqi_aio_path_request, sg_descriptors));
5683
5684 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO;
5685 put_unaligned_le32(aio_handle, &request->nexus_id);
5686 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
5687 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5688 request->command_priority = io_high_prio;
5689 put_unaligned_le16(io_request->index, &request->request_id);
5690 request->error_index = request->request_id;
5691 if (!raid_bypass && ctrl_info->multi_lun_device_supported)
5692 put_unaligned_le64(scmd->device->lun << 8, &request->lun_number);
5693 if (cdb_length > sizeof(request->cdb))
5694 cdb_length = sizeof(request->cdb);
5695 request->cdb_length = cdb_length;
5696 memcpy(request->cdb, cdb, cdb_length);
5697
5698 switch (scmd->sc_data_direction) {
5699 case DMA_TO_DEVICE:
5700 request->data_direction = SOP_READ_FLAG;
5701 break;
5702 case DMA_FROM_DEVICE:
5703 request->data_direction = SOP_WRITE_FLAG;
5704 break;
5705 case DMA_NONE:
5706 request->data_direction = SOP_NO_DIRECTION_FLAG;
5707 break;
5708 case DMA_BIDIRECTIONAL:
5709 request->data_direction = SOP_BIDIRECTIONAL;
5710 break;
5711 default:
5712 dev_err(&ctrl_info->pci_dev->dev,
5713 "unknown data direction: %d\n",
5714 scmd->sc_data_direction);
5715 break;
5716 }
5717
5718 if (encryption_info) {
5719 request->encryption_enable = true;
5720 put_unaligned_le16(encryption_info->data_encryption_key_index,
5721 &request->data_encryption_key_index);
5722 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5723 &request->encrypt_tweak_lower);
5724 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5725 &request->encrypt_tweak_upper);
5726 }
5727
5728 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request);
5729 if (rc) {
5730 pqi_free_io_request(io_request);
5731 return SCSI_MLQUEUE_HOST_BUSY;
5732 }
5733
5734 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5735
5736 return 0;
5737 }
5738
pqi_aio_submit_r1_write_io(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group,struct pqi_encryption_info * encryption_info,struct pqi_scsi_dev * device,struct pqi_scsi_dev_raid_map_data * rmd)5739 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info,
5740 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
5741 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
5742 struct pqi_scsi_dev_raid_map_data *rmd)
5743 {
5744 int rc;
5745 struct pqi_io_request *io_request;
5746 struct pqi_aio_r1_path_request *r1_request;
5747
5748 io_request = pqi_alloc_io_request(ctrl_info, scmd);
5749 if (!io_request)
5750 return SCSI_MLQUEUE_HOST_BUSY;
5751
5752 io_request->io_complete_callback = pqi_aio_io_complete;
5753 io_request->scmd = scmd;
5754 io_request->raid_bypass = true;
5755
5756 r1_request = io_request->iu;
5757 memset(r1_request, 0, offsetof(struct pqi_aio_r1_path_request, sg_descriptors));
5758
5759 r1_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID1_IO;
5760 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r1_request->volume_id);
5761 r1_request->num_drives = rmd->num_it_nexus_entries;
5762 put_unaligned_le32(rmd->it_nexus[0], &r1_request->it_nexus_1);
5763 put_unaligned_le32(rmd->it_nexus[1], &r1_request->it_nexus_2);
5764 if (rmd->num_it_nexus_entries == 3)
5765 put_unaligned_le32(rmd->it_nexus[2], &r1_request->it_nexus_3);
5766
5767 put_unaligned_le32(scsi_bufflen(scmd), &r1_request->data_length);
5768 r1_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5769 put_unaligned_le16(io_request->index, &r1_request->request_id);
5770 r1_request->error_index = r1_request->request_id;
5771 if (rmd->cdb_length > sizeof(r1_request->cdb))
5772 rmd->cdb_length = sizeof(r1_request->cdb);
5773 r1_request->cdb_length = rmd->cdb_length;
5774 memcpy(r1_request->cdb, rmd->cdb, rmd->cdb_length);
5775
5776 /* The direction is always write. */
5777 r1_request->data_direction = SOP_READ_FLAG;
5778
5779 if (encryption_info) {
5780 r1_request->encryption_enable = true;
5781 put_unaligned_le16(encryption_info->data_encryption_key_index,
5782 &r1_request->data_encryption_key_index);
5783 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5784 &r1_request->encrypt_tweak_lower);
5785 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5786 &r1_request->encrypt_tweak_upper);
5787 }
5788
5789 rc = pqi_build_aio_r1_sg_list(ctrl_info, r1_request, scmd, io_request);
5790 if (rc) {
5791 pqi_free_io_request(io_request);
5792 return SCSI_MLQUEUE_HOST_BUSY;
5793 }
5794
5795 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5796
5797 return 0;
5798 }
5799
pqi_aio_submit_r56_write_io(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group,struct pqi_encryption_info * encryption_info,struct pqi_scsi_dev * device,struct pqi_scsi_dev_raid_map_data * rmd)5800 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info,
5801 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
5802 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
5803 struct pqi_scsi_dev_raid_map_data *rmd)
5804 {
5805 int rc;
5806 struct pqi_io_request *io_request;
5807 struct pqi_aio_r56_path_request *r56_request;
5808
5809 io_request = pqi_alloc_io_request(ctrl_info, scmd);
5810 if (!io_request)
5811 return SCSI_MLQUEUE_HOST_BUSY;
5812 io_request->io_complete_callback = pqi_aio_io_complete;
5813 io_request->scmd = scmd;
5814 io_request->raid_bypass = true;
5815
5816 r56_request = io_request->iu;
5817 memset(r56_request, 0, offsetof(struct pqi_aio_r56_path_request, sg_descriptors));
5818
5819 if (device->raid_level == SA_RAID_5 || device->raid_level == SA_RAID_51)
5820 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID5_IO;
5821 else
5822 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID6_IO;
5823
5824 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r56_request->volume_id);
5825 put_unaligned_le32(rmd->aio_handle, &r56_request->data_it_nexus);
5826 put_unaligned_le32(rmd->p_parity_it_nexus, &r56_request->p_parity_it_nexus);
5827 if (rmd->raid_level == SA_RAID_6) {
5828 put_unaligned_le32(rmd->q_parity_it_nexus, &r56_request->q_parity_it_nexus);
5829 r56_request->xor_multiplier = rmd->xor_mult;
5830 }
5831 put_unaligned_le32(scsi_bufflen(scmd), &r56_request->data_length);
5832 r56_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5833 put_unaligned_le64(rmd->row, &r56_request->row);
5834
5835 put_unaligned_le16(io_request->index, &r56_request->request_id);
5836 r56_request->error_index = r56_request->request_id;
5837
5838 if (rmd->cdb_length > sizeof(r56_request->cdb))
5839 rmd->cdb_length = sizeof(r56_request->cdb);
5840 r56_request->cdb_length = rmd->cdb_length;
5841 memcpy(r56_request->cdb, rmd->cdb, rmd->cdb_length);
5842
5843 /* The direction is always write. */
5844 r56_request->data_direction = SOP_READ_FLAG;
5845
5846 if (encryption_info) {
5847 r56_request->encryption_enable = true;
5848 put_unaligned_le16(encryption_info->data_encryption_key_index,
5849 &r56_request->data_encryption_key_index);
5850 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5851 &r56_request->encrypt_tweak_lower);
5852 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5853 &r56_request->encrypt_tweak_upper);
5854 }
5855
5856 rc = pqi_build_aio_r56_sg_list(ctrl_info, r56_request, scmd, io_request);
5857 if (rc) {
5858 pqi_free_io_request(io_request);
5859 return SCSI_MLQUEUE_HOST_BUSY;
5860 }
5861
5862 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5863
5864 return 0;
5865 }
5866
pqi_get_hw_queue(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd)5867 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info,
5868 struct scsi_cmnd *scmd)
5869 {
5870 /*
5871 * We are setting host_tagset = 1 during init.
5872 */
5873 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scsi_cmd_to_rq(scmd)));
5874 }
5875
pqi_is_bypass_eligible_request(struct scsi_cmnd * scmd)5876 static inline bool pqi_is_bypass_eligible_request(struct scsi_cmnd *scmd)
5877 {
5878 if (blk_rq_is_passthrough(scsi_cmd_to_rq(scmd)))
5879 return false;
5880
5881 return pqi_cmd_priv(scmd)->this_residual == 0;
5882 }
5883
5884 /*
5885 * This function gets called just before we hand the completed SCSI request
5886 * back to the SML.
5887 */
5888
pqi_prep_for_scsi_done(struct scsi_cmnd * scmd)5889 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd)
5890 {
5891 struct pqi_scsi_dev *device;
5892 struct completion *wait;
5893
5894 if (!scmd->device) {
5895 set_host_byte(scmd, DID_NO_CONNECT);
5896 return;
5897 }
5898
5899 device = scmd->device->hostdata;
5900 if (!device) {
5901 set_host_byte(scmd, DID_NO_CONNECT);
5902 return;
5903 }
5904
5905 atomic_dec(&device->scsi_cmds_outstanding[scmd->device->lun]);
5906
5907 wait = (struct completion *)xchg(&scmd->host_scribble, NULL);
5908 if (wait != PQI_NO_COMPLETION)
5909 complete(wait);
5910 }
5911
pqi_is_parity_write_stream(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd)5912 static bool pqi_is_parity_write_stream(struct pqi_ctrl_info *ctrl_info,
5913 struct scsi_cmnd *scmd)
5914 {
5915 u32 oldest_jiffies;
5916 u8 lru_index;
5917 int i;
5918 int rc;
5919 struct pqi_scsi_dev *device;
5920 struct pqi_stream_data *pqi_stream_data;
5921 struct pqi_scsi_dev_raid_map_data rmd = { 0 };
5922
5923 if (!ctrl_info->enable_stream_detection)
5924 return false;
5925
5926 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd);
5927 if (rc)
5928 return false;
5929
5930 /* Check writes only. */
5931 if (!rmd.is_write)
5932 return false;
5933
5934 device = scmd->device->hostdata;
5935
5936 /* Check for RAID 5/6 streams. */
5937 if (device->raid_level != SA_RAID_5 && device->raid_level != SA_RAID_6)
5938 return false;
5939
5940 /*
5941 * If controller does not support AIO RAID{5,6} writes, need to send
5942 * requests down non-AIO path.
5943 */
5944 if ((device->raid_level == SA_RAID_5 && !ctrl_info->enable_r5_writes) ||
5945 (device->raid_level == SA_RAID_6 && !ctrl_info->enable_r6_writes))
5946 return true;
5947
5948 lru_index = 0;
5949 oldest_jiffies = INT_MAX;
5950 for (i = 0; i < NUM_STREAMS_PER_LUN; i++) {
5951 pqi_stream_data = &device->stream_data[i];
5952 /*
5953 * Check for adjacent request or request is within
5954 * the previous request.
5955 */
5956 if ((pqi_stream_data->next_lba &&
5957 rmd.first_block >= pqi_stream_data->next_lba) &&
5958 rmd.first_block <= pqi_stream_data->next_lba +
5959 rmd.block_cnt) {
5960 pqi_stream_data->next_lba = rmd.first_block +
5961 rmd.block_cnt;
5962 pqi_stream_data->last_accessed = jiffies;
5963 return true;
5964 }
5965
5966 /* unused entry */
5967 if (pqi_stream_data->last_accessed == 0) {
5968 lru_index = i;
5969 break;
5970 }
5971
5972 /* Find entry with oldest last accessed time. */
5973 if (pqi_stream_data->last_accessed <= oldest_jiffies) {
5974 oldest_jiffies = pqi_stream_data->last_accessed;
5975 lru_index = i;
5976 }
5977 }
5978
5979 /* Set LRU entry. */
5980 pqi_stream_data = &device->stream_data[lru_index];
5981 pqi_stream_data->last_accessed = jiffies;
5982 pqi_stream_data->next_lba = rmd.first_block + rmd.block_cnt;
5983
5984 return false;
5985 }
5986
pqi_scsi_queue_command(struct Scsi_Host * shost,struct scsi_cmnd * scmd)5987 static int pqi_scsi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
5988 {
5989 int rc;
5990 struct pqi_ctrl_info *ctrl_info;
5991 struct pqi_scsi_dev *device;
5992 u16 hw_queue;
5993 struct pqi_queue_group *queue_group;
5994 bool raid_bypassed;
5995 u8 lun;
5996
5997 scmd->host_scribble = PQI_NO_COMPLETION;
5998
5999 device = scmd->device->hostdata;
6000
6001 if (!device) {
6002 set_host_byte(scmd, DID_NO_CONNECT);
6003 pqi_scsi_done(scmd);
6004 return 0;
6005 }
6006
6007 lun = (u8)scmd->device->lun;
6008
6009 atomic_inc(&device->scsi_cmds_outstanding[lun]);
6010
6011 ctrl_info = shost_to_hba(shost);
6012
6013 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(device)) {
6014 set_host_byte(scmd, DID_NO_CONNECT);
6015 pqi_scsi_done(scmd);
6016 return 0;
6017 }
6018
6019 if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device, lun)) {
6020 rc = SCSI_MLQUEUE_HOST_BUSY;
6021 goto out;
6022 }
6023
6024 /*
6025 * This is necessary because the SML doesn't zero out this field during
6026 * error recovery.
6027 */
6028 scmd->result = 0;
6029
6030 hw_queue = pqi_get_hw_queue(ctrl_info, scmd);
6031 queue_group = &ctrl_info->queue_groups[hw_queue];
6032
6033 if (pqi_is_logical_device(device)) {
6034 raid_bypassed = false;
6035 if (device->raid_bypass_enabled &&
6036 pqi_is_bypass_eligible_request(scmd) &&
6037 !pqi_is_parity_write_stream(ctrl_info, scmd)) {
6038 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
6039 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) {
6040 raid_bypassed = true;
6041 device->raid_bypass_cnt++;
6042 }
6043 }
6044 if (!raid_bypassed)
6045 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
6046 } else {
6047 if (device->aio_enabled)
6048 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
6049 else
6050 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
6051 }
6052
6053 out:
6054 if (rc) {
6055 scmd->host_scribble = NULL;
6056 atomic_dec(&device->scsi_cmds_outstanding[lun]);
6057 }
6058
6059 return rc;
6060 }
6061
pqi_queued_io_count(struct pqi_ctrl_info * ctrl_info)6062 static unsigned int pqi_queued_io_count(struct pqi_ctrl_info *ctrl_info)
6063 {
6064 unsigned int i;
6065 unsigned int path;
6066 unsigned long flags;
6067 unsigned int queued_io_count;
6068 struct pqi_queue_group *queue_group;
6069 struct pqi_io_request *io_request;
6070
6071 queued_io_count = 0;
6072
6073 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
6074 queue_group = &ctrl_info->queue_groups[i];
6075 for (path = 0; path < 2; path++) {
6076 spin_lock_irqsave(&queue_group->submit_lock[path], flags);
6077 list_for_each_entry(io_request, &queue_group->request_list[path], request_list_entry)
6078 queued_io_count++;
6079 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags);
6080 }
6081 }
6082
6083 return queued_io_count;
6084 }
6085
pqi_nonempty_inbound_queue_count(struct pqi_ctrl_info * ctrl_info)6086 static unsigned int pqi_nonempty_inbound_queue_count(struct pqi_ctrl_info *ctrl_info)
6087 {
6088 unsigned int i;
6089 unsigned int path;
6090 unsigned int nonempty_inbound_queue_count;
6091 struct pqi_queue_group *queue_group;
6092 pqi_index_t iq_pi;
6093 pqi_index_t iq_ci;
6094
6095 nonempty_inbound_queue_count = 0;
6096
6097 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
6098 queue_group = &ctrl_info->queue_groups[i];
6099 for (path = 0; path < 2; path++) {
6100 iq_pi = queue_group->iq_pi_copy[path];
6101 iq_ci = readl(queue_group->iq_ci[path]);
6102 if (iq_ci != iq_pi)
6103 nonempty_inbound_queue_count++;
6104 }
6105 }
6106
6107 return nonempty_inbound_queue_count;
6108 }
6109
6110 #define PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS 10
6111
pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info * ctrl_info)6112 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info)
6113 {
6114 unsigned long start_jiffies;
6115 unsigned long warning_timeout;
6116 unsigned int queued_io_count;
6117 unsigned int nonempty_inbound_queue_count;
6118 bool displayed_warning;
6119
6120 displayed_warning = false;
6121 start_jiffies = jiffies;
6122 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * HZ) + start_jiffies;
6123
6124 while (1) {
6125 queued_io_count = pqi_queued_io_count(ctrl_info);
6126 nonempty_inbound_queue_count = pqi_nonempty_inbound_queue_count(ctrl_info);
6127 if (queued_io_count == 0 && nonempty_inbound_queue_count == 0)
6128 break;
6129 pqi_check_ctrl_health(ctrl_info);
6130 if (pqi_ctrl_offline(ctrl_info))
6131 return -ENXIO;
6132 if (time_after(jiffies, warning_timeout)) {
6133 dev_warn(&ctrl_info->pci_dev->dev,
6134 "waiting %u seconds for queued I/O to drain (queued I/O count: %u; non-empty inbound queue count: %u)\n",
6135 jiffies_to_msecs(jiffies - start_jiffies) / 1000, queued_io_count, nonempty_inbound_queue_count);
6136 displayed_warning = true;
6137 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * HZ) + jiffies;
6138 }
6139 usleep_range(1000, 2000);
6140 }
6141
6142 if (displayed_warning)
6143 dev_warn(&ctrl_info->pci_dev->dev,
6144 "queued I/O drained after waiting for %u seconds\n",
6145 jiffies_to_msecs(jiffies - start_jiffies) / 1000);
6146
6147 return 0;
6148 }
6149
pqi_fail_io_queued_for_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,u8 lun)6150 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info,
6151 struct pqi_scsi_dev *device, u8 lun)
6152 {
6153 unsigned int i;
6154 unsigned int path;
6155 struct pqi_queue_group *queue_group;
6156 unsigned long flags;
6157 struct pqi_io_request *io_request;
6158 struct pqi_io_request *next;
6159 struct scsi_cmnd *scmd;
6160 struct pqi_scsi_dev *scsi_device;
6161
6162 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
6163 queue_group = &ctrl_info->queue_groups[i];
6164
6165 for (path = 0; path < 2; path++) {
6166 spin_lock_irqsave(
6167 &queue_group->submit_lock[path], flags);
6168
6169 list_for_each_entry_safe(io_request, next,
6170 &queue_group->request_list[path],
6171 request_list_entry) {
6172
6173 scmd = io_request->scmd;
6174 if (!scmd)
6175 continue;
6176
6177 scsi_device = scmd->device->hostdata;
6178 if (scsi_device != device)
6179 continue;
6180
6181 if ((u8)scmd->device->lun != lun)
6182 continue;
6183
6184 list_del(&io_request->request_list_entry);
6185 set_host_byte(scmd, DID_RESET);
6186 pqi_free_io_request(io_request);
6187 scsi_dma_unmap(scmd);
6188 pqi_scsi_done(scmd);
6189 }
6190
6191 spin_unlock_irqrestore(
6192 &queue_group->submit_lock[path], flags);
6193 }
6194 }
6195 }
6196
6197 #define PQI_PENDING_IO_WARNING_TIMEOUT_SECS 10
6198
pqi_device_wait_for_pending_io(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,u8 lun,unsigned long timeout_msecs)6199 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
6200 struct pqi_scsi_dev *device, u8 lun, unsigned long timeout_msecs)
6201 {
6202 int cmds_outstanding;
6203 unsigned long start_jiffies;
6204 unsigned long warning_timeout;
6205 unsigned long msecs_waiting;
6206
6207 start_jiffies = jiffies;
6208 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * HZ) + start_jiffies;
6209
6210 while ((cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding[lun])) > 0) {
6211 if (ctrl_info->ctrl_removal_state != PQI_CTRL_GRACEFUL_REMOVAL) {
6212 pqi_check_ctrl_health(ctrl_info);
6213 if (pqi_ctrl_offline(ctrl_info))
6214 return -ENXIO;
6215 }
6216 msecs_waiting = jiffies_to_msecs(jiffies - start_jiffies);
6217 if (msecs_waiting >= timeout_msecs) {
6218 dev_err(&ctrl_info->pci_dev->dev,
6219 "scsi %d:%d:%d:%d: timed out after %lu seconds waiting for %d outstanding command(s)\n",
6220 ctrl_info->scsi_host->host_no, device->bus, device->target,
6221 lun, msecs_waiting / 1000, cmds_outstanding);
6222 return -ETIMEDOUT;
6223 }
6224 if (time_after(jiffies, warning_timeout)) {
6225 dev_warn(&ctrl_info->pci_dev->dev,
6226 "scsi %d:%d:%d:%d: waiting %lu seconds for %d outstanding command(s)\n",
6227 ctrl_info->scsi_host->host_no, device->bus, device->target,
6228 lun, msecs_waiting / 1000, cmds_outstanding);
6229 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * HZ) + jiffies;
6230 }
6231 usleep_range(1000, 2000);
6232 }
6233
6234 return 0;
6235 }
6236
pqi_lun_reset_complete(struct pqi_io_request * io_request,void * context)6237 static void pqi_lun_reset_complete(struct pqi_io_request *io_request,
6238 void *context)
6239 {
6240 struct completion *waiting = context;
6241
6242 complete(waiting);
6243 }
6244
6245 #define PQI_LUN_RESET_POLL_COMPLETION_SECS 10
6246
pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,u8 lun,struct completion * wait)6247 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info,
6248 struct pqi_scsi_dev *device, u8 lun, struct completion *wait)
6249 {
6250 int rc;
6251 unsigned int wait_secs;
6252 int cmds_outstanding;
6253
6254 wait_secs = 0;
6255
6256 while (1) {
6257 if (wait_for_completion_io_timeout(wait,
6258 PQI_LUN_RESET_POLL_COMPLETION_SECS * HZ)) {
6259 rc = 0;
6260 break;
6261 }
6262
6263 pqi_check_ctrl_health(ctrl_info);
6264 if (pqi_ctrl_offline(ctrl_info)) {
6265 rc = -ENXIO;
6266 break;
6267 }
6268
6269 wait_secs += PQI_LUN_RESET_POLL_COMPLETION_SECS;
6270 cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding[lun]);
6271 dev_warn(&ctrl_info->pci_dev->dev,
6272 "scsi %d:%d:%d:%d: waiting %u seconds for LUN reset to complete (%d command(s) outstanding)\n",
6273 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, wait_secs, cmds_outstanding);
6274 }
6275
6276 return rc;
6277 }
6278
6279 #define PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS 30
6280
pqi_lun_reset(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,u8 lun)6281 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun)
6282 {
6283 int rc;
6284 struct pqi_io_request *io_request;
6285 DECLARE_COMPLETION_ONSTACK(wait);
6286 struct pqi_task_management_request *request;
6287
6288 io_request = pqi_alloc_io_request(ctrl_info, NULL);
6289 io_request->io_complete_callback = pqi_lun_reset_complete;
6290 io_request->context = &wait;
6291
6292 request = io_request->iu;
6293 memset(request, 0, sizeof(*request));
6294
6295 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT;
6296 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH,
6297 &request->header.iu_length);
6298 put_unaligned_le16(io_request->index, &request->request_id);
6299 memcpy(request->lun_number, device->scsi3addr,
6300 sizeof(request->lun_number));
6301 if (!pqi_is_logical_device(device) && ctrl_info->multi_lun_device_supported)
6302 request->ml_device_lun_number = lun;
6303 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET;
6304 if (ctrl_info->tmf_iu_timeout_supported)
6305 put_unaligned_le16(PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS, &request->timeout);
6306
6307 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
6308 io_request);
6309
6310 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, lun, &wait);
6311 if (rc == 0)
6312 rc = io_request->status;
6313
6314 pqi_free_io_request(io_request);
6315
6316 return rc;
6317 }
6318
6319 #define PQI_LUN_RESET_RETRIES 3
6320 #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS (10 * 1000)
6321 #define PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS (10 * 60 * 1000)
6322 #define PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS (2 * 60 * 1000)
6323
pqi_lun_reset_with_retries(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,u8 lun)6324 static int pqi_lun_reset_with_retries(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun)
6325 {
6326 int reset_rc;
6327 int wait_rc;
6328 unsigned int retries;
6329 unsigned long timeout_msecs;
6330
6331 for (retries = 0;;) {
6332 reset_rc = pqi_lun_reset(ctrl_info, device, lun);
6333 if (reset_rc == 0 || reset_rc == -ENODEV || reset_rc == -ENXIO || ++retries > PQI_LUN_RESET_RETRIES)
6334 break;
6335 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS);
6336 }
6337
6338 timeout_msecs = reset_rc ? PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS :
6339 PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS;
6340
6341 wait_rc = pqi_device_wait_for_pending_io(ctrl_info, device, lun, timeout_msecs);
6342 if (wait_rc && reset_rc == 0)
6343 reset_rc = wait_rc;
6344
6345 return reset_rc == 0 ? SUCCESS : FAILED;
6346 }
6347
pqi_device_reset(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,u8 lun)6348 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun)
6349 {
6350 int rc;
6351
6352 pqi_ctrl_block_requests(ctrl_info);
6353 pqi_ctrl_wait_until_quiesced(ctrl_info);
6354 pqi_fail_io_queued_for_device(ctrl_info, device, lun);
6355 rc = pqi_wait_until_inbound_queues_empty(ctrl_info);
6356 pqi_device_reset_start(device, lun);
6357 pqi_ctrl_unblock_requests(ctrl_info);
6358 if (rc)
6359 rc = FAILED;
6360 else
6361 rc = pqi_lun_reset_with_retries(ctrl_info, device, lun);
6362 pqi_device_reset_done(device, lun);
6363
6364 return rc;
6365 }
6366
pqi_device_reset_handler(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,u8 lun,struct scsi_cmnd * scmd,u8 scsi_opcode)6367 static int pqi_device_reset_handler(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun, struct scsi_cmnd *scmd, u8 scsi_opcode)
6368 {
6369 int rc;
6370
6371 mutex_lock(&ctrl_info->lun_reset_mutex);
6372
6373 dev_err(&ctrl_info->pci_dev->dev,
6374 "resetting scsi %d:%d:%d:%u SCSI cmd at %p due to cmd opcode 0x%02x\n",
6375 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, scmd, scsi_opcode);
6376
6377 pqi_check_ctrl_health(ctrl_info);
6378 if (pqi_ctrl_offline(ctrl_info))
6379 rc = FAILED;
6380 else
6381 rc = pqi_device_reset(ctrl_info, device, lun);
6382
6383 dev_err(&ctrl_info->pci_dev->dev,
6384 "reset of scsi %d:%d:%d:%u: %s\n",
6385 ctrl_info->scsi_host->host_no, device->bus, device->target, lun,
6386 rc == SUCCESS ? "SUCCESS" : "FAILED");
6387
6388 mutex_unlock(&ctrl_info->lun_reset_mutex);
6389
6390 return rc;
6391 }
6392
pqi_eh_device_reset_handler(struct scsi_cmnd * scmd)6393 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd)
6394 {
6395 struct Scsi_Host *shost;
6396 struct pqi_ctrl_info *ctrl_info;
6397 struct pqi_scsi_dev *device;
6398 u8 scsi_opcode;
6399
6400 shost = scmd->device->host;
6401 ctrl_info = shost_to_hba(shost);
6402 device = scmd->device->hostdata;
6403 scsi_opcode = scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff;
6404
6405 return pqi_device_reset_handler(ctrl_info, device, (u8)scmd->device->lun, scmd, scsi_opcode);
6406 }
6407
pqi_tmf_worker(struct work_struct * work)6408 static void pqi_tmf_worker(struct work_struct *work)
6409 {
6410 struct pqi_tmf_work *tmf_work;
6411 struct scsi_cmnd *scmd;
6412
6413 tmf_work = container_of(work, struct pqi_tmf_work, work_struct);
6414 scmd = (struct scsi_cmnd *)xchg(&tmf_work->scmd, NULL);
6415
6416 pqi_device_reset_handler(tmf_work->ctrl_info, tmf_work->device, tmf_work->lun, scmd, tmf_work->scsi_opcode);
6417 }
6418
pqi_eh_abort_handler(struct scsi_cmnd * scmd)6419 static int pqi_eh_abort_handler(struct scsi_cmnd *scmd)
6420 {
6421 struct Scsi_Host *shost;
6422 struct pqi_ctrl_info *ctrl_info;
6423 struct pqi_scsi_dev *device;
6424 struct pqi_tmf_work *tmf_work;
6425 DECLARE_COMPLETION_ONSTACK(wait);
6426
6427 shost = scmd->device->host;
6428 ctrl_info = shost_to_hba(shost);
6429 device = scmd->device->hostdata;
6430
6431 dev_err(&ctrl_info->pci_dev->dev,
6432 "attempting TASK ABORT on scsi %d:%d:%d:%d for SCSI cmd at %p\n",
6433 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd);
6434
6435 if (cmpxchg(&scmd->host_scribble, PQI_NO_COMPLETION, (void *)&wait) == NULL) {
6436 dev_err(&ctrl_info->pci_dev->dev,
6437 "scsi %d:%d:%d:%d for SCSI cmd at %p already completed\n",
6438 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd);
6439 scmd->result = DID_RESET << 16;
6440 goto out;
6441 }
6442
6443 tmf_work = &device->tmf_work[scmd->device->lun];
6444
6445 if (cmpxchg(&tmf_work->scmd, NULL, scmd) == NULL) {
6446 tmf_work->ctrl_info = ctrl_info;
6447 tmf_work->device = device;
6448 tmf_work->lun = (u8)scmd->device->lun;
6449 tmf_work->scsi_opcode = scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff;
6450 schedule_work(&tmf_work->work_struct);
6451 }
6452
6453 wait_for_completion(&wait);
6454
6455 dev_err(&ctrl_info->pci_dev->dev,
6456 "TASK ABORT on scsi %d:%d:%d:%d for SCSI cmd at %p: SUCCESS\n",
6457 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd);
6458
6459 out:
6460
6461 return SUCCESS;
6462 }
6463
pqi_slave_alloc(struct scsi_device * sdev)6464 static int pqi_slave_alloc(struct scsi_device *sdev)
6465 {
6466 struct pqi_scsi_dev *device;
6467 unsigned long flags;
6468 struct pqi_ctrl_info *ctrl_info;
6469 struct scsi_target *starget;
6470 struct sas_rphy *rphy;
6471
6472 ctrl_info = shost_to_hba(sdev->host);
6473
6474 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6475
6476 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) {
6477 starget = scsi_target(sdev);
6478 rphy = target_to_rphy(starget);
6479 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy);
6480 if (device) {
6481 if (device->target_lun_valid) {
6482 device->ignore_device = true;
6483 } else {
6484 device->target = sdev_id(sdev);
6485 device->lun = sdev->lun;
6486 device->target_lun_valid = true;
6487 }
6488 }
6489 } else {
6490 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev),
6491 sdev_id(sdev), sdev->lun);
6492 }
6493
6494 if (device) {
6495 sdev->hostdata = device;
6496 device->sdev = sdev;
6497 if (device->queue_depth) {
6498 device->advertised_queue_depth = device->queue_depth;
6499 scsi_change_queue_depth(sdev,
6500 device->advertised_queue_depth);
6501 }
6502 if (pqi_is_logical_device(device)) {
6503 pqi_disable_write_same(sdev);
6504 } else {
6505 sdev->allow_restart = 1;
6506 if (device->device_type == SA_DEVICE_TYPE_NVME)
6507 pqi_disable_write_same(sdev);
6508 }
6509 }
6510
6511 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6512
6513 return 0;
6514 }
6515
pqi_map_queues(struct Scsi_Host * shost)6516 static void pqi_map_queues(struct Scsi_Host *shost)
6517 {
6518 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6519
6520 if (!ctrl_info->disable_managed_interrupts)
6521 return blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT],
6522 ctrl_info->pci_dev, 0);
6523 else
6524 return blk_mq_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT]);
6525 }
6526
pqi_is_tape_changer_device(struct pqi_scsi_dev * device)6527 static inline bool pqi_is_tape_changer_device(struct pqi_scsi_dev *device)
6528 {
6529 return device->devtype == TYPE_TAPE || device->devtype == TYPE_MEDIUM_CHANGER;
6530 }
6531
pqi_slave_configure(struct scsi_device * sdev)6532 static int pqi_slave_configure(struct scsi_device *sdev)
6533 {
6534 int rc = 0;
6535 struct pqi_scsi_dev *device;
6536
6537 device = sdev->hostdata;
6538 device->devtype = sdev->type;
6539
6540 if (pqi_is_tape_changer_device(device) && device->ignore_device) {
6541 rc = -ENXIO;
6542 device->ignore_device = false;
6543 }
6544
6545 return rc;
6546 }
6547
pqi_slave_destroy(struct scsi_device * sdev)6548 static void pqi_slave_destroy(struct scsi_device *sdev)
6549 {
6550 struct pqi_ctrl_info *ctrl_info;
6551 struct pqi_scsi_dev *device;
6552 int mutex_acquired;
6553 unsigned long flags;
6554
6555 ctrl_info = shost_to_hba(sdev->host);
6556
6557 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex);
6558 if (!mutex_acquired)
6559 return;
6560
6561 device = sdev->hostdata;
6562 if (!device) {
6563 mutex_unlock(&ctrl_info->scan_mutex);
6564 return;
6565 }
6566
6567 device->lun_count--;
6568 if (device->lun_count > 0) {
6569 mutex_unlock(&ctrl_info->scan_mutex);
6570 return;
6571 }
6572
6573 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6574 list_del(&device->scsi_device_list_entry);
6575 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6576
6577 mutex_unlock(&ctrl_info->scan_mutex);
6578
6579 pqi_dev_info(ctrl_info, "removed", device);
6580 pqi_free_device(device);
6581 }
6582
pqi_getpciinfo_ioctl(struct pqi_ctrl_info * ctrl_info,void __user * arg)6583 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
6584 {
6585 struct pci_dev *pci_dev;
6586 u32 subsystem_vendor;
6587 u32 subsystem_device;
6588 cciss_pci_info_struct pci_info;
6589
6590 if (!arg)
6591 return -EINVAL;
6592
6593 pci_dev = ctrl_info->pci_dev;
6594
6595 pci_info.domain = pci_domain_nr(pci_dev->bus);
6596 pci_info.bus = pci_dev->bus->number;
6597 pci_info.dev_fn = pci_dev->devfn;
6598 subsystem_vendor = pci_dev->subsystem_vendor;
6599 subsystem_device = pci_dev->subsystem_device;
6600 pci_info.board_id = ((subsystem_device << 16) & 0xffff0000) | subsystem_vendor;
6601
6602 if (copy_to_user(arg, &pci_info, sizeof(pci_info)))
6603 return -EFAULT;
6604
6605 return 0;
6606 }
6607
pqi_getdrivver_ioctl(void __user * arg)6608 static int pqi_getdrivver_ioctl(void __user *arg)
6609 {
6610 u32 version;
6611
6612 if (!arg)
6613 return -EINVAL;
6614
6615 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) |
6616 (DRIVER_RELEASE << 16) | DRIVER_REVISION;
6617
6618 if (copy_to_user(arg, &version, sizeof(version)))
6619 return -EFAULT;
6620
6621 return 0;
6622 }
6623
6624 struct ciss_error_info {
6625 u8 scsi_status;
6626 int command_status;
6627 size_t sense_data_length;
6628 };
6629
pqi_error_info_to_ciss(struct pqi_raid_error_info * pqi_error_info,struct ciss_error_info * ciss_error_info)6630 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info,
6631 struct ciss_error_info *ciss_error_info)
6632 {
6633 int ciss_cmd_status;
6634 size_t sense_data_length;
6635
6636 switch (pqi_error_info->data_out_result) {
6637 case PQI_DATA_IN_OUT_GOOD:
6638 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS;
6639 break;
6640 case PQI_DATA_IN_OUT_UNDERFLOW:
6641 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN;
6642 break;
6643 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
6644 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN;
6645 break;
6646 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
6647 case PQI_DATA_IN_OUT_BUFFER_ERROR:
6648 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
6649 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
6650 case PQI_DATA_IN_OUT_ERROR:
6651 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR;
6652 break;
6653 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
6654 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
6655 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
6656 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
6657 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
6658 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
6659 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
6660 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
6661 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
6662 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
6663 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR;
6664 break;
6665 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
6666 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT;
6667 break;
6668 case PQI_DATA_IN_OUT_ABORTED:
6669 ciss_cmd_status = CISS_CMD_STATUS_ABORTED;
6670 break;
6671 case PQI_DATA_IN_OUT_TIMEOUT:
6672 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT;
6673 break;
6674 default:
6675 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS;
6676 break;
6677 }
6678
6679 sense_data_length =
6680 get_unaligned_le16(&pqi_error_info->sense_data_length);
6681 if (sense_data_length == 0)
6682 sense_data_length =
6683 get_unaligned_le16(&pqi_error_info->response_data_length);
6684 if (sense_data_length)
6685 if (sense_data_length > sizeof(pqi_error_info->data))
6686 sense_data_length = sizeof(pqi_error_info->data);
6687
6688 ciss_error_info->scsi_status = pqi_error_info->status;
6689 ciss_error_info->command_status = ciss_cmd_status;
6690 ciss_error_info->sense_data_length = sense_data_length;
6691 }
6692
pqi_passthru_ioctl(struct pqi_ctrl_info * ctrl_info,void __user * arg)6693 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
6694 {
6695 int rc;
6696 char *kernel_buffer = NULL;
6697 u16 iu_length;
6698 size_t sense_data_length;
6699 IOCTL_Command_struct iocommand;
6700 struct pqi_raid_path_request request;
6701 struct pqi_raid_error_info pqi_error_info;
6702 struct ciss_error_info ciss_error_info;
6703
6704 if (pqi_ctrl_offline(ctrl_info))
6705 return -ENXIO;
6706 if (pqi_ofa_in_progress(ctrl_info) && pqi_ctrl_blocked(ctrl_info))
6707 return -EBUSY;
6708 if (!arg)
6709 return -EINVAL;
6710 if (!capable(CAP_SYS_RAWIO))
6711 return -EPERM;
6712 if (copy_from_user(&iocommand, arg, sizeof(iocommand)))
6713 return -EFAULT;
6714 if (iocommand.buf_size < 1 &&
6715 iocommand.Request.Type.Direction != XFER_NONE)
6716 return -EINVAL;
6717 if (iocommand.Request.CDBLen > sizeof(request.cdb))
6718 return -EINVAL;
6719 if (iocommand.Request.Type.Type != TYPE_CMD)
6720 return -EINVAL;
6721
6722 switch (iocommand.Request.Type.Direction) {
6723 case XFER_NONE:
6724 case XFER_WRITE:
6725 case XFER_READ:
6726 case XFER_READ | XFER_WRITE:
6727 break;
6728 default:
6729 return -EINVAL;
6730 }
6731
6732 if (iocommand.buf_size > 0) {
6733 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL);
6734 if (!kernel_buffer)
6735 return -ENOMEM;
6736 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6737 if (copy_from_user(kernel_buffer, iocommand.buf,
6738 iocommand.buf_size)) {
6739 rc = -EFAULT;
6740 goto out;
6741 }
6742 } else {
6743 memset(kernel_buffer, 0, iocommand.buf_size);
6744 }
6745 }
6746
6747 memset(&request, 0, sizeof(request));
6748
6749 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
6750 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
6751 PQI_REQUEST_HEADER_LENGTH;
6752 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes,
6753 sizeof(request.lun_number));
6754 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen);
6755 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
6756
6757 switch (iocommand.Request.Type.Direction) {
6758 case XFER_NONE:
6759 request.data_direction = SOP_NO_DIRECTION_FLAG;
6760 break;
6761 case XFER_WRITE:
6762 request.data_direction = SOP_WRITE_FLAG;
6763 break;
6764 case XFER_READ:
6765 request.data_direction = SOP_READ_FLAG;
6766 break;
6767 case XFER_READ | XFER_WRITE:
6768 request.data_direction = SOP_BIDIRECTIONAL;
6769 break;
6770 }
6771
6772 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
6773
6774 if (iocommand.buf_size > 0) {
6775 put_unaligned_le32(iocommand.buf_size, &request.buffer_length);
6776
6777 rc = pqi_map_single(ctrl_info->pci_dev,
6778 &request.sg_descriptors[0], kernel_buffer,
6779 iocommand.buf_size, DMA_BIDIRECTIONAL);
6780 if (rc)
6781 goto out;
6782
6783 iu_length += sizeof(request.sg_descriptors[0]);
6784 }
6785
6786 put_unaligned_le16(iu_length, &request.header.iu_length);
6787
6788 if (ctrl_info->raid_iu_timeout_supported)
6789 put_unaligned_le32(iocommand.Request.Timeout, &request.timeout);
6790
6791 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6792 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info);
6793
6794 if (iocommand.buf_size > 0)
6795 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1,
6796 DMA_BIDIRECTIONAL);
6797
6798 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info));
6799
6800 if (rc == 0) {
6801 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info);
6802 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status;
6803 iocommand.error_info.CommandStatus =
6804 ciss_error_info.command_status;
6805 sense_data_length = ciss_error_info.sense_data_length;
6806 if (sense_data_length) {
6807 if (sense_data_length >
6808 sizeof(iocommand.error_info.SenseInfo))
6809 sense_data_length =
6810 sizeof(iocommand.error_info.SenseInfo);
6811 memcpy(iocommand.error_info.SenseInfo,
6812 pqi_error_info.data, sense_data_length);
6813 iocommand.error_info.SenseLen = sense_data_length;
6814 }
6815 }
6816
6817 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) {
6818 rc = -EFAULT;
6819 goto out;
6820 }
6821
6822 if (rc == 0 && iocommand.buf_size > 0 &&
6823 (iocommand.Request.Type.Direction & XFER_READ)) {
6824 if (copy_to_user(iocommand.buf, kernel_buffer,
6825 iocommand.buf_size)) {
6826 rc = -EFAULT;
6827 }
6828 }
6829
6830 out:
6831 kfree(kernel_buffer);
6832
6833 return rc;
6834 }
6835
pqi_ioctl(struct scsi_device * sdev,unsigned int cmd,void __user * arg)6836 static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd,
6837 void __user *arg)
6838 {
6839 int rc;
6840 struct pqi_ctrl_info *ctrl_info;
6841
6842 ctrl_info = shost_to_hba(sdev->host);
6843
6844 switch (cmd) {
6845 case CCISS_DEREGDISK:
6846 case CCISS_REGNEWDISK:
6847 case CCISS_REGNEWD:
6848 rc = pqi_scan_scsi_devices(ctrl_info);
6849 break;
6850 case CCISS_GETPCIINFO:
6851 rc = pqi_getpciinfo_ioctl(ctrl_info, arg);
6852 break;
6853 case CCISS_GETDRIVVER:
6854 rc = pqi_getdrivver_ioctl(arg);
6855 break;
6856 case CCISS_PASSTHRU:
6857 rc = pqi_passthru_ioctl(ctrl_info, arg);
6858 break;
6859 default:
6860 rc = -EINVAL;
6861 break;
6862 }
6863
6864 return rc;
6865 }
6866
pqi_firmware_version_show(struct device * dev,struct device_attribute * attr,char * buffer)6867 static ssize_t pqi_firmware_version_show(struct device *dev,
6868 struct device_attribute *attr, char *buffer)
6869 {
6870 struct Scsi_Host *shost;
6871 struct pqi_ctrl_info *ctrl_info;
6872
6873 shost = class_to_shost(dev);
6874 ctrl_info = shost_to_hba(shost);
6875
6876 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version);
6877 }
6878
pqi_driver_version_show(struct device * dev,struct device_attribute * attr,char * buffer)6879 static ssize_t pqi_driver_version_show(struct device *dev,
6880 struct device_attribute *attr, char *buffer)
6881 {
6882 return scnprintf(buffer, PAGE_SIZE, "%s\n", DRIVER_VERSION BUILD_TIMESTAMP);
6883 }
6884
pqi_serial_number_show(struct device * dev,struct device_attribute * attr,char * buffer)6885 static ssize_t pqi_serial_number_show(struct device *dev,
6886 struct device_attribute *attr, char *buffer)
6887 {
6888 struct Scsi_Host *shost;
6889 struct pqi_ctrl_info *ctrl_info;
6890
6891 shost = class_to_shost(dev);
6892 ctrl_info = shost_to_hba(shost);
6893
6894 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number);
6895 }
6896
pqi_model_show(struct device * dev,struct device_attribute * attr,char * buffer)6897 static ssize_t pqi_model_show(struct device *dev,
6898 struct device_attribute *attr, char *buffer)
6899 {
6900 struct Scsi_Host *shost;
6901 struct pqi_ctrl_info *ctrl_info;
6902
6903 shost = class_to_shost(dev);
6904 ctrl_info = shost_to_hba(shost);
6905
6906 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model);
6907 }
6908
pqi_vendor_show(struct device * dev,struct device_attribute * attr,char * buffer)6909 static ssize_t pqi_vendor_show(struct device *dev,
6910 struct device_attribute *attr, char *buffer)
6911 {
6912 struct Scsi_Host *shost;
6913 struct pqi_ctrl_info *ctrl_info;
6914
6915 shost = class_to_shost(dev);
6916 ctrl_info = shost_to_hba(shost);
6917
6918 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor);
6919 }
6920
pqi_host_rescan_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6921 static ssize_t pqi_host_rescan_store(struct device *dev,
6922 struct device_attribute *attr, const char *buffer, size_t count)
6923 {
6924 struct Scsi_Host *shost = class_to_shost(dev);
6925
6926 pqi_scan_start(shost);
6927
6928 return count;
6929 }
6930
pqi_lockup_action_show(struct device * dev,struct device_attribute * attr,char * buffer)6931 static ssize_t pqi_lockup_action_show(struct device *dev,
6932 struct device_attribute *attr, char *buffer)
6933 {
6934 int count = 0;
6935 unsigned int i;
6936
6937 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6938 if (pqi_lockup_actions[i].action == pqi_lockup_action)
6939 count += scnprintf(buffer + count, PAGE_SIZE - count,
6940 "[%s] ", pqi_lockup_actions[i].name);
6941 else
6942 count += scnprintf(buffer + count, PAGE_SIZE - count,
6943 "%s ", pqi_lockup_actions[i].name);
6944 }
6945
6946 count += scnprintf(buffer + count, PAGE_SIZE - count, "\n");
6947
6948 return count;
6949 }
6950
pqi_lockup_action_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6951 static ssize_t pqi_lockup_action_store(struct device *dev,
6952 struct device_attribute *attr, const char *buffer, size_t count)
6953 {
6954 unsigned int i;
6955 char *action_name;
6956 char action_name_buffer[32];
6957
6958 strscpy(action_name_buffer, buffer, sizeof(action_name_buffer));
6959 action_name = strstrip(action_name_buffer);
6960
6961 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6962 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) {
6963 pqi_lockup_action = pqi_lockup_actions[i].action;
6964 return count;
6965 }
6966 }
6967
6968 return -EINVAL;
6969 }
6970
pqi_host_enable_stream_detection_show(struct device * dev,struct device_attribute * attr,char * buffer)6971 static ssize_t pqi_host_enable_stream_detection_show(struct device *dev,
6972 struct device_attribute *attr, char *buffer)
6973 {
6974 struct Scsi_Host *shost = class_to_shost(dev);
6975 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6976
6977 return scnprintf(buffer, 10, "%x\n",
6978 ctrl_info->enable_stream_detection);
6979 }
6980
pqi_host_enable_stream_detection_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6981 static ssize_t pqi_host_enable_stream_detection_store(struct device *dev,
6982 struct device_attribute *attr, const char *buffer, size_t count)
6983 {
6984 struct Scsi_Host *shost = class_to_shost(dev);
6985 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6986 u8 set_stream_detection = 0;
6987
6988 if (kstrtou8(buffer, 0, &set_stream_detection))
6989 return -EINVAL;
6990
6991 if (set_stream_detection > 0)
6992 set_stream_detection = 1;
6993
6994 ctrl_info->enable_stream_detection = set_stream_detection;
6995
6996 return count;
6997 }
6998
pqi_host_enable_r5_writes_show(struct device * dev,struct device_attribute * attr,char * buffer)6999 static ssize_t pqi_host_enable_r5_writes_show(struct device *dev,
7000 struct device_attribute *attr, char *buffer)
7001 {
7002 struct Scsi_Host *shost = class_to_shost(dev);
7003 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
7004
7005 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r5_writes);
7006 }
7007
pqi_host_enable_r5_writes_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)7008 static ssize_t pqi_host_enable_r5_writes_store(struct device *dev,
7009 struct device_attribute *attr, const char *buffer, size_t count)
7010 {
7011 struct Scsi_Host *shost = class_to_shost(dev);
7012 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
7013 u8 set_r5_writes = 0;
7014
7015 if (kstrtou8(buffer, 0, &set_r5_writes))
7016 return -EINVAL;
7017
7018 if (set_r5_writes > 0)
7019 set_r5_writes = 1;
7020
7021 ctrl_info->enable_r5_writes = set_r5_writes;
7022
7023 return count;
7024 }
7025
pqi_host_enable_r6_writes_show(struct device * dev,struct device_attribute * attr,char * buffer)7026 static ssize_t pqi_host_enable_r6_writes_show(struct device *dev,
7027 struct device_attribute *attr, char *buffer)
7028 {
7029 struct Scsi_Host *shost = class_to_shost(dev);
7030 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
7031
7032 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r6_writes);
7033 }
7034
pqi_host_enable_r6_writes_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)7035 static ssize_t pqi_host_enable_r6_writes_store(struct device *dev,
7036 struct device_attribute *attr, const char *buffer, size_t count)
7037 {
7038 struct Scsi_Host *shost = class_to_shost(dev);
7039 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
7040 u8 set_r6_writes = 0;
7041
7042 if (kstrtou8(buffer, 0, &set_r6_writes))
7043 return -EINVAL;
7044
7045 if (set_r6_writes > 0)
7046 set_r6_writes = 1;
7047
7048 ctrl_info->enable_r6_writes = set_r6_writes;
7049
7050 return count;
7051 }
7052
7053 static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL);
7054 static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL);
7055 static DEVICE_ATTR(model, 0444, pqi_model_show, NULL);
7056 static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL);
7057 static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL);
7058 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store);
7059 static DEVICE_ATTR(lockup_action, 0644, pqi_lockup_action_show,
7060 pqi_lockup_action_store);
7061 static DEVICE_ATTR(enable_stream_detection, 0644,
7062 pqi_host_enable_stream_detection_show,
7063 pqi_host_enable_stream_detection_store);
7064 static DEVICE_ATTR(enable_r5_writes, 0644,
7065 pqi_host_enable_r5_writes_show, pqi_host_enable_r5_writes_store);
7066 static DEVICE_ATTR(enable_r6_writes, 0644,
7067 pqi_host_enable_r6_writes_show, pqi_host_enable_r6_writes_store);
7068
7069 static struct attribute *pqi_shost_attrs[] = {
7070 &dev_attr_driver_version.attr,
7071 &dev_attr_firmware_version.attr,
7072 &dev_attr_model.attr,
7073 &dev_attr_serial_number.attr,
7074 &dev_attr_vendor.attr,
7075 &dev_attr_rescan.attr,
7076 &dev_attr_lockup_action.attr,
7077 &dev_attr_enable_stream_detection.attr,
7078 &dev_attr_enable_r5_writes.attr,
7079 &dev_attr_enable_r6_writes.attr,
7080 NULL
7081 };
7082
7083 ATTRIBUTE_GROUPS(pqi_shost);
7084
pqi_unique_id_show(struct device * dev,struct device_attribute * attr,char * buffer)7085 static ssize_t pqi_unique_id_show(struct device *dev,
7086 struct device_attribute *attr, char *buffer)
7087 {
7088 struct pqi_ctrl_info *ctrl_info;
7089 struct scsi_device *sdev;
7090 struct pqi_scsi_dev *device;
7091 unsigned long flags;
7092 u8 unique_id[16];
7093
7094 sdev = to_scsi_device(dev);
7095 ctrl_info = shost_to_hba(sdev->host);
7096
7097 if (pqi_ctrl_offline(ctrl_info))
7098 return -ENODEV;
7099
7100 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7101
7102 device = sdev->hostdata;
7103 if (!device) {
7104 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7105 return -ENODEV;
7106 }
7107
7108 if (device->is_physical_device)
7109 memcpy(unique_id, device->wwid, sizeof(device->wwid));
7110 else
7111 memcpy(unique_id, device->volume_id, sizeof(device->volume_id));
7112
7113 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7114
7115 return scnprintf(buffer, PAGE_SIZE,
7116 "%02X%02X%02X%02X%02X%02X%02X%02X"
7117 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
7118 unique_id[0], unique_id[1], unique_id[2], unique_id[3],
7119 unique_id[4], unique_id[5], unique_id[6], unique_id[7],
7120 unique_id[8], unique_id[9], unique_id[10], unique_id[11],
7121 unique_id[12], unique_id[13], unique_id[14], unique_id[15]);
7122 }
7123
pqi_lunid_show(struct device * dev,struct device_attribute * attr,char * buffer)7124 static ssize_t pqi_lunid_show(struct device *dev,
7125 struct device_attribute *attr, char *buffer)
7126 {
7127 struct pqi_ctrl_info *ctrl_info;
7128 struct scsi_device *sdev;
7129 struct pqi_scsi_dev *device;
7130 unsigned long flags;
7131 u8 lunid[8];
7132
7133 sdev = to_scsi_device(dev);
7134 ctrl_info = shost_to_hba(sdev->host);
7135
7136 if (pqi_ctrl_offline(ctrl_info))
7137 return -ENODEV;
7138
7139 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7140
7141 device = sdev->hostdata;
7142 if (!device) {
7143 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7144 return -ENODEV;
7145 }
7146
7147 memcpy(lunid, device->scsi3addr, sizeof(lunid));
7148
7149 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7150
7151 return scnprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid);
7152 }
7153
7154 #define MAX_PATHS 8
7155
pqi_path_info_show(struct device * dev,struct device_attribute * attr,char * buf)7156 static ssize_t pqi_path_info_show(struct device *dev,
7157 struct device_attribute *attr, char *buf)
7158 {
7159 struct pqi_ctrl_info *ctrl_info;
7160 struct scsi_device *sdev;
7161 struct pqi_scsi_dev *device;
7162 unsigned long flags;
7163 int i;
7164 int output_len = 0;
7165 u8 box;
7166 u8 bay;
7167 u8 path_map_index;
7168 char *active;
7169 u8 phys_connector[2];
7170
7171 sdev = to_scsi_device(dev);
7172 ctrl_info = shost_to_hba(sdev->host);
7173
7174 if (pqi_ctrl_offline(ctrl_info))
7175 return -ENODEV;
7176
7177 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7178
7179 device = sdev->hostdata;
7180 if (!device) {
7181 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7182 return -ENODEV;
7183 }
7184
7185 bay = device->bay;
7186 for (i = 0; i < MAX_PATHS; i++) {
7187 path_map_index = 1 << i;
7188 if (i == device->active_path_index)
7189 active = "Active";
7190 else if (device->path_map & path_map_index)
7191 active = "Inactive";
7192 else
7193 continue;
7194
7195 output_len += scnprintf(buf + output_len,
7196 PAGE_SIZE - output_len,
7197 "[%d:%d:%d:%d] %20.20s ",
7198 ctrl_info->scsi_host->host_no,
7199 device->bus, device->target,
7200 device->lun,
7201 scsi_device_type(device->devtype));
7202
7203 if (device->devtype == TYPE_RAID ||
7204 pqi_is_logical_device(device))
7205 goto end_buffer;
7206
7207 memcpy(&phys_connector, &device->phys_connector[i],
7208 sizeof(phys_connector));
7209 if (phys_connector[0] < '0')
7210 phys_connector[0] = '0';
7211 if (phys_connector[1] < '0')
7212 phys_connector[1] = '0';
7213
7214 output_len += scnprintf(buf + output_len,
7215 PAGE_SIZE - output_len,
7216 "PORT: %.2s ", phys_connector);
7217
7218 box = device->box[i];
7219 if (box != 0 && box != 0xFF)
7220 output_len += scnprintf(buf + output_len,
7221 PAGE_SIZE - output_len,
7222 "BOX: %hhu ", box);
7223
7224 if ((device->devtype == TYPE_DISK ||
7225 device->devtype == TYPE_ZBC) &&
7226 pqi_expose_device(device))
7227 output_len += scnprintf(buf + output_len,
7228 PAGE_SIZE - output_len,
7229 "BAY: %hhu ", bay);
7230
7231 end_buffer:
7232 output_len += scnprintf(buf + output_len,
7233 PAGE_SIZE - output_len,
7234 "%s\n", active);
7235 }
7236
7237 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7238
7239 return output_len;
7240 }
7241
pqi_sas_address_show(struct device * dev,struct device_attribute * attr,char * buffer)7242 static ssize_t pqi_sas_address_show(struct device *dev,
7243 struct device_attribute *attr, char *buffer)
7244 {
7245 struct pqi_ctrl_info *ctrl_info;
7246 struct scsi_device *sdev;
7247 struct pqi_scsi_dev *device;
7248 unsigned long flags;
7249 u64 sas_address;
7250
7251 sdev = to_scsi_device(dev);
7252 ctrl_info = shost_to_hba(sdev->host);
7253
7254 if (pqi_ctrl_offline(ctrl_info))
7255 return -ENODEV;
7256
7257 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7258
7259 device = sdev->hostdata;
7260 if (!device) {
7261 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7262 return -ENODEV;
7263 }
7264
7265 sas_address = device->sas_address;
7266
7267 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7268
7269 return scnprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address);
7270 }
7271
pqi_ssd_smart_path_enabled_show(struct device * dev,struct device_attribute * attr,char * buffer)7272 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev,
7273 struct device_attribute *attr, char *buffer)
7274 {
7275 struct pqi_ctrl_info *ctrl_info;
7276 struct scsi_device *sdev;
7277 struct pqi_scsi_dev *device;
7278 unsigned long flags;
7279
7280 sdev = to_scsi_device(dev);
7281 ctrl_info = shost_to_hba(sdev->host);
7282
7283 if (pqi_ctrl_offline(ctrl_info))
7284 return -ENODEV;
7285
7286 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7287
7288 device = sdev->hostdata;
7289 if (!device) {
7290 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7291 return -ENODEV;
7292 }
7293
7294 buffer[0] = device->raid_bypass_enabled ? '1' : '0';
7295 buffer[1] = '\n';
7296 buffer[2] = '\0';
7297
7298 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7299
7300 return 2;
7301 }
7302
pqi_raid_level_show(struct device * dev,struct device_attribute * attr,char * buffer)7303 static ssize_t pqi_raid_level_show(struct device *dev,
7304 struct device_attribute *attr, char *buffer)
7305 {
7306 struct pqi_ctrl_info *ctrl_info;
7307 struct scsi_device *sdev;
7308 struct pqi_scsi_dev *device;
7309 unsigned long flags;
7310 char *raid_level;
7311
7312 sdev = to_scsi_device(dev);
7313 ctrl_info = shost_to_hba(sdev->host);
7314
7315 if (pqi_ctrl_offline(ctrl_info))
7316 return -ENODEV;
7317
7318 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7319
7320 device = sdev->hostdata;
7321 if (!device) {
7322 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7323 return -ENODEV;
7324 }
7325
7326 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK)
7327 raid_level = pqi_raid_level_to_string(device->raid_level);
7328 else
7329 raid_level = "N/A";
7330
7331 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7332
7333 return scnprintf(buffer, PAGE_SIZE, "%s\n", raid_level);
7334 }
7335
pqi_raid_bypass_cnt_show(struct device * dev,struct device_attribute * attr,char * buffer)7336 static ssize_t pqi_raid_bypass_cnt_show(struct device *dev,
7337 struct device_attribute *attr, char *buffer)
7338 {
7339 struct pqi_ctrl_info *ctrl_info;
7340 struct scsi_device *sdev;
7341 struct pqi_scsi_dev *device;
7342 unsigned long flags;
7343 unsigned int raid_bypass_cnt;
7344
7345 sdev = to_scsi_device(dev);
7346 ctrl_info = shost_to_hba(sdev->host);
7347
7348 if (pqi_ctrl_offline(ctrl_info))
7349 return -ENODEV;
7350
7351 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7352
7353 device = sdev->hostdata;
7354 if (!device) {
7355 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7356 return -ENODEV;
7357 }
7358
7359 raid_bypass_cnt = device->raid_bypass_cnt;
7360
7361 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7362
7363 return scnprintf(buffer, PAGE_SIZE, "0x%x\n", raid_bypass_cnt);
7364 }
7365
pqi_sas_ncq_prio_enable_show(struct device * dev,struct device_attribute * attr,char * buf)7366 static ssize_t pqi_sas_ncq_prio_enable_show(struct device *dev,
7367 struct device_attribute *attr, char *buf)
7368 {
7369 struct pqi_ctrl_info *ctrl_info;
7370 struct scsi_device *sdev;
7371 struct pqi_scsi_dev *device;
7372 unsigned long flags;
7373 int output_len = 0;
7374
7375 sdev = to_scsi_device(dev);
7376 ctrl_info = shost_to_hba(sdev->host);
7377
7378 if (pqi_ctrl_offline(ctrl_info))
7379 return -ENODEV;
7380
7381 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7382
7383 device = sdev->hostdata;
7384 if (!device) {
7385 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7386 return -ENODEV;
7387 }
7388
7389 output_len = snprintf(buf, PAGE_SIZE, "%d\n",
7390 device->ncq_prio_enable);
7391 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7392
7393 return output_len;
7394 }
7395
pqi_sas_ncq_prio_enable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)7396 static ssize_t pqi_sas_ncq_prio_enable_store(struct device *dev,
7397 struct device_attribute *attr,
7398 const char *buf, size_t count)
7399 {
7400 struct pqi_ctrl_info *ctrl_info;
7401 struct scsi_device *sdev;
7402 struct pqi_scsi_dev *device;
7403 unsigned long flags;
7404 u8 ncq_prio_enable = 0;
7405
7406 if (kstrtou8(buf, 0, &ncq_prio_enable))
7407 return -EINVAL;
7408
7409 sdev = to_scsi_device(dev);
7410 ctrl_info = shost_to_hba(sdev->host);
7411
7412 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
7413
7414 device = sdev->hostdata;
7415
7416 if (!device) {
7417 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7418 return -ENODEV;
7419 }
7420
7421 if (!device->ncq_prio_support) {
7422 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7423 return -EINVAL;
7424 }
7425
7426 device->ncq_prio_enable = ncq_prio_enable;
7427
7428 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
7429
7430 return strlen(buf);
7431 }
7432
pqi_numa_node_show(struct device * dev,struct device_attribute * attr,char * buffer)7433 static ssize_t pqi_numa_node_show(struct device *dev,
7434 struct device_attribute *attr, char *buffer)
7435 {
7436 struct scsi_device *sdev;
7437 struct pqi_ctrl_info *ctrl_info;
7438
7439 sdev = to_scsi_device(dev);
7440 ctrl_info = shost_to_hba(sdev->host);
7441
7442 return scnprintf(buffer, PAGE_SIZE, "%d\n", ctrl_info->numa_node);
7443 }
7444
7445 static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL);
7446 static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL);
7447 static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL);
7448 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL);
7449 static DEVICE_ATTR(ssd_smart_path_enabled, 0444, pqi_ssd_smart_path_enabled_show, NULL);
7450 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL);
7451 static DEVICE_ATTR(raid_bypass_cnt, 0444, pqi_raid_bypass_cnt_show, NULL);
7452 static DEVICE_ATTR(sas_ncq_prio_enable, 0644,
7453 pqi_sas_ncq_prio_enable_show, pqi_sas_ncq_prio_enable_store);
7454 static DEVICE_ATTR(numa_node, 0444, pqi_numa_node_show, NULL);
7455
7456 static struct attribute *pqi_sdev_attrs[] = {
7457 &dev_attr_lunid.attr,
7458 &dev_attr_unique_id.attr,
7459 &dev_attr_path_info.attr,
7460 &dev_attr_sas_address.attr,
7461 &dev_attr_ssd_smart_path_enabled.attr,
7462 &dev_attr_raid_level.attr,
7463 &dev_attr_raid_bypass_cnt.attr,
7464 &dev_attr_sas_ncq_prio_enable.attr,
7465 &dev_attr_numa_node.attr,
7466 NULL
7467 };
7468
7469 ATTRIBUTE_GROUPS(pqi_sdev);
7470
7471 static const struct scsi_host_template pqi_driver_template = {
7472 .module = THIS_MODULE,
7473 .name = DRIVER_NAME_SHORT,
7474 .proc_name = DRIVER_NAME_SHORT,
7475 .queuecommand = pqi_scsi_queue_command,
7476 .scan_start = pqi_scan_start,
7477 .scan_finished = pqi_scan_finished,
7478 .this_id = -1,
7479 .eh_device_reset_handler = pqi_eh_device_reset_handler,
7480 .eh_abort_handler = pqi_eh_abort_handler,
7481 .ioctl = pqi_ioctl,
7482 .slave_alloc = pqi_slave_alloc,
7483 .slave_configure = pqi_slave_configure,
7484 .slave_destroy = pqi_slave_destroy,
7485 .map_queues = pqi_map_queues,
7486 .sdev_groups = pqi_sdev_groups,
7487 .shost_groups = pqi_shost_groups,
7488 .cmd_size = sizeof(struct pqi_cmd_priv),
7489 };
7490
pqi_register_scsi(struct pqi_ctrl_info * ctrl_info)7491 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info)
7492 {
7493 int rc;
7494 struct Scsi_Host *shost;
7495
7496 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info));
7497 if (!shost) {
7498 dev_err(&ctrl_info->pci_dev->dev, "scsi_host_alloc failed\n");
7499 return -ENOMEM;
7500 }
7501
7502 shost->io_port = 0;
7503 shost->n_io_port = 0;
7504 shost->this_id = -1;
7505 shost->max_channel = PQI_MAX_BUS;
7506 shost->max_cmd_len = MAX_COMMAND_SIZE;
7507 shost->max_lun = PQI_MAX_LUNS_PER_DEVICE;
7508 shost->max_id = ~0;
7509 shost->max_sectors = ctrl_info->max_sectors;
7510 shost->can_queue = ctrl_info->scsi_ml_can_queue;
7511 shost->cmd_per_lun = shost->can_queue;
7512 shost->sg_tablesize = ctrl_info->sg_tablesize;
7513 shost->transportt = pqi_sas_transport_template;
7514 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0);
7515 shost->unique_id = shost->irq;
7516 shost->nr_hw_queues = ctrl_info->num_queue_groups;
7517 shost->host_tagset = 1;
7518 shost->hostdata[0] = (unsigned long)ctrl_info;
7519
7520 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev);
7521 if (rc) {
7522 dev_err(&ctrl_info->pci_dev->dev, "scsi_add_host failed\n");
7523 goto free_host;
7524 }
7525
7526 rc = pqi_add_sas_host(shost, ctrl_info);
7527 if (rc) {
7528 dev_err(&ctrl_info->pci_dev->dev, "add SAS host failed\n");
7529 goto remove_host;
7530 }
7531
7532 ctrl_info->scsi_host = shost;
7533
7534 return 0;
7535
7536 remove_host:
7537 scsi_remove_host(shost);
7538 free_host:
7539 scsi_host_put(shost);
7540
7541 return rc;
7542 }
7543
pqi_unregister_scsi(struct pqi_ctrl_info * ctrl_info)7544 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info)
7545 {
7546 struct Scsi_Host *shost;
7547
7548 pqi_delete_sas_host(ctrl_info);
7549
7550 shost = ctrl_info->scsi_host;
7551 if (!shost)
7552 return;
7553
7554 scsi_remove_host(shost);
7555 scsi_host_put(shost);
7556 }
7557
pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info * ctrl_info)7558 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info)
7559 {
7560 int rc = 0;
7561 struct pqi_device_registers __iomem *pqi_registers;
7562 unsigned long timeout;
7563 unsigned int timeout_msecs;
7564 union pqi_reset_register reset_reg;
7565
7566 pqi_registers = ctrl_info->pqi_registers;
7567 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100;
7568 timeout = msecs_to_jiffies(timeout_msecs) + jiffies;
7569
7570 while (1) {
7571 msleep(PQI_RESET_POLL_INTERVAL_MSECS);
7572 reset_reg.all_bits = readl(&pqi_registers->device_reset);
7573 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED)
7574 break;
7575 if (!sis_is_firmware_running(ctrl_info)) {
7576 rc = -ENXIO;
7577 break;
7578 }
7579 if (time_after(jiffies, timeout)) {
7580 rc = -ETIMEDOUT;
7581 break;
7582 }
7583 }
7584
7585 return rc;
7586 }
7587
pqi_reset(struct pqi_ctrl_info * ctrl_info)7588 static int pqi_reset(struct pqi_ctrl_info *ctrl_info)
7589 {
7590 int rc;
7591 union pqi_reset_register reset_reg;
7592
7593 if (ctrl_info->pqi_reset_quiesce_supported) {
7594 rc = sis_pqi_reset_quiesce(ctrl_info);
7595 if (rc) {
7596 dev_err(&ctrl_info->pci_dev->dev,
7597 "PQI reset failed during quiesce with error %d\n", rc);
7598 return rc;
7599 }
7600 }
7601
7602 reset_reg.all_bits = 0;
7603 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET;
7604 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET;
7605
7606 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset);
7607
7608 rc = pqi_wait_for_pqi_reset_completion(ctrl_info);
7609 if (rc)
7610 dev_err(&ctrl_info->pci_dev->dev,
7611 "PQI reset failed with error %d\n", rc);
7612
7613 return rc;
7614 }
7615
pqi_get_ctrl_serial_number(struct pqi_ctrl_info * ctrl_info)7616 static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info)
7617 {
7618 int rc;
7619 struct bmic_sense_subsystem_info *sense_info;
7620
7621 sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL);
7622 if (!sense_info)
7623 return -ENOMEM;
7624
7625 rc = pqi_sense_subsystem_info(ctrl_info, sense_info);
7626 if (rc)
7627 goto out;
7628
7629 memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number,
7630 sizeof(sense_info->ctrl_serial_number));
7631 ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0';
7632
7633 out:
7634 kfree(sense_info);
7635
7636 return rc;
7637 }
7638
pqi_get_ctrl_product_details(struct pqi_ctrl_info * ctrl_info)7639 static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info)
7640 {
7641 int rc;
7642 struct bmic_identify_controller *identify;
7643
7644 identify = kmalloc(sizeof(*identify), GFP_KERNEL);
7645 if (!identify)
7646 return -ENOMEM;
7647
7648 rc = pqi_identify_controller(ctrl_info, identify);
7649 if (rc)
7650 goto out;
7651
7652 if (get_unaligned_le32(&identify->extra_controller_flags) &
7653 BMIC_IDENTIFY_EXTRA_FLAGS_LONG_FW_VERSION_SUPPORTED) {
7654 memcpy(ctrl_info->firmware_version,
7655 identify->firmware_version_long,
7656 sizeof(identify->firmware_version_long));
7657 } else {
7658 memcpy(ctrl_info->firmware_version,
7659 identify->firmware_version_short,
7660 sizeof(identify->firmware_version_short));
7661 ctrl_info->firmware_version
7662 [sizeof(identify->firmware_version_short)] = '\0';
7663 snprintf(ctrl_info->firmware_version +
7664 strlen(ctrl_info->firmware_version),
7665 sizeof(ctrl_info->firmware_version) -
7666 sizeof(identify->firmware_version_short),
7667 "-%u",
7668 get_unaligned_le16(&identify->firmware_build_number));
7669 }
7670
7671 memcpy(ctrl_info->model, identify->product_id,
7672 sizeof(identify->product_id));
7673 ctrl_info->model[sizeof(identify->product_id)] = '\0';
7674
7675 memcpy(ctrl_info->vendor, identify->vendor_id,
7676 sizeof(identify->vendor_id));
7677 ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0';
7678
7679 dev_info(&ctrl_info->pci_dev->dev,
7680 "Firmware version: %s\n", ctrl_info->firmware_version);
7681
7682 out:
7683 kfree(identify);
7684
7685 return rc;
7686 }
7687
7688 struct pqi_config_table_section_info {
7689 struct pqi_ctrl_info *ctrl_info;
7690 void *section;
7691 u32 section_offset;
7692 void __iomem *section_iomem_addr;
7693 };
7694
pqi_is_firmware_feature_supported(struct pqi_config_table_firmware_features * firmware_features,unsigned int bit_position)7695 static inline bool pqi_is_firmware_feature_supported(
7696 struct pqi_config_table_firmware_features *firmware_features,
7697 unsigned int bit_position)
7698 {
7699 unsigned int byte_index;
7700
7701 byte_index = bit_position / BITS_PER_BYTE;
7702
7703 if (byte_index >= le16_to_cpu(firmware_features->num_elements))
7704 return false;
7705
7706 return firmware_features->features_supported[byte_index] &
7707 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
7708 }
7709
pqi_is_firmware_feature_enabled(struct pqi_config_table_firmware_features * firmware_features,void __iomem * firmware_features_iomem_addr,unsigned int bit_position)7710 static inline bool pqi_is_firmware_feature_enabled(
7711 struct pqi_config_table_firmware_features *firmware_features,
7712 void __iomem *firmware_features_iomem_addr,
7713 unsigned int bit_position)
7714 {
7715 unsigned int byte_index;
7716 u8 __iomem *features_enabled_iomem_addr;
7717
7718 byte_index = (bit_position / BITS_PER_BYTE) +
7719 (le16_to_cpu(firmware_features->num_elements) * 2);
7720
7721 features_enabled_iomem_addr = firmware_features_iomem_addr +
7722 offsetof(struct pqi_config_table_firmware_features,
7723 features_supported) + byte_index;
7724
7725 return *((__force u8 *)features_enabled_iomem_addr) &
7726 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
7727 }
7728
pqi_request_firmware_feature(struct pqi_config_table_firmware_features * firmware_features,unsigned int bit_position)7729 static inline void pqi_request_firmware_feature(
7730 struct pqi_config_table_firmware_features *firmware_features,
7731 unsigned int bit_position)
7732 {
7733 unsigned int byte_index;
7734
7735 byte_index = (bit_position / BITS_PER_BYTE) +
7736 le16_to_cpu(firmware_features->num_elements);
7737
7738 firmware_features->features_supported[byte_index] |=
7739 (1 << (bit_position % BITS_PER_BYTE));
7740 }
7741
pqi_config_table_update(struct pqi_ctrl_info * ctrl_info,u16 first_section,u16 last_section)7742 static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info,
7743 u16 first_section, u16 last_section)
7744 {
7745 struct pqi_vendor_general_request request;
7746
7747 memset(&request, 0, sizeof(request));
7748
7749 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
7750 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
7751 &request.header.iu_length);
7752 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE,
7753 &request.function_code);
7754 put_unaligned_le16(first_section,
7755 &request.data.config_table_update.first_section);
7756 put_unaligned_le16(last_section,
7757 &request.data.config_table_update.last_section);
7758
7759 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
7760 }
7761
pqi_enable_firmware_features(struct pqi_ctrl_info * ctrl_info,struct pqi_config_table_firmware_features * firmware_features,void __iomem * firmware_features_iomem_addr)7762 static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info,
7763 struct pqi_config_table_firmware_features *firmware_features,
7764 void __iomem *firmware_features_iomem_addr)
7765 {
7766 void *features_requested;
7767 void __iomem *features_requested_iomem_addr;
7768 void __iomem *host_max_known_feature_iomem_addr;
7769
7770 features_requested = firmware_features->features_supported +
7771 le16_to_cpu(firmware_features->num_elements);
7772
7773 features_requested_iomem_addr = firmware_features_iomem_addr +
7774 (features_requested - (void *)firmware_features);
7775
7776 memcpy_toio(features_requested_iomem_addr, features_requested,
7777 le16_to_cpu(firmware_features->num_elements));
7778
7779 if (pqi_is_firmware_feature_supported(firmware_features,
7780 PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE)) {
7781 host_max_known_feature_iomem_addr =
7782 features_requested_iomem_addr +
7783 (le16_to_cpu(firmware_features->num_elements) * 2) +
7784 sizeof(__le16);
7785 writeb(PQI_FIRMWARE_FEATURE_MAXIMUM & 0xFF, host_max_known_feature_iomem_addr);
7786 writeb((PQI_FIRMWARE_FEATURE_MAXIMUM & 0xFF00) >> 8, host_max_known_feature_iomem_addr + 1);
7787 }
7788
7789 return pqi_config_table_update(ctrl_info,
7790 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES,
7791 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES);
7792 }
7793
7794 struct pqi_firmware_feature {
7795 char *feature_name;
7796 unsigned int feature_bit;
7797 bool supported;
7798 bool enabled;
7799 void (*feature_status)(struct pqi_ctrl_info *ctrl_info,
7800 struct pqi_firmware_feature *firmware_feature);
7801 };
7802
pqi_firmware_feature_status(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)7803 static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info,
7804 struct pqi_firmware_feature *firmware_feature)
7805 {
7806 if (!firmware_feature->supported) {
7807 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n",
7808 firmware_feature->feature_name);
7809 return;
7810 }
7811
7812 if (firmware_feature->enabled) {
7813 dev_info(&ctrl_info->pci_dev->dev,
7814 "%s enabled\n", firmware_feature->feature_name);
7815 return;
7816 }
7817
7818 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n",
7819 firmware_feature->feature_name);
7820 }
7821
pqi_ctrl_update_feature_flags(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)7822 static void pqi_ctrl_update_feature_flags(struct pqi_ctrl_info *ctrl_info,
7823 struct pqi_firmware_feature *firmware_feature)
7824 {
7825 switch (firmware_feature->feature_bit) {
7826 case PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS:
7827 ctrl_info->enable_r1_writes = firmware_feature->enabled;
7828 break;
7829 case PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS:
7830 ctrl_info->enable_r5_writes = firmware_feature->enabled;
7831 break;
7832 case PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS:
7833 ctrl_info->enable_r6_writes = firmware_feature->enabled;
7834 break;
7835 case PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE:
7836 ctrl_info->soft_reset_handshake_supported =
7837 firmware_feature->enabled &&
7838 pqi_read_soft_reset_status(ctrl_info);
7839 break;
7840 case PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT:
7841 ctrl_info->raid_iu_timeout_supported = firmware_feature->enabled;
7842 break;
7843 case PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT:
7844 ctrl_info->tmf_iu_timeout_supported = firmware_feature->enabled;
7845 break;
7846 case PQI_FIRMWARE_FEATURE_FW_TRIAGE:
7847 ctrl_info->firmware_triage_supported = firmware_feature->enabled;
7848 pqi_save_fw_triage_setting(ctrl_info, firmware_feature->enabled);
7849 break;
7850 case PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5:
7851 ctrl_info->rpl_extended_format_4_5_supported = firmware_feature->enabled;
7852 break;
7853 case PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT:
7854 ctrl_info->multi_lun_device_supported = firmware_feature->enabled;
7855 break;
7856 }
7857
7858 pqi_firmware_feature_status(ctrl_info, firmware_feature);
7859 }
7860
pqi_firmware_feature_update(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)7861 static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info,
7862 struct pqi_firmware_feature *firmware_feature)
7863 {
7864 if (firmware_feature->feature_status)
7865 firmware_feature->feature_status(ctrl_info, firmware_feature);
7866 }
7867
7868 static DEFINE_MUTEX(pqi_firmware_features_mutex);
7869
7870 static struct pqi_firmware_feature pqi_firmware_features[] = {
7871 {
7872 .feature_name = "Online Firmware Activation",
7873 .feature_bit = PQI_FIRMWARE_FEATURE_OFA,
7874 .feature_status = pqi_firmware_feature_status,
7875 },
7876 {
7877 .feature_name = "Serial Management Protocol",
7878 .feature_bit = PQI_FIRMWARE_FEATURE_SMP,
7879 .feature_status = pqi_firmware_feature_status,
7880 },
7881 {
7882 .feature_name = "Maximum Known Feature",
7883 .feature_bit = PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE,
7884 .feature_status = pqi_firmware_feature_status,
7885 },
7886 {
7887 .feature_name = "RAID 0 Read Bypass",
7888 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS,
7889 .feature_status = pqi_firmware_feature_status,
7890 },
7891 {
7892 .feature_name = "RAID 1 Read Bypass",
7893 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS,
7894 .feature_status = pqi_firmware_feature_status,
7895 },
7896 {
7897 .feature_name = "RAID 5 Read Bypass",
7898 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS,
7899 .feature_status = pqi_firmware_feature_status,
7900 },
7901 {
7902 .feature_name = "RAID 6 Read Bypass",
7903 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS,
7904 .feature_status = pqi_firmware_feature_status,
7905 },
7906 {
7907 .feature_name = "RAID 0 Write Bypass",
7908 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS,
7909 .feature_status = pqi_firmware_feature_status,
7910 },
7911 {
7912 .feature_name = "RAID 1 Write Bypass",
7913 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS,
7914 .feature_status = pqi_ctrl_update_feature_flags,
7915 },
7916 {
7917 .feature_name = "RAID 5 Write Bypass",
7918 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS,
7919 .feature_status = pqi_ctrl_update_feature_flags,
7920 },
7921 {
7922 .feature_name = "RAID 6 Write Bypass",
7923 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS,
7924 .feature_status = pqi_ctrl_update_feature_flags,
7925 },
7926 {
7927 .feature_name = "New Soft Reset Handshake",
7928 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE,
7929 .feature_status = pqi_ctrl_update_feature_flags,
7930 },
7931 {
7932 .feature_name = "RAID IU Timeout",
7933 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT,
7934 .feature_status = pqi_ctrl_update_feature_flags,
7935 },
7936 {
7937 .feature_name = "TMF IU Timeout",
7938 .feature_bit = PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT,
7939 .feature_status = pqi_ctrl_update_feature_flags,
7940 },
7941 {
7942 .feature_name = "RAID Bypass on encrypted logical volumes on NVMe",
7943 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME,
7944 .feature_status = pqi_firmware_feature_status,
7945 },
7946 {
7947 .feature_name = "Firmware Triage",
7948 .feature_bit = PQI_FIRMWARE_FEATURE_FW_TRIAGE,
7949 .feature_status = pqi_ctrl_update_feature_flags,
7950 },
7951 {
7952 .feature_name = "RPL Extended Formats 4 and 5",
7953 .feature_bit = PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5,
7954 .feature_status = pqi_ctrl_update_feature_flags,
7955 },
7956 {
7957 .feature_name = "Multi-LUN Target",
7958 .feature_bit = PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT,
7959 .feature_status = pqi_ctrl_update_feature_flags,
7960 },
7961 };
7962
pqi_process_firmware_features(struct pqi_config_table_section_info * section_info)7963 static void pqi_process_firmware_features(
7964 struct pqi_config_table_section_info *section_info)
7965 {
7966 int rc;
7967 struct pqi_ctrl_info *ctrl_info;
7968 struct pqi_config_table_firmware_features *firmware_features;
7969 void __iomem *firmware_features_iomem_addr;
7970 unsigned int i;
7971 unsigned int num_features_supported;
7972
7973 ctrl_info = section_info->ctrl_info;
7974 firmware_features = section_info->section;
7975 firmware_features_iomem_addr = section_info->section_iomem_addr;
7976
7977 for (i = 0, num_features_supported = 0;
7978 i < ARRAY_SIZE(pqi_firmware_features); i++) {
7979 if (pqi_is_firmware_feature_supported(firmware_features,
7980 pqi_firmware_features[i].feature_bit)) {
7981 pqi_firmware_features[i].supported = true;
7982 num_features_supported++;
7983 } else {
7984 pqi_firmware_feature_update(ctrl_info,
7985 &pqi_firmware_features[i]);
7986 }
7987 }
7988
7989 if (num_features_supported == 0)
7990 return;
7991
7992 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
7993 if (!pqi_firmware_features[i].supported)
7994 continue;
7995 pqi_request_firmware_feature(firmware_features,
7996 pqi_firmware_features[i].feature_bit);
7997 }
7998
7999 rc = pqi_enable_firmware_features(ctrl_info, firmware_features,
8000 firmware_features_iomem_addr);
8001 if (rc) {
8002 dev_err(&ctrl_info->pci_dev->dev,
8003 "failed to enable firmware features in PQI configuration table\n");
8004 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
8005 if (!pqi_firmware_features[i].supported)
8006 continue;
8007 pqi_firmware_feature_update(ctrl_info,
8008 &pqi_firmware_features[i]);
8009 }
8010 return;
8011 }
8012
8013 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
8014 if (!pqi_firmware_features[i].supported)
8015 continue;
8016 if (pqi_is_firmware_feature_enabled(firmware_features,
8017 firmware_features_iomem_addr,
8018 pqi_firmware_features[i].feature_bit)) {
8019 pqi_firmware_features[i].enabled = true;
8020 }
8021 pqi_firmware_feature_update(ctrl_info,
8022 &pqi_firmware_features[i]);
8023 }
8024 }
8025
pqi_init_firmware_features(void)8026 static void pqi_init_firmware_features(void)
8027 {
8028 unsigned int i;
8029
8030 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
8031 pqi_firmware_features[i].supported = false;
8032 pqi_firmware_features[i].enabled = false;
8033 }
8034 }
8035
pqi_process_firmware_features_section(struct pqi_config_table_section_info * section_info)8036 static void pqi_process_firmware_features_section(
8037 struct pqi_config_table_section_info *section_info)
8038 {
8039 mutex_lock(&pqi_firmware_features_mutex);
8040 pqi_init_firmware_features();
8041 pqi_process_firmware_features(section_info);
8042 mutex_unlock(&pqi_firmware_features_mutex);
8043 }
8044
8045 /*
8046 * Reset all controller settings that can be initialized during the processing
8047 * of the PQI Configuration Table.
8048 */
8049
pqi_ctrl_reset_config(struct pqi_ctrl_info * ctrl_info)8050 static void pqi_ctrl_reset_config(struct pqi_ctrl_info *ctrl_info)
8051 {
8052 ctrl_info->heartbeat_counter = NULL;
8053 ctrl_info->soft_reset_status = NULL;
8054 ctrl_info->soft_reset_handshake_supported = false;
8055 ctrl_info->enable_r1_writes = false;
8056 ctrl_info->enable_r5_writes = false;
8057 ctrl_info->enable_r6_writes = false;
8058 ctrl_info->raid_iu_timeout_supported = false;
8059 ctrl_info->tmf_iu_timeout_supported = false;
8060 ctrl_info->firmware_triage_supported = false;
8061 ctrl_info->rpl_extended_format_4_5_supported = false;
8062 ctrl_info->multi_lun_device_supported = false;
8063 }
8064
pqi_process_config_table(struct pqi_ctrl_info * ctrl_info)8065 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info)
8066 {
8067 u32 table_length;
8068 u32 section_offset;
8069 bool firmware_feature_section_present;
8070 void __iomem *table_iomem_addr;
8071 struct pqi_config_table *config_table;
8072 struct pqi_config_table_section_header *section;
8073 struct pqi_config_table_section_info section_info;
8074 struct pqi_config_table_section_info feature_section_info = {0};
8075
8076 table_length = ctrl_info->config_table_length;
8077 if (table_length == 0)
8078 return 0;
8079
8080 config_table = kmalloc(table_length, GFP_KERNEL);
8081 if (!config_table) {
8082 dev_err(&ctrl_info->pci_dev->dev,
8083 "failed to allocate memory for PQI configuration table\n");
8084 return -ENOMEM;
8085 }
8086
8087 /*
8088 * Copy the config table contents from I/O memory space into the
8089 * temporary buffer.
8090 */
8091 table_iomem_addr = ctrl_info->iomem_base + ctrl_info->config_table_offset;
8092 memcpy_fromio(config_table, table_iomem_addr, table_length);
8093
8094 firmware_feature_section_present = false;
8095 section_info.ctrl_info = ctrl_info;
8096 section_offset = get_unaligned_le32(&config_table->first_section_offset);
8097
8098 while (section_offset) {
8099 section = (void *)config_table + section_offset;
8100
8101 section_info.section = section;
8102 section_info.section_offset = section_offset;
8103 section_info.section_iomem_addr = table_iomem_addr + section_offset;
8104
8105 switch (get_unaligned_le16(§ion->section_id)) {
8106 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES:
8107 firmware_feature_section_present = true;
8108 feature_section_info = section_info;
8109 break;
8110 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT:
8111 if (pqi_disable_heartbeat)
8112 dev_warn(&ctrl_info->pci_dev->dev,
8113 "heartbeat disabled by module parameter\n");
8114 else
8115 ctrl_info->heartbeat_counter =
8116 table_iomem_addr +
8117 section_offset +
8118 offsetof(struct pqi_config_table_heartbeat,
8119 heartbeat_counter);
8120 break;
8121 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET:
8122 ctrl_info->soft_reset_status =
8123 table_iomem_addr +
8124 section_offset +
8125 offsetof(struct pqi_config_table_soft_reset,
8126 soft_reset_status);
8127 break;
8128 }
8129
8130 section_offset = get_unaligned_le16(§ion->next_section_offset);
8131 }
8132
8133 /*
8134 * We process the firmware feature section after all other sections
8135 * have been processed so that the feature bit callbacks can take
8136 * into account the settings configured by other sections.
8137 */
8138 if (firmware_feature_section_present)
8139 pqi_process_firmware_features_section(&feature_section_info);
8140
8141 kfree(config_table);
8142
8143 return 0;
8144 }
8145
8146 /* Switches the controller from PQI mode back into SIS mode. */
8147
pqi_revert_to_sis_mode(struct pqi_ctrl_info * ctrl_info)8148 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info)
8149 {
8150 int rc;
8151
8152 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE);
8153 rc = pqi_reset(ctrl_info);
8154 if (rc)
8155 return rc;
8156 rc = sis_reenable_sis_mode(ctrl_info);
8157 if (rc) {
8158 dev_err(&ctrl_info->pci_dev->dev,
8159 "re-enabling SIS mode failed with error %d\n", rc);
8160 return rc;
8161 }
8162 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
8163
8164 return 0;
8165 }
8166
8167 /*
8168 * If the controller isn't already in SIS mode, this function forces it into
8169 * SIS mode.
8170 */
8171
pqi_force_sis_mode(struct pqi_ctrl_info * ctrl_info)8172 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info)
8173 {
8174 if (!sis_is_firmware_running(ctrl_info))
8175 return -ENXIO;
8176
8177 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE)
8178 return 0;
8179
8180 if (sis_is_kernel_up(ctrl_info)) {
8181 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
8182 return 0;
8183 }
8184
8185 return pqi_revert_to_sis_mode(ctrl_info);
8186 }
8187
pqi_perform_lockup_action(void)8188 static void pqi_perform_lockup_action(void)
8189 {
8190 switch (pqi_lockup_action) {
8191 case PANIC:
8192 panic("FATAL: Smart Family Controller lockup detected");
8193 break;
8194 case REBOOT:
8195 emergency_restart();
8196 break;
8197 case NONE:
8198 default:
8199 break;
8200 }
8201 }
8202
pqi_ctrl_init(struct pqi_ctrl_info * ctrl_info)8203 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
8204 {
8205 int rc;
8206 u32 product_id;
8207
8208 if (reset_devices) {
8209 if (pqi_is_fw_triage_supported(ctrl_info)) {
8210 rc = sis_wait_for_fw_triage_completion(ctrl_info);
8211 if (rc)
8212 return rc;
8213 }
8214 sis_soft_reset(ctrl_info);
8215 ssleep(PQI_POST_RESET_DELAY_SECS);
8216 } else {
8217 rc = pqi_force_sis_mode(ctrl_info);
8218 if (rc)
8219 return rc;
8220 }
8221
8222 /*
8223 * Wait until the controller is ready to start accepting SIS
8224 * commands.
8225 */
8226 rc = sis_wait_for_ctrl_ready(ctrl_info);
8227 if (rc) {
8228 if (reset_devices) {
8229 dev_err(&ctrl_info->pci_dev->dev,
8230 "kdump init failed with error %d\n", rc);
8231 pqi_lockup_action = REBOOT;
8232 pqi_perform_lockup_action();
8233 }
8234 return rc;
8235 }
8236
8237 /*
8238 * Get the controller properties. This allows us to determine
8239 * whether or not it supports PQI mode.
8240 */
8241 rc = sis_get_ctrl_properties(ctrl_info);
8242 if (rc) {
8243 dev_err(&ctrl_info->pci_dev->dev,
8244 "error obtaining controller properties\n");
8245 return rc;
8246 }
8247
8248 rc = sis_get_pqi_capabilities(ctrl_info);
8249 if (rc) {
8250 dev_err(&ctrl_info->pci_dev->dev,
8251 "error obtaining controller capabilities\n");
8252 return rc;
8253 }
8254
8255 product_id = sis_get_product_id(ctrl_info);
8256 ctrl_info->product_id = (u8)product_id;
8257 ctrl_info->product_revision = (u8)(product_id >> 8);
8258
8259 if (reset_devices) {
8260 if (ctrl_info->max_outstanding_requests >
8261 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP)
8262 ctrl_info->max_outstanding_requests =
8263 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP;
8264 } else {
8265 if (ctrl_info->max_outstanding_requests >
8266 PQI_MAX_OUTSTANDING_REQUESTS)
8267 ctrl_info->max_outstanding_requests =
8268 PQI_MAX_OUTSTANDING_REQUESTS;
8269 }
8270
8271 pqi_calculate_io_resources(ctrl_info);
8272
8273 rc = pqi_alloc_error_buffer(ctrl_info);
8274 if (rc) {
8275 dev_err(&ctrl_info->pci_dev->dev,
8276 "failed to allocate PQI error buffer\n");
8277 return rc;
8278 }
8279
8280 /*
8281 * If the function we are about to call succeeds, the
8282 * controller will transition from legacy SIS mode
8283 * into PQI mode.
8284 */
8285 rc = sis_init_base_struct_addr(ctrl_info);
8286 if (rc) {
8287 dev_err(&ctrl_info->pci_dev->dev,
8288 "error initializing PQI mode\n");
8289 return rc;
8290 }
8291
8292 /* Wait for the controller to complete the SIS -> PQI transition. */
8293 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
8294 if (rc) {
8295 dev_err(&ctrl_info->pci_dev->dev,
8296 "transition to PQI mode failed\n");
8297 return rc;
8298 }
8299
8300 /* From here on, we are running in PQI mode. */
8301 ctrl_info->pqi_mode_enabled = true;
8302 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
8303
8304 rc = pqi_alloc_admin_queues(ctrl_info);
8305 if (rc) {
8306 dev_err(&ctrl_info->pci_dev->dev,
8307 "failed to allocate admin queues\n");
8308 return rc;
8309 }
8310
8311 rc = pqi_create_admin_queues(ctrl_info);
8312 if (rc) {
8313 dev_err(&ctrl_info->pci_dev->dev,
8314 "error creating admin queues\n");
8315 return rc;
8316 }
8317
8318 rc = pqi_report_device_capability(ctrl_info);
8319 if (rc) {
8320 dev_err(&ctrl_info->pci_dev->dev,
8321 "obtaining device capability failed\n");
8322 return rc;
8323 }
8324
8325 rc = pqi_validate_device_capability(ctrl_info);
8326 if (rc)
8327 return rc;
8328
8329 pqi_calculate_queue_resources(ctrl_info);
8330
8331 rc = pqi_enable_msix_interrupts(ctrl_info);
8332 if (rc)
8333 return rc;
8334
8335 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) {
8336 ctrl_info->max_msix_vectors =
8337 ctrl_info->num_msix_vectors_enabled;
8338 pqi_calculate_queue_resources(ctrl_info);
8339 }
8340
8341 rc = pqi_alloc_io_resources(ctrl_info);
8342 if (rc)
8343 return rc;
8344
8345 rc = pqi_alloc_operational_queues(ctrl_info);
8346 if (rc) {
8347 dev_err(&ctrl_info->pci_dev->dev,
8348 "failed to allocate operational queues\n");
8349 return rc;
8350 }
8351
8352 pqi_init_operational_queues(ctrl_info);
8353
8354 rc = pqi_create_queues(ctrl_info);
8355 if (rc)
8356 return rc;
8357
8358 rc = pqi_request_irqs(ctrl_info);
8359 if (rc)
8360 return rc;
8361
8362 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
8363
8364 ctrl_info->controller_online = true;
8365
8366 rc = pqi_process_config_table(ctrl_info);
8367 if (rc)
8368 return rc;
8369
8370 pqi_start_heartbeat_timer(ctrl_info);
8371
8372 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) {
8373 rc = pqi_get_advanced_raid_bypass_config(ctrl_info);
8374 if (rc) { /* Supported features not returned correctly. */
8375 dev_err(&ctrl_info->pci_dev->dev,
8376 "error obtaining advanced RAID bypass configuration\n");
8377 return rc;
8378 }
8379 ctrl_info->ciss_report_log_flags |=
8380 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX;
8381 }
8382
8383 rc = pqi_enable_events(ctrl_info);
8384 if (rc) {
8385 dev_err(&ctrl_info->pci_dev->dev,
8386 "error enabling events\n");
8387 return rc;
8388 }
8389
8390 /* Register with the SCSI subsystem. */
8391 rc = pqi_register_scsi(ctrl_info);
8392 if (rc)
8393 return rc;
8394
8395 rc = pqi_get_ctrl_product_details(ctrl_info);
8396 if (rc) {
8397 dev_err(&ctrl_info->pci_dev->dev,
8398 "error obtaining product details\n");
8399 return rc;
8400 }
8401
8402 rc = pqi_get_ctrl_serial_number(ctrl_info);
8403 if (rc) {
8404 dev_err(&ctrl_info->pci_dev->dev,
8405 "error obtaining ctrl serial number\n");
8406 return rc;
8407 }
8408
8409 rc = pqi_set_diag_rescan(ctrl_info);
8410 if (rc) {
8411 dev_err(&ctrl_info->pci_dev->dev,
8412 "error enabling multi-lun rescan\n");
8413 return rc;
8414 }
8415
8416 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
8417 if (rc) {
8418 dev_err(&ctrl_info->pci_dev->dev,
8419 "error updating host wellness\n");
8420 return rc;
8421 }
8422
8423 pqi_schedule_update_time_worker(ctrl_info);
8424
8425 pqi_scan_scsi_devices(ctrl_info);
8426
8427 return 0;
8428 }
8429
pqi_reinit_queues(struct pqi_ctrl_info * ctrl_info)8430 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info)
8431 {
8432 unsigned int i;
8433 struct pqi_admin_queues *admin_queues;
8434 struct pqi_event_queue *event_queue;
8435
8436 admin_queues = &ctrl_info->admin_queues;
8437 admin_queues->iq_pi_copy = 0;
8438 admin_queues->oq_ci_copy = 0;
8439 writel(0, admin_queues->oq_pi);
8440
8441 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
8442 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0;
8443 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0;
8444 ctrl_info->queue_groups[i].oq_ci_copy = 0;
8445
8446 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]);
8447 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]);
8448 writel(0, ctrl_info->queue_groups[i].oq_pi);
8449 }
8450
8451 event_queue = &ctrl_info->event_queue;
8452 writel(0, event_queue->oq_pi);
8453 event_queue->oq_ci_copy = 0;
8454 }
8455
pqi_ctrl_init_resume(struct pqi_ctrl_info * ctrl_info)8456 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info)
8457 {
8458 int rc;
8459
8460 rc = pqi_force_sis_mode(ctrl_info);
8461 if (rc)
8462 return rc;
8463
8464 /*
8465 * Wait until the controller is ready to start accepting SIS
8466 * commands.
8467 */
8468 rc = sis_wait_for_ctrl_ready_resume(ctrl_info);
8469 if (rc)
8470 return rc;
8471
8472 /*
8473 * Get the controller properties. This allows us to determine
8474 * whether or not it supports PQI mode.
8475 */
8476 rc = sis_get_ctrl_properties(ctrl_info);
8477 if (rc) {
8478 dev_err(&ctrl_info->pci_dev->dev,
8479 "error obtaining controller properties\n");
8480 return rc;
8481 }
8482
8483 rc = sis_get_pqi_capabilities(ctrl_info);
8484 if (rc) {
8485 dev_err(&ctrl_info->pci_dev->dev,
8486 "error obtaining controller capabilities\n");
8487 return rc;
8488 }
8489
8490 /*
8491 * If the function we are about to call succeeds, the
8492 * controller will transition from legacy SIS mode
8493 * into PQI mode.
8494 */
8495 rc = sis_init_base_struct_addr(ctrl_info);
8496 if (rc) {
8497 dev_err(&ctrl_info->pci_dev->dev,
8498 "error initializing PQI mode\n");
8499 return rc;
8500 }
8501
8502 /* Wait for the controller to complete the SIS -> PQI transition. */
8503 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
8504 if (rc) {
8505 dev_err(&ctrl_info->pci_dev->dev,
8506 "transition to PQI mode failed\n");
8507 return rc;
8508 }
8509
8510 /* From here on, we are running in PQI mode. */
8511 ctrl_info->pqi_mode_enabled = true;
8512 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
8513
8514 pqi_reinit_queues(ctrl_info);
8515
8516 rc = pqi_create_admin_queues(ctrl_info);
8517 if (rc) {
8518 dev_err(&ctrl_info->pci_dev->dev,
8519 "error creating admin queues\n");
8520 return rc;
8521 }
8522
8523 rc = pqi_create_queues(ctrl_info);
8524 if (rc)
8525 return rc;
8526
8527 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
8528
8529 ctrl_info->controller_online = true;
8530 pqi_ctrl_unblock_requests(ctrl_info);
8531
8532 pqi_ctrl_reset_config(ctrl_info);
8533
8534 rc = pqi_process_config_table(ctrl_info);
8535 if (rc)
8536 return rc;
8537
8538 pqi_start_heartbeat_timer(ctrl_info);
8539
8540 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) {
8541 rc = pqi_get_advanced_raid_bypass_config(ctrl_info);
8542 if (rc) {
8543 dev_err(&ctrl_info->pci_dev->dev,
8544 "error obtaining advanced RAID bypass configuration\n");
8545 return rc;
8546 }
8547 ctrl_info->ciss_report_log_flags |=
8548 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX;
8549 }
8550
8551 rc = pqi_enable_events(ctrl_info);
8552 if (rc) {
8553 dev_err(&ctrl_info->pci_dev->dev,
8554 "error enabling events\n");
8555 return rc;
8556 }
8557
8558 rc = pqi_get_ctrl_product_details(ctrl_info);
8559 if (rc) {
8560 dev_err(&ctrl_info->pci_dev->dev,
8561 "error obtaining product details\n");
8562 return rc;
8563 }
8564
8565 rc = pqi_set_diag_rescan(ctrl_info);
8566 if (rc) {
8567 dev_err(&ctrl_info->pci_dev->dev,
8568 "error enabling multi-lun rescan\n");
8569 return rc;
8570 }
8571
8572 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
8573 if (rc) {
8574 dev_err(&ctrl_info->pci_dev->dev,
8575 "error updating host wellness\n");
8576 return rc;
8577 }
8578
8579 if (pqi_ofa_in_progress(ctrl_info))
8580 pqi_ctrl_unblock_scan(ctrl_info);
8581
8582 pqi_scan_scsi_devices(ctrl_info);
8583
8584 return 0;
8585 }
8586
pqi_set_pcie_completion_timeout(struct pci_dev * pci_dev,u16 timeout)8587 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, u16 timeout)
8588 {
8589 int rc;
8590
8591 rc = pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2,
8592 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout);
8593
8594 return pcibios_err_to_errno(rc);
8595 }
8596
pqi_pci_init(struct pqi_ctrl_info * ctrl_info)8597 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info)
8598 {
8599 int rc;
8600 u64 mask;
8601
8602 rc = pci_enable_device(ctrl_info->pci_dev);
8603 if (rc) {
8604 dev_err(&ctrl_info->pci_dev->dev,
8605 "failed to enable PCI device\n");
8606 return rc;
8607 }
8608
8609 if (sizeof(dma_addr_t) > 4)
8610 mask = DMA_BIT_MASK(64);
8611 else
8612 mask = DMA_BIT_MASK(32);
8613
8614 rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask);
8615 if (rc) {
8616 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n");
8617 goto disable_device;
8618 }
8619
8620 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT);
8621 if (rc) {
8622 dev_err(&ctrl_info->pci_dev->dev,
8623 "failed to obtain PCI resources\n");
8624 goto disable_device;
8625 }
8626
8627 ctrl_info->iomem_base = ioremap(pci_resource_start(
8628 ctrl_info->pci_dev, 0),
8629 pci_resource_len(ctrl_info->pci_dev, 0));
8630 if (!ctrl_info->iomem_base) {
8631 dev_err(&ctrl_info->pci_dev->dev,
8632 "failed to map memory for controller registers\n");
8633 rc = -ENOMEM;
8634 goto release_regions;
8635 }
8636
8637 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6
8638
8639 /* Increase the PCIe completion timeout. */
8640 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev,
8641 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS);
8642 if (rc) {
8643 dev_err(&ctrl_info->pci_dev->dev,
8644 "failed to set PCIe completion timeout\n");
8645 goto release_regions;
8646 }
8647
8648 /* Enable bus mastering. */
8649 pci_set_master(ctrl_info->pci_dev);
8650
8651 ctrl_info->registers = ctrl_info->iomem_base;
8652 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers;
8653
8654 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info);
8655
8656 return 0;
8657
8658 release_regions:
8659 pci_release_regions(ctrl_info->pci_dev);
8660 disable_device:
8661 pci_disable_device(ctrl_info->pci_dev);
8662
8663 return rc;
8664 }
8665
pqi_cleanup_pci_init(struct pqi_ctrl_info * ctrl_info)8666 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info)
8667 {
8668 iounmap(ctrl_info->iomem_base);
8669 pci_release_regions(ctrl_info->pci_dev);
8670 if (pci_is_enabled(ctrl_info->pci_dev))
8671 pci_disable_device(ctrl_info->pci_dev);
8672 pci_set_drvdata(ctrl_info->pci_dev, NULL);
8673 }
8674
pqi_alloc_ctrl_info(int numa_node)8675 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node)
8676 {
8677 struct pqi_ctrl_info *ctrl_info;
8678
8679 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info),
8680 GFP_KERNEL, numa_node);
8681 if (!ctrl_info)
8682 return NULL;
8683
8684 mutex_init(&ctrl_info->scan_mutex);
8685 mutex_init(&ctrl_info->lun_reset_mutex);
8686 mutex_init(&ctrl_info->ofa_mutex);
8687
8688 INIT_LIST_HEAD(&ctrl_info->scsi_device_list);
8689 spin_lock_init(&ctrl_info->scsi_device_list_lock);
8690
8691 INIT_WORK(&ctrl_info->event_work, pqi_event_worker);
8692 atomic_set(&ctrl_info->num_interrupts, 0);
8693
8694 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker);
8695 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker);
8696
8697 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0);
8698 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker);
8699
8700 INIT_WORK(&ctrl_info->ofa_memory_alloc_work, pqi_ofa_memory_alloc_worker);
8701 INIT_WORK(&ctrl_info->ofa_quiesce_work, pqi_ofa_quiesce_worker);
8702
8703 sema_init(&ctrl_info->sync_request_sem,
8704 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS);
8705 init_waitqueue_head(&ctrl_info->block_requests_wait);
8706
8707 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1;
8708 ctrl_info->irq_mode = IRQ_MODE_NONE;
8709 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS;
8710
8711 ctrl_info->ciss_report_log_flags = CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID;
8712 ctrl_info->max_transfer_encrypted_sas_sata =
8713 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_SAS_SATA;
8714 ctrl_info->max_transfer_encrypted_nvme =
8715 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_NVME;
8716 ctrl_info->max_write_raid_5_6 = PQI_DEFAULT_MAX_WRITE_RAID_5_6;
8717 ctrl_info->max_write_raid_1_10_2drive = ~0;
8718 ctrl_info->max_write_raid_1_10_3drive = ~0;
8719 ctrl_info->disable_managed_interrupts = pqi_disable_managed_interrupts;
8720
8721 return ctrl_info;
8722 }
8723
pqi_free_ctrl_info(struct pqi_ctrl_info * ctrl_info)8724 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info)
8725 {
8726 kfree(ctrl_info);
8727 }
8728
pqi_free_interrupts(struct pqi_ctrl_info * ctrl_info)8729 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info)
8730 {
8731 pqi_free_irqs(ctrl_info);
8732 pqi_disable_msix_interrupts(ctrl_info);
8733 }
8734
pqi_free_ctrl_resources(struct pqi_ctrl_info * ctrl_info)8735 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info)
8736 {
8737 pqi_free_interrupts(ctrl_info);
8738 if (ctrl_info->queue_memory_base)
8739 dma_free_coherent(&ctrl_info->pci_dev->dev,
8740 ctrl_info->queue_memory_length,
8741 ctrl_info->queue_memory_base,
8742 ctrl_info->queue_memory_base_dma_handle);
8743 if (ctrl_info->admin_queue_memory_base)
8744 dma_free_coherent(&ctrl_info->pci_dev->dev,
8745 ctrl_info->admin_queue_memory_length,
8746 ctrl_info->admin_queue_memory_base,
8747 ctrl_info->admin_queue_memory_base_dma_handle);
8748 pqi_free_all_io_requests(ctrl_info);
8749 if (ctrl_info->error_buffer)
8750 dma_free_coherent(&ctrl_info->pci_dev->dev,
8751 ctrl_info->error_buffer_length,
8752 ctrl_info->error_buffer,
8753 ctrl_info->error_buffer_dma_handle);
8754 if (ctrl_info->iomem_base)
8755 pqi_cleanup_pci_init(ctrl_info);
8756 pqi_free_ctrl_info(ctrl_info);
8757 }
8758
pqi_remove_ctrl(struct pqi_ctrl_info * ctrl_info)8759 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info)
8760 {
8761 ctrl_info->controller_online = false;
8762 pqi_stop_heartbeat_timer(ctrl_info);
8763 pqi_ctrl_block_requests(ctrl_info);
8764 pqi_cancel_rescan_worker(ctrl_info);
8765 pqi_cancel_update_time_worker(ctrl_info);
8766 if (ctrl_info->ctrl_removal_state == PQI_CTRL_SURPRISE_REMOVAL) {
8767 pqi_fail_all_outstanding_requests(ctrl_info);
8768 ctrl_info->pqi_mode_enabled = false;
8769 }
8770 pqi_unregister_scsi(ctrl_info);
8771 if (ctrl_info->pqi_mode_enabled)
8772 pqi_revert_to_sis_mode(ctrl_info);
8773 pqi_free_ctrl_resources(ctrl_info);
8774 }
8775
pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info * ctrl_info)8776 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info)
8777 {
8778 pqi_ctrl_block_scan(ctrl_info);
8779 pqi_scsi_block_requests(ctrl_info);
8780 pqi_ctrl_block_device_reset(ctrl_info);
8781 pqi_ctrl_block_requests(ctrl_info);
8782 pqi_ctrl_wait_until_quiesced(ctrl_info);
8783 pqi_stop_heartbeat_timer(ctrl_info);
8784 }
8785
pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info * ctrl_info)8786 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info)
8787 {
8788 pqi_start_heartbeat_timer(ctrl_info);
8789 pqi_ctrl_unblock_requests(ctrl_info);
8790 pqi_ctrl_unblock_device_reset(ctrl_info);
8791 pqi_scsi_unblock_requests(ctrl_info);
8792 pqi_ctrl_unblock_scan(ctrl_info);
8793 }
8794
pqi_ofa_alloc_mem(struct pqi_ctrl_info * ctrl_info,u32 total_size,u32 chunk_size)8795 static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info, u32 total_size, u32 chunk_size)
8796 {
8797 int i;
8798 u32 sg_count;
8799 struct device *dev;
8800 struct pqi_ofa_memory *ofap;
8801 struct pqi_sg_descriptor *mem_descriptor;
8802 dma_addr_t dma_handle;
8803
8804 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
8805
8806 sg_count = DIV_ROUND_UP(total_size, chunk_size);
8807 if (sg_count == 0 || sg_count > PQI_OFA_MAX_SG_DESCRIPTORS)
8808 goto out;
8809
8810 ctrl_info->pqi_ofa_chunk_virt_addr = kmalloc_array(sg_count, sizeof(void *), GFP_KERNEL);
8811 if (!ctrl_info->pqi_ofa_chunk_virt_addr)
8812 goto out;
8813
8814 dev = &ctrl_info->pci_dev->dev;
8815
8816 for (i = 0; i < sg_count; i++) {
8817 ctrl_info->pqi_ofa_chunk_virt_addr[i] =
8818 dma_alloc_coherent(dev, chunk_size, &dma_handle, GFP_KERNEL);
8819 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i])
8820 goto out_free_chunks;
8821 mem_descriptor = &ofap->sg_descriptor[i];
8822 put_unaligned_le64((u64)dma_handle, &mem_descriptor->address);
8823 put_unaligned_le32(chunk_size, &mem_descriptor->length);
8824 }
8825
8826 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags);
8827 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors);
8828 put_unaligned_le32(sg_count * chunk_size, &ofap->bytes_allocated);
8829
8830 return 0;
8831
8832 out_free_chunks:
8833 while (--i >= 0) {
8834 mem_descriptor = &ofap->sg_descriptor[i];
8835 dma_free_coherent(dev, chunk_size,
8836 ctrl_info->pqi_ofa_chunk_virt_addr[i],
8837 get_unaligned_le64(&mem_descriptor->address));
8838 }
8839 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
8840
8841 out:
8842 return -ENOMEM;
8843 }
8844
pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info * ctrl_info)8845 static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info)
8846 {
8847 u32 total_size;
8848 u32 chunk_size;
8849 u32 min_chunk_size;
8850
8851 if (ctrl_info->ofa_bytes_requested == 0)
8852 return 0;
8853
8854 total_size = PAGE_ALIGN(ctrl_info->ofa_bytes_requested);
8855 min_chunk_size = DIV_ROUND_UP(total_size, PQI_OFA_MAX_SG_DESCRIPTORS);
8856 min_chunk_size = PAGE_ALIGN(min_chunk_size);
8857
8858 for (chunk_size = total_size; chunk_size >= min_chunk_size;) {
8859 if (pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_size) == 0)
8860 return 0;
8861 chunk_size /= 2;
8862 chunk_size = PAGE_ALIGN(chunk_size);
8863 }
8864
8865 return -ENOMEM;
8866 }
8867
pqi_ofa_setup_host_buffer(struct pqi_ctrl_info * ctrl_info)8868 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info)
8869 {
8870 struct device *dev;
8871 struct pqi_ofa_memory *ofap;
8872
8873 dev = &ctrl_info->pci_dev->dev;
8874
8875 ofap = dma_alloc_coherent(dev, sizeof(*ofap),
8876 &ctrl_info->pqi_ofa_mem_dma_handle, GFP_KERNEL);
8877 if (!ofap)
8878 return;
8879
8880 ctrl_info->pqi_ofa_mem_virt_addr = ofap;
8881
8882 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) {
8883 dev_err(dev,
8884 "failed to allocate host buffer for Online Firmware Activation\n");
8885 dma_free_coherent(dev, sizeof(*ofap), ofap, ctrl_info->pqi_ofa_mem_dma_handle);
8886 ctrl_info->pqi_ofa_mem_virt_addr = NULL;
8887 return;
8888 }
8889
8890 put_unaligned_le16(PQI_OFA_VERSION, &ofap->version);
8891 memcpy(&ofap->signature, PQI_OFA_SIGNATURE, sizeof(ofap->signature));
8892 }
8893
pqi_ofa_free_host_buffer(struct pqi_ctrl_info * ctrl_info)8894 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info)
8895 {
8896 unsigned int i;
8897 struct device *dev;
8898 struct pqi_ofa_memory *ofap;
8899 struct pqi_sg_descriptor *mem_descriptor;
8900 unsigned int num_memory_descriptors;
8901
8902 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
8903 if (!ofap)
8904 return;
8905
8906 dev = &ctrl_info->pci_dev->dev;
8907
8908 if (get_unaligned_le32(&ofap->bytes_allocated) == 0)
8909 goto out;
8910
8911 mem_descriptor = ofap->sg_descriptor;
8912 num_memory_descriptors =
8913 get_unaligned_le16(&ofap->num_memory_descriptors);
8914
8915 for (i = 0; i < num_memory_descriptors; i++) {
8916 dma_free_coherent(dev,
8917 get_unaligned_le32(&mem_descriptor[i].length),
8918 ctrl_info->pqi_ofa_chunk_virt_addr[i],
8919 get_unaligned_le64(&mem_descriptor[i].address));
8920 }
8921 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
8922
8923 out:
8924 dma_free_coherent(dev, sizeof(*ofap), ofap,
8925 ctrl_info->pqi_ofa_mem_dma_handle);
8926 ctrl_info->pqi_ofa_mem_virt_addr = NULL;
8927 }
8928
pqi_ofa_host_memory_update(struct pqi_ctrl_info * ctrl_info)8929 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info)
8930 {
8931 u32 buffer_length;
8932 struct pqi_vendor_general_request request;
8933 struct pqi_ofa_memory *ofap;
8934
8935 memset(&request, 0, sizeof(request));
8936
8937 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
8938 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
8939 &request.header.iu_length);
8940 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE,
8941 &request.function_code);
8942
8943 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
8944
8945 if (ofap) {
8946 buffer_length = offsetof(struct pqi_ofa_memory, sg_descriptor) +
8947 get_unaligned_le16(&ofap->num_memory_descriptors) *
8948 sizeof(struct pqi_sg_descriptor);
8949
8950 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle,
8951 &request.data.ofa_memory_allocation.buffer_address);
8952 put_unaligned_le32(buffer_length,
8953 &request.data.ofa_memory_allocation.buffer_length);
8954 }
8955
8956 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
8957 }
8958
pqi_ofa_ctrl_restart(struct pqi_ctrl_info * ctrl_info,unsigned int delay_secs)8959 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs)
8960 {
8961 ssleep(delay_secs);
8962
8963 return pqi_ctrl_init_resume(ctrl_info);
8964 }
8965
8966 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = {
8967 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR,
8968 .status = SAM_STAT_CHECK_CONDITION,
8969 };
8970
pqi_fail_all_outstanding_requests(struct pqi_ctrl_info * ctrl_info)8971 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info)
8972 {
8973 unsigned int i;
8974 struct pqi_io_request *io_request;
8975 struct scsi_cmnd *scmd;
8976 struct scsi_device *sdev;
8977
8978 for (i = 0; i < ctrl_info->max_io_slots; i++) {
8979 io_request = &ctrl_info->io_request_pool[i];
8980 if (atomic_read(&io_request->refcount) == 0)
8981 continue;
8982
8983 scmd = io_request->scmd;
8984 if (scmd) {
8985 sdev = scmd->device;
8986 if (!sdev || !scsi_device_online(sdev)) {
8987 pqi_free_io_request(io_request);
8988 continue;
8989 } else {
8990 set_host_byte(scmd, DID_NO_CONNECT);
8991 }
8992 } else {
8993 io_request->status = -ENXIO;
8994 io_request->error_info =
8995 &pqi_ctrl_offline_raid_error_info;
8996 }
8997
8998 io_request->io_complete_callback(io_request,
8999 io_request->context);
9000 }
9001 }
9002
pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info * ctrl_info)9003 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info)
9004 {
9005 pqi_perform_lockup_action();
9006 pqi_stop_heartbeat_timer(ctrl_info);
9007 pqi_free_interrupts(ctrl_info);
9008 pqi_cancel_rescan_worker(ctrl_info);
9009 pqi_cancel_update_time_worker(ctrl_info);
9010 pqi_ctrl_wait_until_quiesced(ctrl_info);
9011 pqi_fail_all_outstanding_requests(ctrl_info);
9012 pqi_ctrl_unblock_requests(ctrl_info);
9013 }
9014
pqi_ctrl_offline_worker(struct work_struct * work)9015 static void pqi_ctrl_offline_worker(struct work_struct *work)
9016 {
9017 struct pqi_ctrl_info *ctrl_info;
9018
9019 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work);
9020 pqi_take_ctrl_offline_deferred(ctrl_info);
9021 }
9022
pqi_ctrl_shutdown_reason_to_string(enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason)9023 static char *pqi_ctrl_shutdown_reason_to_string(enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason)
9024 {
9025 char *string;
9026
9027 switch (ctrl_shutdown_reason) {
9028 case PQI_IQ_NOT_DRAINED_TIMEOUT:
9029 string = "inbound queue not drained timeout";
9030 break;
9031 case PQI_LUN_RESET_TIMEOUT:
9032 string = "LUN reset timeout";
9033 break;
9034 case PQI_IO_PENDING_POST_LUN_RESET_TIMEOUT:
9035 string = "I/O pending timeout after LUN reset";
9036 break;
9037 case PQI_NO_HEARTBEAT:
9038 string = "no controller heartbeat detected";
9039 break;
9040 case PQI_FIRMWARE_KERNEL_NOT_UP:
9041 string = "firmware kernel not ready";
9042 break;
9043 case PQI_OFA_RESPONSE_TIMEOUT:
9044 string = "OFA response timeout";
9045 break;
9046 case PQI_INVALID_REQ_ID:
9047 string = "invalid request ID";
9048 break;
9049 case PQI_UNMATCHED_REQ_ID:
9050 string = "unmatched request ID";
9051 break;
9052 case PQI_IO_PI_OUT_OF_RANGE:
9053 string = "I/O queue producer index out of range";
9054 break;
9055 case PQI_EVENT_PI_OUT_OF_RANGE:
9056 string = "event queue producer index out of range";
9057 break;
9058 case PQI_UNEXPECTED_IU_TYPE:
9059 string = "unexpected IU type";
9060 break;
9061 default:
9062 string = "unknown reason";
9063 break;
9064 }
9065
9066 return string;
9067 }
9068
pqi_take_ctrl_offline(struct pqi_ctrl_info * ctrl_info,enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason)9069 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info,
9070 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason)
9071 {
9072 if (!ctrl_info->controller_online)
9073 return;
9074
9075 ctrl_info->controller_online = false;
9076 ctrl_info->pqi_mode_enabled = false;
9077 pqi_ctrl_block_requests(ctrl_info);
9078 if (!pqi_disable_ctrl_shutdown)
9079 sis_shutdown_ctrl(ctrl_info, ctrl_shutdown_reason);
9080 pci_disable_device(ctrl_info->pci_dev);
9081 dev_err(&ctrl_info->pci_dev->dev,
9082 "controller offline: reason code 0x%x (%s)\n",
9083 ctrl_shutdown_reason, pqi_ctrl_shutdown_reason_to_string(ctrl_shutdown_reason));
9084 schedule_work(&ctrl_info->ctrl_offline_work);
9085 }
9086
pqi_print_ctrl_info(struct pci_dev * pci_dev,const struct pci_device_id * id)9087 static void pqi_print_ctrl_info(struct pci_dev *pci_dev,
9088 const struct pci_device_id *id)
9089 {
9090 char *ctrl_description;
9091
9092 if (id->driver_data)
9093 ctrl_description = (char *)id->driver_data;
9094 else
9095 ctrl_description = "Microchip Smart Family Controller";
9096
9097 dev_info(&pci_dev->dev, "%s found\n", ctrl_description);
9098 }
9099
pqi_pci_probe(struct pci_dev * pci_dev,const struct pci_device_id * id)9100 static int pqi_pci_probe(struct pci_dev *pci_dev,
9101 const struct pci_device_id *id)
9102 {
9103 int rc;
9104 int node;
9105 struct pqi_ctrl_info *ctrl_info;
9106
9107 pqi_print_ctrl_info(pci_dev, id);
9108
9109 if (pqi_disable_device_id_wildcards &&
9110 id->subvendor == PCI_ANY_ID &&
9111 id->subdevice == PCI_ANY_ID) {
9112 dev_warn(&pci_dev->dev,
9113 "controller not probed because device ID wildcards are disabled\n");
9114 return -ENODEV;
9115 }
9116
9117 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID)
9118 dev_warn(&pci_dev->dev,
9119 "controller device ID matched using wildcards\n");
9120
9121 node = dev_to_node(&pci_dev->dev);
9122 if (node == NUMA_NO_NODE) {
9123 node = cpu_to_node(0);
9124 if (node == NUMA_NO_NODE)
9125 node = 0;
9126 set_dev_node(&pci_dev->dev, node);
9127 }
9128
9129 ctrl_info = pqi_alloc_ctrl_info(node);
9130 if (!ctrl_info) {
9131 dev_err(&pci_dev->dev,
9132 "failed to allocate controller info block\n");
9133 return -ENOMEM;
9134 }
9135 ctrl_info->numa_node = node;
9136
9137 ctrl_info->pci_dev = pci_dev;
9138
9139 rc = pqi_pci_init(ctrl_info);
9140 if (rc)
9141 goto error;
9142
9143 rc = pqi_ctrl_init(ctrl_info);
9144 if (rc)
9145 goto error;
9146
9147 return 0;
9148
9149 error:
9150 pqi_remove_ctrl(ctrl_info);
9151
9152 return rc;
9153 }
9154
pqi_pci_remove(struct pci_dev * pci_dev)9155 static void pqi_pci_remove(struct pci_dev *pci_dev)
9156 {
9157 struct pqi_ctrl_info *ctrl_info;
9158 u16 vendor_id;
9159 int rc;
9160
9161 ctrl_info = pci_get_drvdata(pci_dev);
9162 if (!ctrl_info)
9163 return;
9164
9165 pci_read_config_word(ctrl_info->pci_dev, PCI_SUBSYSTEM_VENDOR_ID, &vendor_id);
9166 if (vendor_id == 0xffff)
9167 ctrl_info->ctrl_removal_state = PQI_CTRL_SURPRISE_REMOVAL;
9168 else
9169 ctrl_info->ctrl_removal_state = PQI_CTRL_GRACEFUL_REMOVAL;
9170
9171 if (ctrl_info->ctrl_removal_state == PQI_CTRL_GRACEFUL_REMOVAL) {
9172 rc = pqi_flush_cache(ctrl_info, RESTART);
9173 if (rc)
9174 dev_err(&pci_dev->dev,
9175 "unable to flush controller cache during remove\n");
9176 }
9177
9178 pqi_remove_ctrl(ctrl_info);
9179 }
9180
pqi_crash_if_pending_command(struct pqi_ctrl_info * ctrl_info)9181 static void pqi_crash_if_pending_command(struct pqi_ctrl_info *ctrl_info)
9182 {
9183 unsigned int i;
9184 struct pqi_io_request *io_request;
9185 struct scsi_cmnd *scmd;
9186
9187 for (i = 0; i < ctrl_info->max_io_slots; i++) {
9188 io_request = &ctrl_info->io_request_pool[i];
9189 if (atomic_read(&io_request->refcount) == 0)
9190 continue;
9191 scmd = io_request->scmd;
9192 WARN_ON(scmd != NULL); /* IO command from SML */
9193 WARN_ON(scmd == NULL); /* Non-IO cmd or driver initiated*/
9194 }
9195 }
9196
pqi_shutdown(struct pci_dev * pci_dev)9197 static void pqi_shutdown(struct pci_dev *pci_dev)
9198 {
9199 int rc;
9200 struct pqi_ctrl_info *ctrl_info;
9201 enum bmic_flush_cache_shutdown_event shutdown_event;
9202
9203 ctrl_info = pci_get_drvdata(pci_dev);
9204 if (!ctrl_info) {
9205 dev_err(&pci_dev->dev,
9206 "cache could not be flushed\n");
9207 return;
9208 }
9209
9210 pqi_wait_until_ofa_finished(ctrl_info);
9211
9212 pqi_scsi_block_requests(ctrl_info);
9213 pqi_ctrl_block_device_reset(ctrl_info);
9214 pqi_ctrl_block_requests(ctrl_info);
9215 pqi_ctrl_wait_until_quiesced(ctrl_info);
9216
9217 if (system_state == SYSTEM_RESTART)
9218 shutdown_event = RESTART;
9219 else
9220 shutdown_event = SHUTDOWN;
9221
9222 /*
9223 * Write all data in the controller's battery-backed cache to
9224 * storage.
9225 */
9226 rc = pqi_flush_cache(ctrl_info, shutdown_event);
9227 if (rc)
9228 dev_err(&pci_dev->dev,
9229 "unable to flush controller cache during shutdown\n");
9230
9231 pqi_crash_if_pending_command(ctrl_info);
9232 pqi_reset(ctrl_info);
9233 }
9234
pqi_process_lockup_action_param(void)9235 static void pqi_process_lockup_action_param(void)
9236 {
9237 unsigned int i;
9238
9239 if (!pqi_lockup_action_param)
9240 return;
9241
9242 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
9243 if (strcmp(pqi_lockup_action_param,
9244 pqi_lockup_actions[i].name) == 0) {
9245 pqi_lockup_action = pqi_lockup_actions[i].action;
9246 return;
9247 }
9248 }
9249
9250 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n",
9251 DRIVER_NAME_SHORT, pqi_lockup_action_param);
9252 }
9253
9254 #define PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS 30
9255 #define PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS (30 * 60)
9256
pqi_process_ctrl_ready_timeout_param(void)9257 static void pqi_process_ctrl_ready_timeout_param(void)
9258 {
9259 if (pqi_ctrl_ready_timeout_secs == 0)
9260 return;
9261
9262 if (pqi_ctrl_ready_timeout_secs < PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS) {
9263 pr_warn("%s: ctrl_ready_timeout parm of %u second(s) is less than minimum timeout of %d seconds - setting timeout to %d seconds\n",
9264 DRIVER_NAME_SHORT, pqi_ctrl_ready_timeout_secs, PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS, PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS);
9265 pqi_ctrl_ready_timeout_secs = PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS;
9266 } else if (pqi_ctrl_ready_timeout_secs > PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS) {
9267 pr_warn("%s: ctrl_ready_timeout parm of %u seconds is greater than maximum timeout of %d seconds - setting timeout to %d seconds\n",
9268 DRIVER_NAME_SHORT, pqi_ctrl_ready_timeout_secs, PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS, PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS);
9269 pqi_ctrl_ready_timeout_secs = PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS;
9270 }
9271
9272 sis_ctrl_ready_timeout_secs = pqi_ctrl_ready_timeout_secs;
9273 }
9274
pqi_process_module_params(void)9275 static void pqi_process_module_params(void)
9276 {
9277 pqi_process_lockup_action_param();
9278 pqi_process_ctrl_ready_timeout_param();
9279 }
9280
9281 #if defined(CONFIG_PM)
9282
pqi_get_flush_cache_shutdown_event(struct pci_dev * pci_dev)9283 static inline enum bmic_flush_cache_shutdown_event pqi_get_flush_cache_shutdown_event(struct pci_dev *pci_dev)
9284 {
9285 if (pci_dev->subsystem_vendor == PCI_VENDOR_ID_ADAPTEC2 && pci_dev->subsystem_device == 0x1304)
9286 return RESTART;
9287
9288 return SUSPEND;
9289 }
9290
pqi_suspend_or_freeze(struct device * dev,bool suspend)9291 static int pqi_suspend_or_freeze(struct device *dev, bool suspend)
9292 {
9293 struct pci_dev *pci_dev;
9294 struct pqi_ctrl_info *ctrl_info;
9295
9296 pci_dev = to_pci_dev(dev);
9297 ctrl_info = pci_get_drvdata(pci_dev);
9298
9299 pqi_wait_until_ofa_finished(ctrl_info);
9300
9301 pqi_ctrl_block_scan(ctrl_info);
9302 pqi_scsi_block_requests(ctrl_info);
9303 pqi_ctrl_block_device_reset(ctrl_info);
9304 pqi_ctrl_block_requests(ctrl_info);
9305 pqi_ctrl_wait_until_quiesced(ctrl_info);
9306
9307 if (suspend) {
9308 enum bmic_flush_cache_shutdown_event shutdown_event;
9309
9310 shutdown_event = pqi_get_flush_cache_shutdown_event(pci_dev);
9311 pqi_flush_cache(ctrl_info, shutdown_event);
9312 }
9313
9314 pqi_stop_heartbeat_timer(ctrl_info);
9315 pqi_crash_if_pending_command(ctrl_info);
9316 pqi_free_irqs(ctrl_info);
9317
9318 ctrl_info->controller_online = false;
9319 ctrl_info->pqi_mode_enabled = false;
9320
9321 return 0;
9322 }
9323
pqi_suspend(struct device * dev)9324 static __maybe_unused int pqi_suspend(struct device *dev)
9325 {
9326 return pqi_suspend_or_freeze(dev, true);
9327 }
9328
pqi_resume_or_restore(struct device * dev)9329 static int pqi_resume_or_restore(struct device *dev)
9330 {
9331 int rc;
9332 struct pci_dev *pci_dev;
9333 struct pqi_ctrl_info *ctrl_info;
9334
9335 pci_dev = to_pci_dev(dev);
9336 ctrl_info = pci_get_drvdata(pci_dev);
9337
9338 rc = pqi_request_irqs(ctrl_info);
9339 if (rc)
9340 return rc;
9341
9342 pqi_ctrl_unblock_device_reset(ctrl_info);
9343 pqi_ctrl_unblock_requests(ctrl_info);
9344 pqi_scsi_unblock_requests(ctrl_info);
9345 pqi_ctrl_unblock_scan(ctrl_info);
9346
9347 ssleep(PQI_POST_RESET_DELAY_SECS);
9348
9349 return pqi_ctrl_init_resume(ctrl_info);
9350 }
9351
pqi_freeze(struct device * dev)9352 static int pqi_freeze(struct device *dev)
9353 {
9354 return pqi_suspend_or_freeze(dev, false);
9355 }
9356
pqi_thaw(struct device * dev)9357 static int pqi_thaw(struct device *dev)
9358 {
9359 int rc;
9360 struct pci_dev *pci_dev;
9361 struct pqi_ctrl_info *ctrl_info;
9362
9363 pci_dev = to_pci_dev(dev);
9364 ctrl_info = pci_get_drvdata(pci_dev);
9365
9366 rc = pqi_request_irqs(ctrl_info);
9367 if (rc)
9368 return rc;
9369
9370 ctrl_info->controller_online = true;
9371 ctrl_info->pqi_mode_enabled = true;
9372
9373 pqi_ctrl_unblock_device_reset(ctrl_info);
9374 pqi_ctrl_unblock_requests(ctrl_info);
9375 pqi_scsi_unblock_requests(ctrl_info);
9376 pqi_ctrl_unblock_scan(ctrl_info);
9377
9378 return 0;
9379 }
9380
pqi_poweroff(struct device * dev)9381 static int pqi_poweroff(struct device *dev)
9382 {
9383 struct pci_dev *pci_dev;
9384 struct pqi_ctrl_info *ctrl_info;
9385 enum bmic_flush_cache_shutdown_event shutdown_event;
9386
9387 pci_dev = to_pci_dev(dev);
9388 ctrl_info = pci_get_drvdata(pci_dev);
9389
9390 shutdown_event = pqi_get_flush_cache_shutdown_event(pci_dev);
9391 pqi_flush_cache(ctrl_info, shutdown_event);
9392
9393 return 0;
9394 }
9395
9396 static const struct dev_pm_ops pqi_pm_ops = {
9397 .suspend = pqi_suspend,
9398 .resume = pqi_resume_or_restore,
9399 .freeze = pqi_freeze,
9400 .thaw = pqi_thaw,
9401 .poweroff = pqi_poweroff,
9402 .restore = pqi_resume_or_restore,
9403 };
9404
9405 #endif /* CONFIG_PM */
9406
9407 /* Define the PCI IDs for the controllers that we support. */
9408 static const struct pci_device_id pqi_pci_id_table[] = {
9409 {
9410 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9411 0x105b, 0x1211)
9412 },
9413 {
9414 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9415 0x105b, 0x1321)
9416 },
9417 {
9418 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9419 0x152d, 0x8a22)
9420 },
9421 {
9422 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9423 0x152d, 0x8a23)
9424 },
9425 {
9426 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9427 0x152d, 0x8a24)
9428 },
9429 {
9430 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9431 0x152d, 0x8a36)
9432 },
9433 {
9434 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9435 0x152d, 0x8a37)
9436 },
9437 {
9438 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9439 0x193d, 0x1104)
9440 },
9441 {
9442 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9443 0x193d, 0x1105)
9444 },
9445 {
9446 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9447 0x193d, 0x1106)
9448 },
9449 {
9450 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9451 0x193d, 0x1107)
9452 },
9453 {
9454 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9455 0x193d, 0x1108)
9456 },
9457 {
9458 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9459 0x193d, 0x1109)
9460 },
9461 {
9462 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9463 0x193d, 0x110b)
9464 },
9465 {
9466 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9467 0x193d, 0x8460)
9468 },
9469 {
9470 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9471 0x193d, 0x8461)
9472 },
9473 {
9474 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9475 0x193d, 0xc460)
9476 },
9477 {
9478 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9479 0x193d, 0xc461)
9480 },
9481 {
9482 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9483 0x193d, 0xf460)
9484 },
9485 {
9486 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9487 0x193d, 0xf461)
9488 },
9489 {
9490 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9491 0x1bd4, 0x0045)
9492 },
9493 {
9494 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9495 0x1bd4, 0x0046)
9496 },
9497 {
9498 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9499 0x1bd4, 0x0047)
9500 },
9501 {
9502 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9503 0x1bd4, 0x0048)
9504 },
9505 {
9506 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9507 0x1bd4, 0x004a)
9508 },
9509 {
9510 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9511 0x1bd4, 0x004b)
9512 },
9513 {
9514 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9515 0x1bd4, 0x004c)
9516 },
9517 {
9518 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9519 0x1bd4, 0x004f)
9520 },
9521 {
9522 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9523 0x1bd4, 0x0051)
9524 },
9525 {
9526 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9527 0x1bd4, 0x0052)
9528 },
9529 {
9530 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9531 0x1bd4, 0x0053)
9532 },
9533 {
9534 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9535 0x1bd4, 0x0054)
9536 },
9537 {
9538 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9539 0x1bd4, 0x006b)
9540 },
9541 {
9542 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9543 0x1bd4, 0x006c)
9544 },
9545 {
9546 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9547 0x1bd4, 0x006d)
9548 },
9549 {
9550 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9551 0x1bd4, 0x006f)
9552 },
9553 {
9554 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9555 0x1bd4, 0x0070)
9556 },
9557 {
9558 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9559 0x1bd4, 0x0071)
9560 },
9561 {
9562 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9563 0x1bd4, 0x0072)
9564 },
9565 {
9566 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9567 0x1bd4, 0x0086)
9568 },
9569 {
9570 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9571 0x1bd4, 0x0087)
9572 },
9573 {
9574 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9575 0x1bd4, 0x0088)
9576 },
9577 {
9578 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9579 0x1bd4, 0x0089)
9580 },
9581 {
9582 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9583 0x19e5, 0xd227)
9584 },
9585 {
9586 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9587 0x19e5, 0xd228)
9588 },
9589 {
9590 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9591 0x19e5, 0xd229)
9592 },
9593 {
9594 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9595 0x19e5, 0xd22a)
9596 },
9597 {
9598 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9599 0x19e5, 0xd22b)
9600 },
9601 {
9602 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9603 0x19e5, 0xd22c)
9604 },
9605 {
9606 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9607 PCI_VENDOR_ID_ADAPTEC2, 0x0110)
9608 },
9609 {
9610 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9611 PCI_VENDOR_ID_ADAPTEC2, 0x0608)
9612 },
9613 {
9614 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9615 PCI_VENDOR_ID_ADAPTEC2, 0x0659)
9616 },
9617 {
9618 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9619 PCI_VENDOR_ID_ADAPTEC2, 0x0800)
9620 },
9621 {
9622 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9623 PCI_VENDOR_ID_ADAPTEC2, 0x0801)
9624 },
9625 {
9626 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9627 PCI_VENDOR_ID_ADAPTEC2, 0x0802)
9628 },
9629 {
9630 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9631 PCI_VENDOR_ID_ADAPTEC2, 0x0803)
9632 },
9633 {
9634 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9635 PCI_VENDOR_ID_ADAPTEC2, 0x0804)
9636 },
9637 {
9638 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9639 PCI_VENDOR_ID_ADAPTEC2, 0x0805)
9640 },
9641 {
9642 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9643 PCI_VENDOR_ID_ADAPTEC2, 0x0806)
9644 },
9645 {
9646 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9647 PCI_VENDOR_ID_ADAPTEC2, 0x0807)
9648 },
9649 {
9650 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9651 PCI_VENDOR_ID_ADAPTEC2, 0x0808)
9652 },
9653 {
9654 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9655 PCI_VENDOR_ID_ADAPTEC2, 0x0809)
9656 },
9657 {
9658 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9659 PCI_VENDOR_ID_ADAPTEC2, 0x080a)
9660 },
9661 {
9662 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9663 PCI_VENDOR_ID_ADAPTEC2, 0x0900)
9664 },
9665 {
9666 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9667 PCI_VENDOR_ID_ADAPTEC2, 0x0901)
9668 },
9669 {
9670 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9671 PCI_VENDOR_ID_ADAPTEC2, 0x0902)
9672 },
9673 {
9674 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9675 PCI_VENDOR_ID_ADAPTEC2, 0x0903)
9676 },
9677 {
9678 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9679 PCI_VENDOR_ID_ADAPTEC2, 0x0904)
9680 },
9681 {
9682 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9683 PCI_VENDOR_ID_ADAPTEC2, 0x0905)
9684 },
9685 {
9686 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9687 PCI_VENDOR_ID_ADAPTEC2, 0x0906)
9688 },
9689 {
9690 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9691 PCI_VENDOR_ID_ADAPTEC2, 0x0907)
9692 },
9693 {
9694 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9695 PCI_VENDOR_ID_ADAPTEC2, 0x0908)
9696 },
9697 {
9698 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9699 PCI_VENDOR_ID_ADAPTEC2, 0x090a)
9700 },
9701 {
9702 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9703 PCI_VENDOR_ID_ADAPTEC2, 0x1200)
9704 },
9705 {
9706 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9707 PCI_VENDOR_ID_ADAPTEC2, 0x1201)
9708 },
9709 {
9710 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9711 PCI_VENDOR_ID_ADAPTEC2, 0x1202)
9712 },
9713 {
9714 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9715 PCI_VENDOR_ID_ADAPTEC2, 0x1280)
9716 },
9717 {
9718 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9719 PCI_VENDOR_ID_ADAPTEC2, 0x1281)
9720 },
9721 {
9722 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9723 PCI_VENDOR_ID_ADAPTEC2, 0x1282)
9724 },
9725 {
9726 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9727 PCI_VENDOR_ID_ADAPTEC2, 0x1300)
9728 },
9729 {
9730 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9731 PCI_VENDOR_ID_ADAPTEC2, 0x1301)
9732 },
9733 {
9734 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9735 PCI_VENDOR_ID_ADAPTEC2, 0x1302)
9736 },
9737 {
9738 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9739 PCI_VENDOR_ID_ADAPTEC2, 0x1303)
9740 },
9741 {
9742 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9743 PCI_VENDOR_ID_ADAPTEC2, 0x1304)
9744 },
9745 {
9746 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9747 PCI_VENDOR_ID_ADAPTEC2, 0x1380)
9748 },
9749 {
9750 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9751 PCI_VENDOR_ID_ADAPTEC2, 0x1400)
9752 },
9753 {
9754 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9755 PCI_VENDOR_ID_ADAPTEC2, 0x1402)
9756 },
9757 {
9758 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9759 PCI_VENDOR_ID_ADAPTEC2, 0x1410)
9760 },
9761 {
9762 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9763 PCI_VENDOR_ID_ADAPTEC2, 0x1411)
9764 },
9765 {
9766 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9767 PCI_VENDOR_ID_ADAPTEC2, 0x1412)
9768 },
9769 {
9770 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9771 PCI_VENDOR_ID_ADAPTEC2, 0x1420)
9772 },
9773 {
9774 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9775 PCI_VENDOR_ID_ADAPTEC2, 0x1430)
9776 },
9777 {
9778 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9779 PCI_VENDOR_ID_ADAPTEC2, 0x1440)
9780 },
9781 {
9782 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9783 PCI_VENDOR_ID_ADAPTEC2, 0x1441)
9784 },
9785 {
9786 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9787 PCI_VENDOR_ID_ADAPTEC2, 0x1450)
9788 },
9789 {
9790 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9791 PCI_VENDOR_ID_ADAPTEC2, 0x1452)
9792 },
9793 {
9794 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9795 PCI_VENDOR_ID_ADAPTEC2, 0x1460)
9796 },
9797 {
9798 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9799 PCI_VENDOR_ID_ADAPTEC2, 0x1461)
9800 },
9801 {
9802 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9803 PCI_VENDOR_ID_ADAPTEC2, 0x1462)
9804 },
9805 {
9806 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9807 PCI_VENDOR_ID_ADAPTEC2, 0x1463)
9808 },
9809 {
9810 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9811 PCI_VENDOR_ID_ADAPTEC2, 0x1470)
9812 },
9813 {
9814 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9815 PCI_VENDOR_ID_ADAPTEC2, 0x1471)
9816 },
9817 {
9818 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9819 PCI_VENDOR_ID_ADAPTEC2, 0x1472)
9820 },
9821 {
9822 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9823 PCI_VENDOR_ID_ADAPTEC2, 0x1473)
9824 },
9825 {
9826 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9827 PCI_VENDOR_ID_ADAPTEC2, 0x1474)
9828 },
9829 {
9830 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9831 PCI_VENDOR_ID_ADAPTEC2, 0x1475)
9832 },
9833 {
9834 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9835 PCI_VENDOR_ID_ADAPTEC2, 0x1480)
9836 },
9837 {
9838 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9839 PCI_VENDOR_ID_ADAPTEC2, 0x1490)
9840 },
9841 {
9842 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9843 PCI_VENDOR_ID_ADAPTEC2, 0x1491)
9844 },
9845 {
9846 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9847 PCI_VENDOR_ID_ADAPTEC2, 0x14a0)
9848 },
9849 {
9850 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9851 PCI_VENDOR_ID_ADAPTEC2, 0x14a1)
9852 },
9853 {
9854 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9855 PCI_VENDOR_ID_ADAPTEC2, 0x14a2)
9856 },
9857 {
9858 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9859 PCI_VENDOR_ID_ADAPTEC2, 0x14a4)
9860 },
9861 {
9862 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9863 PCI_VENDOR_ID_ADAPTEC2, 0x14a5)
9864 },
9865 {
9866 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9867 PCI_VENDOR_ID_ADAPTEC2, 0x14a6)
9868 },
9869 {
9870 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9871 PCI_VENDOR_ID_ADAPTEC2, 0x14b0)
9872 },
9873 {
9874 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9875 PCI_VENDOR_ID_ADAPTEC2, 0x14b1)
9876 },
9877 {
9878 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9879 PCI_VENDOR_ID_ADAPTEC2, 0x14c0)
9880 },
9881 {
9882 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9883 PCI_VENDOR_ID_ADAPTEC2, 0x14c1)
9884 },
9885 {
9886 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9887 PCI_VENDOR_ID_ADAPTEC2, 0x14c2)
9888 },
9889 {
9890 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9891 PCI_VENDOR_ID_ADAPTEC2, 0x14c3)
9892 },
9893 {
9894 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9895 PCI_VENDOR_ID_ADAPTEC2, 0x14c4)
9896 },
9897 {
9898 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9899 PCI_VENDOR_ID_ADAPTEC2, 0x14d0)
9900 },
9901 {
9902 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9903 PCI_VENDOR_ID_ADAPTEC2, 0x14e0)
9904 },
9905 {
9906 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9907 PCI_VENDOR_ID_ADAPTEC2, 0x14f0)
9908 },
9909 {
9910 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9911 PCI_VENDOR_ID_ADVANTECH, 0x8312)
9912 },
9913 {
9914 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9915 PCI_VENDOR_ID_DELL, 0x1fe0)
9916 },
9917 {
9918 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9919 PCI_VENDOR_ID_HP, 0x0600)
9920 },
9921 {
9922 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9923 PCI_VENDOR_ID_HP, 0x0601)
9924 },
9925 {
9926 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9927 PCI_VENDOR_ID_HP, 0x0602)
9928 },
9929 {
9930 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9931 PCI_VENDOR_ID_HP, 0x0603)
9932 },
9933 {
9934 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9935 PCI_VENDOR_ID_HP, 0x0609)
9936 },
9937 {
9938 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9939 PCI_VENDOR_ID_HP, 0x0650)
9940 },
9941 {
9942 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9943 PCI_VENDOR_ID_HP, 0x0651)
9944 },
9945 {
9946 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9947 PCI_VENDOR_ID_HP, 0x0652)
9948 },
9949 {
9950 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9951 PCI_VENDOR_ID_HP, 0x0653)
9952 },
9953 {
9954 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9955 PCI_VENDOR_ID_HP, 0x0654)
9956 },
9957 {
9958 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9959 PCI_VENDOR_ID_HP, 0x0655)
9960 },
9961 {
9962 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9963 PCI_VENDOR_ID_HP, 0x0700)
9964 },
9965 {
9966 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9967 PCI_VENDOR_ID_HP, 0x0701)
9968 },
9969 {
9970 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9971 PCI_VENDOR_ID_HP, 0x1001)
9972 },
9973 {
9974 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9975 PCI_VENDOR_ID_HP, 0x1002)
9976 },
9977 {
9978 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9979 PCI_VENDOR_ID_HP, 0x1100)
9980 },
9981 {
9982 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9983 PCI_VENDOR_ID_HP, 0x1101)
9984 },
9985 {
9986 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9987 0x1590, 0x0294)
9988 },
9989 {
9990 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9991 0x1590, 0x02db)
9992 },
9993 {
9994 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9995 0x1590, 0x02dc)
9996 },
9997 {
9998 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9999 0x1590, 0x032e)
10000 },
10001 {
10002 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10003 0x1590, 0x036f)
10004 },
10005 {
10006 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10007 0x1590, 0x0381)
10008 },
10009 {
10010 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10011 0x1590, 0x0382)
10012 },
10013 {
10014 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10015 0x1590, 0x0383)
10016 },
10017 {
10018 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10019 0x1d8d, 0x0800)
10020 },
10021 {
10022 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10023 0x1d8d, 0x0908)
10024 },
10025 {
10026 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10027 0x1d8d, 0x0806)
10028 },
10029 {
10030 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10031 0x1d8d, 0x0916)
10032 },
10033 {
10034 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10035 PCI_VENDOR_ID_GIGABYTE, 0x1000)
10036 },
10037 {
10038 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10039 0x1dfc, 0x3161)
10040 },
10041 {
10042 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10043 0x1f0c, 0x3161)
10044 },
10045 {
10046 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10047 0x1cf2, 0x0804)
10048 },
10049 {
10050 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10051 0x1cf2, 0x0805)
10052 },
10053 {
10054 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10055 0x1cf2, 0x0806)
10056 },
10057 {
10058 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10059 0x1cf2, 0x5445)
10060 },
10061 {
10062 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10063 0x1cf2, 0x5446)
10064 },
10065 {
10066 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10067 0x1cf2, 0x5447)
10068 },
10069 {
10070 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10071 0x1cf2, 0x5449)
10072 },
10073 {
10074 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10075 0x1cf2, 0x544a)
10076 },
10077 {
10078 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10079 0x1cf2, 0x544b)
10080 },
10081 {
10082 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10083 0x1cf2, 0x544d)
10084 },
10085 {
10086 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10087 0x1cf2, 0x544e)
10088 },
10089 {
10090 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10091 0x1cf2, 0x544f)
10092 },
10093 {
10094 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10095 0x1cf2, 0x54da)
10096 },
10097 {
10098 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10099 0x1cf2, 0x54db)
10100 },
10101 {
10102 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10103 0x1cf2, 0x54dc)
10104 },
10105 {
10106 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10107 0x1cf2, 0x0b27)
10108 },
10109 {
10110 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10111 0x1cf2, 0x0b29)
10112 },
10113 {
10114 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10115 0x1cf2, 0x0b45)
10116 },
10117 {
10118 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10119 0x1cc4, 0x0101)
10120 },
10121 {
10122 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10123 0x1cc4, 0x0201)
10124 },
10125 {
10126 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10127 PCI_VENDOR_ID_LENOVO, 0x0220)
10128 },
10129 {
10130 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10131 PCI_VENDOR_ID_LENOVO, 0x0221)
10132 },
10133 {
10134 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10135 PCI_VENDOR_ID_LENOVO, 0x0520)
10136 },
10137 {
10138 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10139 PCI_VENDOR_ID_LENOVO, 0x0522)
10140 },
10141 {
10142 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10143 PCI_VENDOR_ID_LENOVO, 0x0620)
10144 },
10145 {
10146 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10147 PCI_VENDOR_ID_LENOVO, 0x0621)
10148 },
10149 {
10150 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10151 PCI_VENDOR_ID_LENOVO, 0x0622)
10152 },
10153 {
10154 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10155 PCI_VENDOR_ID_LENOVO, 0x0623)
10156 },
10157 {
10158 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10159 0x1014, 0x0718)
10160 },
10161 {
10162 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10163 0x1137, 0x02f8)
10164 },
10165 {
10166 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10167 0x1137, 0x02f9)
10168 },
10169 {
10170 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10171 0x1137, 0x02fa)
10172 },
10173 {
10174 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10175 0x1e93, 0x1000)
10176 },
10177 {
10178 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10179 0x1e93, 0x1001)
10180 },
10181 {
10182 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10183 0x1e93, 0x1002)
10184 },
10185 {
10186 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10187 0x1e93, 0x1005)
10188 },
10189 {
10190 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10191 0x1f51, 0x1001)
10192 },
10193 {
10194 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10195 0x1f51, 0x1002)
10196 },
10197 {
10198 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10199 0x1f51, 0x1003)
10200 },
10201 {
10202 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10203 0x1f51, 0x1004)
10204 },
10205 {
10206 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10207 0x1f51, 0x1005)
10208 },
10209 {
10210 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10211 0x1f51, 0x1006)
10212 },
10213 {
10214 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10215 0x1f51, 0x1007)
10216 },
10217 {
10218 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10219 0x1f51, 0x1008)
10220 },
10221 {
10222 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10223 0x1f51, 0x1009)
10224 },
10225 {
10226 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10227 0x1f51, 0x100a)
10228 },
10229 {
10230 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10231 0x1f51, 0x100e)
10232 },
10233 {
10234 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10235 0x1f51, 0x100f)
10236 },
10237 {
10238 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10239 0x1f51, 0x1010)
10240 },
10241 {
10242 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10243 0x1f51, 0x1011)
10244 },
10245 {
10246 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10247 0x1f51, 0x1043)
10248 },
10249 {
10250 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10251 0x1f51, 0x1044)
10252 },
10253 {
10254 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10255 0x1f51, 0x1045)
10256 },
10257 {
10258 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
10259 PCI_ANY_ID, PCI_ANY_ID)
10260 },
10261 { 0 }
10262 };
10263
10264 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table);
10265
10266 static struct pci_driver pqi_pci_driver = {
10267 .name = DRIVER_NAME_SHORT,
10268 .id_table = pqi_pci_id_table,
10269 .probe = pqi_pci_probe,
10270 .remove = pqi_pci_remove,
10271 .shutdown = pqi_shutdown,
10272 #if defined(CONFIG_PM)
10273 .driver = {
10274 .pm = &pqi_pm_ops
10275 },
10276 #endif
10277 };
10278
pqi_init(void)10279 static int __init pqi_init(void)
10280 {
10281 int rc;
10282
10283 pr_info(DRIVER_NAME "\n");
10284 pqi_verify_structures();
10285 sis_verify_structures();
10286
10287 pqi_sas_transport_template = sas_attach_transport(&pqi_sas_transport_functions);
10288 if (!pqi_sas_transport_template)
10289 return -ENODEV;
10290
10291 pqi_process_module_params();
10292
10293 rc = pci_register_driver(&pqi_pci_driver);
10294 if (rc)
10295 sas_release_transport(pqi_sas_transport_template);
10296
10297 return rc;
10298 }
10299
pqi_cleanup(void)10300 static void __exit pqi_cleanup(void)
10301 {
10302 pci_unregister_driver(&pqi_pci_driver);
10303 sas_release_transport(pqi_sas_transport_template);
10304 }
10305
10306 module_init(pqi_init);
10307 module_exit(pqi_cleanup);
10308
pqi_verify_structures(void)10309 static void pqi_verify_structures(void)
10310 {
10311 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10312 sis_host_to_ctrl_doorbell) != 0x20);
10313 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10314 sis_interrupt_mask) != 0x34);
10315 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10316 sis_ctrl_to_host_doorbell) != 0x9c);
10317 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10318 sis_ctrl_to_host_doorbell_clear) != 0xa0);
10319 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10320 sis_driver_scratch) != 0xb0);
10321 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10322 sis_product_identifier) != 0xb4);
10323 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10324 sis_firmware_status) != 0xbc);
10325 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10326 sis_ctrl_shutdown_reason_code) != 0xcc);
10327 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10328 sis_mailbox) != 0x1000);
10329 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
10330 pqi_registers) != 0x4000);
10331
10332 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
10333 iu_type) != 0x0);
10334 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
10335 iu_length) != 0x2);
10336 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
10337 response_queue_id) != 0x4);
10338 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
10339 driver_flags) != 0x6);
10340 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8);
10341
10342 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
10343 status) != 0x0);
10344 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
10345 service_response) != 0x1);
10346 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
10347 data_present) != 0x2);
10348 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
10349 reserved) != 0x3);
10350 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
10351 residual_count) != 0x4);
10352 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
10353 data_length) != 0x8);
10354 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
10355 reserved1) != 0xa);
10356 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
10357 data) != 0xc);
10358 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c);
10359
10360 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10361 data_in_result) != 0x0);
10362 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10363 data_out_result) != 0x1);
10364 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10365 reserved) != 0x2);
10366 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10367 status) != 0x5);
10368 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10369 status_qualifier) != 0x6);
10370 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10371 sense_data_length) != 0x8);
10372 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10373 response_data_length) != 0xa);
10374 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10375 data_in_transferred) != 0xc);
10376 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10377 data_out_transferred) != 0x10);
10378 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
10379 data) != 0x14);
10380 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114);
10381
10382 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10383 signature) != 0x0);
10384 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10385 function_and_status_code) != 0x8);
10386 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10387 max_admin_iq_elements) != 0x10);
10388 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10389 max_admin_oq_elements) != 0x11);
10390 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10391 admin_iq_element_length) != 0x12);
10392 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10393 admin_oq_element_length) != 0x13);
10394 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10395 max_reset_timeout) != 0x14);
10396 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10397 legacy_intx_status) != 0x18);
10398 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10399 legacy_intx_mask_set) != 0x1c);
10400 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10401 legacy_intx_mask_clear) != 0x20);
10402 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10403 device_status) != 0x40);
10404 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10405 admin_iq_pi_offset) != 0x48);
10406 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10407 admin_oq_ci_offset) != 0x50);
10408 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10409 admin_iq_element_array_addr) != 0x58);
10410 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10411 admin_oq_element_array_addr) != 0x60);
10412 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10413 admin_iq_ci_addr) != 0x68);
10414 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10415 admin_oq_pi_addr) != 0x70);
10416 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10417 admin_iq_num_elements) != 0x78);
10418 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10419 admin_oq_num_elements) != 0x79);
10420 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10421 admin_queue_int_msg_num) != 0x7a);
10422 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10423 device_error) != 0x80);
10424 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10425 error_details) != 0x88);
10426 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10427 device_reset) != 0x90);
10428 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
10429 power_action) != 0x94);
10430 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100);
10431
10432 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10433 header.iu_type) != 0);
10434 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10435 header.iu_length) != 2);
10436 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10437 header.driver_flags) != 6);
10438 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10439 request_id) != 8);
10440 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10441 function_code) != 10);
10442 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10443 data.report_device_capability.buffer_length) != 44);
10444 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10445 data.report_device_capability.sg_descriptor) != 48);
10446 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10447 data.create_operational_iq.queue_id) != 12);
10448 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10449 data.create_operational_iq.element_array_addr) != 16);
10450 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10451 data.create_operational_iq.ci_addr) != 24);
10452 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10453 data.create_operational_iq.num_elements) != 32);
10454 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10455 data.create_operational_iq.element_length) != 34);
10456 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10457 data.create_operational_iq.queue_protocol) != 36);
10458 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10459 data.create_operational_oq.queue_id) != 12);
10460 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10461 data.create_operational_oq.element_array_addr) != 16);
10462 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10463 data.create_operational_oq.pi_addr) != 24);
10464 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10465 data.create_operational_oq.num_elements) != 32);
10466 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10467 data.create_operational_oq.element_length) != 34);
10468 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10469 data.create_operational_oq.queue_protocol) != 36);
10470 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10471 data.create_operational_oq.int_msg_num) != 40);
10472 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10473 data.create_operational_oq.coalescing_count) != 42);
10474 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10475 data.create_operational_oq.min_coalescing_time) != 44);
10476 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10477 data.create_operational_oq.max_coalescing_time) != 48);
10478 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
10479 data.delete_operational_queue.queue_id) != 12);
10480 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64);
10481 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
10482 data.create_operational_iq) != 64 - 11);
10483 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
10484 data.create_operational_oq) != 64 - 11);
10485 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
10486 data.delete_operational_queue) != 64 - 11);
10487
10488 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10489 header.iu_type) != 0);
10490 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10491 header.iu_length) != 2);
10492 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10493 header.driver_flags) != 6);
10494 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10495 request_id) != 8);
10496 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10497 function_code) != 10);
10498 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10499 status) != 11);
10500 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10501 data.create_operational_iq.status_descriptor) != 12);
10502 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10503 data.create_operational_iq.iq_pi_offset) != 16);
10504 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10505 data.create_operational_oq.status_descriptor) != 12);
10506 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
10507 data.create_operational_oq.oq_ci_offset) != 16);
10508 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64);
10509
10510 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10511 header.iu_type) != 0);
10512 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10513 header.iu_length) != 2);
10514 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10515 header.response_queue_id) != 4);
10516 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10517 header.driver_flags) != 6);
10518 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10519 request_id) != 8);
10520 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10521 nexus_id) != 10);
10522 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10523 buffer_length) != 12);
10524 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10525 lun_number) != 16);
10526 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10527 protocol_specific) != 24);
10528 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10529 error_index) != 27);
10530 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10531 cdb) != 32);
10532 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10533 timeout) != 60);
10534 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
10535 sg_descriptors) != 64);
10536 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) !=
10537 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
10538
10539 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10540 header.iu_type) != 0);
10541 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10542 header.iu_length) != 2);
10543 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10544 header.response_queue_id) != 4);
10545 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10546 header.driver_flags) != 6);
10547 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10548 request_id) != 8);
10549 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10550 nexus_id) != 12);
10551 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10552 buffer_length) != 16);
10553 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10554 data_encryption_key_index) != 22);
10555 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10556 encrypt_tweak_lower) != 24);
10557 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10558 encrypt_tweak_upper) != 28);
10559 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10560 cdb) != 32);
10561 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10562 error_index) != 48);
10563 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10564 num_sg_descriptors) != 50);
10565 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10566 cdb_length) != 51);
10567 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10568 lun_number) != 52);
10569 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
10570 sg_descriptors) != 64);
10571 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) !=
10572 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
10573
10574 BUILD_BUG_ON(offsetof(struct pqi_io_response,
10575 header.iu_type) != 0);
10576 BUILD_BUG_ON(offsetof(struct pqi_io_response,
10577 header.iu_length) != 2);
10578 BUILD_BUG_ON(offsetof(struct pqi_io_response,
10579 request_id) != 8);
10580 BUILD_BUG_ON(offsetof(struct pqi_io_response,
10581 error_index) != 10);
10582
10583 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10584 header.iu_type) != 0);
10585 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10586 header.iu_length) != 2);
10587 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10588 header.response_queue_id) != 4);
10589 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10590 request_id) != 8);
10591 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10592 data.report_event_configuration.buffer_length) != 12);
10593 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10594 data.report_event_configuration.sg_descriptors) != 16);
10595 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10596 data.set_event_configuration.global_event_oq_id) != 10);
10597 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10598 data.set_event_configuration.buffer_length) != 12);
10599 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
10600 data.set_event_configuration.sg_descriptors) != 16);
10601
10602 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
10603 max_inbound_iu_length) != 6);
10604 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
10605 max_outbound_iu_length) != 14);
10606 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16);
10607
10608 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10609 data_length) != 0);
10610 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10611 iq_arbitration_priority_support_bitmask) != 8);
10612 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10613 maximum_aw_a) != 9);
10614 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10615 maximum_aw_b) != 10);
10616 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10617 maximum_aw_c) != 11);
10618 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10619 max_inbound_queues) != 16);
10620 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10621 max_elements_per_iq) != 18);
10622 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10623 max_iq_element_length) != 24);
10624 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10625 min_iq_element_length) != 26);
10626 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10627 max_outbound_queues) != 30);
10628 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10629 max_elements_per_oq) != 32);
10630 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10631 intr_coalescing_time_granularity) != 34);
10632 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10633 max_oq_element_length) != 36);
10634 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10635 min_oq_element_length) != 38);
10636 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
10637 iu_layer_descriptors) != 64);
10638 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576);
10639
10640 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
10641 event_type) != 0);
10642 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
10643 oq_id) != 2);
10644 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4);
10645
10646 BUILD_BUG_ON(offsetof(struct pqi_event_config,
10647 num_event_descriptors) != 2);
10648 BUILD_BUG_ON(offsetof(struct pqi_event_config,
10649 descriptors) != 4);
10650
10651 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS !=
10652 ARRAY_SIZE(pqi_supported_event_types));
10653
10654 BUILD_BUG_ON(offsetof(struct pqi_event_response,
10655 header.iu_type) != 0);
10656 BUILD_BUG_ON(offsetof(struct pqi_event_response,
10657 header.iu_length) != 2);
10658 BUILD_BUG_ON(offsetof(struct pqi_event_response,
10659 event_type) != 8);
10660 BUILD_BUG_ON(offsetof(struct pqi_event_response,
10661 event_id) != 10);
10662 BUILD_BUG_ON(offsetof(struct pqi_event_response,
10663 additional_event_id) != 12);
10664 BUILD_BUG_ON(offsetof(struct pqi_event_response,
10665 data) != 16);
10666 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32);
10667
10668 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
10669 header.iu_type) != 0);
10670 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
10671 header.iu_length) != 2);
10672 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
10673 event_type) != 8);
10674 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
10675 event_id) != 10);
10676 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
10677 additional_event_id) != 12);
10678 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16);
10679
10680 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10681 header.iu_type) != 0);
10682 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10683 header.iu_length) != 2);
10684 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10685 request_id) != 8);
10686 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10687 nexus_id) != 10);
10688 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10689 timeout) != 14);
10690 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10691 lun_number) != 16);
10692 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10693 protocol_specific) != 24);
10694 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10695 outbound_queue_id_to_manage) != 26);
10696 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10697 request_id_to_manage) != 28);
10698 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
10699 task_management_function) != 30);
10700 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32);
10701
10702 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
10703 header.iu_type) != 0);
10704 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
10705 header.iu_length) != 2);
10706 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
10707 request_id) != 8);
10708 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
10709 nexus_id) != 10);
10710 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
10711 additional_response_info) != 12);
10712 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
10713 response_code) != 15);
10714 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16);
10715
10716 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10717 configured_logical_drive_count) != 0);
10718 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10719 configuration_signature) != 1);
10720 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10721 firmware_version_short) != 5);
10722 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10723 extended_logical_unit_count) != 154);
10724 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10725 firmware_build_number) != 190);
10726 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10727 vendor_id) != 200);
10728 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10729 product_id) != 208);
10730 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10731 extra_controller_flags) != 286);
10732 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10733 controller_mode) != 292);
10734 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10735 spare_part_number) != 293);
10736 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
10737 firmware_version_long) != 325);
10738
10739 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
10740 phys_bay_in_box) != 115);
10741 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
10742 device_type) != 120);
10743 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
10744 redundant_path_present_map) != 1736);
10745 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
10746 active_path_number) != 1738);
10747 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
10748 alternate_paths_phys_connector) != 1739);
10749 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
10750 alternate_paths_phys_box_on_port) != 1755);
10751 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
10752 current_queue_depth_limit) != 1796);
10753 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560);
10754
10755 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_buffer_header) != 4);
10756 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header,
10757 page_code) != 0);
10758 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header,
10759 subpage_code) != 1);
10760 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header,
10761 buffer_length) != 2);
10762
10763 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_page_header) != 4);
10764 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header,
10765 page_code) != 0);
10766 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header,
10767 subpage_code) != 1);
10768 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header,
10769 page_length) != 2);
10770
10771 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_io_page_aio_subpage)
10772 != 18);
10773 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10774 header) != 0);
10775 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10776 firmware_read_support) != 4);
10777 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10778 driver_read_support) != 5);
10779 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10780 firmware_write_support) != 6);
10781 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10782 driver_write_support) != 7);
10783 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10784 max_transfer_encrypted_sas_sata) != 8);
10785 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10786 max_transfer_encrypted_nvme) != 10);
10787 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10788 max_write_raid_5_6) != 12);
10789 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10790 max_write_raid_1_10_2drive) != 14);
10791 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
10792 max_write_raid_1_10_3drive) != 16);
10793
10794 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255);
10795 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255);
10796 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH %
10797 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
10798 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH %
10799 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
10800 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560);
10801 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH %
10802 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
10803 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560);
10804 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH %
10805 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
10806
10807 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS);
10808 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >=
10809 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP);
10810 }
10811