1 /*
2 * Copyright 2023 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "kfd_debug.h"
24 #include "kfd_device_queue_manager.h"
25 #include "kfd_topology.h"
26 #include <linux/file.h>
27 #include <uapi/linux/kfd_ioctl.h>
28
29 #define MAX_WATCH_ADDRESSES 4
30
kfd_dbg_ev_query_debug_event(struct kfd_process * process,unsigned int * queue_id,unsigned int * gpu_id,uint64_t exception_clear_mask,uint64_t * event_status)31 int kfd_dbg_ev_query_debug_event(struct kfd_process *process,
32 unsigned int *queue_id,
33 unsigned int *gpu_id,
34 uint64_t exception_clear_mask,
35 uint64_t *event_status)
36 {
37 struct process_queue_manager *pqm;
38 struct process_queue_node *pqn;
39 int i;
40
41 if (!(process && process->debug_trap_enabled))
42 return -ENODATA;
43
44 mutex_lock(&process->event_mutex);
45 *event_status = 0;
46 *queue_id = 0;
47 *gpu_id = 0;
48
49 /* find and report queue events */
50 pqm = &process->pqm;
51 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
52 uint64_t tmp = process->exception_enable_mask;
53
54 if (!pqn->q)
55 continue;
56
57 tmp &= pqn->q->properties.exception_status;
58
59 if (!tmp)
60 continue;
61
62 *event_status = pqn->q->properties.exception_status;
63 *queue_id = pqn->q->properties.queue_id;
64 *gpu_id = pqn->q->device->id;
65 pqn->q->properties.exception_status &= ~exception_clear_mask;
66 goto out;
67 }
68
69 /* find and report device events */
70 for (i = 0; i < process->n_pdds; i++) {
71 struct kfd_process_device *pdd = process->pdds[i];
72 uint64_t tmp = process->exception_enable_mask
73 & pdd->exception_status;
74
75 if (!tmp)
76 continue;
77
78 *event_status = pdd->exception_status;
79 *gpu_id = pdd->dev->id;
80 pdd->exception_status &= ~exception_clear_mask;
81 goto out;
82 }
83
84 /* report process events */
85 if (process->exception_enable_mask & process->exception_status) {
86 *event_status = process->exception_status;
87 process->exception_status &= ~exception_clear_mask;
88 }
89
90 out:
91 mutex_unlock(&process->event_mutex);
92 return *event_status ? 0 : -EAGAIN;
93 }
94
debug_event_write_work_handler(struct work_struct * work)95 void debug_event_write_work_handler(struct work_struct *work)
96 {
97 struct kfd_process *process;
98
99 static const char write_data = '.';
100 loff_t pos = 0;
101
102 process = container_of(work,
103 struct kfd_process,
104 debug_event_workarea);
105
106 if (process->debug_trap_enabled && process->dbg_ev_file)
107 kernel_write(process->dbg_ev_file, &write_data, 1, &pos);
108 }
109
110 /* update process/device/queue exception status, write to descriptor
111 * only if exception_status is enabled.
112 */
kfd_dbg_ev_raise(uint64_t event_mask,struct kfd_process * process,struct kfd_node * dev,unsigned int source_id,bool use_worker,void * exception_data,size_t exception_data_size)113 bool kfd_dbg_ev_raise(uint64_t event_mask,
114 struct kfd_process *process, struct kfd_node *dev,
115 unsigned int source_id, bool use_worker,
116 void *exception_data, size_t exception_data_size)
117 {
118 struct process_queue_manager *pqm;
119 struct process_queue_node *pqn;
120 int i;
121 static const char write_data = '.';
122 loff_t pos = 0;
123 bool is_subscribed = true;
124
125 if (!(process && process->debug_trap_enabled))
126 return false;
127
128 mutex_lock(&process->event_mutex);
129
130 if (event_mask & KFD_EC_MASK_DEVICE) {
131 for (i = 0; i < process->n_pdds; i++) {
132 struct kfd_process_device *pdd = process->pdds[i];
133
134 if (pdd->dev != dev)
135 continue;
136
137 pdd->exception_status |= event_mask & KFD_EC_MASK_DEVICE;
138
139 if (event_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
140 if (!pdd->vm_fault_exc_data) {
141 pdd->vm_fault_exc_data = kmemdup(
142 exception_data,
143 exception_data_size,
144 GFP_KERNEL);
145 if (!pdd->vm_fault_exc_data)
146 pr_debug("Failed to allocate exception data memory");
147 } else {
148 pr_debug("Debugger exception data not saved\n");
149 print_hex_dump_bytes("exception data: ",
150 DUMP_PREFIX_OFFSET,
151 exception_data,
152 exception_data_size);
153 }
154 }
155 break;
156 }
157 } else if (event_mask & KFD_EC_MASK_PROCESS) {
158 process->exception_status |= event_mask & KFD_EC_MASK_PROCESS;
159 } else {
160 pqm = &process->pqm;
161 list_for_each_entry(pqn, &pqm->queues,
162 process_queue_list) {
163 int target_id;
164
165 if (!pqn->q)
166 continue;
167
168 target_id = event_mask & KFD_EC_MASK(EC_QUEUE_NEW) ?
169 pqn->q->properties.queue_id :
170 pqn->q->doorbell_id;
171
172 if (pqn->q->device != dev || target_id != source_id)
173 continue;
174
175 pqn->q->properties.exception_status |= event_mask;
176 break;
177 }
178 }
179
180 if (process->exception_enable_mask & event_mask) {
181 if (use_worker)
182 schedule_work(&process->debug_event_workarea);
183 else
184 kernel_write(process->dbg_ev_file,
185 &write_data,
186 1,
187 &pos);
188 } else {
189 is_subscribed = false;
190 }
191
192 mutex_unlock(&process->event_mutex);
193
194 return is_subscribed;
195 }
196
197 /* set pending event queue entry from ring entry */
kfd_set_dbg_ev_from_interrupt(struct kfd_node * dev,unsigned int pasid,uint32_t doorbell_id,uint64_t trap_mask,void * exception_data,size_t exception_data_size)198 bool kfd_set_dbg_ev_from_interrupt(struct kfd_node *dev,
199 unsigned int pasid,
200 uint32_t doorbell_id,
201 uint64_t trap_mask,
202 void *exception_data,
203 size_t exception_data_size)
204 {
205 struct kfd_process *p;
206 bool signaled_to_debugger_or_runtime = false;
207
208 p = kfd_lookup_process_by_pasid(pasid);
209
210 if (!p)
211 return false;
212
213 if (!kfd_dbg_ev_raise(trap_mask, p, dev, doorbell_id, true,
214 exception_data, exception_data_size)) {
215 struct process_queue_manager *pqm;
216 struct process_queue_node *pqn;
217
218 if (!!(trap_mask & KFD_EC_MASK_QUEUE) &&
219 p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) {
220 mutex_lock(&p->mutex);
221
222 pqm = &p->pqm;
223 list_for_each_entry(pqn, &pqm->queues,
224 process_queue_list) {
225
226 if (!(pqn->q && pqn->q->device == dev &&
227 pqn->q->doorbell_id == doorbell_id))
228 continue;
229
230 kfd_send_exception_to_runtime(p, pqn->q->properties.queue_id,
231 trap_mask);
232
233 signaled_to_debugger_or_runtime = true;
234
235 break;
236 }
237
238 mutex_unlock(&p->mutex);
239 } else if (trap_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
240 kfd_dqm_evict_pasid(dev->dqm, p->pasid);
241 kfd_signal_vm_fault_event(dev, p->pasid, NULL,
242 exception_data);
243
244 signaled_to_debugger_or_runtime = true;
245 }
246 } else {
247 signaled_to_debugger_or_runtime = true;
248 }
249
250 kfd_unref_process(p);
251
252 return signaled_to_debugger_or_runtime;
253 }
254
kfd_dbg_send_exception_to_runtime(struct kfd_process * p,unsigned int dev_id,unsigned int queue_id,uint64_t error_reason)255 int kfd_dbg_send_exception_to_runtime(struct kfd_process *p,
256 unsigned int dev_id,
257 unsigned int queue_id,
258 uint64_t error_reason)
259 {
260 if (error_reason & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
261 struct kfd_process_device *pdd = NULL;
262 struct kfd_hsa_memory_exception_data *data;
263 int i;
264
265 for (i = 0; i < p->n_pdds; i++) {
266 if (p->pdds[i]->dev->id == dev_id) {
267 pdd = p->pdds[i];
268 break;
269 }
270 }
271
272 if (!pdd)
273 return -ENODEV;
274
275 data = (struct kfd_hsa_memory_exception_data *)
276 pdd->vm_fault_exc_data;
277
278 kfd_dqm_evict_pasid(pdd->dev->dqm, p->pasid);
279 kfd_signal_vm_fault_event(pdd->dev, p->pasid, NULL, data);
280 error_reason &= ~KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION);
281 }
282
283 if (error_reason & (KFD_EC_MASK(EC_PROCESS_RUNTIME))) {
284 /*
285 * block should only happen after the debugger receives runtime
286 * enable notice.
287 */
288 up(&p->runtime_enable_sema);
289 error_reason &= ~KFD_EC_MASK(EC_PROCESS_RUNTIME);
290 }
291
292 if (error_reason)
293 return kfd_send_exception_to_runtime(p, queue_id, error_reason);
294
295 return 0;
296 }
297
kfd_dbg_set_queue_workaround(struct queue * q,bool enable)298 static int kfd_dbg_set_queue_workaround(struct queue *q, bool enable)
299 {
300 struct mqd_update_info minfo = {0};
301 int err;
302
303 if (!q)
304 return 0;
305
306 if (!kfd_dbg_has_cwsr_workaround(q->device))
307 return 0;
308
309 if (enable && q->properties.is_user_cu_masked)
310 return -EBUSY;
311
312 minfo.update_flag = enable ? UPDATE_FLAG_DBG_WA_ENABLE : UPDATE_FLAG_DBG_WA_DISABLE;
313
314 q->properties.is_dbg_wa = enable;
315 err = q->device->dqm->ops.update_queue(q->device->dqm, q, &minfo);
316 if (err)
317 q->properties.is_dbg_wa = false;
318
319 return err;
320 }
321
kfd_dbg_set_workaround(struct kfd_process * target,bool enable)322 static int kfd_dbg_set_workaround(struct kfd_process *target, bool enable)
323 {
324 struct process_queue_manager *pqm = &target->pqm;
325 struct process_queue_node *pqn;
326 int r = 0;
327
328 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
329 r = kfd_dbg_set_queue_workaround(pqn->q, enable);
330 if (enable && r)
331 goto unwind;
332 }
333
334 return 0;
335
336 unwind:
337 list_for_each_entry(pqn, &pqm->queues, process_queue_list)
338 kfd_dbg_set_queue_workaround(pqn->q, false);
339
340 if (enable)
341 target->runtime_info.runtime_state = r == -EBUSY ?
342 DEBUG_RUNTIME_STATE_ENABLED_BUSY :
343 DEBUG_RUNTIME_STATE_ENABLED_ERROR;
344
345 return r;
346 }
347
kfd_dbg_set_mes_debug_mode(struct kfd_process_device * pdd,bool sq_trap_en)348 int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en)
349 {
350 uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode;
351 uint32_t flags = pdd->process->dbg_flags;
352
353 if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
354 return 0;
355
356 return amdgpu_mes_set_shader_debugger(pdd->dev->adev, pdd->proc_ctx_gpu_addr, spi_dbg_cntl,
357 pdd->watch_points, flags, sq_trap_en);
358 }
359
360 #define KFD_DEBUGGER_INVALID_WATCH_POINT_ID -1
kfd_dbg_get_dev_watch_id(struct kfd_process_device * pdd,int * watch_id)361 static int kfd_dbg_get_dev_watch_id(struct kfd_process_device *pdd, int *watch_id)
362 {
363 int i;
364
365 *watch_id = KFD_DEBUGGER_INVALID_WATCH_POINT_ID;
366
367 spin_lock(&pdd->dev->kfd->watch_points_lock);
368
369 for (i = 0; i < MAX_WATCH_ADDRESSES; i++) {
370 /* device watchpoint in use so skip */
371 if ((pdd->dev->kfd->alloc_watch_ids >> i) & 0x1)
372 continue;
373
374 pdd->alloc_watch_ids |= 0x1 << i;
375 pdd->dev->kfd->alloc_watch_ids |= 0x1 << i;
376 *watch_id = i;
377 spin_unlock(&pdd->dev->kfd->watch_points_lock);
378 return 0;
379 }
380
381 spin_unlock(&pdd->dev->kfd->watch_points_lock);
382
383 return -ENOMEM;
384 }
385
kfd_dbg_clear_dev_watch_id(struct kfd_process_device * pdd,int watch_id)386 static void kfd_dbg_clear_dev_watch_id(struct kfd_process_device *pdd, int watch_id)
387 {
388 spin_lock(&pdd->dev->kfd->watch_points_lock);
389
390 /* process owns device watch point so safe to clear */
391 if ((pdd->alloc_watch_ids >> watch_id) & 0x1) {
392 pdd->alloc_watch_ids &= ~(0x1 << watch_id);
393 pdd->dev->kfd->alloc_watch_ids &= ~(0x1 << watch_id);
394 }
395
396 spin_unlock(&pdd->dev->kfd->watch_points_lock);
397 }
398
kfd_dbg_owns_dev_watch_id(struct kfd_process_device * pdd,int watch_id)399 static bool kfd_dbg_owns_dev_watch_id(struct kfd_process_device *pdd, int watch_id)
400 {
401 bool owns_watch_id = false;
402
403 spin_lock(&pdd->dev->kfd->watch_points_lock);
404 owns_watch_id = watch_id < MAX_WATCH_ADDRESSES &&
405 ((pdd->alloc_watch_ids >> watch_id) & 0x1);
406
407 spin_unlock(&pdd->dev->kfd->watch_points_lock);
408
409 return owns_watch_id;
410 }
411
kfd_dbg_trap_clear_dev_address_watch(struct kfd_process_device * pdd,uint32_t watch_id)412 int kfd_dbg_trap_clear_dev_address_watch(struct kfd_process_device *pdd,
413 uint32_t watch_id)
414 {
415 int r;
416
417 if (!kfd_dbg_owns_dev_watch_id(pdd, watch_id))
418 return -EINVAL;
419
420 if (!pdd->dev->kfd->shared_resources.enable_mes) {
421 r = debug_lock_and_unmap(pdd->dev->dqm);
422 if (r)
423 return r;
424 }
425
426 amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
427 pdd->watch_points[watch_id] = pdd->dev->kfd2kgd->clear_address_watch(
428 pdd->dev->adev,
429 watch_id);
430 amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
431
432 if (!pdd->dev->kfd->shared_resources.enable_mes)
433 r = debug_map_and_unlock(pdd->dev->dqm);
434 else
435 r = kfd_dbg_set_mes_debug_mode(pdd, true);
436
437 kfd_dbg_clear_dev_watch_id(pdd, watch_id);
438
439 return r;
440 }
441
kfd_dbg_trap_set_dev_address_watch(struct kfd_process_device * pdd,uint64_t watch_address,uint32_t watch_address_mask,uint32_t * watch_id,uint32_t watch_mode)442 int kfd_dbg_trap_set_dev_address_watch(struct kfd_process_device *pdd,
443 uint64_t watch_address,
444 uint32_t watch_address_mask,
445 uint32_t *watch_id,
446 uint32_t watch_mode)
447 {
448 int xcc_id, r = kfd_dbg_get_dev_watch_id(pdd, watch_id);
449 uint32_t xcc_mask = pdd->dev->xcc_mask;
450
451 if (r)
452 return r;
453
454 if (!pdd->dev->kfd->shared_resources.enable_mes) {
455 r = debug_lock_and_unmap(pdd->dev->dqm);
456 if (r) {
457 kfd_dbg_clear_dev_watch_id(pdd, *watch_id);
458 return r;
459 }
460 }
461
462 amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
463 for_each_inst(xcc_id, xcc_mask)
464 pdd->watch_points[*watch_id] = pdd->dev->kfd2kgd->set_address_watch(
465 pdd->dev->adev,
466 watch_address,
467 watch_address_mask,
468 *watch_id,
469 watch_mode,
470 pdd->dev->vm_info.last_vmid_kfd,
471 xcc_id);
472 amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
473
474 if (!pdd->dev->kfd->shared_resources.enable_mes)
475 r = debug_map_and_unlock(pdd->dev->dqm);
476 else
477 r = kfd_dbg_set_mes_debug_mode(pdd, true);
478
479 /* HWS is broken so no point in HW rollback but release the watchpoint anyways */
480 if (r)
481 kfd_dbg_clear_dev_watch_id(pdd, *watch_id);
482
483 return 0;
484 }
485
kfd_dbg_clear_process_address_watch(struct kfd_process * target)486 static void kfd_dbg_clear_process_address_watch(struct kfd_process *target)
487 {
488 int i, j;
489
490 for (i = 0; i < target->n_pdds; i++)
491 for (j = 0; j < MAX_WATCH_ADDRESSES; j++)
492 kfd_dbg_trap_clear_dev_address_watch(target->pdds[i], j);
493 }
494
kfd_dbg_trap_set_flags(struct kfd_process * target,uint32_t * flags)495 int kfd_dbg_trap_set_flags(struct kfd_process *target, uint32_t *flags)
496 {
497 uint32_t prev_flags = target->dbg_flags;
498 int i, r = 0, rewind_count = 0;
499
500 for (i = 0; i < target->n_pdds; i++) {
501 if (!kfd_dbg_is_per_vmid_supported(target->pdds[i]->dev) &&
502 (*flags & KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP)) {
503 *flags = prev_flags;
504 return -EACCES;
505 }
506 }
507
508 target->dbg_flags = *flags & KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP;
509 *flags = prev_flags;
510 for (i = 0; i < target->n_pdds; i++) {
511 struct kfd_process_device *pdd = target->pdds[i];
512
513 if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
514 continue;
515
516 if (!pdd->dev->kfd->shared_resources.enable_mes)
517 r = debug_refresh_runlist(pdd->dev->dqm);
518 else
519 r = kfd_dbg_set_mes_debug_mode(pdd, true);
520
521 if (r) {
522 target->dbg_flags = prev_flags;
523 break;
524 }
525
526 rewind_count++;
527 }
528
529 /* Rewind flags */
530 if (r) {
531 target->dbg_flags = prev_flags;
532
533 for (i = 0; i < rewind_count; i++) {
534 struct kfd_process_device *pdd = target->pdds[i];
535
536 if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
537 continue;
538
539 if (!pdd->dev->kfd->shared_resources.enable_mes)
540 debug_refresh_runlist(pdd->dev->dqm);
541 else
542 kfd_dbg_set_mes_debug_mode(pdd, true);
543 }
544 }
545
546 return r;
547 }
548
549 /* kfd_dbg_trap_deactivate:
550 * target: target process
551 * unwind: If this is unwinding a failed kfd_dbg_trap_enable()
552 * unwind_count:
553 * If unwind == true, how far down the pdd list we need
554 * to unwind
555 * else: ignored
556 */
kfd_dbg_trap_deactivate(struct kfd_process * target,bool unwind,int unwind_count)557 void kfd_dbg_trap_deactivate(struct kfd_process *target, bool unwind, int unwind_count)
558 {
559 int i;
560
561 if (!unwind) {
562 uint32_t flags = 0;
563 int resume_count = resume_queues(target, 0, NULL);
564
565 if (resume_count)
566 pr_debug("Resumed %d queues\n", resume_count);
567
568 cancel_work_sync(&target->debug_event_workarea);
569 kfd_dbg_clear_process_address_watch(target);
570 kfd_dbg_trap_set_wave_launch_mode(target, 0);
571
572 kfd_dbg_trap_set_flags(target, &flags);
573 }
574
575 for (i = 0; i < target->n_pdds; i++) {
576 struct kfd_process_device *pdd = target->pdds[i];
577
578 /* If this is an unwind, and we have unwound the required
579 * enable calls on the pdd list, we need to stop now
580 * otherwise we may mess up another debugger session.
581 */
582 if (unwind && i == unwind_count)
583 break;
584
585 kfd_process_set_trap_debug_flag(&pdd->qpd, false);
586
587 /* GFX off is already disabled by debug activate if not RLC restore supported. */
588 if (kfd_dbg_is_rlc_restore_supported(pdd->dev))
589 amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
590 pdd->spi_dbg_override =
591 pdd->dev->kfd2kgd->disable_debug_trap(
592 pdd->dev->adev,
593 target->runtime_info.ttmp_setup,
594 pdd->dev->vm_info.last_vmid_kfd);
595 amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
596
597 if (!kfd_dbg_is_per_vmid_supported(pdd->dev) &&
598 release_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd))
599 pr_err("Failed to release debug vmid on [%i]\n", pdd->dev->id);
600
601 if (!pdd->dev->kfd->shared_resources.enable_mes)
602 debug_refresh_runlist(pdd->dev->dqm);
603 else
604 kfd_dbg_set_mes_debug_mode(pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev));
605 }
606
607 kfd_dbg_set_workaround(target, false);
608 }
609
kfd_dbg_clean_exception_status(struct kfd_process * target)610 static void kfd_dbg_clean_exception_status(struct kfd_process *target)
611 {
612 struct process_queue_manager *pqm;
613 struct process_queue_node *pqn;
614 int i;
615
616 for (i = 0; i < target->n_pdds; i++) {
617 struct kfd_process_device *pdd = target->pdds[i];
618
619 kfd_process_drain_interrupts(pdd);
620
621 pdd->exception_status = 0;
622 }
623
624 pqm = &target->pqm;
625 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
626 if (!pqn->q)
627 continue;
628
629 pqn->q->properties.exception_status = 0;
630 }
631
632 target->exception_status = 0;
633 }
634
kfd_dbg_trap_disable(struct kfd_process * target)635 int kfd_dbg_trap_disable(struct kfd_process *target)
636 {
637 if (!target->debug_trap_enabled)
638 return 0;
639
640 /*
641 * Defer deactivation to runtime if runtime not enabled otherwise reset
642 * attached running target runtime state to enable for re-attach.
643 */
644 if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED)
645 kfd_dbg_trap_deactivate(target, false, 0);
646 else if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED)
647 target->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED;
648
649 cancel_work_sync(&target->debug_event_workarea);
650 fput(target->dbg_ev_file);
651 target->dbg_ev_file = NULL;
652
653 if (target->debugger_process) {
654 atomic_dec(&target->debugger_process->debugged_process_count);
655 target->debugger_process = NULL;
656 }
657
658 target->debug_trap_enabled = false;
659 kfd_dbg_clean_exception_status(target);
660 kfd_unref_process(target);
661
662 return 0;
663 }
664
kfd_dbg_trap_activate(struct kfd_process * target)665 int kfd_dbg_trap_activate(struct kfd_process *target)
666 {
667 int i, r = 0;
668
669 r = kfd_dbg_set_workaround(target, true);
670 if (r)
671 return r;
672
673 for (i = 0; i < target->n_pdds; i++) {
674 struct kfd_process_device *pdd = target->pdds[i];
675
676 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) {
677 r = reserve_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd);
678
679 if (r) {
680 target->runtime_info.runtime_state = (r == -EBUSY) ?
681 DEBUG_RUNTIME_STATE_ENABLED_BUSY :
682 DEBUG_RUNTIME_STATE_ENABLED_ERROR;
683
684 goto unwind_err;
685 }
686 }
687
688 /* Disable GFX OFF to prevent garbage read/writes to debug registers.
689 * If RLC restore of debug registers is not supported and runtime enable
690 * hasn't done so already on ttmp setup request, restore the trap config registers.
691 *
692 * If RLC restore of debug registers is not supported, keep gfx off disabled for
693 * the debug session.
694 */
695 amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
696 if (!(kfd_dbg_is_rlc_restore_supported(pdd->dev) ||
697 target->runtime_info.ttmp_setup))
698 pdd->dev->kfd2kgd->enable_debug_trap(pdd->dev->adev, true,
699 pdd->dev->vm_info.last_vmid_kfd);
700
701 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap(
702 pdd->dev->adev,
703 false,
704 pdd->dev->vm_info.last_vmid_kfd);
705
706 if (kfd_dbg_is_rlc_restore_supported(pdd->dev))
707 amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
708
709 /*
710 * Setting the debug flag in the trap handler requires that the TMA has been
711 * allocated, which occurs during CWSR initialization.
712 * In the event that CWSR has not been initialized at this point, setting the
713 * flag will be called again during CWSR initialization if the target process
714 * is still debug enabled.
715 */
716 kfd_process_set_trap_debug_flag(&pdd->qpd, true);
717
718 if (!pdd->dev->kfd->shared_resources.enable_mes)
719 r = debug_refresh_runlist(pdd->dev->dqm);
720 else
721 r = kfd_dbg_set_mes_debug_mode(pdd, true);
722
723 if (r) {
724 target->runtime_info.runtime_state =
725 DEBUG_RUNTIME_STATE_ENABLED_ERROR;
726 goto unwind_err;
727 }
728 }
729
730 return 0;
731
732 unwind_err:
733 /* Enabling debug failed, we need to disable on
734 * all GPUs so the enable is all or nothing.
735 */
736 kfd_dbg_trap_deactivate(target, true, i);
737 return r;
738 }
739
kfd_dbg_trap_enable(struct kfd_process * target,uint32_t fd,void __user * runtime_info,uint32_t * runtime_size)740 int kfd_dbg_trap_enable(struct kfd_process *target, uint32_t fd,
741 void __user *runtime_info, uint32_t *runtime_size)
742 {
743 struct file *f;
744 uint32_t copy_size;
745 int i, r = 0;
746
747 if (target->debug_trap_enabled)
748 return -EALREADY;
749
750 /* Enable pre-checks */
751 for (i = 0; i < target->n_pdds; i++) {
752 struct kfd_process_device *pdd = target->pdds[i];
753
754 if (!KFD_IS_SOC15(pdd->dev))
755 return -ENODEV;
756
757 if (pdd->qpd.num_gws && (!kfd_dbg_has_gws_support(pdd->dev) ||
758 kfd_dbg_has_cwsr_workaround(pdd->dev)))
759 return -EBUSY;
760 }
761
762 copy_size = min((size_t)(*runtime_size), sizeof(target->runtime_info));
763
764 f = fget(fd);
765 if (!f) {
766 pr_err("Failed to get file for (%i)\n", fd);
767 return -EBADF;
768 }
769
770 target->dbg_ev_file = f;
771
772 /* defer activation to runtime if not runtime enabled */
773 if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED)
774 kfd_dbg_trap_activate(target);
775
776 /* We already hold the process reference but hold another one for the
777 * debug session.
778 */
779 kref_get(&target->ref);
780 target->debug_trap_enabled = true;
781
782 if (target->debugger_process)
783 atomic_inc(&target->debugger_process->debugged_process_count);
784
785 if (copy_to_user(runtime_info, (void *)&target->runtime_info, copy_size)) {
786 kfd_dbg_trap_deactivate(target, false, 0);
787 r = -EFAULT;
788 }
789
790 *runtime_size = sizeof(target->runtime_info);
791
792 return r;
793 }
794
kfd_dbg_validate_trap_override_request(struct kfd_process * p,uint32_t trap_override,uint32_t trap_mask_request,uint32_t * trap_mask_supported)795 static int kfd_dbg_validate_trap_override_request(struct kfd_process *p,
796 uint32_t trap_override,
797 uint32_t trap_mask_request,
798 uint32_t *trap_mask_supported)
799 {
800 int i = 0;
801
802 *trap_mask_supported = 0xffffffff;
803
804 for (i = 0; i < p->n_pdds; i++) {
805 struct kfd_process_device *pdd = p->pdds[i];
806 int err = pdd->dev->kfd2kgd->validate_trap_override_request(
807 pdd->dev->adev,
808 trap_override,
809 trap_mask_supported);
810
811 if (err)
812 return err;
813 }
814
815 if (trap_mask_request & ~*trap_mask_supported)
816 return -EACCES;
817
818 return 0;
819 }
820
kfd_dbg_trap_set_wave_launch_override(struct kfd_process * target,uint32_t trap_override,uint32_t trap_mask_bits,uint32_t trap_mask_request,uint32_t * trap_mask_prev,uint32_t * trap_mask_supported)821 int kfd_dbg_trap_set_wave_launch_override(struct kfd_process *target,
822 uint32_t trap_override,
823 uint32_t trap_mask_bits,
824 uint32_t trap_mask_request,
825 uint32_t *trap_mask_prev,
826 uint32_t *trap_mask_supported)
827 {
828 int r = 0, i;
829
830 r = kfd_dbg_validate_trap_override_request(target,
831 trap_override,
832 trap_mask_request,
833 trap_mask_supported);
834
835 if (r)
836 return r;
837
838 for (i = 0; i < target->n_pdds; i++) {
839 struct kfd_process_device *pdd = target->pdds[i];
840
841 amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
842 pdd->spi_dbg_override = pdd->dev->kfd2kgd->set_wave_launch_trap_override(
843 pdd->dev->adev,
844 pdd->dev->vm_info.last_vmid_kfd,
845 trap_override,
846 trap_mask_bits,
847 trap_mask_request,
848 trap_mask_prev,
849 pdd->spi_dbg_override);
850 amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
851
852 if (!pdd->dev->kfd->shared_resources.enable_mes)
853 r = debug_refresh_runlist(pdd->dev->dqm);
854 else
855 r = kfd_dbg_set_mes_debug_mode(pdd, true);
856
857 if (r)
858 break;
859 }
860
861 return r;
862 }
863
kfd_dbg_trap_set_wave_launch_mode(struct kfd_process * target,uint8_t wave_launch_mode)864 int kfd_dbg_trap_set_wave_launch_mode(struct kfd_process *target,
865 uint8_t wave_launch_mode)
866 {
867 int r = 0, i;
868
869 if (wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL &&
870 wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT &&
871 wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG)
872 return -EINVAL;
873
874 for (i = 0; i < target->n_pdds; i++) {
875 struct kfd_process_device *pdd = target->pdds[i];
876
877 amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
878 pdd->spi_dbg_launch_mode = pdd->dev->kfd2kgd->set_wave_launch_mode(
879 pdd->dev->adev,
880 wave_launch_mode,
881 pdd->dev->vm_info.last_vmid_kfd);
882 amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
883
884 if (!pdd->dev->kfd->shared_resources.enable_mes)
885 r = debug_refresh_runlist(pdd->dev->dqm);
886 else
887 r = kfd_dbg_set_mes_debug_mode(pdd, true);
888
889 if (r)
890 break;
891 }
892
893 return r;
894 }
895
kfd_dbg_trap_query_exception_info(struct kfd_process * target,uint32_t source_id,uint32_t exception_code,bool clear_exception,void __user * info,uint32_t * info_size)896 int kfd_dbg_trap_query_exception_info(struct kfd_process *target,
897 uint32_t source_id,
898 uint32_t exception_code,
899 bool clear_exception,
900 void __user *info,
901 uint32_t *info_size)
902 {
903 bool found = false;
904 int r = 0;
905 uint32_t copy_size, actual_info_size = 0;
906 uint64_t *exception_status_ptr = NULL;
907
908 if (!target)
909 return -EINVAL;
910
911 if (!info || !info_size)
912 return -EINVAL;
913
914 mutex_lock(&target->event_mutex);
915
916 if (KFD_DBG_EC_TYPE_IS_QUEUE(exception_code)) {
917 /* Per queue exceptions */
918 struct queue *queue = NULL;
919 int i;
920
921 for (i = 0; i < target->n_pdds; i++) {
922 struct kfd_process_device *pdd = target->pdds[i];
923 struct qcm_process_device *qpd = &pdd->qpd;
924
925 list_for_each_entry(queue, &qpd->queues_list, list) {
926 if (!found && queue->properties.queue_id == source_id) {
927 found = true;
928 break;
929 }
930 }
931 if (found)
932 break;
933 }
934
935 if (!found) {
936 r = -EINVAL;
937 goto out;
938 }
939
940 if (!(queue->properties.exception_status & KFD_EC_MASK(exception_code))) {
941 r = -ENODATA;
942 goto out;
943 }
944 exception_status_ptr = &queue->properties.exception_status;
945 } else if (KFD_DBG_EC_TYPE_IS_DEVICE(exception_code)) {
946 /* Per device exceptions */
947 struct kfd_process_device *pdd = NULL;
948 int i;
949
950 for (i = 0; i < target->n_pdds; i++) {
951 pdd = target->pdds[i];
952 if (pdd->dev->id == source_id) {
953 found = true;
954 break;
955 }
956 }
957
958 if (!found) {
959 r = -EINVAL;
960 goto out;
961 }
962
963 if (!(pdd->exception_status & KFD_EC_MASK(exception_code))) {
964 r = -ENODATA;
965 goto out;
966 }
967
968 if (exception_code == EC_DEVICE_MEMORY_VIOLATION) {
969 copy_size = min((size_t)(*info_size), pdd->vm_fault_exc_data_size);
970
971 if (copy_to_user(info, pdd->vm_fault_exc_data, copy_size)) {
972 r = -EFAULT;
973 goto out;
974 }
975 actual_info_size = pdd->vm_fault_exc_data_size;
976 if (clear_exception) {
977 kfree(pdd->vm_fault_exc_data);
978 pdd->vm_fault_exc_data = NULL;
979 pdd->vm_fault_exc_data_size = 0;
980 }
981 }
982 exception_status_ptr = &pdd->exception_status;
983 } else if (KFD_DBG_EC_TYPE_IS_PROCESS(exception_code)) {
984 /* Per process exceptions */
985 if (!(target->exception_status & KFD_EC_MASK(exception_code))) {
986 r = -ENODATA;
987 goto out;
988 }
989
990 if (exception_code == EC_PROCESS_RUNTIME) {
991 copy_size = min((size_t)(*info_size), sizeof(target->runtime_info));
992
993 if (copy_to_user(info, (void *)&target->runtime_info, copy_size)) {
994 r = -EFAULT;
995 goto out;
996 }
997
998 actual_info_size = sizeof(target->runtime_info);
999 }
1000
1001 exception_status_ptr = &target->exception_status;
1002 } else {
1003 pr_debug("Bad exception type [%i]\n", exception_code);
1004 r = -EINVAL;
1005 goto out;
1006 }
1007
1008 *info_size = actual_info_size;
1009 if (clear_exception)
1010 *exception_status_ptr &= ~KFD_EC_MASK(exception_code);
1011 out:
1012 mutex_unlock(&target->event_mutex);
1013 return r;
1014 }
1015
kfd_dbg_trap_device_snapshot(struct kfd_process * target,uint64_t exception_clear_mask,void __user * user_info,uint32_t * number_of_device_infos,uint32_t * entry_size)1016 int kfd_dbg_trap_device_snapshot(struct kfd_process *target,
1017 uint64_t exception_clear_mask,
1018 void __user *user_info,
1019 uint32_t *number_of_device_infos,
1020 uint32_t *entry_size)
1021 {
1022 struct kfd_dbg_device_info_entry device_info;
1023 uint32_t tmp_entry_size = *entry_size, tmp_num_devices;
1024 int i, r = 0;
1025
1026 if (!(target && user_info && number_of_device_infos && entry_size))
1027 return -EINVAL;
1028
1029 tmp_num_devices = min_t(size_t, *number_of_device_infos, target->n_pdds);
1030 *number_of_device_infos = target->n_pdds;
1031 *entry_size = min_t(size_t, *entry_size, sizeof(device_info));
1032
1033 if (!tmp_num_devices)
1034 return 0;
1035
1036 memset(&device_info, 0, sizeof(device_info));
1037
1038 mutex_lock(&target->event_mutex);
1039
1040 /* Run over all pdd of the process */
1041 for (i = 0; i < tmp_num_devices; i++) {
1042 struct kfd_process_device *pdd = target->pdds[i];
1043 struct kfd_topology_device *topo_dev = kfd_topology_device_by_id(pdd->dev->id);
1044
1045 device_info.gpu_id = pdd->dev->id;
1046 device_info.exception_status = pdd->exception_status;
1047 device_info.lds_base = pdd->lds_base;
1048 device_info.lds_limit = pdd->lds_limit;
1049 device_info.scratch_base = pdd->scratch_base;
1050 device_info.scratch_limit = pdd->scratch_limit;
1051 device_info.gpuvm_base = pdd->gpuvm_base;
1052 device_info.gpuvm_limit = pdd->gpuvm_limit;
1053 device_info.location_id = topo_dev->node_props.location_id;
1054 device_info.vendor_id = topo_dev->node_props.vendor_id;
1055 device_info.device_id = topo_dev->node_props.device_id;
1056 device_info.revision_id = pdd->dev->adev->pdev->revision;
1057 device_info.subsystem_vendor_id = pdd->dev->adev->pdev->subsystem_vendor;
1058 device_info.subsystem_device_id = pdd->dev->adev->pdev->subsystem_device;
1059 device_info.fw_version = pdd->dev->kfd->mec_fw_version;
1060 device_info.gfx_target_version =
1061 topo_dev->node_props.gfx_target_version;
1062 device_info.simd_count = topo_dev->node_props.simd_count;
1063 device_info.max_waves_per_simd =
1064 topo_dev->node_props.max_waves_per_simd;
1065 device_info.array_count = topo_dev->node_props.array_count;
1066 device_info.simd_arrays_per_engine =
1067 topo_dev->node_props.simd_arrays_per_engine;
1068 device_info.num_xcc = NUM_XCC(pdd->dev->xcc_mask);
1069 device_info.capability = topo_dev->node_props.capability;
1070 device_info.debug_prop = topo_dev->node_props.debug_prop;
1071
1072 if (exception_clear_mask)
1073 pdd->exception_status &= ~exception_clear_mask;
1074
1075 if (copy_to_user(user_info, &device_info, *entry_size)) {
1076 r = -EFAULT;
1077 break;
1078 }
1079
1080 user_info += tmp_entry_size;
1081 }
1082
1083 mutex_unlock(&target->event_mutex);
1084
1085 return r;
1086 }
1087
kfd_dbg_set_enabled_debug_exception_mask(struct kfd_process * target,uint64_t exception_set_mask)1088 void kfd_dbg_set_enabled_debug_exception_mask(struct kfd_process *target,
1089 uint64_t exception_set_mask)
1090 {
1091 uint64_t found_mask = 0;
1092 struct process_queue_manager *pqm;
1093 struct process_queue_node *pqn;
1094 static const char write_data = '.';
1095 loff_t pos = 0;
1096 int i;
1097
1098 mutex_lock(&target->event_mutex);
1099
1100 found_mask |= target->exception_status;
1101
1102 pqm = &target->pqm;
1103 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
1104 if (!pqn->q)
1105 continue;
1106
1107 found_mask |= pqn->q->properties.exception_status;
1108 }
1109
1110 for (i = 0; i < target->n_pdds; i++) {
1111 struct kfd_process_device *pdd = target->pdds[i];
1112
1113 found_mask |= pdd->exception_status;
1114 }
1115
1116 if (exception_set_mask & found_mask)
1117 kernel_write(target->dbg_ev_file, &write_data, 1, &pos);
1118
1119 target->exception_enable_mask = exception_set_mask;
1120
1121 mutex_unlock(&target->event_mutex);
1122 }
1123