1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Common Board Device Tree for 4 * Microsoft Mobile MSM8994 Octagon Platforms 5 * 6 * Copyright (c) 2020, Konrad Dybcio 7 * Copyright (c) 2020, Gustave Monce <gustave.monce@outlook.com> 8 */ 9 10#include "pm8994.dtsi" 11#include "pmi8994.dtsi" 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/input/gpio-keys.h> 14#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15 16/* 17 * Delete all generic (msm8994.dtsi) reserved 18 * memory mappings which are different in this device. 19 */ 20/delete-node/ &adsp_mem; 21/delete-node/ &audio_mem; 22/delete-node/ &cont_splash_mem; 23/delete-node/ &mba_mem; 24/delete-node/ &mpss_mem; 25/delete-node/ &peripheral_region; 26/delete-node/ &rmtfs_mem; 27/delete-node/ &smem_mem; 28 29/ { 30 /* 31 * Most Lumia 950/XL users use GRUB to load their kernels, 32 * hence there is no need for msm-id and friends. 33 */ 34 35 /* 36 * This enables graphical output via bootloader-enabled display. 37 * acpi=no is required due to WP platforms having ACPI support, but 38 * only for Windows-based OSes. 39 */ 40 chosen { 41 bootargs = "earlycon=efifb console=efifb acpi=no"; 42 43 #address-cells = <2>; 44 #size-cells = <2>; 45 ranges; 46 }; 47 48 clocks { 49 divclk4: divclk4 { 50 compatible = "fixed-clock"; 51 #clock-cells = <0>; 52 53 clock-frequency = <32768>; 54 clock-output-names = "divclk4"; 55 56 pinctrl-names = "default"; 57 pinctrl-0 = <&divclk4_pin_a>; 58 }; 59 }; 60 61 gpio-keys { 62 compatible = "gpio-keys"; 63 autorepeat; 64 65 volup-key { 66 label = "Volume Up"; 67 gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>; 68 linux,input-type = <1>; 69 linux,code = <KEY_VOLUMEUP>; 70 wakeup-source; 71 debounce-interval = <15>; 72 }; 73 74 camsnap-key { 75 label = "Camera Snapshot"; 76 gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>; 77 linux,input-type = <1>; 78 linux,code = <KEY_CAMERA>; 79 wakeup-source; 80 debounce-interval = <15>; 81 }; 82 83 camfocus-key { 84 label = "Camera Focus"; 85 gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>; 86 linux,input-type = <1>; 87 linux,code = <KEY_VOLUMEUP>; 88 wakeup-source; 89 debounce-interval = <15>; 90 }; 91 }; 92 93 gpio-hall-sensor { 94 compatible = "gpio-keys"; 95 96 pinctrl-names = "default"; 97 pinctrl-0 = <&hall_front_default &hall_back_default>; 98 99 label = "GPIO Hall Effect Sensor"; 100 101 event-hall-front-sensor { 102 label = "Hall Effect Front Sensor"; 103 gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; 104 linux,input-type = <EV_SW>; 105 linux,code = <SW_LID>; 106 linux,can-disable; 107 }; 108 109 event-hall-back-sensor { 110 label = "Hall Effect Back Sensor"; 111 gpios = <&tlmm 75 GPIO_ACTIVE_HIGH>; 112 linux,input-type = <EV_SW>; 113 linux,code = <SW_MACHINE_COVER>; 114 linux,can-disable; 115 }; 116 }; 117 118 reserved-memory { 119 /* 120 * This device being a WP platform has a very different 121 * memory layout than other Android based devices. 122 * This memory layout is directly copied from the original 123 * device UEFI firmware, and adapted based on observations 124 * using JTAG for the Qualcomm Peripheral Image regions. 125 */ 126 127 uefi_mem: memory@200000 { 128 reg = <0 0x00200000 0 0x100000>; 129 no-map; 130 }; 131 132 mppark_mem: memory@300000 { 133 reg = <0 0x00300000 0 0x80000>; 134 no-map; 135 }; 136 137 fbpt_mem: memory@380000 { 138 reg = <0 0x00380000 0 0x1000>; 139 no-map; 140 }; 141 142 dbg2_mem: memory@381000 { 143 reg = <0 0x00381000 0 0x4000>; 144 no-map; 145 }; 146 147 capsule_mem: memory@385000 { 148 reg = <0 0x00385000 0 0x1000>; 149 no-map; 150 }; 151 152 tpmctrl_mem: memory@386000 { 153 reg = <0 0x00386000 0 0x3000>; 154 no-map; 155 }; 156 157 uefiinfo_mem: memory@389000 { 158 reg = <0 0x00389000 0 0x1000>; 159 no-map; 160 }; 161 162 reset_mem: memory@389000 { 163 reg = <0 0x00389000 0 0x1000>; 164 no-map; 165 }; 166 167 resuncached_mem: memory@38e000 { 168 reg = <0 0x0038e000 0 0x72000>; 169 no-map; 170 }; 171 172 disp_mem: memory@400000 { 173 reg = <0 0x00400000 0 0x800000>; 174 no-map; 175 }; 176 177 uefistack_mem: memory@c00000 { 178 reg = <0 0x00c00000 0 0x40000>; 179 no-map; 180 }; 181 182 cpuvect_mem: memory@c40000 { 183 reg = <0 0x00c40000 0 0x10000>; 184 no-map; 185 }; 186 187 rescached_mem: memory@400000 { 188 reg = <0 0x00c50000 0 0xb0000>; 189 no-map; 190 }; 191 192 tzapps_mem: memory@6500000 { 193 reg = <0 0x06500000 0 0x500000>; 194 no-map; 195 }; 196 197 smem_mem: memory@6a00000 { 198 reg = <0 0x06a00000 0 0x200000>; 199 no-map; 200 }; 201 202 hyp_mem: memory@6c00000 { 203 reg = <0 0x06c00000 0 0x100000>; 204 no-map; 205 }; 206 207 tz_mem: memory@6d00000 { 208 reg = <0 0x06d00000 0 0x160000>; 209 no-map; 210 }; 211 212 rfsa_adsp_mem: memory@6e60000 { 213 reg = <0 0x06e60000 0 0x10000>; 214 no-map; 215 }; 216 217 rfsa_mpss_mem: memory@6e70000 { 218 compatible = "qcom,rmtfs-mem"; 219 reg = <0 0x06e70000 0 0x10000>; 220 no-map; 221 222 qcom,client-id = <1>; 223 }; 224 225 /* 226 * Value obtained from the device original ACPI DSDT table 227 * MPSS_EFS / SBL 228 */ 229 mba_mem: memory@6e80000 { 230 reg = <0 0x06e80000 0 0x180000>; 231 no-map; 232 }; 233 234 /* 235 * Peripheral Image loader region begin! 236 * The region reserved for pil is 0x7000000-0xef00000 237 */ 238 239 mpss_mem: memory@7000000 { 240 reg = <0 0x07000000 0 0x5a00000>; 241 no-map; 242 }; 243 244 adsp_mem: memory@ca00000 { 245 reg = <0 0x0ca00000 0 0x1800000>; 246 no-map; 247 }; 248 249 venus_mem: memory@e200000 { 250 reg = <0 0x0e200000 0 0x500000>; 251 no-map; 252 }; 253 254 pil_metadata_mem: memory@e700000 { 255 reg = <0 0x0e700000 0 0x4000>; 256 no-map; 257 }; 258 259 memory@e704000 { 260 reg = <0 0x0e704000 0 0x7fc000>; 261 no-map; 262 }; 263 /* Peripheral Image loader region end */ 264 265 cnss_mem: memory@ef00000 { 266 reg = <0 0x0ef00000 0 0x300000>; 267 no-map; 268 }; 269 }; 270}; 271 272&blsp1_i2c1 { 273 status = "okay"; 274 275 rmi4-i2c-dev@4b { 276 compatible = "syna,rmi4-i2c"; 277 reg = <0x4b>; 278 #address-cells = <1>; 279 #size-cells = <0>; 280 281 interrupt-parent = <&tlmm>; 282 interrupts = <77 IRQ_TYPE_EDGE_FALLING>; 283 284 rmi4-f01@1 { 285 reg = <0x01>; 286 syna,nosleep-mode = <1>; 287 }; 288 289 rmi4-f12@12 { 290 reg = <0x12>; 291 syna,sensor-type = <1>; 292 syna,clip-x-low = <0>; 293 syna,clip-x-high = <1440>; 294 syna,clip-y-low = <0>; 295 syna,clip-y-high = <2560>; 296 }; 297 }; 298}; 299 300&blsp1_i2c2 { 301 status = "okay"; 302 303 /* 304 * This device uses the Texas Instruments TAS2553, however the TAS2552 driver 305 * seems to work here. In the future a proper driver might need to 306 * be written for this device. 307 */ 308 tas2553: tas2553@40 { 309 compatible = "ti,tas2552"; 310 reg = <0x40>; 311 312 vbat-supply = <&vph_pwr>; 313 iovdd-supply = <&vreg_s4a_1p8>; 314 avdd-supply = <&vreg_s4a_1p8>; 315 316 enable-gpio = <&pm8994_gpios 12 GPIO_ACTIVE_HIGH>; 317 }; 318}; 319 320&blsp1_i2c5 { 321 status = "okay"; 322 323 ak09912: magnetometer@c { 324 compatible = "asahi-kasei,ak09912"; 325 reg = <0xc>; 326 327 interrupt-parent = <&tlmm>; 328 interrupts = <26 IRQ_TYPE_EDGE_RISING>; 329 330 vdd-supply = <&vreg_l18a_2p85>; 331 vid-supply = <&vreg_lvs2a_1p8>; 332 }; 333 334 zpa2326: barometer@5c { 335 compatible = "murata,zpa2326"; 336 reg = <0x5c>; 337 338 interrupt-parent = <&tlmm>; 339 interrupts = <74 IRQ_TYPE_EDGE_RISING>; 340 341 vdd-supply = <&vreg_lvs2a_1p8>; 342 }; 343 344 mpu6050: accelerometer@68 { 345 compatible = "invensense,mpu6500"; 346 reg = <0x68>; 347 348 interrupt-parent = <&tlmm>; 349 interrupts = <64 IRQ_TYPE_EDGE_RISING>; 350 351 vdd-supply = <&vreg_lvs2a_1p8>; 352 vddio-supply = <&vreg_lvs2a_1p8>; 353 }; 354}; 355 356&blsp1_i2c6 { 357 status = "okay"; 358 359 pn547: pn547@28 { 360 compatible = "nxp,pn544-i2c"; 361 362 reg = <0x28>; 363 364 interrupt-parent = <&tlmm>; 365 interrupts = <29 IRQ_TYPE_EDGE_RISING>; 366 367 enable-gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; 368 firmware-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>; 369 }; 370}; 371 372&blsp1_uart2 { 373 status = "okay"; 374}; 375 376&blsp2_i2c1 { 377 status = "okay"; 378 379 sideinteraction: ad7147_captouch@2c { 380 compatible = "ad,ad7147_captouch"; 381 reg = <0x2c>; 382 383 pinctrl-names = "default", "sleep"; 384 pinctrl-0 = <&grip_default>; 385 pinctrl-1 = <&grip_sleep>; 386 387 interrupts = <&tlmm 96 IRQ_TYPE_EDGE_FALLING>; 388 389 button_num = <8>; 390 touchpad_num = <0>; 391 wheel_num = <0>; 392 slider_num = <0>; 393 394 vcc-supply = <&vreg_l18a_2p85>; 395 }; 396 397 /* 398 * The QPDS-T900/QPDS-T930 is a customized part built for Nokia 399 * by Avago. It is very similar to the Avago APDS-9930 with some 400 * minor differences. In the future a proper driver might need to 401 * be written for this device. For now this works fine. 402 */ 403 qpdst900: qpdst900@39 { 404 compatible = "avago,apds9930"; 405 reg = <0x39>; 406 407 interrupt-parent = <&tlmm>; 408 interrupts = <40 IRQ_TYPE_EDGE_FALLING>; 409 }; 410}; 411 412&blsp2_i2c5 { 413 status = "okay"; 414 415 fm_radio: si4705@11 { 416 compatible = "silabs,si470x"; 417 reg = <0x11>; 418 419 interrupt-parent = <&tlmm>; 420 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 421 reset-gpios = <&tlmm 93 GPIO_ACTIVE_HIGH>; 422 }; 423 424 vreg_lpddr_1p1: fan53526a@6c { 425 compatible = "fcs,fan53526"; 426 reg = <0x6c>; 427 428 regulator-min-microvolt = <1100000>; 429 regulator-max-microvolt = <1100000>; 430 vin-supply = <&vph_pwr>; 431 fcs,suspend-voltage-selector = <1>; 432 regulator-always-on; /* Turning off DDR power doesn't sound good. */ 433 }; 434 435 /* ANX7816 HDMI bridge (needs MDSS HDMI) */ 436}; 437 438&blsp2_spi4 { 439 status = "okay"; 440 441 /* 442 * This device is a Lattice UC120 USB-C PD PHY. 443 * It is actually a Lattice iCE40 FPGA pre-programmed by 444 * the device firmware with a specific bitstream 445 * enabling USB Type C PHY functionality. 446 * Communication is done via a proprietary protocol over SPI. 447 * 448 * TODO: Once a proper driver is available, replace this. 449 */ 450 uc120: ice5lp2k@0 { 451 compatible = "lattice,ice40-fpga-mgr"; 452 reg = <0>; 453 spi-max-frequency = <5000000>; 454 cdone-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>; 455 reset-gpios = <&pmi8994_gpios 4 GPIO_ACTIVE_LOW>; 456 }; 457}; 458 459&blsp2_uart2 { 460 status = "okay"; 461 462 qca6174_bt: bluetooth { 463 compatible = "qcom,qca6174-bt"; 464 465 enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>; 466 clocks = <&divclk4>; 467 }; 468}; 469 470&pm8994_gpios { 471 bt_en_gpios: bt-en-gpios-state { 472 pinconf { 473 pins = "gpio19"; 474 function = PMIC_GPIO_FUNC_NORMAL; 475 output-low; 476 power-source = <PM8994_GPIO_S4>; 477 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 478 bias-pull-down; 479 }; 480 }; 481 482 divclk4_pin_a: divclk4-state { 483 pinconf { 484 pins = "gpio18"; 485 function = PMIC_GPIO_FUNC_FUNC2; 486 power-source = <PM8994_GPIO_S4>; 487 bias-disable; 488 }; 489 }; 490}; 491 492&pm8994_pon { 493 pwrkey { 494 compatible = "qcom,pm8941-pwrkey"; 495 interrupts = <0 8 0 IRQ_TYPE_EDGE_BOTH>; 496 debounce = <15625>; 497 linux,code = <KEY_POWER>; 498 }; 499 500 resin { 501 compatible = "qcom,pm8941-resin"; 502 interrupts = <0 8 1 IRQ_TYPE_EDGE_BOTH>; 503 debounce = <15625>; 504 linux,code = <KEY_VOLUMEDOWN>; 505 }; 506}; 507 508&pmi8994_gpios { 509 pinctrl-0 = <&hd3ss460_pol &hd3ss460_amsel &hd3ss460_en>; 510 pinctrl-names = "default"; 511 512 /* 513 * This device uses a TI HD3SS460 Type-C MUX 514 * As this device has no driver currently, 515 * the configuration for USB Face Up is set-up here. 516 * 517 * TODO: remove once a driver is available 518 * TODO: add VBUS GPIO 5 519 */ 520 hd3ss460_pol: pol-low-state { 521 pins = "gpio8"; 522 function = PMIC_GPIO_FUNC_NORMAL; 523 qcom,drive-strength = <3>; 524 bias-pull-down; 525 }; 526 527 hd3ss460_amsel: amsel-high-state { 528 pins = "gpio9"; 529 function = PMIC_GPIO_FUNC_NORMAL; 530 qcom,drive-strength = <1>; 531 bias-pull-up; 532 }; 533 534 hd3ss460_en: en-high-state { 535 pins = "gpio10"; 536 function = PMIC_GPIO_FUNC_NORMAL; 537 qcom,drive-strength = <1>; 538 bias-pull-up; 539 }; 540}; 541 542&pmi8994_spmi_regulators { 543 vdd_gfx: s2 { 544 regulator-min-microvolt = <980000>; 545 regulator-max-microvolt = <980000>; 546 }; 547}; 548 549&rpm_requests { 550 /* These values were taken from the original firmware ACPI tables */ 551 pm8994_regulators: regulators-0 { 552 compatible = "qcom,rpm-pm8994-regulators"; 553 554 vdd_s1-supply = <&vph_pwr>; 555 vdd_s2-supply = <&vph_pwr>; 556 vdd_s3-supply = <&vph_pwr>; 557 vdd_s4-supply = <&vph_pwr>; 558 vdd_s5-supply = <&vph_pwr>; 559 vdd_s6-supply = <&vph_pwr>; 560 vdd_s7-supply = <&vph_pwr>; 561 vdd_s8-supply = <&vph_pwr>; 562 vdd_s9-supply = <&vph_pwr>; 563 vdd_s10-supply = <&vph_pwr>; 564 vdd_s11-supply = <&vph_pwr>; 565 vdd_s12-supply = <&vph_pwr>; 566 vdd_l1-supply = <&vreg_s1b_1p0>; 567 vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>; 568 vdd_l3_l11-supply = <&vreg_s3a_1p3>; 569 vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>; 570 vdd_l5_l7-supply = <&vreg_s5a_2p15>; 571 vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>; 572 vdd_l8_l16_l30-supply = <&vph_pwr>; 573 vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>; 574 vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>; 575 vdd_l14_l15-supply = <&vreg_s5a_2p15>; 576 vdd_l17_l29-supply = <&vph_pwr_bbyp>; 577 vdd_l20_l21-supply = <&vph_pwr_bbyp>; 578 vdd_l25-supply = <&vreg_s5a_2p15>; 579 vdd_lvs1_2-supply = <&vreg_s4a_1p8>; 580 581 /* S1, S2, S6 and S12 are managed by RPMPD */ 582 583 vreg_s3a_1p3: s3 { 584 regulator-min-microvolt = <1300000>; 585 regulator-max-microvolt = <1300000>; 586 regulator-allow-set-load; 587 regulator-system-load = <300000>; 588 }; 589 590 vreg_s4a_1p8: s4 { 591 regulator-min-microvolt = <1800000>; 592 regulator-max-microvolt = <1800000>; 593 regulator-allow-set-load; 594 regulator-always-on; 595 regulator-system-load = <325000>; 596 }; 597 598 vreg_s5a_2p15: s5 { 599 regulator-min-microvolt = <2150000>; 600 regulator-max-microvolt = <2150000>; 601 regulator-allow-set-load; 602 regulator-system-load = <325000>; 603 }; 604 605 vreg_s7a_1p0: s7 { 606 regulator-min-microvolt = <1000000>; 607 regulator-max-microvolt = <1000000>; 608 }; 609 610 /* 611 * S8 - SPMI-managed VDD_APC0 612 * S9, S10 and S11 (the main one) - SPMI-managed VDD_APC1 613 */ 614 615 vreg_l1a_1p0: l1 { 616 regulator-min-microvolt = <1000000>; 617 regulator-max-microvolt = <1000000>; 618 }; 619 620 vreg_l2a_1p25: l2 { 621 regulator-min-microvolt = <1250000>; 622 regulator-max-microvolt = <1250000>; 623 regulator-allow-set-load; 624 regulator-system-load = <4160>; 625 }; 626 627 vreg_l3a_1p2: l3 { 628 regulator-min-microvolt = <1200000>; 629 regulator-max-microvolt = <1200000>; 630 regulator-always-on; 631 regulator-allow-set-load; 632 regulator-system-load = <80000>; 633 }; 634 635 vreg_l4a_1p225: l4 { 636 regulator-min-microvolt = <1225000>; 637 regulator-max-microvolt = <1225000>; 638 }; 639 640 /* L5 is inaccessible from RPM */ 641 642 vreg_l6a_1p8: l6 { 643 regulator-min-microvolt = <1800000>; 644 regulator-max-microvolt = <1800000>; 645 regulator-allow-set-load; 646 regulator-system-load = <1000>; 647 }; 648 649 /* L7 is inaccessible from RPM */ 650 651 vreg_l8a_1p8: l8 { 652 regulator-min-microvolt = <1800000>; 653 regulator-max-microvolt = <1800000>; 654 }; 655 656 vreg_l9a_1p8: l9 { 657 regulator-min-microvolt = <1800000>; 658 regulator-max-microvolt = <1800000>; 659 }; 660 661 vreg_l10a_1p8: l10 { 662 regulator-min-microvolt = <1800000>; 663 regulator-max-microvolt = <1800000>; 664 }; 665 666 vreg_l11a_1p2: l11 { 667 regulator-min-microvolt = <1200000>; 668 regulator-max-microvolt = <1200000>; 669 regulator-always-on; 670 regulator-allow-set-load; 671 regulator-system-load = <35000>; 672 }; 673 674 vreg_l12a_1p8: l12 { 675 regulator-min-microvolt = <1800000>; 676 regulator-max-microvolt = <1800000>; 677 regulator-always-on; 678 regulator-allow-set-load; 679 regulator-system-load = <50000>; 680 }; 681 682 vreg_l13a_2p95: l13 { 683 regulator-min-microvolt = <1850000>; 684 regulator-max-microvolt = <2950000>; 685 regulator-always-on; 686 regulator-allow-set-load; 687 regulator-system-load = <22000>; 688 }; 689 690 vreg_l14a_1p8: l14 { 691 regulator-min-microvolt = <1800000>; 692 regulator-max-microvolt = <1800000>; 693 regulator-always-on; 694 regulator-allow-set-load; 695 regulator-system-load = <52000>; 696 }; 697 698 vreg_l15a_1p8: l15 { 699 regulator-min-microvolt = <1800000>; 700 regulator-max-microvolt = <1800000>; 701 }; 702 703 vreg_l16a_2p7: l16 { 704 regulator-min-microvolt = <2700000>; 705 regulator-max-microvolt = <2700000>; 706 }; 707 708 vreg_l17a_2p7: l17 { 709 regulator-min-microvolt = <2800000>; 710 regulator-max-microvolt = <2800000>; 711 regulator-always-on; 712 regulator-allow-set-load; 713 regulator-system-load = <300000>; 714 }; 715 716 vreg_l18a_2p85: l18 { 717 regulator-min-microvolt = <2850000>; 718 regulator-max-microvolt = <2850000>; 719 regulator-always-on; 720 regulator-allow-set-load; 721 regulator-system-load = <600000>; 722 }; 723 724 vreg_l19a_3p3: l19 { 725 regulator-min-microvolt = <3300000>; 726 regulator-max-microvolt = <3300000>; 727 regulator-always-on; 728 regulator-allow-set-load; 729 regulator-system-load = <500000>; 730 }; 731 732 vreg_l20a_2p95: l20 { 733 regulator-min-microvolt = <2950000>; 734 regulator-max-microvolt = <2950000>; 735 regulator-always-on; 736 regulator-boot-on; 737 regulator-allow-set-load; 738 regulator-system-load = <570000>; 739 }; 740 741 vreg_l21a_2p95: l21 { 742 regulator-min-microvolt = <2950000>; 743 regulator-max-microvolt = <2950000>; 744 regulator-always-on; 745 regulator-allow-set-load; 746 regulator-system-load = <800000>; 747 }; 748 749 vreg_l22a_3p0: l22 { 750 regulator-min-microvolt = <3000000>; 751 regulator-max-microvolt = <3000000>; 752 regulator-always-on; 753 regulator-allow-set-load; 754 regulator-system-load = <150000>; 755 }; 756 757 vreg_l23a_2p8: l23 { 758 regulator-min-microvolt = <2850000>; 759 regulator-max-microvolt = <2850000>; 760 regulator-always-on; 761 regulator-allow-set-load; 762 regulator-system-load = <80000>; 763 }; 764 765 vreg_l24a_3p075: l24 { 766 regulator-min-microvolt = <3075000>; 767 regulator-max-microvolt = <3150000>; 768 regulator-allow-set-load; 769 regulator-system-load = <5800>; 770 }; 771 772 vreg_l25a_1p1: l25 { 773 regulator-min-microvolt = <1150000>; 774 regulator-max-microvolt = <1150000>; 775 regulator-always-on; 776 regulator-allow-set-load; 777 regulator-system-load = <80000>; 778 }; 779 780 vreg_l26a_1p0: l26 { 781 regulator-min-microvolt = <1000000>; 782 regulator-max-microvolt = <1000000>; 783 }; 784 785 vreg_l27a_1p05: l27 { 786 regulator-min-microvolt = <1000000>; 787 regulator-max-microvolt = <1000000>; 788 regulator-always-on; 789 regulator-allow-set-load; 790 regulator-system-load = <500000>; 791 }; 792 793 vreg_l28a_1p0: l28 { 794 regulator-min-microvolt = <1000000>; 795 regulator-max-microvolt = <1000000>; 796 regulator-always-on; 797 regulator-allow-set-load; 798 regulator-system-load = <26000>; 799 }; 800 801 vreg_l29a_2p8: l29 { 802 regulator-min-microvolt = <2850000>; 803 regulator-max-microvolt = <2850000>; 804 regulator-always-on; 805 regulator-allow-set-load; 806 regulator-system-load = <80000>; 807 }; 808 809 vreg_l30a_1p8: l30 { 810 regulator-min-microvolt = <1800000>; 811 regulator-max-microvolt = <1800000>; 812 regulator-always-on; 813 regulator-allow-set-load; 814 regulator-system-load = <2500>; 815 }; 816 817 vreg_l31a_1p2: l31 { 818 regulator-min-microvolt = <1200000>; 819 regulator-max-microvolt = <1200000>; 820 regulator-always-on; 821 regulator-allow-set-load; 822 regulator-system-load = <600000>; 823 }; 824 825 vreg_l32a_1p8: l32 { 826 regulator-min-microvolt = <1800000>; 827 regulator-max-microvolt = <1800000>; 828 }; 829 830 vreg_lvs1a_1p8: lvs1 { }; 831 832 vreg_lvs2a_1p8: lvs2 { }; 833 }; 834 835 pmi8994_regulators: regulators-1 { 836 compatible = "qcom,rpm-pmi8994-regulators"; 837 838 vdd_s1-supply = <&vph_pwr>; 839 vdd_bst_byp-supply = <&vph_pwr>; 840 841 vreg_s1b_1p0: s1 { 842 regulator-min-microvolt = <1025000>; 843 regulator-max-microvolt = <1025000>; 844 }; 845 846 /* S2 & S3 - VDD_GFX */ 847 848 vph_pwr_bbyp: boost-bypass { 849 regulator-min-microvolt = <3300000>; 850 regulator-max-microvolt = <3300000>; 851 }; 852 }; 853}; 854 855&sdhc1 { 856 status = "okay"; 857 858 /* 859 * This device is shipped with HS400 capabable eMMCs 860 * However various brands have been used in various product batches, 861 * including a Samsung eMMC (BGND3R) which features a quirk with HS400. 862 * Set the speed to HS200 as a safety measure. 863 */ 864 mmc-hs200-1_8v; 865}; 866 867&sdhc2 { 868 status = "okay"; 869 870 pinctrl-names = "default", "sleep"; 871 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; 872 pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; 873 874 vmmc-supply = <&vreg_l21a_2p95>; 875 vqmmc-supply = <&vreg_l13a_2p95>; 876 877 cd-gpios = <&pm8994_gpios 8 GPIO_ACTIVE_LOW>; 878}; 879 880&tlmm { 881 grip_default: grip-default-state { 882 pins = "gpio39"; 883 function = "gpio"; 884 drive-strength = <6>; 885 bias-pull-down; 886 }; 887 888 grip_sleep: grip-sleep-state { 889 pins = "gpio39"; 890 function = "gpio"; 891 drive-strength = <2>; 892 bias-pull-down; 893 }; 894 895 hall_front_default: hall-front-default-state { 896 pins = "gpio42"; 897 function = "gpio"; 898 drive-strength = <2>; 899 bias-disable; 900 }; 901 902 hall_back_default: hall-back-default-state { 903 pins = "gpio75"; 904 function = "gpio"; 905 drive-strength = <2>; 906 bias-disable; 907 }; 908}; 909