1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/usb/gadget/qe_udc.h
4  *
5  * Copyright (C) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
6  *
7  * 	Xiaobo Xie <X.Xie@freescale.com>
8  * 	Li Yang <leoli@freescale.com>
9  *
10  * Description:
11  * Freescale USB device/endpoint management registers
12  */
13 
14 #ifndef __FSL_QE_UDC_H
15 #define __FSL_QE_UDC_H
16 
17 /* SoC type */
18 #define PORT_CPM	0
19 #define PORT_QE		1
20 
21 #define USB_MAX_ENDPOINTS               4
22 #define USB_MAX_PIPES                   USB_MAX_ENDPOINTS
23 #define USB_EP0_MAX_SIZE		64
24 #define USB_MAX_CTRL_PAYLOAD            0x4000
25 #define USB_BDRING_LEN			16
26 #define USB_BDRING_LEN_RX		256
27 #define USB_BDRING_LEN_TX		16
28 #define MIN_EMPTY_BDS			128
29 #define MAX_DATA_BDS			8
30 #define USB_CRC_SIZE			2
31 #define USB_DIR_BOTH			0x88
32 #define R_BUF_MAXSIZE			0x800
33 #define USB_EP_PARA_ALIGNMENT		32
34 
35 /* USB Mode Register bit define */
36 #define USB_MODE_EN		0x01
37 #define USB_MODE_HOST		0x02
38 #define USB_MODE_TEST		0x04
39 #define USB_MODE_SFTE		0x08
40 #define USB_MODE_RESUME		0x40
41 #define USB_MODE_LSS		0x80
42 
43 /* USB Slave Address Register Mask */
44 #define USB_SLVADDR_MASK	0x7F
45 
46 /* USB Endpoint register define */
47 #define USB_EPNUM_MASK		0xF000
48 #define USB_EPNUM_SHIFT		12
49 
50 #define USB_TRANS_MODE_SHIFT	8
51 #define USB_TRANS_CTR		0x0000
52 #define USB_TRANS_INT		0x0100
53 #define USB_TRANS_BULK		0x0200
54 #define USB_TRANS_ISO		0x0300
55 
56 #define USB_EP_MF		0x0020
57 #define USB_EP_RTE		0x0010
58 
59 #define USB_THS_SHIFT		2
60 #define USB_THS_MASK		0x000c
61 #define USB_THS_NORMAL		0x0
62 #define USB_THS_IGNORE_IN	0x0004
63 #define USB_THS_NACK		0x0008
64 #define USB_THS_STALL		0x000c
65 
66 #define USB_RHS_SHIFT   	0
67 #define USB_RHS_MASK		0x0003
68 #define USB_RHS_NORMAL  	0x0
69 #define USB_RHS_IGNORE_OUT	0x0001
70 #define USB_RHS_NACK		0x0002
71 #define USB_RHS_STALL		0x0003
72 
73 #define USB_RTHS_MASK		0x000f
74 
75 /* USB Command Register define */
76 #define USB_CMD_STR_FIFO	0x80
77 #define USB_CMD_FLUSH_FIFO	0x40
78 #define USB_CMD_ISFT		0x20
79 #define USB_CMD_DSFT		0x10
80 #define USB_CMD_EP_MASK		0x03
81 
82 /* USB Event and Mask Register define */
83 #define USB_E_MSF_MASK		0x0800
84 #define USB_E_SFT_MASK		0x0400
85 #define USB_E_RESET_MASK	0x0200
86 #define USB_E_IDLE_MASK		0x0100
87 #define USB_E_TXE4_MASK		0x0080
88 #define USB_E_TXE3_MASK		0x0040
89 #define USB_E_TXE2_MASK		0x0020
90 #define USB_E_TXE1_MASK		0x0010
91 #define USB_E_SOF_MASK		0x0008
92 #define USB_E_BSY_MASK		0x0004
93 #define USB_E_TXB_MASK		0x0002
94 #define USB_E_RXB_MASK		0x0001
95 #define USBER_ALL_CLEAR 	0x0fff
96 
97 #define USB_E_DEFAULT_DEVICE   (USB_E_RESET_MASK | USB_E_TXE4_MASK | \
98 				USB_E_TXE3_MASK | USB_E_TXE2_MASK | \
99 				USB_E_TXE1_MASK | USB_E_BSY_MASK | \
100 				USB_E_TXB_MASK | USB_E_RXB_MASK)
101 
102 #define USB_E_TXE_MASK         (USB_E_TXE4_MASK | USB_E_TXE3_MASK|\
103 				 USB_E_TXE2_MASK | USB_E_TXE1_MASK)
104 /* USB Status Register define */
105 #define USB_IDLE_STATUS_MASK	0x01
106 
107 /* USB Start of Frame Timer */
108 #define USB_USSFT_MASK		0x3FFF
109 
110 /* USB Frame Number Register */
111 #define USB_USFRN_MASK		0xFFFF
112 
113 struct usb_device_para{
114 	u16	epptr[4];
115 	u32	rstate;
116 	u32	rptr;
117 	u16	frame_n;
118 	u16	rbcnt;
119 	u32	rtemp;
120 	u32	rxusb_data;
121 	u16	rxuptr;
122 	u8	reso[2];
123 	u32	softbl;
124 	u8	sofucrctemp;
125 };
126 
127 struct usb_ep_para{
128 	u16	rbase;
129 	u16	tbase;
130 	u8	rbmr;
131 	u8	tbmr;
132 	u16	mrblr;
133 	u16	rbptr;
134 	u16	tbptr;
135 	u32	tstate;
136 	u32	tptr;
137 	u16	tcrc;
138 	u16	tbcnt;
139 	u32	ttemp;
140 	u16	txusbu_ptr;
141 	u8	reserve[2];
142 };
143 
144 #define USB_BUSMODE_GBL		0x20
145 #define USB_BUSMODE_BO_MASK	0x18
146 #define USB_BUSMODE_BO_SHIFT	0x3
147 #define USB_BUSMODE_BE		0x2
148 #define USB_BUSMODE_CETM	0x04
149 #define USB_BUSMODE_DTB		0x02
150 
151 /* Endpoint basic handle */
152 #define ep_index(EP)		((EP)->ep.desc->bEndpointAddress & 0xF)
153 #define ep_maxpacket(EP)	((EP)->ep.maxpacket)
154 #define ep_is_in(EP)	((ep_index(EP) == 0) ? (EP->udc->ep0_dir == \
155 			USB_DIR_IN) : ((EP)->ep.desc->bEndpointAddress \
156 			& USB_DIR_IN) == USB_DIR_IN)
157 
158 /* ep0 transfer state */
159 #define WAIT_FOR_SETUP          0
160 #define DATA_STATE_XMIT         1
161 #define DATA_STATE_NEED_ZLP     2
162 #define WAIT_FOR_OUT_STATUS     3
163 #define DATA_STATE_RECV         4
164 
165 /* ep tramsfer mode */
166 #define USBP_TM_CTL	0
167 #define USBP_TM_ISO	1
168 #define USBP_TM_BULK	2
169 #define USBP_TM_INT	3
170 
171 /*-----------------------------------------------------------------------------
172 	USB RX And TX DATA Frame
173  -----------------------------------------------------------------------------*/
174 struct qe_frame{
175 	u8 *data;
176 	u32 len;
177 	u32 status;
178 	u32 info;
179 
180 	void *privdata;
181 	struct list_head node;
182 };
183 
184 /* Frame structure, info field. */
185 #define PID_DATA0              0x80000000 /* Data toggle zero */
186 #define PID_DATA1              0x40000000 /* Data toggle one  */
187 #define PID_SETUP              0x20000000 /* setup bit */
188 #define SETUP_STATUS           0x10000000 /* setup status bit */
189 #define SETADDR_STATUS         0x08000000 /* setupup address status bit */
190 #define NO_REQ                 0x04000000 /* Frame without request */
191 #define HOST_DATA              0x02000000 /* Host data frame */
192 #define FIRST_PACKET_IN_FRAME  0x01000000 /* first packet in the frame */
193 #define TOKEN_FRAME            0x00800000 /* Host token frame */
194 #define ZLP                    0x00400000 /* Zero length packet */
195 #define IN_TOKEN_FRAME         0x00200000 /* In token package */
196 #define OUT_TOKEN_FRAME        0x00100000 /* Out token package */
197 #define SETUP_TOKEN_FRAME      0x00080000 /* Setup token package */
198 #define STALL_FRAME            0x00040000 /* Stall handshake */
199 #define NACK_FRAME             0x00020000 /* Nack handshake */
200 #define NO_PID                 0x00010000 /* No send PID */
201 #define NO_CRC                 0x00008000 /* No send CRC */
202 #define HOST_COMMAND           0x00004000 /* Host command frame   */
203 
204 /* Frame status field */
205 /* Receive side */
206 #define FRAME_OK               0x00000000 /* Frame transmitted or received OK */
207 #define FRAME_ERROR            0x80000000 /* Error occurred on frame */
208 #define START_FRAME_LOST       0x40000000 /* START_FRAME_LOST */
209 #define END_FRAME_LOST         0x20000000 /* END_FRAME_LOST */
210 #define RX_ER_NONOCT           0x10000000 /* Rx Non Octet Aligned Packet */
211 #define RX_ER_BITSTUFF         0x08000000 /* Frame Aborted --Received packet
212 					     with bit stuff error */
213 #define RX_ER_CRC              0x04000000 /* Received packet with CRC error */
214 #define RX_ER_OVERUN           0x02000000 /* Over-run occurred on reception */
215 #define RX_ER_PID              0x01000000 /* Wrong PID received */
216 /* Tranmit side */
217 #define TX_ER_NAK              0x00800000 /* Received NAK handshake */
218 #define TX_ER_STALL            0x00400000 /* Received STALL handshake */
219 #define TX_ER_TIMEOUT          0x00200000 /* Transmit time out */
220 #define TX_ER_UNDERUN          0x00100000 /* Transmit underrun */
221 #define FRAME_INPROGRESS       0x00080000 /* Frame is being transmitted */
222 #define ER_DATA_UNDERUN        0x00040000 /* Frame is shorter then expected */
223 #define ER_DATA_OVERUN         0x00020000 /* Frame is longer then expected */
224 
225 /* QE USB frame operation functions */
226 #define frame_get_length(frm) (frm->len)
227 #define frame_set_length(frm, leng) (frm->len = leng)
228 #define frame_get_data(frm) (frm->data)
229 #define frame_set_data(frm, dat) (frm->data = dat)
230 #define frame_get_info(frm) (frm->info)
231 #define frame_set_info(frm, inf) (frm->info = inf)
232 #define frame_get_status(frm) (frm->status)
233 #define frame_set_status(frm, stat) (frm->status = stat)
234 #define frame_get_privdata(frm) (frm->privdata)
235 #define frame_set_privdata(frm, dat) (frm->privdata = dat)
236 
qe_frame_clean(struct qe_frame * frm)237 static inline void qe_frame_clean(struct qe_frame *frm)
238 {
239 	frame_set_data(frm, NULL);
240 	frame_set_length(frm, 0);
241 	frame_set_status(frm, FRAME_OK);
242 	frame_set_info(frm, 0);
243 	frame_set_privdata(frm, NULL);
244 }
245 
qe_frame_init(struct qe_frame * frm)246 static inline void qe_frame_init(struct qe_frame *frm)
247 {
248 	qe_frame_clean(frm);
249 	INIT_LIST_HEAD(&(frm->node));
250 }
251 
252 struct qe_req {
253 	struct usb_request req;
254 	struct list_head queue;
255 	/* ep_queue() func will add
256 	 a request->queue into a udc_ep->queue 'd tail */
257 	struct qe_ep *ep;
258 	unsigned mapped:1;
259 };
260 
261 struct qe_ep {
262 	struct usb_ep ep;
263 	struct list_head queue;
264 	struct qe_udc *udc;
265 	struct usb_gadget *gadget;
266 
267 	u8 state;
268 
269 	struct qe_bd __iomem *rxbase;
270 	struct qe_bd __iomem *n_rxbd;
271 	struct qe_bd __iomem *e_rxbd;
272 
273 	struct qe_bd __iomem *txbase;
274 	struct qe_bd __iomem *n_txbd;
275 	struct qe_bd __iomem *c_txbd;
276 
277 	struct qe_frame *rxframe;
278 	u8 *rxbuffer;
279 	dma_addr_t rxbuf_d;
280 	u8 rxbufmap;
281 	unsigned char localnack;
282 	int has_data;
283 
284 	struct qe_frame *txframe;
285 	struct qe_req *tx_req;
286 	int sent;  /*data already sent */
287 	int last;  /*data sent in the last time*/
288 
289 	u8 dir;
290 	u8 epnum;
291 	u8 tm; /* transfer mode */
292 	u8 data01;
293 	u8 init;
294 
295 	u8 already_seen;
296 	u8 enable_tasklet;
297 	u8 setup_stage;
298 	u32 last_io;            /* timestamp */
299 
300 	char name[14];
301 
302 	unsigned double_buf:1;
303 	unsigned stopped:1;
304 	unsigned fnf:1;
305 	unsigned has_dma:1;
306 
307 	u8 ackwait;
308 	u8 dma_channel;
309 	u16 dma_counter;
310 	int lch;
311 
312 	struct timer_list timer;
313 };
314 
315 struct qe_udc {
316 	struct usb_gadget gadget;
317 	struct usb_gadget_driver *driver;
318 	struct device *dev;
319 	struct qe_ep eps[USB_MAX_ENDPOINTS];
320 	struct usb_ctrlrequest local_setup_buff;
321 	spinlock_t lock;	/* lock for set/config qe_udc */
322 	unsigned long soc_type;		/* QE or CPM soc */
323 
324 	struct qe_req *status_req;	/* ep0 status request */
325 
326 	/* USB and EP Parameter Block pointer */
327 	struct usb_device_para __iomem *usb_param;
328 	struct usb_ep_para __iomem *ep_param[4];
329 
330 	u32 max_pipes;          /* Device max pipes */
331 	u32 max_use_endpts;     /* Max endpointes to be used */
332 	u32 bus_reset;          /* Device is bus reseting */
333 	u32 resume_state;       /* USB state to resume*/
334 	u32 usb_state;          /* USB current state */
335 	u32 usb_next_state;     /* USB next state */
336 	u32 ep0_state;          /* Endpoint zero state */
337 	u32 ep0_dir;            /* Endpoint zero direction: can be
338 				USB_DIR_IN or USB_DIR_OUT*/
339 	u32 usb_sof_count;      /* SOF count */
340 	u32 errors;             /* USB ERRORs count */
341 
342 	u8 *tmpbuf;
343 	u32 c_start;
344 	u32 c_end;
345 
346 	u8 *nullbuf;
347 	u8 *statusbuf;
348 	dma_addr_t nullp;
349 	u8 nullmap;
350 	u8 device_address;	/* Device USB address */
351 
352 	unsigned int usb_clock;
353 	unsigned int usb_irq;
354 	struct usb_ctlr __iomem *usb_regs;
355 
356 	struct tasklet_struct rx_tasklet;
357 
358 	struct completion *done;	/* to make sure release() is done */
359 };
360 
361 #define EP_STATE_IDLE	0
362 #define EP_STATE_NACK	1
363 #define EP_STATE_STALL	2
364 
365 /*
366  * transmit BD's status
367  */
368 #define T_R           0x80000000         /* ready bit */
369 #define T_W           0x20000000         /* wrap bit */
370 #define T_I           0x10000000         /* interrupt on completion */
371 #define T_L           0x08000000         /* last */
372 #define T_TC          0x04000000         /* transmit CRC */
373 #define T_CNF         0x02000000         /* wait for  transmit confirm */
374 #define T_LSP         0x01000000         /* Low-speed transaction */
375 #define T_PID         0x00c00000         /* packet id */
376 #define T_NAK         0x00100000         /* No ack. */
377 #define T_STAL        0x00080000         /* Stall received */
378 #define T_TO          0x00040000         /* time out */
379 #define T_UN          0x00020000         /* underrun */
380 
381 #define DEVICE_T_ERROR    (T_UN | T_TO)
382 #define HOST_T_ERROR      (T_UN | T_TO | T_NAK | T_STAL)
383 #define DEVICE_T_BD_MASK  DEVICE_T_ERROR
384 #define HOST_T_BD_MASK    HOST_T_ERROR
385 
386 #define T_PID_SHIFT   6
387 #define T_PID_DATA0   0x00800000         /* Data 0 toggle */
388 #define T_PID_DATA1   0x00c00000         /* Data 1 toggle */
389 
390 /*
391  * receive BD's status
392  */
393 #define R_E           0x80000000         /* buffer empty */
394 #define R_W           0x20000000         /* wrap bit */
395 #define R_I           0x10000000         /* interrupt on reception */
396 #define R_L           0x08000000         /* last */
397 #define R_F           0x04000000         /* first */
398 #define R_PID         0x00c00000         /* packet id */
399 #define R_NO          0x00100000         /* Rx Non Octet Aligned Packet */
400 #define R_AB          0x00080000         /* Frame Aborted */
401 #define R_CR          0x00040000         /* CRC Error */
402 #define R_OV          0x00020000         /* Overrun */
403 
404 #define R_ERROR       (R_NO | R_AB | R_CR | R_OV)
405 #define R_BD_MASK     R_ERROR
406 
407 #define R_PID_DATA0   0x00000000
408 #define R_PID_DATA1   0x00400000
409 #define R_PID_SETUP   0x00800000
410 
411 #define CPM_USB_STOP_TX 0x2e600000
412 #define CPM_USB_RESTART_TX 0x2e600000
413 #define CPM_USB_STOP_TX_OPCODE 0x0a
414 #define CPM_USB_RESTART_TX_OPCODE 0x0b
415 #define CPM_USB_EP_SHIFT 5
416 
417 #endif  /* __FSL_QE_UDC_H */
418