1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3 * Copyright (C) 2008-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #ifndef __iwl_fw_file_h__
8 #define __iwl_fw_file_h__
9
10 #include <linux/netdevice.h>
11 #include <linux/nl80211.h>
12
13 /* v1/v2 uCode file layout */
14 struct iwl_ucode_header {
15 __le32 ver; /* major/minor/API/serial */
16 union {
17 struct {
18 __le32 inst_size; /* bytes of runtime code */
19 __le32 data_size; /* bytes of runtime data */
20 __le32 init_size; /* bytes of init code */
21 __le32 init_data_size; /* bytes of init data */
22 __le32 boot_size; /* bytes of bootstrap code */
23 u8 data[0]; /* in same order as sizes */
24 } v1;
25 struct {
26 __le32 build; /* build number */
27 __le32 inst_size; /* bytes of runtime code */
28 __le32 data_size; /* bytes of runtime data */
29 __le32 init_size; /* bytes of init code */
30 __le32 init_data_size; /* bytes of init data */
31 __le32 boot_size; /* bytes of bootstrap code */
32 u8 data[0]; /* in same order as sizes */
33 } v2;
34 } u;
35 };
36
37 #define IWL_UCODE_TLV_DEBUG_BASE 0x1000005
38 #define IWL_UCODE_TLV_CONST_BASE 0x100
39
40 /*
41 * new TLV uCode file layout
42 *
43 * The new TLV file format contains TLVs, that each specify
44 * some piece of data.
45 */
46
47 enum iwl_ucode_tlv_type {
48 IWL_UCODE_TLV_INVALID = 0, /* unused */
49 IWL_UCODE_TLV_INST = 1,
50 IWL_UCODE_TLV_DATA = 2,
51 IWL_UCODE_TLV_INIT = 3,
52 IWL_UCODE_TLV_INIT_DATA = 4,
53 IWL_UCODE_TLV_BOOT = 5,
54 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
55 IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */
56 IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */
57 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
58 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
59 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
60 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
61 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
62 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
63 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
64 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
65 IWL_UCODE_TLV_WOWLAN_INST = 16,
66 IWL_UCODE_TLV_WOWLAN_DATA = 17,
67 IWL_UCODE_TLV_FLAGS = 18,
68 IWL_UCODE_TLV_SEC_RT = 19,
69 IWL_UCODE_TLV_SEC_INIT = 20,
70 IWL_UCODE_TLV_SEC_WOWLAN = 21,
71 IWL_UCODE_TLV_DEF_CALIB = 22,
72 IWL_UCODE_TLV_PHY_SKU = 23,
73 IWL_UCODE_TLV_SECURE_SEC_RT = 24,
74 IWL_UCODE_TLV_SECURE_SEC_INIT = 25,
75 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26,
76 IWL_UCODE_TLV_NUM_OF_CPU = 27,
77 IWL_UCODE_TLV_CSCHEME = 28,
78 IWL_UCODE_TLV_API_CHANGES_SET = 29,
79 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30,
80 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31,
81 IWL_UCODE_TLV_PAGING = 32,
82 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34,
83 /* 35 is unused */
84 IWL_UCODE_TLV_FW_VERSION = 36,
85 IWL_UCODE_TLV_FW_DBG_DEST = 38,
86 IWL_UCODE_TLV_FW_DBG_CONF = 39,
87 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,
88 IWL_UCODE_TLV_CMD_VERSIONS = 48,
89 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,
90 IWL_UCODE_TLV_FW_MEM_SEG = 51,
91 IWL_UCODE_TLV_IML = 52,
92 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54,
93 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55,
94 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57,
95 IWL_UCODE_TLV_HW_TYPE = 58,
96 IWL_UCODE_TLV_FW_FSEQ_VERSION = 60,
97 IWL_UCODE_TLV_PHY_INTEGRATION_VERSION = 61,
98
99 IWL_UCODE_TLV_PNVM_VERSION = 62,
100 IWL_UCODE_TLV_PNVM_SKU = 64,
101
102 IWL_UCODE_TLV_SEC_TABLE_ADDR = 66,
103 IWL_UCODE_TLV_D3_KEK_KCK_ADDR = 67,
104 IWL_UCODE_TLV_CURRENT_PC = 68,
105
106 IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0,
107 IWL_UCODE_TLV_FW_NUM_BEACONS = IWL_UCODE_TLV_CONST_BASE + 2,
108
109 IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0,
110 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1,
111 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2,
112 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3,
113 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4,
114 IWL_UCODE_TLV_TYPE_CONF_SET = IWL_UCODE_TLV_DEBUG_BASE + 5,
115 IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
116
117 /* TLVs 0x1000-0x2000 are for internal driver usage */
118 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000,
119 };
120
121 struct iwl_ucode_tlv {
122 __le32 type; /* see above */
123 __le32 length; /* not including type/length fields */
124 u8 data[];
125 };
126
127 #define IWL_TLV_UCODE_MAGIC 0x0a4c5749
128 #define FW_VER_HUMAN_READABLE_SZ 64
129
130 struct iwl_tlv_ucode_header {
131 /*
132 * The TLV style ucode header is distinguished from
133 * the v1/v2 style header by first four bytes being
134 * zero, as such is an invalid combination of
135 * major/minor/API/serial versions.
136 */
137 __le32 zero;
138 __le32 magic;
139 u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
140 /* major/minor/API/serial or major in new format */
141 __le32 ver;
142 __le32 build;
143 __le64 ignore;
144 /*
145 * The data contained herein has a TLV layout,
146 * see above for the TLV header and types.
147 * Note that each TLV is padded to a length
148 * that is a multiple of 4 for alignment.
149 */
150 u8 data[];
151 };
152
153 /*
154 * ucode TLVs
155 *
156 * ability to get extension for: flags & capabilities from ucode binaries files
157 */
158 struct iwl_ucode_api {
159 __le32 api_index;
160 __le32 api_flags;
161 } __packed;
162
163 struct iwl_ucode_capa {
164 __le32 api_index;
165 __le32 api_capa;
166 } __packed;
167
168 /**
169 * enum iwl_ucode_tlv_flag - ucode API flags
170 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
171 * was a separate TLV but moved here to save space.
172 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
173 * treats good CRC threshold as a boolean
174 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
175 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
176 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
177 * offload profile config command.
178 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
179 * (rather than two) IPv6 addresses
180 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
181 * from the probe request template.
182 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
183 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
184 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
185 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
186 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
187 */
188 enum iwl_ucode_tlv_flag {
189 IWL_UCODE_TLV_FLAGS_PAN = BIT(0),
190 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),
191 IWL_UCODE_TLV_FLAGS_MFP = BIT(2),
192 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7),
193 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10),
194 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12),
195 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15),
196 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16),
197 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),
198 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),
199 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),
200 };
201
202 typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
203
204 /**
205 * enum iwl_ucode_tlv_api - ucode api
206 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
207 * longer than the passive one, which is essential for fragmented scan.
208 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
209 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
210 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
211 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
212 * iteration complete notification, and the timestamp reported for RX
213 * received during scan, are reported in TSF of the mac specified in the
214 * scan request.
215 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
216 * ADD_MODIFY_STA_KEY_API_S_VER_2.
217 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
218 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
219 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
220 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
221 * indicating low latency direction.
222 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
223 * deprecated.
224 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
225 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
226 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
227 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
228 * the REDUCE_TX_POWER_CMD.
229 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
230 * version of the beacon notification.
231 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
232 * BEACON_FILTER_CONFIG_API_S_VER_4.
233 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
234 * REGULATORY_NVM_GET_INFO_RSP_API_S.
235 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
236 * LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
237 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
238 * SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
239 * SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
240 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
241 * STA_CONTEXT_DOT11AX_API_S
242 * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
243 * version tables.
244 * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
245 * SCAN_CONFIG_DB_CMD_API_S.
246 *
247 * @NUM_IWL_UCODE_TLV_API: number of bits used
248 */
249 enum iwl_ucode_tlv_api {
250 /* API Set 0 */
251 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8,
252 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9,
253 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18,
254 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20,
255 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28,
256 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29,
257 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30,
258 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31,
259 /* API Set 1 */
260 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32,
261 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33,
262 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34,
263 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35,
264 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36,
265 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38,
266 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41,
267 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,
268 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,
269 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,
270 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46,
271 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47,
272 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48,
273 IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49,
274 IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50,
275 IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52,
276 IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53,
277 IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54,
278 IWL_UCODE_TLV_API_SAR_TABLE_VER = (__force iwl_ucode_tlv_api_t)55,
279 IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG = (__force iwl_ucode_tlv_api_t)56,
280 IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57,
281 IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58,
282 IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59,
283
284
285 #ifdef __CHECKER__
286 /* sparse says it cannot increment the previous enum member */
287 #define NUM_IWL_UCODE_TLV_API 128
288 #else
289 NUM_IWL_UCODE_TLV_API
290 #endif
291 };
292
293 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
294
295 /**
296 * enum iwl_ucode_tlv_capa - ucode capabilities
297 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
298 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
299 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
300 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
301 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
302 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
303 * tx power value into TPC Report action frame and Link Measurement Report
304 * action frame
305 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
306 * channel in DS parameter set element in probe requests.
307 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
308 * probe requests.
309 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
310 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
311 * which also implies support for the scheduler configuration command
312 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
313 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
314 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
315 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
316 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
317 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
318 * is standalone or with a BSS station interface in the same binding.
319 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
320 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
321 * sources for the MCC. This TLV bit is a future replacement to
322 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
323 * is supported.
324 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
325 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
326 * @IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG: supports fragmented PNVM image
327 * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
328 * stabilization latency for SoCs.
329 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
330 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
331 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
332 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
333 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
334 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
335 * (6 GHz).
336 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
337 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
338 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
339 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
340 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
341 * countdown offloading. Beacon notifications are not sent to the host.
342 * The fw also offloads TBTT alignment.
343 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
344 * antenna the beacon should be transmitted
345 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
346 * from AP and will send it upon d0i3 exit.
347 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
348 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
349 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
350 * thresholds reporting
351 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
352 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
353 * regular image.
354 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
355 * memory addresses from the firmware.
356 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
357 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
358 * command size (command version 4) that supports toggling ACK TX
359 * power reduction.
360 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
361 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
362 * capability.
363 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
364 * to report the CSI information with (certain) RX frames
365 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
366 * initiator and responder
367 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
368 * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
369 * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
370 * reset flow
371 * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
372 * channels even when these are not enabled.
373 * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection
374 * complete to FW.
375 * @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA: supports (de)activating 5G9
376 * for CA from BIOS.
377 *
378 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
379 */
380 enum iwl_ucode_tlv_capa {
381 /* set 0 */
382 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0,
383 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1,
384 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2,
385 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3,
386 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6,
387 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8,
388 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9,
389 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10,
390 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11,
391 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12,
392 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13,
393 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17,
394 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18,
395 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21,
396 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22,
397 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26,
398 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28,
399 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29,
400 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30,
401 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31,
402
403 /* set 1 */
404 IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG = (__force iwl_ucode_tlv_capa_t)32,
405 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT = (__force iwl_ucode_tlv_capa_t)37,
406 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38,
407 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39,
408 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40,
409 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41,
410 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,
411 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,
412 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,
413 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46,
414 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47,
415 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48,
416 IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49,
417 IWL_UCODE_TLV_CAPA_SET_LTR_GEN2 = (__force iwl_ucode_tlv_capa_t)50,
418 IWL_UCODE_TLV_CAPA_SET_PPAG = (__force iwl_ucode_tlv_capa_t)52,
419 IWL_UCODE_TLV_CAPA_TAS_CFG = (__force iwl_ucode_tlv_capa_t)53,
420 IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD = (__force iwl_ucode_tlv_capa_t)54,
421 IWL_UCODE_TLV_CAPA_PROTECTED_TWT = (__force iwl_ucode_tlv_capa_t)56,
422 IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE = (__force iwl_ucode_tlv_capa_t)57,
423 IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58,
424 IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)59,
425 IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60,
426 IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO = (__force iwl_ucode_tlv_capa_t)61,
427 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)62,
428 IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT = (__force iwl_ucode_tlv_capa_t)63,
429
430 /* set 2 */
431 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
432 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,
433 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67,
434 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68,
435 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70,
436 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71,
437 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72,
438 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73,
439 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74,
440 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75,
441 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76,
442 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77,
443 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80,
444 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81,
445 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84,
446 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87,
447 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88,
448 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89,
449 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90,
450 IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)92,
451 IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)93,
452
453 /* set 3 */
454 IWL_UCODE_TLV_CAPA_MLME_OFFLOAD = (__force iwl_ucode_tlv_capa_t)96,
455
456 /*
457 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
458 */
459 IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)98,
460
461 IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100,
462 IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104,
463 IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT = (__force iwl_ucode_tlv_capa_t)105,
464 IWL_UCODE_TLV_CAPA_SYNCED_TIME = (__force iwl_ucode_tlv_capa_t)106,
465 IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM = (__force iwl_ucode_tlv_capa_t)108,
466 IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT = (__force iwl_ucode_tlv_capa_t)109,
467 IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT = (__force iwl_ucode_tlv_capa_t)110,
468 IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT = (__force iwl_ucode_tlv_capa_t)111,
469 IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT = (__force iwl_ucode_tlv_capa_t)112,
470 IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT = (__force iwl_ucode_tlv_capa_t)113,
471 IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT = (__force iwl_ucode_tlv_capa_t)114,
472 IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT = (__force iwl_ucode_tlv_capa_t)116,
473 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA = (__force iwl_ucode_tlv_capa_t)123,
474 #ifdef __CHECKER__
475 /* sparse says it cannot increment the previous enum member */
476 #define NUM_IWL_UCODE_TLV_CAPA 128
477 #else
478 NUM_IWL_UCODE_TLV_CAPA
479 #endif
480 };
481
482 /* The default calibrate table size if not specified by firmware file */
483 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
484 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19
485 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253
486
487 /* The default max probe length if not specified by the firmware file */
488 #define IWL_DEFAULT_MAX_PROBE_LENGTH 200
489
490 /*
491 * For 16.0 uCode and above, there is no differentiation between sections,
492 * just an offset to the HW address.
493 */
494 #define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC
495 #define PAGING_SEPARATOR_SECTION 0xAAAABBBB
496
497 /* uCode version contains 4 values: Major/Minor/API/Serial */
498 #define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
499 #define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
500 #define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
501 #define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
502
503 /**
504 * struct iwl_tlv_calib_ctrl - Calibration control struct.
505 * Sent as part of the phy configuration command.
506 * @flow_trigger: bitmap for which calibrations to perform according to
507 * flow triggers.
508 * @event_trigger: bitmap for which calibrations to perform according to
509 * event triggers.
510 */
511 struct iwl_tlv_calib_ctrl {
512 __le32 flow_trigger;
513 __le32 event_trigger;
514 } __packed;
515
516 enum iwl_fw_phy_cfg {
517 FW_PHY_CFG_RADIO_TYPE_POS = 0,
518 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
519 FW_PHY_CFG_RADIO_STEP_POS = 2,
520 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
521 FW_PHY_CFG_RADIO_DASH_POS = 4,
522 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
523 FW_PHY_CFG_TX_CHAIN_POS = 16,
524 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
525 FW_PHY_CFG_RX_CHAIN_POS = 20,
526 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
527 FW_PHY_CFG_CHAIN_SAD_POS = 23,
528 FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
529 FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
530 FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
531 FW_PHY_CFG_SHARED_CLK = BIT(31),
532 };
533
534 enum iwl_fw_dbg_reg_operator {
535 CSR_ASSIGN,
536 CSR_SETBIT,
537 CSR_CLEARBIT,
538
539 PRPH_ASSIGN,
540 PRPH_SETBIT,
541 PRPH_CLEARBIT,
542
543 INDIRECT_ASSIGN,
544 INDIRECT_SETBIT,
545 INDIRECT_CLEARBIT,
546
547 PRPH_BLOCKBIT,
548 };
549
550 /**
551 * struct iwl_fw_dbg_reg_op - an operation on a register
552 *
553 * @op: &enum iwl_fw_dbg_reg_operator
554 * @addr: offset of the register
555 * @val: value
556 */
557 struct iwl_fw_dbg_reg_op {
558 u8 op;
559 u8 reserved[3];
560 __le32 addr;
561 __le32 val;
562 } __packed;
563
564 /**
565 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
566 *
567 * @SMEM_MODE: monitor stores the data in SMEM
568 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
569 * @MARBH_MODE: monitor stores the data in MARBH buffer
570 * @MIPI_MODE: monitor outputs the data through the MIPI interface
571 */
572 enum iwl_fw_dbg_monitor_mode {
573 SMEM_MODE = 0,
574 EXTERNAL_MODE = 1,
575 MARBH_MODE = 2,
576 MIPI_MODE = 3,
577 };
578
579 /**
580 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
581 *
582 * @data_type: the memory segment type to record
583 * @ofs: the memory segment offset
584 * @len: the memory segment length, in bytes
585 *
586 * This parses IWL_UCODE_TLV_FW_MEM_SEG
587 */
588 struct iwl_fw_dbg_mem_seg_tlv {
589 __le32 data_type;
590 __le32 ofs;
591 __le32 len;
592 } __packed;
593
594 /**
595 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
596 *
597 * @version: version of the TLV - currently 0
598 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
599 * @size_power: buffer size will be 2^(size_power + 11)
600 * @base_reg: addr of the base addr register (PRPH)
601 * @end_reg: addr of the end addr register (PRPH)
602 * @write_ptr_reg: the addr of the reg of the write pointer
603 * @wrap_count: the addr of the reg of the wrap_count
604 * @base_shift: shift right of the base addr reg
605 * @end_shift: shift right of the end addr reg
606 * @reg_ops: array of registers operations
607 *
608 * This parses IWL_UCODE_TLV_FW_DBG_DEST
609 */
610 struct iwl_fw_dbg_dest_tlv_v1 {
611 u8 version;
612 u8 monitor_mode;
613 u8 size_power;
614 u8 reserved;
615 __le32 base_reg;
616 __le32 end_reg;
617 __le32 write_ptr_reg;
618 __le32 wrap_count;
619 u8 base_shift;
620 u8 end_shift;
621 struct iwl_fw_dbg_reg_op reg_ops[];
622 } __packed;
623
624 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
625 #define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000
626 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
627 #define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff
628 /* The smem buffer chunks are in units of 256 bits */
629 #define IWL_M2S_UNIT_SIZE 0x100
630
631 struct iwl_fw_dbg_dest_tlv {
632 u8 version;
633 u8 monitor_mode;
634 u8 size_power;
635 u8 reserved;
636 __le32 cfg_reg;
637 __le32 write_ptr_reg;
638 __le32 wrap_count;
639 u8 base_shift;
640 u8 size_shift;
641 struct iwl_fw_dbg_reg_op reg_ops[];
642 } __packed;
643
644 struct iwl_fw_dbg_conf_hcmd {
645 u8 id;
646 u8 reserved;
647 __le16 len;
648 u8 data[];
649 } __packed;
650
651 /**
652 * enum iwl_fw_dbg_trigger_mode - triggers functionalities
653 *
654 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
655 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
656 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
657 * collect only monitor data
658 */
659 enum iwl_fw_dbg_trigger_mode {
660 IWL_FW_DBG_TRIGGER_START = BIT(0),
661 IWL_FW_DBG_TRIGGER_STOP = BIT(1),
662 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
663 };
664
665 /**
666 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
667 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
668 */
669 enum iwl_fw_dbg_trigger_flags {
670 IWL_FW_DBG_FORCE_RESTART = BIT(0),
671 };
672
673 /**
674 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
675 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
676 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
677 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
678 * @IWL_FW_DBG_CONF_VIF_AP: AP mode
679 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
680 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
681 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
682 */
683 enum iwl_fw_dbg_trigger_vif_type {
684 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
685 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
686 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
687 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
688 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
689 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
690 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
691 };
692
693 /**
694 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
695 * @id: &enum iwl_fw_dbg_trigger
696 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
697 * @stop_conf_ids: bitmap of configurations this trigger relates to.
698 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
699 * to the currently running configuration is set, the data should be
700 * collected.
701 * @stop_delay: how many milliseconds to wait before collecting the data
702 * after the STOP trigger fires.
703 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
704 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
705 * configuration should be applied when the triggers kicks in.
706 * @occurrences: number of occurrences. 0 means the trigger will never fire.
707 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
708 * trigger in which another occurrence should be ignored.
709 * @flags: &enum iwl_fw_dbg_trigger_flags
710 */
711 struct iwl_fw_dbg_trigger_tlv {
712 __le32 id;
713 __le32 vif_type;
714 __le32 stop_conf_ids;
715 __le32 stop_delay;
716 u8 mode;
717 u8 start_conf_id;
718 __le16 occurrences;
719 __le16 trig_dis_ms;
720 u8 flags;
721 u8 reserved[5];
722
723 u8 data[];
724 } __packed;
725
726 #define FW_DBG_START_FROM_ALIVE 0
727 #define FW_DBG_CONF_MAX 32
728 #define FW_DBG_INVALID 0xff
729
730 /**
731 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
732 * @stop_consec_missed_bcon: stop recording if threshold is crossed.
733 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
734 * @start_consec_missed_bcon: start recording if threshold is crossed.
735 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
736 * @reserved1: reserved
737 * @reserved2: reserved
738 */
739 struct iwl_fw_dbg_trigger_missed_bcon {
740 __le32 stop_consec_missed_bcon;
741 __le32 stop_consec_missed_bcon_since_rx;
742 __le32 reserved2[2];
743 __le32 start_consec_missed_bcon;
744 __le32 start_consec_missed_bcon_since_rx;
745 __le32 reserved1[2];
746 } __packed;
747
748 /**
749 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
750 * cmds: the list of commands to trigger the collection on
751 */
752 struct iwl_fw_dbg_trigger_cmd {
753 struct cmd {
754 u8 cmd_id;
755 u8 group_id;
756 } __packed cmds[16];
757 } __packed;
758
759 /**
760 * iwl_fw_dbg_trigger_stats - configures trigger for statistics
761 * @stop_offset: the offset of the value to be monitored
762 * @stop_threshold: the threshold above which to collect
763 * @start_offset: the offset of the value to be monitored
764 * @start_threshold: the threshold above which to start recording
765 */
766 struct iwl_fw_dbg_trigger_stats {
767 __le32 stop_offset;
768 __le32 stop_threshold;
769 __le32 start_offset;
770 __le32 start_threshold;
771 } __packed;
772
773 /**
774 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
775 * @rssi: RSSI value to trigger at
776 */
777 struct iwl_fw_dbg_trigger_low_rssi {
778 __le32 rssi;
779 } __packed;
780
781 /**
782 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
783 * @stop_auth_denied: number of denied authentication to collect
784 * @stop_auth_timeout: number of authentication timeout to collect
785 * @stop_rx_deauth: number of Rx deauth before to collect
786 * @stop_tx_deauth: number of Tx deauth before to collect
787 * @stop_assoc_denied: number of denied association to collect
788 * @stop_assoc_timeout: number of association timeout to collect
789 * @stop_connection_loss: number of connection loss to collect
790 * @start_auth_denied: number of denied authentication to start recording
791 * @start_auth_timeout: number of authentication timeout to start recording
792 * @start_rx_deauth: number of Rx deauth to start recording
793 * @start_tx_deauth: number of Tx deauth to start recording
794 * @start_assoc_denied: number of denied association to start recording
795 * @start_assoc_timeout: number of association timeout to start recording
796 * @start_connection_loss: number of connection loss to start recording
797 */
798 struct iwl_fw_dbg_trigger_mlme {
799 u8 stop_auth_denied;
800 u8 stop_auth_timeout;
801 u8 stop_rx_deauth;
802 u8 stop_tx_deauth;
803
804 u8 stop_assoc_denied;
805 u8 stop_assoc_timeout;
806 u8 stop_connection_loss;
807 u8 reserved;
808
809 u8 start_auth_denied;
810 u8 start_auth_timeout;
811 u8 start_rx_deauth;
812 u8 start_tx_deauth;
813
814 u8 start_assoc_denied;
815 u8 start_assoc_timeout;
816 u8 start_connection_loss;
817 u8 reserved2;
818 } __packed;
819
820 /**
821 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
822 * @command_queue: timeout for the command queue in ms
823 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
824 * @softap: timeout for the queues of a softAP in ms
825 * @p2p_go: timeout for the queues of a P2P GO in ms
826 * @p2p_client: timeout for the queues of a P2P client in ms
827 * @p2p_device: timeout for the queues of a P2P device in ms
828 * @ibss: timeout for the queues of an IBSS in ms
829 * @tdls: timeout for the queues of a TDLS station in ms
830 */
831 struct iwl_fw_dbg_trigger_txq_timer {
832 __le32 command_queue;
833 __le32 bss;
834 __le32 softap;
835 __le32 p2p_go;
836 __le32 p2p_client;
837 __le32 p2p_device;
838 __le32 ibss;
839 __le32 tdls;
840 __le32 reserved[4];
841 } __packed;
842
843 /**
844 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
845 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
846 * trigger each time a time event notification that relates to time event
847 * id with one of the actions in the bitmap is received and
848 * BIT(notif->status) is set in status_bitmap.
849 *
850 */
851 struct iwl_fw_dbg_trigger_time_event {
852 struct {
853 __le32 id;
854 __le32 action_bitmap;
855 __le32 status_bitmap;
856 } __packed time_events[16];
857 } __packed;
858
859 /**
860 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
861 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
862 * when an Rx BlockAck session is started.
863 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
864 * when an Rx BlockAck session is stopped.
865 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
866 * when a Tx BlockAck session is started.
867 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
868 * when a Tx BlockAck session is stopped.
869 * rx_bar: tid bitmap to configure on what tid the trigger should occur
870 * when a BAR is received (for a Tx BlockAck session).
871 * tx_bar: tid bitmap to configure on what tid the trigger should occur
872 * when a BAR is send (for an Rx BlocAck session).
873 * frame_timeout: tid bitmap to configure on what tid the trigger should occur
874 * when a frame times out in the reordering buffer.
875 */
876 struct iwl_fw_dbg_trigger_ba {
877 __le16 rx_ba_start;
878 __le16 rx_ba_stop;
879 __le16 tx_ba_start;
880 __le16 tx_ba_stop;
881 __le16 rx_bar;
882 __le16 tx_bar;
883 __le16 frame_timeout;
884 } __packed;
885
886 /**
887 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
888 * @action_bitmap: the TDLS action to trigger the collection upon
889 * @peer_mode: trigger on specific peer or all
890 * @peer: the TDLS peer to trigger the collection on
891 */
892 struct iwl_fw_dbg_trigger_tdls {
893 u8 action_bitmap;
894 u8 peer_mode;
895 u8 peer[ETH_ALEN];
896 u8 reserved[4];
897 } __packed;
898
899 /**
900 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
901 * status.
902 * @statuses: the list of statuses to trigger the collection on
903 */
904 struct iwl_fw_dbg_trigger_tx_status {
905 struct tx_status {
906 u8 status;
907 u8 reserved[3];
908 } __packed statuses[16];
909 __le32 reserved[2];
910 } __packed;
911
912 /**
913 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
914 * @id: conf id
915 * @usniffer: should the uSniffer image be used
916 * @num_of_hcmds: how many HCMDs to send are present here
917 * @hcmd: a variable length host command to be sent to apply the configuration.
918 * If there is more than one HCMD to send, they will appear one after the
919 * other and be sent in the order that they appear in.
920 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
921 * %FW_DBG_CONF_MAX configuration per run.
922 */
923 struct iwl_fw_dbg_conf_tlv {
924 u8 id;
925 u8 usniffer;
926 u8 reserved;
927 u8 num_of_hcmds;
928 struct iwl_fw_dbg_conf_hcmd hcmd;
929 } __packed;
930
931 #define IWL_FW_CMD_VER_UNKNOWN 99
932
933 /**
934 * struct iwl_fw_cmd_version - firmware command version entry
935 * @cmd: command ID
936 * @group: group ID
937 * @cmd_ver: command version
938 * @notif_ver: notification version
939 */
940 struct iwl_fw_cmd_version {
941 u8 cmd;
942 u8 group;
943 u8 cmd_ver;
944 u8 notif_ver;
945 } __packed;
946
947 struct iwl_fw_tcm_error_addr {
948 __le32 addr;
949 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
950
951 struct iwl_fw_dump_exclude {
952 __le32 addr, size;
953 };
954
_iwl_tlv_array_len(const struct iwl_ucode_tlv * tlv,size_t fixed_size,size_t var_size)955 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
956 size_t fixed_size, size_t var_size)
957 {
958 size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
959
960 if (WARN_ON(var_len % var_size))
961 return 0;
962
963 return var_len / var_size;
964 }
965
966 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb) \
967 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), \
968 sizeof(_struct_ptr->_memb[0]))
969
970 #endif /* __iwl_fw_file_h__ */
971