xref: /openbmc/linux/drivers/net/ethernet/intel/ice/ice.h (revision 3b66266a)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_H_
5 #define _ICE_H_
6 
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/interrupt.h>
24 #include <linux/ethtool.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/bitmap.h>
28 #include <linux/log2.h>
29 #include <linux/ip.h>
30 #include <linux/sctp.h>
31 #include <linux/ipv6.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/if_bridge.h>
34 #include <linux/ctype.h>
35 #include <linux/linkmode.h>
36 #include <linux/bpf.h>
37 #include <linux/btf.h>
38 #include <linux/auxiliary_bus.h>
39 #include <linux/avf/virtchnl.h>
40 #include <linux/cpu_rmap.h>
41 #include <linux/dim.h>
42 #include <linux/gnss.h>
43 #include <net/pkt_cls.h>
44 #include <net/pkt_sched.h>
45 #include <net/tc_act/tc_mirred.h>
46 #include <net/tc_act/tc_gact.h>
47 #include <net/ip.h>
48 #include <net/devlink.h>
49 #include <net/ipv6.h>
50 #include <net/xdp_sock.h>
51 #include <net/xdp_sock_drv.h>
52 #include <net/geneve.h>
53 #include <net/gre.h>
54 #include <net/udp_tunnel.h>
55 #include <net/vxlan.h>
56 #include <net/gtp.h>
57 #include <linux/ppp_defs.h>
58 #include "ice_devids.h"
59 #include "ice_type.h"
60 #include "ice_txrx.h"
61 #include "ice_dcb.h"
62 #include "ice_switch.h"
63 #include "ice_common.h"
64 #include "ice_flow.h"
65 #include "ice_sched.h"
66 #include "ice_idc_int.h"
67 #include "ice_sriov.h"
68 #include "ice_vf_mbx.h"
69 #include "ice_ptp.h"
70 #include "ice_fdir.h"
71 #include "ice_xsk.h"
72 #include "ice_arfs.h"
73 #include "ice_repr.h"
74 #include "ice_eswitch.h"
75 #include "ice_lag.h"
76 #include "ice_vsi_vlan_ops.h"
77 #include "ice_gnss.h"
78 #include "ice_irq.h"
79 
80 #define ICE_BAR0		0
81 #define ICE_REQ_DESC_MULTIPLE	32
82 #define ICE_MIN_NUM_DESC	64
83 #define ICE_MAX_NUM_DESC	8160
84 #define ICE_DFLT_MIN_RX_DESC	512
85 #define ICE_DFLT_NUM_TX_DESC	256
86 #define ICE_DFLT_NUM_RX_DESC	2048
87 
88 #define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
89 #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
90 #define ICE_AQ_LEN		192
91 #define ICE_MBXSQ_LEN		64
92 #define ICE_SBQ_LEN		64
93 #define ICE_MIN_LAN_TXRX_MSIX	1
94 #define ICE_MIN_LAN_OICR_MSIX	1
95 #define ICE_MIN_MSIX		(ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
96 #define ICE_FDIR_MSIX		2
97 #define ICE_RDMA_NUM_AEQ_MSIX	4
98 #define ICE_MIN_RDMA_MSIX	2
99 #define ICE_ESWITCH_MSIX	1
100 #define ICE_NO_VSI		0xffff
101 #define ICE_VSI_MAP_CONTIG	0
102 #define ICE_VSI_MAP_SCATTER	1
103 #define ICE_MAX_SCATTER_TXQS	16
104 #define ICE_MAX_SCATTER_RXQS	16
105 #define ICE_Q_WAIT_RETRY_LIMIT	10
106 #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
107 #define ICE_MAX_LG_RSS_QS	256
108 #define ICE_INVAL_Q_INDEX	0xffff
109 
110 #define ICE_MAX_RXQS_PER_TC		256	/* Used when setting VSI context per TC Rx queues */
111 
112 #define ICE_CHNL_START_TC		1
113 
114 #define ICE_MAX_RESET_WAIT		20
115 
116 #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
117 
118 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
119 
120 #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
121 
122 #define ICE_MAX_TSO_SIZE 131072
123 
124 #define ICE_UP_TABLE_TRANSLATE(val, i) \
125 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
126 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
127 
128 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
129 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
130 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
131 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
132 
133 /* Minimum BW limit is 500 Kbps for any scheduler node */
134 #define ICE_MIN_BW_LIMIT		500
135 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
136  * use it to convert user specified BW limit into Kbps
137  */
138 #define ICE_BW_KBPS_DIVISOR		125
139 
140 /* Default recipes have priority 4 and below, hence priority values between 5..7
141  * can be used as filter priority for advanced switch filter (advanced switch
142  * filters need new recipe to be created for specified extraction sequence
143  * because default recipe extraction sequence does not represent custom
144  * extraction)
145  */
146 #define ICE_SWITCH_FLTR_PRIO_QUEUE	7
147 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields +
148  * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as
149  * SYN/FIN/RST))
150  */
151 #define ICE_SWITCH_FLTR_PRIO_RSVD	6
152 #define ICE_SWITCH_FLTR_PRIO_VSI	5
153 #define ICE_SWITCH_FLTR_PRIO_QGRP	ICE_SWITCH_FLTR_PRIO_VSI
154 
155 /* Macro for each VSI in a PF */
156 #define ice_for_each_vsi(pf, i) \
157 	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
158 
159 /* Macros for each Tx/Xdp/Rx ring in a VSI */
160 #define ice_for_each_txq(vsi, i) \
161 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
162 
163 #define ice_for_each_xdp_txq(vsi, i) \
164 	for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
165 
166 #define ice_for_each_rxq(vsi, i) \
167 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
168 
169 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
170 #define ice_for_each_alloc_txq(vsi, i) \
171 	for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
172 
173 #define ice_for_each_alloc_rxq(vsi, i) \
174 	for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
175 
176 #define ice_for_each_q_vector(vsi, i) \
177 	for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
178 
179 #define ice_for_each_chnl_tc(i)	\
180 	for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
181 
182 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)
183 
184 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
185 				     ICE_PROMISC_UCAST_RX | \
186 				     ICE_PROMISC_VLAN_TX  | \
187 				     ICE_PROMISC_VLAN_RX)
188 
189 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
190 
191 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
192 				     ICE_PROMISC_MCAST_RX | \
193 				     ICE_PROMISC_VLAN_TX  | \
194 				     ICE_PROMISC_VLAN_RX)
195 
196 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
197 
198 enum ice_feature {
199 	ICE_F_DSCP,
200 	ICE_F_PTP_EXTTS,
201 	ICE_F_SMA_CTRL,
202 	ICE_F_GNSS,
203 	ICE_F_ROCE_LAG,
204 	ICE_F_SRIOV_LAG,
205 	ICE_F_MAX
206 };
207 
208 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
209 
210 struct ice_channel {
211 	struct list_head list;
212 	u8 type;
213 	u16 sw_id;
214 	u16 base_q;
215 	u16 num_rxq;
216 	u16 num_txq;
217 	u16 vsi_num;
218 	u8 ena_tc;
219 	struct ice_aqc_vsi_props info;
220 	u64 max_tx_rate;
221 	u64 min_tx_rate;
222 	atomic_t num_sb_fltr;
223 	struct ice_vsi *ch_vsi;
224 };
225 
226 struct ice_txq_meta {
227 	u32 q_teid;	/* Tx-scheduler element identifier */
228 	u16 q_id;	/* Entry in VSI's txq_map bitmap */
229 	u16 q_handle;	/* Relative index of Tx queue within TC */
230 	u16 vsi_idx;	/* VSI index that Tx queue belongs to */
231 	u8 tc;		/* TC number that Tx queue belongs to */
232 };
233 
234 struct ice_tc_info {
235 	u16 qoffset;
236 	u16 qcount_tx;
237 	u16 qcount_rx;
238 	u8 netdev_tc;
239 };
240 
241 struct ice_tc_cfg {
242 	u8 numtc; /* Total number of enabled TCs */
243 	u16 ena_tc; /* Tx map */
244 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
245 };
246 
247 struct ice_qs_cfg {
248 	struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
249 	unsigned long *pf_map;
250 	unsigned long pf_map_size;
251 	unsigned int q_count;
252 	unsigned int scatter_count;
253 	u16 *vsi_map;
254 	u16 vsi_map_offset;
255 	u8 mapping_mode;
256 };
257 
258 struct ice_sw {
259 	struct ice_pf *pf;
260 	u16 sw_id;		/* switch ID for this switch */
261 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
262 };
263 
264 enum ice_pf_state {
265 	ICE_TESTING,
266 	ICE_DOWN,
267 	ICE_NEEDS_RESTART,
268 	ICE_PREPARED_FOR_RESET,	/* set by driver when prepared */
269 	ICE_RESET_OICR_RECV,		/* set by driver after rcv reset OICR */
270 	ICE_PFR_REQ,		/* set by driver */
271 	ICE_CORER_REQ,		/* set by driver */
272 	ICE_GLOBR_REQ,		/* set by driver */
273 	ICE_CORER_RECV,		/* set by OICR handler */
274 	ICE_GLOBR_RECV,		/* set by OICR handler */
275 	ICE_EMPR_RECV,		/* set by OICR handler */
276 	ICE_SUSPENDED,		/* set on module remove path */
277 	ICE_RESET_FAILED,		/* set by reset/rebuild */
278 	/* When checking for the PF to be in a nominal operating state, the
279 	 * bits that are grouped at the beginning of the list need to be
280 	 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
281 	 * be checked. If you need to add a bit into consideration for nominal
282 	 * operating state, it must be added before
283 	 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
284 	 * without appropriate consideration.
285 	 */
286 	ICE_STATE_NOMINAL_CHECK_BITS,
287 	ICE_ADMINQ_EVENT_PENDING,
288 	ICE_MAILBOXQ_EVENT_PENDING,
289 	ICE_SIDEBANDQ_EVENT_PENDING,
290 	ICE_MDD_EVENT_PENDING,
291 	ICE_VFLR_EVENT_PENDING,
292 	ICE_FLTR_OVERFLOW_PROMISC,
293 	ICE_VF_DIS,
294 	ICE_CFG_BUSY,
295 	ICE_SERVICE_SCHED,
296 	ICE_SERVICE_DIS,
297 	ICE_FD_FLUSH_REQ,
298 	ICE_OICR_INTR_DIS,		/* Global OICR interrupt disabled */
299 	ICE_MDD_VF_PRINT_PENDING,	/* set when MDD event handle */
300 	ICE_VF_RESETS_DISABLED,	/* disable resets during ice_remove */
301 	ICE_LINK_DEFAULT_OVERRIDE_PENDING,
302 	ICE_PHY_INIT_COMPLETE,
303 	ICE_FD_VF_FLUSH_CTX,		/* set at FD Rx IRQ or timeout */
304 	ICE_AUX_ERR_PENDING,
305 	ICE_STATE_NBITS		/* must be last */
306 };
307 
308 enum ice_vsi_state {
309 	ICE_VSI_DOWN,
310 	ICE_VSI_NEEDS_RESTART,
311 	ICE_VSI_NETDEV_ALLOCD,
312 	ICE_VSI_NETDEV_REGISTERED,
313 	ICE_VSI_UMAC_FLTR_CHANGED,
314 	ICE_VSI_MMAC_FLTR_CHANGED,
315 	ICE_VSI_PROMISC_CHANGED,
316 	ICE_VSI_REBUILD_PENDING,
317 	ICE_VSI_STATE_NBITS		/* must be last */
318 };
319 
320 struct ice_vsi_stats {
321 	struct ice_ring_stats **tx_ring_stats;  /* Tx ring stats array */
322 	struct ice_ring_stats **rx_ring_stats;  /* Rx ring stats array */
323 };
324 
325 /* struct that defines a VSI, associated with a dev */
326 struct ice_vsi {
327 	struct net_device *netdev;
328 	struct ice_sw *vsw;		 /* switch this VSI is on */
329 	struct ice_pf *back;		 /* back pointer to PF */
330 	struct ice_port_info *port_info; /* back pointer to port_info */
331 	struct ice_rx_ring **rx_rings;	 /* Rx ring array */
332 	struct ice_tx_ring **tx_rings;	 /* Tx ring array */
333 	struct ice_q_vector **q_vectors; /* q_vector array */
334 
335 	irqreturn_t (*irq_handler)(int irq, void *data);
336 
337 	u64 tx_linearize;
338 	DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
339 	unsigned int current_netdev_flags;
340 	u32 tx_restart;
341 	u32 tx_busy;
342 	u32 rx_buf_failed;
343 	u32 rx_page_failed;
344 	u16 num_q_vectors;
345 	/* tell if only dynamic irq allocation is allowed */
346 	bool irq_dyn_alloc;
347 
348 	enum ice_vsi_type type;
349 	u16 vsi_num;			/* HW (absolute) index of this VSI */
350 	u16 idx;			/* software index in pf->vsi[] */
351 
352 	struct ice_vf *vf;		/* VF associated with this VSI */
353 
354 	u16 num_gfltr;
355 	u16 num_bfltr;
356 
357 	/* RSS config */
358 	u16 rss_table_size;	/* HW RSS table size */
359 	u16 rss_size;		/* Allocated RSS queues */
360 	u8 *rss_hkey_user;	/* User configured hash keys */
361 	u8 *rss_lut_user;	/* User configured lookup table entries */
362 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
363 
364 	/* aRFS members only allocated for the PF VSI */
365 #define ICE_MAX_ARFS_LIST	1024
366 #define ICE_ARFS_LST_MASK	(ICE_MAX_ARFS_LIST - 1)
367 	struct hlist_head *arfs_fltr_list;
368 	struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
369 	spinlock_t arfs_lock;	/* protects aRFS hash table and filter state */
370 	atomic_t *arfs_last_fltr_id;
371 
372 	u16 max_frame;
373 	u16 rx_buf_len;
374 
375 	struct ice_aqc_vsi_props info;	 /* VSI properties */
376 	struct ice_vsi_vlan_info vlan_info;	/* vlan config to be restored */
377 
378 	/* VSI stats */
379 	struct rtnl_link_stats64 net_stats;
380 	struct rtnl_link_stats64 net_stats_prev;
381 	struct ice_eth_stats eth_stats;
382 	struct ice_eth_stats eth_stats_prev;
383 
384 	struct list_head tmp_sync_list;		/* MAC filters to be synced */
385 	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
386 
387 	u8 irqs_ready:1;
388 	u8 current_isup:1;		 /* Sync 'link up' logging */
389 	u8 stat_offsets_loaded:1;
390 	struct ice_vsi_vlan_ops inner_vlan_ops;
391 	struct ice_vsi_vlan_ops outer_vlan_ops;
392 	u16 num_vlan;
393 
394 	/* queue information */
395 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
396 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
397 	u16 *txq_map;			 /* index in pf->avail_txqs */
398 	u16 *rxq_map;			 /* index in pf->avail_rxqs */
399 	u16 alloc_txq;			 /* Allocated Tx queues */
400 	u16 num_txq;			 /* Used Tx queues */
401 	u16 alloc_rxq;			 /* Allocated Rx queues */
402 	u16 num_rxq;			 /* Used Rx queues */
403 	u16 req_txq;			 /* User requested Tx queues */
404 	u16 req_rxq;			 /* User requested Rx queues */
405 	u16 num_rx_desc;
406 	u16 num_tx_desc;
407 	u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
408 	struct ice_tc_cfg tc_cfg;
409 	struct bpf_prog *xdp_prog;
410 	struct ice_tx_ring **xdp_rings;	 /* XDP ring array */
411 	u16 num_xdp_txq;		 /* Used XDP queues */
412 	u8 xdp_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
413 	struct mutex xdp_state_lock;
414 
415 	struct net_device **target_netdevs;
416 
417 	struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
418 
419 	/* Channel Specific Fields */
420 	struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
421 	u16 cnt_q_avail;
422 	u16 next_base_q;	/* next queue to be used for channel setup */
423 	struct list_head ch_list;
424 	u16 num_chnl_rxq;
425 	u16 num_chnl_txq;
426 	u16 ch_rss_size;
427 	u16 num_chnl_fltr;
428 	/* store away rss size info before configuring ADQ channels so that,
429 	 * it can be used after tc-qdisc delete, to get back RSS setting as
430 	 * they were before
431 	 */
432 	u16 orig_rss_size;
433 	/* this keeps tracks of all enabled TC with and without DCB
434 	 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
435 	 * information
436 	 */
437 	u8 all_numtc;
438 	u16 all_enatc;
439 
440 	/* store away TC info, to be used for rebuild logic */
441 	u8 old_numtc;
442 	u16 old_ena_tc;
443 
444 	struct ice_channel *ch;
445 
446 	/* setup back reference, to which aggregator node this VSI
447 	 * corresponds to
448 	 */
449 	struct ice_agg_node *agg_node;
450 } ____cacheline_internodealigned_in_smp;
451 
452 /* struct that defines an interrupt vector */
453 struct ice_q_vector {
454 	struct ice_vsi *vsi;
455 
456 	u16 v_idx;			/* index in the vsi->q_vector array. */
457 	u16 reg_idx;
458 	u8 num_ring_rx;			/* total number of Rx rings in vector */
459 	u8 num_ring_tx;			/* total number of Tx rings in vector */
460 	u8 wb_on_itr:1;			/* if true, WB on ITR is enabled */
461 	/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
462 	 * value to the device
463 	 */
464 	u8 intrl;
465 
466 	struct napi_struct napi;
467 
468 	struct ice_ring_container rx;
469 	struct ice_ring_container tx;
470 
471 	cpumask_t affinity_mask;
472 	struct irq_affinity_notify affinity_notify;
473 
474 	struct ice_channel *ch;
475 
476 	char name[ICE_INT_NAME_STR_LEN];
477 
478 	u16 total_events;	/* net_dim(): number of interrupts processed */
479 	struct msi_map irq;
480 } ____cacheline_internodealigned_in_smp;
481 
482 enum ice_pf_flags {
483 	ICE_FLAG_FLTR_SYNC,
484 	ICE_FLAG_RDMA_ENA,
485 	ICE_FLAG_RSS_ENA,
486 	ICE_FLAG_SRIOV_ENA,
487 	ICE_FLAG_SRIOV_CAPABLE,
488 	ICE_FLAG_DCB_CAPABLE,
489 	ICE_FLAG_DCB_ENA,
490 	ICE_FLAG_FD_ENA,
491 	ICE_FLAG_PTP_SUPPORTED,		/* PTP is supported by NVM */
492 	ICE_FLAG_PTP,			/* PTP is enabled by software */
493 	ICE_FLAG_ADV_FEATURES,
494 	ICE_FLAG_TC_MQPRIO,		/* support for Multi queue TC */
495 	ICE_FLAG_CLS_FLOWER,
496 	ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
497 	ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
498 	ICE_FLAG_NO_MEDIA,
499 	ICE_FLAG_FW_LLDP_AGENT,
500 	ICE_FLAG_MOD_POWER_UNSUPPORTED,
501 	ICE_FLAG_PHY_FW_LOAD_FAILED,
502 	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */
503 	ICE_FLAG_LEGACY_RX,
504 	ICE_FLAG_VF_TRUE_PROMISC_ENA,
505 	ICE_FLAG_MDD_AUTO_RESET_VF,
506 	ICE_FLAG_VF_VLAN_PRUNING,
507 	ICE_FLAG_LINK_LENIENT_MODE_ENA,
508 	ICE_FLAG_PLUG_AUX_DEV,
509 	ICE_FLAG_UNPLUG_AUX_DEV,
510 	ICE_FLAG_MTU_CHANGED,
511 	ICE_FLAG_GNSS,			/* GNSS successfully initialized */
512 	ICE_PF_FLAGS_NBITS		/* must be last */
513 };
514 
515 enum ice_misc_thread_tasks {
516 	ICE_MISC_THREAD_EXTTS_EVENT,
517 	ICE_MISC_THREAD_TX_TSTAMP,
518 	ICE_MISC_THREAD_NBITS		/* must be last */
519 };
520 
521 struct ice_eswitch {
522 	struct ice_vsi *control_vsi;
523 	struct ice_vsi *uplink_vsi;
524 	struct ice_esw_br_offloads *br_offloads;
525 	bool is_running;
526 };
527 
528 struct ice_agg_node {
529 	u32 agg_id;
530 #define ICE_MAX_VSIS_IN_AGG_NODE	64
531 	u32 num_vsis;
532 	u8 valid;
533 };
534 
535 struct ice_pf {
536 	struct pci_dev *pdev;
537 
538 	struct devlink_region *nvm_region;
539 	struct devlink_region *sram_region;
540 	struct devlink_region *devcaps_region;
541 
542 	/* devlink port data */
543 	struct devlink_port devlink_port;
544 
545 	/* OS reserved IRQ details */
546 	struct msix_entry *msix_entries;
547 	struct ice_irq_tracker irq_tracker;
548 	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
549 	 * number of MSIX vectors needed for all SR-IOV VFs from the number of
550 	 * MSIX vectors allowed on this PF.
551 	 */
552 	u16 sriov_base_vector;
553 
554 	u16 ctrl_vsi_idx;		/* control VSI index in pf->vsi array */
555 
556 	struct ice_vsi **vsi;		/* VSIs created by the driver */
557 	struct ice_vsi_stats **vsi_stats;
558 	struct ice_sw *first_sw;	/* first switch created by firmware */
559 	u16 eswitch_mode;		/* current mode of eswitch */
560 	struct ice_vfs vfs;
561 	DECLARE_BITMAP(features, ICE_F_MAX);
562 	DECLARE_BITMAP(state, ICE_STATE_NBITS);
563 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
564 	DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);
565 	unsigned long *avail_txqs;	/* bitmap to track PF Tx queue usage */
566 	unsigned long *avail_rxqs;	/* bitmap to track PF Rx queue usage */
567 	unsigned long serv_tmr_period;
568 	unsigned long serv_tmr_prev;
569 	struct timer_list serv_tmr;
570 	struct work_struct serv_task;
571 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
572 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
573 	struct mutex tc_mutex;		/* lock to protect TC changes */
574 	struct mutex adev_mutex;	/* lock to protect aux device access */
575 	struct mutex lag_mutex;		/* protect ice_lag struct in PF */
576 	u32 msg_enable;
577 	struct ice_ptp ptp;
578 	struct gnss_serial *gnss_serial;
579 	struct gnss_device *gnss_dev;
580 	u16 num_rdma_msix;		/* Total MSIX vectors for RDMA driver */
581 	u16 rdma_base_vector;
582 
583 	/* spinlock to protect the AdminQ wait list */
584 	spinlock_t aq_wait_lock;
585 	struct hlist_head aq_wait_list;
586 	wait_queue_head_t aq_wait_queue;
587 	bool fw_emp_reset_disabled;
588 
589 	wait_queue_head_t reset_wait_queue;
590 
591 	u32 hw_csum_rx_error;
592 	u32 oicr_err_reg;
593 	struct msi_map oicr_irq;	/* Other interrupt cause MSIX vector */
594 	u16 max_pf_txqs;	/* Total Tx queues PF wide */
595 	u16 max_pf_rxqs;	/* Total Rx queues PF wide */
596 	u16 num_lan_msix;	/* Total MSIX vectors for base driver */
597 	u16 num_lan_tx;		/* num LAN Tx queues setup */
598 	u16 num_lan_rx;		/* num LAN Rx queues setup */
599 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
600 	u16 num_alloc_vsi;
601 	u16 corer_count;	/* Core reset count */
602 	u16 globr_count;	/* Global reset count */
603 	u16 empr_count;		/* EMP reset count */
604 	u16 pfr_count;		/* PF reset count */
605 
606 	u8 wol_ena : 1;		/* software state of WoL */
607 	u32 wakeup_reason;	/* last wakeup reason */
608 	struct ice_hw_port_stats stats;
609 	struct ice_hw_port_stats stats_prev;
610 	struct ice_hw hw;
611 	u8 stat_prev_loaded:1; /* has previous stats been loaded */
612 	u8 rdma_mode;
613 	u16 dcbx_cap;
614 	u32 tx_timeout_count;
615 	unsigned long tx_timeout_last_recovery;
616 	u32 tx_timeout_recovery_level;
617 	char int_name[ICE_INT_NAME_STR_LEN];
618 	struct auxiliary_device *adev;
619 	int aux_idx;
620 	u32 sw_int_count;
621 	/* count of tc_flower filters specific to channel (aka where filter
622 	 * action is "hw_tc <tc_num>")
623 	 */
624 	u16 num_dmac_chnl_fltrs;
625 	struct hlist_head tc_flower_fltr_list;
626 
627 	u64 supported_rxdids;
628 
629 	__le64 nvm_phy_type_lo; /* NVM PHY type low */
630 	__le64 nvm_phy_type_hi; /* NVM PHY type high */
631 	struct ice_link_default_override_tlv link_dflt_override;
632 	struct ice_lag *lag; /* Link Aggregation information */
633 
634 	struct ice_eswitch eswitch;
635 	struct ice_esw_br_port *br_port;
636 
637 #define ICE_INVALID_AGG_NODE_ID		0
638 #define ICE_PF_AGG_NODE_ID_START	1
639 #define ICE_MAX_PF_AGG_NODES		32
640 	struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
641 #define ICE_VF_AGG_NODE_ID_START	65
642 #define ICE_MAX_VF_AGG_NODES		32
643 	struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
644 };
645 
646 extern struct workqueue_struct *ice_lag_wq;
647 
648 struct ice_netdev_priv {
649 	struct ice_vsi *vsi;
650 	struct ice_repr *repr;
651 	/* indirect block callbacks on registered higher level devices
652 	 * (e.g. tunnel devices)
653 	 *
654 	 * tc_indr_block_cb_priv_list is used to look up indirect callback
655 	 * private data
656 	 */
657 	struct list_head tc_indr_block_priv_list;
658 };
659 
660 /**
661  * ice_vector_ch_enabled
662  * @qv: pointer to q_vector, can be NULL
663  *
664  * This function returns true if vector is channel enabled otherwise false
665  */
ice_vector_ch_enabled(struct ice_q_vector * qv)666 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
667 {
668 	return !!qv->ch; /* Enable it to run with TC */
669 }
670 
671 /**
672  * ice_irq_dynamic_ena - Enable default interrupt generation settings
673  * @hw: pointer to HW struct
674  * @vsi: pointer to VSI struct, can be NULL
675  * @q_vector: pointer to q_vector, can be NULL
676  */
677 static inline void
ice_irq_dynamic_ena(struct ice_hw * hw,struct ice_vsi * vsi,struct ice_q_vector * q_vector)678 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
679 		    struct ice_q_vector *q_vector)
680 {
681 	u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
682 				((struct ice_pf *)hw->back)->oicr_irq.index;
683 	int itr = ICE_ITR_NONE;
684 	u32 val;
685 
686 	/* clear the PBA here, as this function is meant to clean out all
687 	 * previous interrupts and enable the interrupt
688 	 */
689 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
690 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
691 	if (vsi)
692 		if (test_bit(ICE_VSI_DOWN, vsi->state))
693 			return;
694 	wr32(hw, GLINT_DYN_CTL(vector), val);
695 }
696 
697 /**
698  * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
699  * @netdev: pointer to the netdev struct
700  */
ice_netdev_to_pf(struct net_device * netdev)701 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
702 {
703 	struct ice_netdev_priv *np = netdev_priv(netdev);
704 
705 	return np->vsi->back;
706 }
707 
ice_is_xdp_ena_vsi(struct ice_vsi * vsi)708 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
709 {
710 	return !!READ_ONCE(vsi->xdp_prog);
711 }
712 
ice_set_ring_xdp(struct ice_tx_ring * ring)713 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
714 {
715 	ring->flags |= ICE_TX_FLAGS_RING_XDP;
716 }
717 
718 /**
719  * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID
720  * @vsi: pointer to VSI
721  * @qid: index of a queue to look at XSK buff pool presence
722  *
723  * Return: A pointer to xsk_buff_pool structure if there is a buffer pool
724  * attached and configured as zero-copy, NULL otherwise.
725  */
ice_get_xp_from_qid(struct ice_vsi * vsi,u16 qid)726 static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi,
727 							u16 qid)
728 {
729 	struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid);
730 
731 	if (!ice_is_xdp_ena_vsi(vsi))
732 		return NULL;
733 
734 	return (pool && pool->dev) ? pool : NULL;
735 }
736 
737 /**
738  * ice_xsk_pool - get XSK buffer pool bound to a ring
739  * @ring: Rx ring to use
740  *
741  * Returns a pointer to xsk_buff_pool structure if there is a buffer pool
742  * present, NULL otherwise.
743  */
ice_xsk_pool(struct ice_rx_ring * ring)744 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)
745 {
746 	struct ice_vsi *vsi = ring->vsi;
747 	u16 qid = ring->q_index;
748 
749 	return ice_get_xp_from_qid(vsi, qid);
750 }
751 
752 /**
753  * ice_tx_xsk_pool - assign XSK buff pool to XDP ring
754  * @vsi: pointer to VSI
755  * @qid: index of a queue to look at XSK buff pool presence
756  *
757  * Sets XSK buff pool pointer on XDP ring.
758  *
759  * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided
760  * queue id. Reason for doing so is that queue vectors might have assigned more
761  * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring
762  * carries a pointer to one of these XDP rings for its own purposes, such as
763  * handling XDP_TX action, therefore we can piggyback here on the
764  * rx_ring->xdp_ring assignment that was done during XDP rings initialization.
765  */
ice_tx_xsk_pool(struct ice_vsi * vsi,u16 qid)766 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid)
767 {
768 	struct ice_tx_ring *ring;
769 
770 	ring = vsi->rx_rings[qid]->xdp_ring;
771 	if (!ring)
772 		return;
773 
774 	ring->xsk_pool = ice_get_xp_from_qid(vsi, qid);
775 }
776 
777 /**
778  * ice_get_main_vsi - Get the PF VSI
779  * @pf: PF instance
780  *
781  * returns pf->vsi[0], which by definition is the PF VSI
782  */
ice_get_main_vsi(struct ice_pf * pf)783 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
784 {
785 	if (pf->vsi)
786 		return pf->vsi[0];
787 
788 	return NULL;
789 }
790 
791 /**
792  * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
793  * @np: private netdev structure
794  */
ice_get_netdev_priv_vsi(struct ice_netdev_priv * np)795 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
796 {
797 	/* In case of port representor return source port VSI. */
798 	if (np->repr)
799 		return np->repr->src_vsi;
800 	else
801 		return np->vsi;
802 }
803 
804 /**
805  * ice_get_ctrl_vsi - Get the control VSI
806  * @pf: PF instance
807  */
ice_get_ctrl_vsi(struct ice_pf * pf)808 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
809 {
810 	/* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
811 	if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
812 		return NULL;
813 
814 	return pf->vsi[pf->ctrl_vsi_idx];
815 }
816 
817 /**
818  * ice_find_vsi - Find the VSI from VSI ID
819  * @pf: The PF pointer to search in
820  * @vsi_num: The VSI ID to search for
821  */
ice_find_vsi(struct ice_pf * pf,u16 vsi_num)822 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)
823 {
824 	int i;
825 
826 	ice_for_each_vsi(pf, i)
827 		if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)
828 			return  pf->vsi[i];
829 	return NULL;
830 }
831 
832 /**
833  * ice_is_switchdev_running - check if switchdev is configured
834  * @pf: pointer to PF structure
835  *
836  * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
837  * and switchdev is configured, false otherwise.
838  */
ice_is_switchdev_running(struct ice_pf * pf)839 static inline bool ice_is_switchdev_running(struct ice_pf *pf)
840 {
841 	return pf->eswitch.is_running;
842 }
843 
844 #define ICE_FD_STAT_CTR_BLOCK_COUNT	256
845 #define ICE_FD_STAT_PF_IDX(base_idx) \
846 			((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
847 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
848 #define ICE_FD_STAT_CH			1
849 #define ICE_FD_CH_STAT_IDX(base_idx) \
850 			(ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
851 
852 /**
853  * ice_is_adq_active - any active ADQs
854  * @pf: pointer to PF
855  *
856  * This function returns true if there are any ADQs configured (which is
857  * determined by looking at VSI type (which should be VSI_PF), numtc, and
858  * TC_MQPRIO flag) otherwise return false
859  */
ice_is_adq_active(struct ice_pf * pf)860 static inline bool ice_is_adq_active(struct ice_pf *pf)
861 {
862 	struct ice_vsi *vsi;
863 
864 	vsi = ice_get_main_vsi(pf);
865 	if (!vsi)
866 		return false;
867 
868 	/* is ADQ configured */
869 	if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
870 	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
871 		return true;
872 
873 	return false;
874 }
875 
876 bool netif_is_ice(const struct net_device *dev);
877 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
878 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
879 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
880 int ice_vsi_open(struct ice_vsi *vsi);
881 void ice_set_ethtool_ops(struct net_device *netdev);
882 void ice_set_ethtool_repr_ops(struct net_device *netdev);
883 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
884 u16 ice_get_avail_txq_count(struct ice_pf *pf);
885 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
886 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);
887 void ice_update_vsi_stats(struct ice_vsi *vsi);
888 void ice_update_pf_stats(struct ice_pf *pf);
889 void
890 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,
891 			     struct ice_q_stats stats, u64 *pkts, u64 *bytes);
892 int ice_up(struct ice_vsi *vsi);
893 int ice_down(struct ice_vsi *vsi);
894 int ice_down_up(struct ice_vsi *vsi);
895 int ice_vsi_cfg_lan(struct ice_vsi *vsi);
896 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
897 
898 enum ice_xdp_cfg {
899 	ICE_XDP_CFG_FULL,	/* Fully apply new config in .ndo_bpf() */
900 	ICE_XDP_CFG_PART,	/* Save/use part of config in VSI rebuild */
901 };
902 
903 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
904 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,
905 			  enum ice_xdp_cfg cfg_type);
906 int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type);
907 int
908 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
909 	     u32 flags);
910 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
911 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
912 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
913 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
914 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
915 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
916 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
917 int ice_plug_aux_dev(struct ice_pf *pf);
918 void ice_unplug_aux_dev(struct ice_pf *pf);
919 int ice_init_rdma(struct ice_pf *pf);
920 void ice_deinit_rdma(struct ice_pf *pf);
921 const char *ice_aq_str(enum ice_aq_err aq_err);
922 bool ice_is_wol_supported(struct ice_hw *hw);
923 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
924 int
925 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
926 		    bool is_tun);
927 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
928 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
929 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
930 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
931 int
932 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
933 		      u32 *rule_locs);
934 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
935 void ice_fdir_release_flows(struct ice_hw *hw);
936 void ice_fdir_replay_flows(struct ice_hw *hw);
937 void ice_fdir_replay_fltrs(struct ice_pf *pf);
938 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
939 
940 enum ice_aq_task_state {
941 	ICE_AQ_TASK_NOT_PREPARED,
942 	ICE_AQ_TASK_WAITING,
943 	ICE_AQ_TASK_COMPLETE,
944 	ICE_AQ_TASK_CANCELED,
945 };
946 
947 struct ice_aq_task {
948 	struct hlist_node entry;
949 	struct ice_rq_event_info event;
950 	enum ice_aq_task_state state;
951 	u16 opcode;
952 };
953 
954 void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task,
955 			   u16 opcode);
956 int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,
957 			  unsigned long timeout);
958 int ice_open(struct net_device *netdev);
959 int ice_open_internal(struct net_device *netdev);
960 int ice_stop(struct net_device *netdev);
961 void ice_service_task_schedule(struct ice_pf *pf);
962 int ice_load(struct ice_pf *pf);
963 void ice_unload(struct ice_pf *pf);
964 
965 /**
966  * ice_set_rdma_cap - enable RDMA support
967  * @pf: PF struct
968  */
ice_set_rdma_cap(struct ice_pf * pf)969 static inline void ice_set_rdma_cap(struct ice_pf *pf)
970 {
971 	if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
972 		set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
973 		set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
974 	}
975 }
976 
977 /**
978  * ice_clear_rdma_cap - disable RDMA support
979  * @pf: PF struct
980  */
ice_clear_rdma_cap(struct ice_pf * pf)981 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
982 {
983 	/* defer unplug to service task to avoid RTNL lock and
984 	 * clear PLUG bit so that pending plugs don't interfere
985 	 */
986 	clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
987 	set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);
988 	clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
989 }
990 #endif /* _ICE_H_ */
991