1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
3
4 #include <generated/utsrelease.h>
5 #include <linux/crash_dump.h>
6 #include <linux/if_bridge.h>
7 #include <linux/if_macvlan.h>
8 #include <linux/module.h>
9 #include <net/pkt_cls.h>
10 #include <net/xdp_sock_drv.h>
11
12 /* Local includes */
13 #include "i40e.h"
14 #include "i40e_devids.h"
15 #include "i40e_diag.h"
16 #include "i40e_lan_hmc.h"
17 #include "i40e_virtchnl_pf.h"
18 #include "i40e_xsk.h"
19
20 /* All i40e tracepoints are defined by the include below, which
21 * must be included exactly once across the whole kernel with
22 * CREATE_TRACE_POINTS defined
23 */
24 #define CREATE_TRACE_POINTS
25 #include "i40e_trace.h"
26
27 const char i40e_driver_name[] = "i40e";
28 static const char i40e_driver_string[] =
29 "Intel(R) Ethernet Connection XL710 Network Driver";
30
31 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
32
33 /* a bit of forward declarations */
34 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
35 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
36 static int i40e_add_vsi(struct i40e_vsi *vsi);
37 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
38 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
39 static int i40e_setup_misc_vector(struct i40e_pf *pf);
40 static void i40e_determine_queue_usage(struct i40e_pf *pf);
41 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
42 static void i40e_prep_for_reset(struct i40e_pf *pf);
43 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
44 bool lock_acquired);
45 static int i40e_reset(struct i40e_pf *pf);
46 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
47 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
48 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
49 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
50 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
51 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
52 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
53 static int i40e_get_capabilities(struct i40e_pf *pf,
54 enum i40e_admin_queue_opc list_type);
55 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
56
57 /* i40e_pci_tbl - PCI Device ID Table
58 *
59 * Last entry must be all 0s
60 *
61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
62 * Class, Class Mask, private data (not used) }
63 */
64 static const struct pci_device_id i40e_pci_tbl[] = {
65 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
66 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_BC), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722_A), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
91 /* required last entry */
92 {0, }
93 };
94 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
95
96 #define I40E_MAX_VF_COUNT 128
97 static int debug = -1;
98 module_param(debug, uint, 0);
99 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
100
101 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
102 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
103 MODULE_LICENSE("GPL v2");
104
105 static struct workqueue_struct *i40e_wq;
106
netdev_hw_addr_refcnt(struct i40e_mac_filter * f,struct net_device * netdev,int delta)107 static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
108 struct net_device *netdev, int delta)
109 {
110 struct netdev_hw_addr_list *ha_list;
111 struct netdev_hw_addr *ha;
112
113 if (!f || !netdev)
114 return;
115
116 if (is_unicast_ether_addr(f->macaddr) || is_link_local_ether_addr(f->macaddr))
117 ha_list = &netdev->uc;
118 else
119 ha_list = &netdev->mc;
120
121 netdev_hw_addr_list_for_each(ha, ha_list) {
122 if (ether_addr_equal(ha->addr, f->macaddr)) {
123 ha->refcount += delta;
124 if (ha->refcount <= 0)
125 ha->refcount = 1;
126 break;
127 }
128 }
129 }
130
131 /**
132 * i40e_hw_to_dev - get device pointer from the hardware structure
133 * @hw: pointer to the device HW structure
134 **/
i40e_hw_to_dev(struct i40e_hw * hw)135 struct device *i40e_hw_to_dev(struct i40e_hw *hw)
136 {
137 struct i40e_pf *pf = i40e_hw_to_pf(hw);
138
139 return &pf->pdev->dev;
140 }
141
142 /**
143 * i40e_allocate_dma_mem - OS specific memory alloc for shared code
144 * @hw: pointer to the HW structure
145 * @mem: ptr to mem struct to fill out
146 * @size: size of memory requested
147 * @alignment: what to align the allocation to
148 **/
i40e_allocate_dma_mem(struct i40e_hw * hw,struct i40e_dma_mem * mem,u64 size,u32 alignment)149 int i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
150 u64 size, u32 alignment)
151 {
152 struct i40e_pf *pf = i40e_hw_to_pf(hw);
153
154 mem->size = ALIGN(size, alignment);
155 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
156 GFP_KERNEL);
157 if (!mem->va)
158 return -ENOMEM;
159
160 return 0;
161 }
162
163 /**
164 * i40e_free_dma_mem - OS specific memory free for shared code
165 * @hw: pointer to the HW structure
166 * @mem: ptr to mem struct to free
167 **/
i40e_free_dma_mem(struct i40e_hw * hw,struct i40e_dma_mem * mem)168 int i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)
169 {
170 struct i40e_pf *pf = i40e_hw_to_pf(hw);
171
172 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
173 mem->va = NULL;
174 mem->pa = 0;
175 mem->size = 0;
176
177 return 0;
178 }
179
180 /**
181 * i40e_allocate_virt_mem - OS specific memory alloc for shared code
182 * @hw: pointer to the HW structure
183 * @mem: ptr to mem struct to fill out
184 * @size: size of memory requested
185 **/
i40e_allocate_virt_mem(struct i40e_hw * hw,struct i40e_virt_mem * mem,u32 size)186 int i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem,
187 u32 size)
188 {
189 mem->size = size;
190 mem->va = kzalloc(size, GFP_KERNEL);
191
192 if (!mem->va)
193 return -ENOMEM;
194
195 return 0;
196 }
197
198 /**
199 * i40e_free_virt_mem - OS specific memory free for shared code
200 * @hw: pointer to the HW structure
201 * @mem: ptr to mem struct to free
202 **/
i40e_free_virt_mem(struct i40e_hw * hw,struct i40e_virt_mem * mem)203 int i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
204 {
205 /* it's ok to kfree a NULL pointer */
206 kfree(mem->va);
207 mem->va = NULL;
208 mem->size = 0;
209
210 return 0;
211 }
212
213 /**
214 * i40e_get_lump - find a lump of free generic resource
215 * @pf: board private structure
216 * @pile: the pile of resource to search
217 * @needed: the number of items needed
218 * @id: an owner id to stick on the items assigned
219 *
220 * Returns the base item index of the lump, or negative for error
221 **/
i40e_get_lump(struct i40e_pf * pf,struct i40e_lump_tracking * pile,u16 needed,u16 id)222 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
223 u16 needed, u16 id)
224 {
225 int ret = -ENOMEM;
226 int i, j;
227
228 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
229 dev_info(&pf->pdev->dev,
230 "param err: pile=%s needed=%d id=0x%04x\n",
231 pile ? "<valid>" : "<null>", needed, id);
232 return -EINVAL;
233 }
234
235 /* Allocate last queue in the pile for FDIR VSI queue
236 * so it doesn't fragment the qp_pile
237 */
238 if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
239 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
240 dev_err(&pf->pdev->dev,
241 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
242 pile->num_entries - 1);
243 return -ENOMEM;
244 }
245 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
246 return pile->num_entries - 1;
247 }
248
249 i = 0;
250 while (i < pile->num_entries) {
251 /* skip already allocated entries */
252 if (pile->list[i] & I40E_PILE_VALID_BIT) {
253 i++;
254 continue;
255 }
256
257 /* do we have enough in this lump? */
258 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
259 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
260 break;
261 }
262
263 if (j == needed) {
264 /* there was enough, so assign it to the requestor */
265 for (j = 0; j < needed; j++)
266 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
267 ret = i;
268 break;
269 }
270
271 /* not enough, so skip over it and continue looking */
272 i += j;
273 }
274
275 return ret;
276 }
277
278 /**
279 * i40e_put_lump - return a lump of generic resource
280 * @pile: the pile of resource to search
281 * @index: the base item index
282 * @id: the owner id of the items assigned
283 *
284 * Returns the count of items in the lump
285 **/
i40e_put_lump(struct i40e_lump_tracking * pile,u16 index,u16 id)286 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
287 {
288 int valid_id = (id | I40E_PILE_VALID_BIT);
289 int count = 0;
290 u16 i;
291
292 if (!pile || index >= pile->num_entries)
293 return -EINVAL;
294
295 for (i = index;
296 i < pile->num_entries && pile->list[i] == valid_id;
297 i++) {
298 pile->list[i] = 0;
299 count++;
300 }
301
302
303 return count;
304 }
305
306 /**
307 * i40e_find_vsi_from_id - searches for the vsi with the given id
308 * @pf: the pf structure to search for the vsi
309 * @id: id of the vsi it is searching for
310 **/
i40e_find_vsi_from_id(struct i40e_pf * pf,u16 id)311 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
312 {
313 int i;
314
315 for (i = 0; i < pf->num_alloc_vsi; i++)
316 if (pf->vsi[i] && (pf->vsi[i]->id == id))
317 return pf->vsi[i];
318
319 return NULL;
320 }
321
322 /**
323 * i40e_service_event_schedule - Schedule the service task to wake up
324 * @pf: board private structure
325 *
326 * If not already scheduled, this puts the task into the work queue
327 **/
i40e_service_event_schedule(struct i40e_pf * pf)328 void i40e_service_event_schedule(struct i40e_pf *pf)
329 {
330 if ((!test_bit(__I40E_DOWN, pf->state) &&
331 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
332 test_bit(__I40E_RECOVERY_MODE, pf->state))
333 queue_work(i40e_wq, &pf->service_task);
334 }
335
336 /**
337 * i40e_tx_timeout - Respond to a Tx Hang
338 * @netdev: network interface device structure
339 * @txqueue: queue number timing out
340 *
341 * If any port has noticed a Tx timeout, it is likely that the whole
342 * device is munged, not just the one netdev port, so go for the full
343 * reset.
344 **/
i40e_tx_timeout(struct net_device * netdev,unsigned int txqueue)345 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
346 {
347 struct i40e_netdev_priv *np = netdev_priv(netdev);
348 struct i40e_vsi *vsi = np->vsi;
349 struct i40e_pf *pf = vsi->back;
350 struct i40e_ring *tx_ring = NULL;
351 unsigned int i;
352 u32 head, val;
353
354 pf->tx_timeout_count++;
355
356 /* with txqueue index, find the tx_ring struct */
357 for (i = 0; i < vsi->num_queue_pairs; i++) {
358 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
359 if (txqueue ==
360 vsi->tx_rings[i]->queue_index) {
361 tx_ring = vsi->tx_rings[i];
362 break;
363 }
364 }
365 }
366
367 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
368 pf->tx_timeout_recovery_level = 1; /* reset after some time */
369 else if (time_before(jiffies,
370 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
371 return; /* don't do any new action before the next timeout */
372
373 /* don't kick off another recovery if one is already pending */
374 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
375 return;
376
377 if (tx_ring) {
378 head = i40e_get_head(tx_ring);
379 /* Read interrupt register */
380 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
381 val = rd32(&pf->hw,
382 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
383 tx_ring->vsi->base_vector - 1));
384 else
385 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
386
387 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
388 vsi->seid, txqueue, tx_ring->next_to_clean,
389 head, tx_ring->next_to_use,
390 readl(tx_ring->tail), val);
391 }
392
393 pf->tx_timeout_last_recovery = jiffies;
394 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
395 pf->tx_timeout_recovery_level, txqueue);
396
397 switch (pf->tx_timeout_recovery_level) {
398 case 1:
399 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
400 break;
401 case 2:
402 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
403 break;
404 case 3:
405 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
406 break;
407 default:
408 netdev_err(netdev, "tx_timeout recovery unsuccessful, device is in non-recoverable state.\n");
409 set_bit(__I40E_DOWN_REQUESTED, pf->state);
410 set_bit(__I40E_VSI_DOWN_REQUESTED, vsi->state);
411 break;
412 }
413
414 i40e_service_event_schedule(pf);
415 pf->tx_timeout_recovery_level++;
416 }
417
418 /**
419 * i40e_get_vsi_stats_struct - Get System Network Statistics
420 * @vsi: the VSI we care about
421 *
422 * Returns the address of the device statistics structure.
423 * The statistics are actually updated from the service task.
424 **/
i40e_get_vsi_stats_struct(struct i40e_vsi * vsi)425 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
426 {
427 return &vsi->net_stats;
428 }
429
430 /**
431 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
432 * @ring: Tx ring to get statistics from
433 * @stats: statistics entry to be updated
434 **/
i40e_get_netdev_stats_struct_tx(struct i40e_ring * ring,struct rtnl_link_stats64 * stats)435 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
436 struct rtnl_link_stats64 *stats)
437 {
438 u64 bytes, packets;
439 unsigned int start;
440
441 do {
442 start = u64_stats_fetch_begin(&ring->syncp);
443 packets = ring->stats.packets;
444 bytes = ring->stats.bytes;
445 } while (u64_stats_fetch_retry(&ring->syncp, start));
446
447 stats->tx_packets += packets;
448 stats->tx_bytes += bytes;
449 }
450
451 /**
452 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
453 * @netdev: network interface device structure
454 * @stats: data structure to store statistics
455 *
456 * Returns the address of the device statistics structure.
457 * The statistics are actually updated from the service task.
458 **/
i40e_get_netdev_stats_struct(struct net_device * netdev,struct rtnl_link_stats64 * stats)459 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
460 struct rtnl_link_stats64 *stats)
461 {
462 struct i40e_netdev_priv *np = netdev_priv(netdev);
463 struct i40e_vsi *vsi = np->vsi;
464 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
465 struct i40e_ring *ring;
466 int i;
467
468 if (test_bit(__I40E_VSI_DOWN, vsi->state))
469 return;
470
471 if (!vsi->tx_rings)
472 return;
473
474 rcu_read_lock();
475 for (i = 0; i < vsi->num_queue_pairs; i++) {
476 u64 bytes, packets;
477 unsigned int start;
478
479 ring = READ_ONCE(vsi->tx_rings[i]);
480 if (!ring)
481 continue;
482 i40e_get_netdev_stats_struct_tx(ring, stats);
483
484 if (i40e_enabled_xdp_vsi(vsi)) {
485 ring = READ_ONCE(vsi->xdp_rings[i]);
486 if (!ring)
487 continue;
488 i40e_get_netdev_stats_struct_tx(ring, stats);
489 }
490
491 ring = READ_ONCE(vsi->rx_rings[i]);
492 if (!ring)
493 continue;
494 do {
495 start = u64_stats_fetch_begin(&ring->syncp);
496 packets = ring->stats.packets;
497 bytes = ring->stats.bytes;
498 } while (u64_stats_fetch_retry(&ring->syncp, start));
499
500 stats->rx_packets += packets;
501 stats->rx_bytes += bytes;
502
503 }
504 rcu_read_unlock();
505
506 /* following stats updated by i40e_watchdog_subtask() */
507 stats->multicast = vsi_stats->multicast;
508 stats->tx_errors = vsi_stats->tx_errors;
509 stats->tx_dropped = vsi_stats->tx_dropped;
510 stats->rx_errors = vsi_stats->rx_errors;
511 stats->rx_dropped = vsi_stats->rx_dropped;
512 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
513 stats->rx_length_errors = vsi_stats->rx_length_errors;
514 }
515
516 /**
517 * i40e_vsi_reset_stats - Resets all stats of the given vsi
518 * @vsi: the VSI to have its stats reset
519 **/
i40e_vsi_reset_stats(struct i40e_vsi * vsi)520 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
521 {
522 struct rtnl_link_stats64 *ns;
523 int i;
524
525 if (!vsi)
526 return;
527
528 ns = i40e_get_vsi_stats_struct(vsi);
529 memset(ns, 0, sizeof(*ns));
530 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
531 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
532 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
533 if (vsi->rx_rings && vsi->rx_rings[0]) {
534 for (i = 0; i < vsi->num_queue_pairs; i++) {
535 memset(&vsi->rx_rings[i]->stats, 0,
536 sizeof(vsi->rx_rings[i]->stats));
537 memset(&vsi->rx_rings[i]->rx_stats, 0,
538 sizeof(vsi->rx_rings[i]->rx_stats));
539 memset(&vsi->tx_rings[i]->stats, 0,
540 sizeof(vsi->tx_rings[i]->stats));
541 memset(&vsi->tx_rings[i]->tx_stats, 0,
542 sizeof(vsi->tx_rings[i]->tx_stats));
543 }
544 }
545 vsi->stat_offsets_loaded = false;
546 }
547
548 /**
549 * i40e_pf_reset_stats - Reset all of the stats for the given PF
550 * @pf: the PF to be reset
551 **/
i40e_pf_reset_stats(struct i40e_pf * pf)552 void i40e_pf_reset_stats(struct i40e_pf *pf)
553 {
554 int i;
555
556 memset(&pf->stats, 0, sizeof(pf->stats));
557 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
558 pf->stat_offsets_loaded = false;
559
560 for (i = 0; i < I40E_MAX_VEB; i++) {
561 if (pf->veb[i]) {
562 memset(&pf->veb[i]->stats, 0,
563 sizeof(pf->veb[i]->stats));
564 memset(&pf->veb[i]->stats_offsets, 0,
565 sizeof(pf->veb[i]->stats_offsets));
566 memset(&pf->veb[i]->tc_stats, 0,
567 sizeof(pf->veb[i]->tc_stats));
568 memset(&pf->veb[i]->tc_stats_offsets, 0,
569 sizeof(pf->veb[i]->tc_stats_offsets));
570 pf->veb[i]->stat_offsets_loaded = false;
571 }
572 }
573 pf->hw_csum_rx_error = 0;
574 }
575
576 /**
577 * i40e_compute_pci_to_hw_id - compute index form PCI function.
578 * @vsi: ptr to the VSI to read from.
579 * @hw: ptr to the hardware info.
580 **/
i40e_compute_pci_to_hw_id(struct i40e_vsi * vsi,struct i40e_hw * hw)581 static u32 i40e_compute_pci_to_hw_id(struct i40e_vsi *vsi, struct i40e_hw *hw)
582 {
583 int pf_count = i40e_get_pf_count(hw);
584
585 if (vsi->type == I40E_VSI_SRIOV)
586 return (hw->port * BIT(7)) / pf_count + vsi->vf_id;
587
588 return hw->port + BIT(7);
589 }
590
591 /**
592 * i40e_stat_update64 - read and update a 64 bit stat from the chip.
593 * @hw: ptr to the hardware info.
594 * @hireg: the high 32 bit reg to read.
595 * @loreg: the low 32 bit reg to read.
596 * @offset_loaded: has the initial offset been loaded yet.
597 * @offset: ptr to current offset value.
598 * @stat: ptr to the stat.
599 *
600 * Since the device stats are not reset at PFReset, they will not
601 * be zeroed when the driver starts. We'll save the first values read
602 * and use them as offsets to be subtracted from the raw values in order
603 * to report stats that count from zero.
604 **/
i40e_stat_update64(struct i40e_hw * hw,u32 hireg,u32 loreg,bool offset_loaded,u64 * offset,u64 * stat)605 static void i40e_stat_update64(struct i40e_hw *hw, u32 hireg, u32 loreg,
606 bool offset_loaded, u64 *offset, u64 *stat)
607 {
608 u64 new_data;
609
610 new_data = rd64(hw, loreg);
611
612 if (!offset_loaded || new_data < *offset)
613 *offset = new_data;
614 *stat = new_data - *offset;
615 }
616
617 /**
618 * i40e_stat_update48 - read and update a 48 bit stat from the chip
619 * @hw: ptr to the hardware info
620 * @hireg: the high 32 bit reg to read
621 * @loreg: the low 32 bit reg to read
622 * @offset_loaded: has the initial offset been loaded yet
623 * @offset: ptr to current offset value
624 * @stat: ptr to the stat
625 *
626 * Since the device stats are not reset at PFReset, they likely will not
627 * be zeroed when the driver starts. We'll save the first values read
628 * and use them as offsets to be subtracted from the raw values in order
629 * to report stats that count from zero. In the process, we also manage
630 * the potential roll-over.
631 **/
i40e_stat_update48(struct i40e_hw * hw,u32 hireg,u32 loreg,bool offset_loaded,u64 * offset,u64 * stat)632 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
633 bool offset_loaded, u64 *offset, u64 *stat)
634 {
635 u64 new_data;
636
637 if (hw->device_id == I40E_DEV_ID_QEMU) {
638 new_data = rd32(hw, loreg);
639 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
640 } else {
641 new_data = rd64(hw, loreg);
642 }
643 if (!offset_loaded)
644 *offset = new_data;
645 if (likely(new_data >= *offset))
646 *stat = new_data - *offset;
647 else
648 *stat = (new_data + BIT_ULL(48)) - *offset;
649 *stat &= 0xFFFFFFFFFFFFULL;
650 }
651
652 /**
653 * i40e_stat_update32 - read and update a 32 bit stat from the chip
654 * @hw: ptr to the hardware info
655 * @reg: the hw reg to read
656 * @offset_loaded: has the initial offset been loaded yet
657 * @offset: ptr to current offset value
658 * @stat: ptr to the stat
659 **/
i40e_stat_update32(struct i40e_hw * hw,u32 reg,bool offset_loaded,u64 * offset,u64 * stat)660 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
661 bool offset_loaded, u64 *offset, u64 *stat)
662 {
663 u32 new_data;
664
665 new_data = rd32(hw, reg);
666 if (!offset_loaded)
667 *offset = new_data;
668 if (likely(new_data >= *offset))
669 *stat = (u32)(new_data - *offset);
670 else
671 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
672 }
673
674 /**
675 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
676 * @hw: ptr to the hardware info
677 * @reg: the hw reg to read and clear
678 * @stat: ptr to the stat
679 **/
i40e_stat_update_and_clear32(struct i40e_hw * hw,u32 reg,u64 * stat)680 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
681 {
682 u32 new_data = rd32(hw, reg);
683
684 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
685 *stat += new_data;
686 }
687
688 /**
689 * i40e_stats_update_rx_discards - update rx_discards.
690 * @vsi: ptr to the VSI to be updated.
691 * @hw: ptr to the hardware info.
692 * @stat_idx: VSI's stat_counter_idx.
693 * @offset_loaded: ptr to the VSI's stat_offsets_loaded.
694 * @stat_offset: ptr to stat_offset to store first read of specific register.
695 * @stat: ptr to VSI's stat to be updated.
696 **/
697 static void
i40e_stats_update_rx_discards(struct i40e_vsi * vsi,struct i40e_hw * hw,int stat_idx,bool offset_loaded,struct i40e_eth_stats * stat_offset,struct i40e_eth_stats * stat)698 i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
699 int stat_idx, bool offset_loaded,
700 struct i40e_eth_stats *stat_offset,
701 struct i40e_eth_stats *stat)
702 {
703 u64 rx_rdpc, rx_rxerr;
704
705 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
706 &stat_offset->rx_discards, &rx_rdpc);
707 i40e_stat_update64(hw,
708 I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
709 I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
710 offset_loaded, &stat_offset->rx_discards_other,
711 &rx_rxerr);
712
713 stat->rx_discards = rx_rdpc + rx_rxerr;
714 }
715
716 /**
717 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
718 * @vsi: the VSI to be updated
719 **/
i40e_update_eth_stats(struct i40e_vsi * vsi)720 void i40e_update_eth_stats(struct i40e_vsi *vsi)
721 {
722 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
723 struct i40e_pf *pf = vsi->back;
724 struct i40e_hw *hw = &pf->hw;
725 struct i40e_eth_stats *oes;
726 struct i40e_eth_stats *es; /* device's eth stats */
727
728 es = &vsi->eth_stats;
729 oes = &vsi->eth_stats_offsets;
730
731 /* Gather up the stats that the hw collects */
732 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
733 vsi->stat_offsets_loaded,
734 &oes->tx_errors, &es->tx_errors);
735 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
736 vsi->stat_offsets_loaded,
737 &oes->rx_discards, &es->rx_discards);
738 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
739 vsi->stat_offsets_loaded,
740 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
741
742 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
743 I40E_GLV_GORCL(stat_idx),
744 vsi->stat_offsets_loaded,
745 &oes->rx_bytes, &es->rx_bytes);
746 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
747 I40E_GLV_UPRCL(stat_idx),
748 vsi->stat_offsets_loaded,
749 &oes->rx_unicast, &es->rx_unicast);
750 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
751 I40E_GLV_MPRCL(stat_idx),
752 vsi->stat_offsets_loaded,
753 &oes->rx_multicast, &es->rx_multicast);
754 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
755 I40E_GLV_BPRCL(stat_idx),
756 vsi->stat_offsets_loaded,
757 &oes->rx_broadcast, &es->rx_broadcast);
758
759 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
760 I40E_GLV_GOTCL(stat_idx),
761 vsi->stat_offsets_loaded,
762 &oes->tx_bytes, &es->tx_bytes);
763 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
764 I40E_GLV_UPTCL(stat_idx),
765 vsi->stat_offsets_loaded,
766 &oes->tx_unicast, &es->tx_unicast);
767 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
768 I40E_GLV_MPTCL(stat_idx),
769 vsi->stat_offsets_loaded,
770 &oes->tx_multicast, &es->tx_multicast);
771 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
772 I40E_GLV_BPTCL(stat_idx),
773 vsi->stat_offsets_loaded,
774 &oes->tx_broadcast, &es->tx_broadcast);
775
776 i40e_stats_update_rx_discards(vsi, hw, stat_idx,
777 vsi->stat_offsets_loaded, oes, es);
778
779 vsi->stat_offsets_loaded = true;
780 }
781
782 /**
783 * i40e_update_veb_stats - Update Switch component statistics
784 * @veb: the VEB being updated
785 **/
i40e_update_veb_stats(struct i40e_veb * veb)786 void i40e_update_veb_stats(struct i40e_veb *veb)
787 {
788 struct i40e_pf *pf = veb->pf;
789 struct i40e_hw *hw = &pf->hw;
790 struct i40e_eth_stats *oes;
791 struct i40e_eth_stats *es; /* device's eth stats */
792 struct i40e_veb_tc_stats *veb_oes;
793 struct i40e_veb_tc_stats *veb_es;
794 int i, idx = 0;
795
796 idx = veb->stats_idx;
797 es = &veb->stats;
798 oes = &veb->stats_offsets;
799 veb_es = &veb->tc_stats;
800 veb_oes = &veb->tc_stats_offsets;
801
802 /* Gather up the stats that the hw collects */
803 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
804 veb->stat_offsets_loaded,
805 &oes->tx_discards, &es->tx_discards);
806 if (hw->revision_id > 0)
807 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
808 veb->stat_offsets_loaded,
809 &oes->rx_unknown_protocol,
810 &es->rx_unknown_protocol);
811 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
812 veb->stat_offsets_loaded,
813 &oes->rx_bytes, &es->rx_bytes);
814 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
815 veb->stat_offsets_loaded,
816 &oes->rx_unicast, &es->rx_unicast);
817 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
818 veb->stat_offsets_loaded,
819 &oes->rx_multicast, &es->rx_multicast);
820 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
821 veb->stat_offsets_loaded,
822 &oes->rx_broadcast, &es->rx_broadcast);
823
824 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
825 veb->stat_offsets_loaded,
826 &oes->tx_bytes, &es->tx_bytes);
827 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
828 veb->stat_offsets_loaded,
829 &oes->tx_unicast, &es->tx_unicast);
830 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
831 veb->stat_offsets_loaded,
832 &oes->tx_multicast, &es->tx_multicast);
833 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
834 veb->stat_offsets_loaded,
835 &oes->tx_broadcast, &es->tx_broadcast);
836 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
837 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
838 I40E_GLVEBTC_RPCL(i, idx),
839 veb->stat_offsets_loaded,
840 &veb_oes->tc_rx_packets[i],
841 &veb_es->tc_rx_packets[i]);
842 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
843 I40E_GLVEBTC_RBCL(i, idx),
844 veb->stat_offsets_loaded,
845 &veb_oes->tc_rx_bytes[i],
846 &veb_es->tc_rx_bytes[i]);
847 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
848 I40E_GLVEBTC_TPCL(i, idx),
849 veb->stat_offsets_loaded,
850 &veb_oes->tc_tx_packets[i],
851 &veb_es->tc_tx_packets[i]);
852 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
853 I40E_GLVEBTC_TBCL(i, idx),
854 veb->stat_offsets_loaded,
855 &veb_oes->tc_tx_bytes[i],
856 &veb_es->tc_tx_bytes[i]);
857 }
858 veb->stat_offsets_loaded = true;
859 }
860
861 /**
862 * i40e_update_vsi_stats - Update the vsi statistics counters.
863 * @vsi: the VSI to be updated
864 *
865 * There are a few instances where we store the same stat in a
866 * couple of different structs. This is partly because we have
867 * the netdev stats that need to be filled out, which is slightly
868 * different from the "eth_stats" defined by the chip and used in
869 * VF communications. We sort it out here.
870 **/
i40e_update_vsi_stats(struct i40e_vsi * vsi)871 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
872 {
873 u64 rx_page, rx_buf, rx_reuse, rx_alloc, rx_waive, rx_busy;
874 struct i40e_pf *pf = vsi->back;
875 struct rtnl_link_stats64 *ons;
876 struct rtnl_link_stats64 *ns; /* netdev stats */
877 struct i40e_eth_stats *oes;
878 struct i40e_eth_stats *es; /* device's eth stats */
879 u64 tx_restart, tx_busy;
880 struct i40e_ring *p;
881 u64 bytes, packets;
882 unsigned int start;
883 u64 tx_linearize;
884 u64 tx_force_wb;
885 u64 tx_stopped;
886 u64 rx_p, rx_b;
887 u64 tx_p, tx_b;
888 u16 q;
889
890 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
891 test_bit(__I40E_CONFIG_BUSY, pf->state))
892 return;
893
894 ns = i40e_get_vsi_stats_struct(vsi);
895 ons = &vsi->net_stats_offsets;
896 es = &vsi->eth_stats;
897 oes = &vsi->eth_stats_offsets;
898
899 /* Gather up the netdev and vsi stats that the driver collects
900 * on the fly during packet processing
901 */
902 rx_b = rx_p = 0;
903 tx_b = tx_p = 0;
904 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
905 tx_stopped = 0;
906 rx_page = 0;
907 rx_buf = 0;
908 rx_reuse = 0;
909 rx_alloc = 0;
910 rx_waive = 0;
911 rx_busy = 0;
912 rcu_read_lock();
913 for (q = 0; q < vsi->num_queue_pairs; q++) {
914 /* locate Tx ring */
915 p = READ_ONCE(vsi->tx_rings[q]);
916 if (!p)
917 continue;
918
919 do {
920 start = u64_stats_fetch_begin(&p->syncp);
921 packets = p->stats.packets;
922 bytes = p->stats.bytes;
923 } while (u64_stats_fetch_retry(&p->syncp, start));
924 tx_b += bytes;
925 tx_p += packets;
926 tx_restart += p->tx_stats.restart_queue;
927 tx_busy += p->tx_stats.tx_busy;
928 tx_linearize += p->tx_stats.tx_linearize;
929 tx_force_wb += p->tx_stats.tx_force_wb;
930 tx_stopped += p->tx_stats.tx_stopped;
931
932 /* locate Rx ring */
933 p = READ_ONCE(vsi->rx_rings[q]);
934 if (!p)
935 continue;
936
937 do {
938 start = u64_stats_fetch_begin(&p->syncp);
939 packets = p->stats.packets;
940 bytes = p->stats.bytes;
941 } while (u64_stats_fetch_retry(&p->syncp, start));
942 rx_b += bytes;
943 rx_p += packets;
944 rx_buf += p->rx_stats.alloc_buff_failed;
945 rx_page += p->rx_stats.alloc_page_failed;
946 rx_reuse += p->rx_stats.page_reuse_count;
947 rx_alloc += p->rx_stats.page_alloc_count;
948 rx_waive += p->rx_stats.page_waive_count;
949 rx_busy += p->rx_stats.page_busy_count;
950
951 if (i40e_enabled_xdp_vsi(vsi)) {
952 /* locate XDP ring */
953 p = READ_ONCE(vsi->xdp_rings[q]);
954 if (!p)
955 continue;
956
957 do {
958 start = u64_stats_fetch_begin(&p->syncp);
959 packets = p->stats.packets;
960 bytes = p->stats.bytes;
961 } while (u64_stats_fetch_retry(&p->syncp, start));
962 tx_b += bytes;
963 tx_p += packets;
964 tx_restart += p->tx_stats.restart_queue;
965 tx_busy += p->tx_stats.tx_busy;
966 tx_linearize += p->tx_stats.tx_linearize;
967 tx_force_wb += p->tx_stats.tx_force_wb;
968 }
969 }
970 rcu_read_unlock();
971 vsi->tx_restart = tx_restart;
972 vsi->tx_busy = tx_busy;
973 vsi->tx_linearize = tx_linearize;
974 vsi->tx_force_wb = tx_force_wb;
975 vsi->tx_stopped = tx_stopped;
976 vsi->rx_page_failed = rx_page;
977 vsi->rx_buf_failed = rx_buf;
978 vsi->rx_page_reuse = rx_reuse;
979 vsi->rx_page_alloc = rx_alloc;
980 vsi->rx_page_waive = rx_waive;
981 vsi->rx_page_busy = rx_busy;
982
983 ns->rx_packets = rx_p;
984 ns->rx_bytes = rx_b;
985 ns->tx_packets = tx_p;
986 ns->tx_bytes = tx_b;
987
988 /* update netdev stats from eth stats */
989 i40e_update_eth_stats(vsi);
990 ons->tx_errors = oes->tx_errors;
991 ns->tx_errors = es->tx_errors;
992 ons->multicast = oes->rx_multicast;
993 ns->multicast = es->rx_multicast;
994 ons->rx_dropped = oes->rx_discards;
995 ns->rx_dropped = es->rx_discards;
996 ons->tx_dropped = oes->tx_discards;
997 ns->tx_dropped = es->tx_discards;
998
999 /* pull in a couple PF stats if this is the main vsi */
1000 if (vsi == pf->vsi[pf->lan_vsi]) {
1001 ns->rx_crc_errors = pf->stats.crc_errors;
1002 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
1003 ns->rx_length_errors = pf->stats.rx_length_errors;
1004 }
1005 }
1006
1007 /**
1008 * i40e_update_pf_stats - Update the PF statistics counters.
1009 * @pf: the PF to be updated
1010 **/
i40e_update_pf_stats(struct i40e_pf * pf)1011 static void i40e_update_pf_stats(struct i40e_pf *pf)
1012 {
1013 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
1014 struct i40e_hw_port_stats *nsd = &pf->stats;
1015 struct i40e_hw *hw = &pf->hw;
1016 u32 val;
1017 int i;
1018
1019 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
1020 I40E_GLPRT_GORCL(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
1023 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
1024 I40E_GLPRT_GOTCL(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
1027 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->eth.rx_discards,
1030 &nsd->eth.rx_discards);
1031 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
1032 I40E_GLPRT_UPRCL(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->eth.rx_unicast,
1035 &nsd->eth.rx_unicast);
1036 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
1037 I40E_GLPRT_MPRCL(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->eth.rx_multicast,
1040 &nsd->eth.rx_multicast);
1041 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1042 I40E_GLPRT_BPRCL(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->eth.rx_broadcast,
1045 &nsd->eth.rx_broadcast);
1046 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1047 I40E_GLPRT_UPTCL(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->eth.tx_unicast,
1050 &nsd->eth.tx_unicast);
1051 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1052 I40E_GLPRT_MPTCL(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->eth.tx_multicast,
1055 &nsd->eth.tx_multicast);
1056 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1057 I40E_GLPRT_BPTCL(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->eth.tx_broadcast,
1060 &nsd->eth.tx_broadcast);
1061
1062 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->tx_dropped_link_down,
1065 &nsd->tx_dropped_link_down);
1066
1067 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1068 pf->stat_offsets_loaded,
1069 &osd->crc_errors, &nsd->crc_errors);
1070
1071 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->illegal_bytes, &nsd->illegal_bytes);
1074
1075 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->mac_local_faults,
1078 &nsd->mac_local_faults);
1079 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1080 pf->stat_offsets_loaded,
1081 &osd->mac_remote_faults,
1082 &nsd->mac_remote_faults);
1083
1084 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->rx_length_errors,
1087 &nsd->rx_length_errors);
1088
1089 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1090 pf->stat_offsets_loaded,
1091 &osd->link_xon_rx, &nsd->link_xon_rx);
1092 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1093 pf->stat_offsets_loaded,
1094 &osd->link_xon_tx, &nsd->link_xon_tx);
1095 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1096 pf->stat_offsets_loaded,
1097 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1098 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1101
1102 for (i = 0; i < 8; i++) {
1103 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1104 pf->stat_offsets_loaded,
1105 &osd->priority_xoff_rx[i],
1106 &nsd->priority_xoff_rx[i]);
1107 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1108 pf->stat_offsets_loaded,
1109 &osd->priority_xon_rx[i],
1110 &nsd->priority_xon_rx[i]);
1111 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1112 pf->stat_offsets_loaded,
1113 &osd->priority_xon_tx[i],
1114 &nsd->priority_xon_tx[i]);
1115 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1116 pf->stat_offsets_loaded,
1117 &osd->priority_xoff_tx[i],
1118 &nsd->priority_xoff_tx[i]);
1119 i40e_stat_update32(hw,
1120 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1121 pf->stat_offsets_loaded,
1122 &osd->priority_xon_2_xoff[i],
1123 &nsd->priority_xon_2_xoff[i]);
1124 }
1125
1126 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1127 I40E_GLPRT_PRC64L(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->rx_size_64, &nsd->rx_size_64);
1130 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1131 I40E_GLPRT_PRC127L(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->rx_size_127, &nsd->rx_size_127);
1134 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1135 I40E_GLPRT_PRC255L(hw->port),
1136 pf->stat_offsets_loaded,
1137 &osd->rx_size_255, &nsd->rx_size_255);
1138 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1139 I40E_GLPRT_PRC511L(hw->port),
1140 pf->stat_offsets_loaded,
1141 &osd->rx_size_511, &nsd->rx_size_511);
1142 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1143 I40E_GLPRT_PRC1023L(hw->port),
1144 pf->stat_offsets_loaded,
1145 &osd->rx_size_1023, &nsd->rx_size_1023);
1146 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1147 I40E_GLPRT_PRC1522L(hw->port),
1148 pf->stat_offsets_loaded,
1149 &osd->rx_size_1522, &nsd->rx_size_1522);
1150 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1151 I40E_GLPRT_PRC9522L(hw->port),
1152 pf->stat_offsets_loaded,
1153 &osd->rx_size_big, &nsd->rx_size_big);
1154
1155 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1156 I40E_GLPRT_PTC64L(hw->port),
1157 pf->stat_offsets_loaded,
1158 &osd->tx_size_64, &nsd->tx_size_64);
1159 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1160 I40E_GLPRT_PTC127L(hw->port),
1161 pf->stat_offsets_loaded,
1162 &osd->tx_size_127, &nsd->tx_size_127);
1163 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1164 I40E_GLPRT_PTC255L(hw->port),
1165 pf->stat_offsets_loaded,
1166 &osd->tx_size_255, &nsd->tx_size_255);
1167 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1168 I40E_GLPRT_PTC511L(hw->port),
1169 pf->stat_offsets_loaded,
1170 &osd->tx_size_511, &nsd->tx_size_511);
1171 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1172 I40E_GLPRT_PTC1023L(hw->port),
1173 pf->stat_offsets_loaded,
1174 &osd->tx_size_1023, &nsd->tx_size_1023);
1175 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1176 I40E_GLPRT_PTC1522L(hw->port),
1177 pf->stat_offsets_loaded,
1178 &osd->tx_size_1522, &nsd->tx_size_1522);
1179 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1180 I40E_GLPRT_PTC9522L(hw->port),
1181 pf->stat_offsets_loaded,
1182 &osd->tx_size_big, &nsd->tx_size_big);
1183
1184 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1185 pf->stat_offsets_loaded,
1186 &osd->rx_undersize, &nsd->rx_undersize);
1187 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1188 pf->stat_offsets_loaded,
1189 &osd->rx_fragments, &nsd->rx_fragments);
1190 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1191 pf->stat_offsets_loaded,
1192 &osd->rx_oversize, &nsd->rx_oversize);
1193 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1194 pf->stat_offsets_loaded,
1195 &osd->rx_jabber, &nsd->rx_jabber);
1196
1197 /* FDIR stats */
1198 i40e_stat_update_and_clear32(hw,
1199 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1200 &nsd->fd_atr_match);
1201 i40e_stat_update_and_clear32(hw,
1202 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1203 &nsd->fd_sb_match);
1204 i40e_stat_update_and_clear32(hw,
1205 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1206 &nsd->fd_atr_tunnel_match);
1207
1208 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1209 nsd->tx_lpi_status =
1210 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1211 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1212 nsd->rx_lpi_status =
1213 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1214 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1215 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1216 pf->stat_offsets_loaded,
1217 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1218 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1219 pf->stat_offsets_loaded,
1220 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1221
1222 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1223 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1224 nsd->fd_sb_status = true;
1225 else
1226 nsd->fd_sb_status = false;
1227
1228 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1229 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1230 nsd->fd_atr_status = true;
1231 else
1232 nsd->fd_atr_status = false;
1233
1234 pf->stat_offsets_loaded = true;
1235 }
1236
1237 /**
1238 * i40e_update_stats - Update the various statistics counters.
1239 * @vsi: the VSI to be updated
1240 *
1241 * Update the various stats for this VSI and its related entities.
1242 **/
i40e_update_stats(struct i40e_vsi * vsi)1243 void i40e_update_stats(struct i40e_vsi *vsi)
1244 {
1245 struct i40e_pf *pf = vsi->back;
1246
1247 if (vsi == pf->vsi[pf->lan_vsi])
1248 i40e_update_pf_stats(pf);
1249
1250 i40e_update_vsi_stats(vsi);
1251 }
1252
1253 /**
1254 * i40e_count_filters - counts VSI mac filters
1255 * @vsi: the VSI to be searched
1256 *
1257 * Returns count of mac filters
1258 **/
i40e_count_filters(struct i40e_vsi * vsi)1259 int i40e_count_filters(struct i40e_vsi *vsi)
1260 {
1261 struct i40e_mac_filter *f;
1262 struct hlist_node *h;
1263 int bkt;
1264 int cnt = 0;
1265
1266 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1267 if (f->state == I40E_FILTER_NEW ||
1268 f->state == I40E_FILTER_ACTIVE)
1269 ++cnt;
1270 }
1271
1272 return cnt;
1273 }
1274
1275 /**
1276 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1277 * @vsi: the VSI to be searched
1278 * @macaddr: the MAC address
1279 * @vlan: the vlan
1280 *
1281 * Returns ptr to the filter object or NULL
1282 **/
i40e_find_filter(struct i40e_vsi * vsi,const u8 * macaddr,s16 vlan)1283 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1284 const u8 *macaddr, s16 vlan)
1285 {
1286 struct i40e_mac_filter *f;
1287 u64 key;
1288
1289 if (!vsi || !macaddr)
1290 return NULL;
1291
1292 key = i40e_addr_to_hkey(macaddr);
1293 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1294 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1295 (vlan == f->vlan))
1296 return f;
1297 }
1298 return NULL;
1299 }
1300
1301 /**
1302 * i40e_find_mac - Find a mac addr in the macvlan filters list
1303 * @vsi: the VSI to be searched
1304 * @macaddr: the MAC address we are searching for
1305 *
1306 * Returns the first filter with the provided MAC address or NULL if
1307 * MAC address was not found
1308 **/
i40e_find_mac(struct i40e_vsi * vsi,const u8 * macaddr)1309 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1310 {
1311 struct i40e_mac_filter *f;
1312 u64 key;
1313
1314 if (!vsi || !macaddr)
1315 return NULL;
1316
1317 key = i40e_addr_to_hkey(macaddr);
1318 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1319 if ((ether_addr_equal(macaddr, f->macaddr)))
1320 return f;
1321 }
1322 return NULL;
1323 }
1324
1325 /**
1326 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1327 * @vsi: the VSI to be searched
1328 *
1329 * Returns true if VSI is in vlan mode or false otherwise
1330 **/
i40e_is_vsi_in_vlan(struct i40e_vsi * vsi)1331 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1332 {
1333 /* If we have a PVID, always operate in VLAN mode */
1334 if (vsi->info.pvid)
1335 return true;
1336
1337 /* We need to operate in VLAN mode whenever we have any filters with
1338 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1339 * time, incurring search cost repeatedly. However, we can notice two
1340 * things:
1341 *
1342 * 1) the only place where we can gain a VLAN filter is in
1343 * i40e_add_filter.
1344 *
1345 * 2) the only place where filters are actually removed is in
1346 * i40e_sync_filters_subtask.
1347 *
1348 * Thus, we can simply use a boolean value, has_vlan_filters which we
1349 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1350 * we have to perform the full search after deleting filters in
1351 * i40e_sync_filters_subtask, but we already have to search
1352 * filters here and can perform the check at the same time. This
1353 * results in avoiding embedding a loop for VLAN mode inside another
1354 * loop over all the filters, and should maintain correctness as noted
1355 * above.
1356 */
1357 return vsi->has_vlan_filter;
1358 }
1359
1360 /**
1361 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1362 * @vsi: the VSI to configure
1363 * @tmp_add_list: list of filters ready to be added
1364 * @tmp_del_list: list of filters ready to be deleted
1365 * @vlan_filters: the number of active VLAN filters
1366 *
1367 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1368 * behave as expected. If we have any active VLAN filters remaining or about
1369 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1370 * so that they only match against untagged traffic. If we no longer have any
1371 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1372 * so that they match against both tagged and untagged traffic. In this way,
1373 * we ensure that we correctly receive the desired traffic. This ensures that
1374 * when we have an active VLAN we will receive only untagged traffic and
1375 * traffic matching active VLANs. If we have no active VLANs then we will
1376 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1377 *
1378 * Finally, in a similar fashion, this function also corrects filters when
1379 * there is an active PVID assigned to this VSI.
1380 *
1381 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1382 *
1383 * This function is only expected to be called from within
1384 * i40e_sync_vsi_filters.
1385 *
1386 * NOTE: This function expects to be called while under the
1387 * mac_filter_hash_lock
1388 */
i40e_correct_mac_vlan_filters(struct i40e_vsi * vsi,struct hlist_head * tmp_add_list,struct hlist_head * tmp_del_list,int vlan_filters)1389 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1390 struct hlist_head *tmp_add_list,
1391 struct hlist_head *tmp_del_list,
1392 int vlan_filters)
1393 {
1394 s16 pvid = le16_to_cpu(vsi->info.pvid);
1395 struct i40e_mac_filter *f, *add_head;
1396 struct i40e_new_mac_filter *new;
1397 struct hlist_node *h;
1398 int bkt, new_vlan;
1399
1400 /* To determine if a particular filter needs to be replaced we
1401 * have the three following conditions:
1402 *
1403 * a) if we have a PVID assigned, then all filters which are
1404 * not marked as VLAN=PVID must be replaced with filters that
1405 * are.
1406 * b) otherwise, if we have any active VLANS, all filters
1407 * which are marked as VLAN=-1 must be replaced with
1408 * filters marked as VLAN=0
1409 * c) finally, if we do not have any active VLANS, all filters
1410 * which are marked as VLAN=0 must be replaced with filters
1411 * marked as VLAN=-1
1412 */
1413
1414 /* Update the filters about to be added in place */
1415 hlist_for_each_entry(new, tmp_add_list, hlist) {
1416 if (pvid && new->f->vlan != pvid)
1417 new->f->vlan = pvid;
1418 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1419 new->f->vlan = 0;
1420 else if (!vlan_filters && new->f->vlan == 0)
1421 new->f->vlan = I40E_VLAN_ANY;
1422 }
1423
1424 /* Update the remaining active filters */
1425 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1426 /* Combine the checks for whether a filter needs to be changed
1427 * and then determine the new VLAN inside the if block, in
1428 * order to avoid duplicating code for adding the new filter
1429 * then deleting the old filter.
1430 */
1431 if ((pvid && f->vlan != pvid) ||
1432 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1433 (!vlan_filters && f->vlan == 0)) {
1434 /* Determine the new vlan we will be adding */
1435 if (pvid)
1436 new_vlan = pvid;
1437 else if (vlan_filters)
1438 new_vlan = 0;
1439 else
1440 new_vlan = I40E_VLAN_ANY;
1441
1442 /* Create the new filter */
1443 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1444 if (!add_head)
1445 return -ENOMEM;
1446
1447 /* Create a temporary i40e_new_mac_filter */
1448 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1449 if (!new)
1450 return -ENOMEM;
1451
1452 new->f = add_head;
1453 new->state = add_head->state;
1454
1455 /* Add the new filter to the tmp list */
1456 hlist_add_head(&new->hlist, tmp_add_list);
1457
1458 /* Put the original filter into the delete list */
1459 f->state = I40E_FILTER_REMOVE;
1460 hash_del(&f->hlist);
1461 hlist_add_head(&f->hlist, tmp_del_list);
1462 }
1463 }
1464
1465 vsi->has_vlan_filter = !!vlan_filters;
1466
1467 return 0;
1468 }
1469
1470 /**
1471 * i40e_get_vf_new_vlan - Get new vlan id on a vf
1472 * @vsi: the vsi to configure
1473 * @new_mac: new mac filter to be added
1474 * @f: existing mac filter, replaced with new_mac->f if new_mac is not NULL
1475 * @vlan_filters: the number of active VLAN filters
1476 * @trusted: flag if the VF is trusted
1477 *
1478 * Get new VLAN id based on current VLAN filters, trust, PVID
1479 * and vf-vlan-prune-disable flag.
1480 *
1481 * Returns the value of the new vlan filter or
1482 * the old value if no new filter is needed.
1483 */
i40e_get_vf_new_vlan(struct i40e_vsi * vsi,struct i40e_new_mac_filter * new_mac,struct i40e_mac_filter * f,int vlan_filters,bool trusted)1484 static s16 i40e_get_vf_new_vlan(struct i40e_vsi *vsi,
1485 struct i40e_new_mac_filter *new_mac,
1486 struct i40e_mac_filter *f,
1487 int vlan_filters,
1488 bool trusted)
1489 {
1490 s16 pvid = le16_to_cpu(vsi->info.pvid);
1491 struct i40e_pf *pf = vsi->back;
1492 bool is_any;
1493
1494 if (new_mac)
1495 f = new_mac->f;
1496
1497 if (pvid && f->vlan != pvid)
1498 return pvid;
1499
1500 is_any = (trusted ||
1501 !(pf->flags & I40E_FLAG_VF_VLAN_PRUNING));
1502
1503 if ((vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1504 (!is_any && !vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1505 (is_any && !vlan_filters && f->vlan == 0)) {
1506 if (is_any)
1507 return I40E_VLAN_ANY;
1508 else
1509 return 0;
1510 }
1511
1512 return f->vlan;
1513 }
1514
1515 /**
1516 * i40e_correct_vf_mac_vlan_filters - Correct non-VLAN VF filters if necessary
1517 * @vsi: the vsi to configure
1518 * @tmp_add_list: list of filters ready to be added
1519 * @tmp_del_list: list of filters ready to be deleted
1520 * @vlan_filters: the number of active VLAN filters
1521 * @trusted: flag if the VF is trusted
1522 *
1523 * Correct VF VLAN filters based on current VLAN filters, trust, PVID
1524 * and vf-vlan-prune-disable flag.
1525 *
1526 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1527 *
1528 * This function is only expected to be called from within
1529 * i40e_sync_vsi_filters.
1530 *
1531 * NOTE: This function expects to be called while under the
1532 * mac_filter_hash_lock
1533 */
i40e_correct_vf_mac_vlan_filters(struct i40e_vsi * vsi,struct hlist_head * tmp_add_list,struct hlist_head * tmp_del_list,int vlan_filters,bool trusted)1534 static int i40e_correct_vf_mac_vlan_filters(struct i40e_vsi *vsi,
1535 struct hlist_head *tmp_add_list,
1536 struct hlist_head *tmp_del_list,
1537 int vlan_filters,
1538 bool trusted)
1539 {
1540 struct i40e_mac_filter *f, *add_head;
1541 struct i40e_new_mac_filter *new_mac;
1542 struct hlist_node *h;
1543 int bkt, new_vlan;
1544
1545 hlist_for_each_entry(new_mac, tmp_add_list, hlist) {
1546 new_mac->f->vlan = i40e_get_vf_new_vlan(vsi, new_mac, NULL,
1547 vlan_filters, trusted);
1548 }
1549
1550 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1551 new_vlan = i40e_get_vf_new_vlan(vsi, NULL, f, vlan_filters,
1552 trusted);
1553 if (new_vlan != f->vlan) {
1554 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1555 if (!add_head)
1556 return -ENOMEM;
1557 /* Create a temporary i40e_new_mac_filter */
1558 new_mac = kzalloc(sizeof(*new_mac), GFP_ATOMIC);
1559 if (!new_mac)
1560 return -ENOMEM;
1561 new_mac->f = add_head;
1562 new_mac->state = add_head->state;
1563
1564 /* Add the new filter to the tmp list */
1565 hlist_add_head(&new_mac->hlist, tmp_add_list);
1566
1567 /* Put the original filter into the delete list */
1568 f->state = I40E_FILTER_REMOVE;
1569 hash_del(&f->hlist);
1570 hlist_add_head(&f->hlist, tmp_del_list);
1571 }
1572 }
1573
1574 vsi->has_vlan_filter = !!vlan_filters;
1575 return 0;
1576 }
1577
1578 /**
1579 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1580 * @vsi: the PF Main VSI - inappropriate for any other VSI
1581 * @macaddr: the MAC address
1582 *
1583 * Remove whatever filter the firmware set up so the driver can manage
1584 * its own filtering intelligently.
1585 **/
i40e_rm_default_mac_filter(struct i40e_vsi * vsi,u8 * macaddr)1586 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1587 {
1588 struct i40e_aqc_remove_macvlan_element_data element;
1589 struct i40e_pf *pf = vsi->back;
1590
1591 /* Only appropriate for the PF main VSI */
1592 if (vsi->type != I40E_VSI_MAIN)
1593 return;
1594
1595 memset(&element, 0, sizeof(element));
1596 ether_addr_copy(element.mac_addr, macaddr);
1597 element.vlan_tag = 0;
1598 /* Ignore error returns, some firmware does it this way... */
1599 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1600 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1601
1602 memset(&element, 0, sizeof(element));
1603 ether_addr_copy(element.mac_addr, macaddr);
1604 element.vlan_tag = 0;
1605 /* ...and some firmware does it this way. */
1606 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1607 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1608 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1609 }
1610
1611 /**
1612 * i40e_add_filter - Add a mac/vlan filter to the VSI
1613 * @vsi: the VSI to be searched
1614 * @macaddr: the MAC address
1615 * @vlan: the vlan
1616 *
1617 * Returns ptr to the filter object or NULL when no memory available.
1618 *
1619 * NOTE: This function is expected to be called with mac_filter_hash_lock
1620 * being held.
1621 **/
i40e_add_filter(struct i40e_vsi * vsi,const u8 * macaddr,s16 vlan)1622 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1623 const u8 *macaddr, s16 vlan)
1624 {
1625 struct i40e_mac_filter *f;
1626 u64 key;
1627
1628 if (!vsi || !macaddr)
1629 return NULL;
1630
1631 f = i40e_find_filter(vsi, macaddr, vlan);
1632 if (!f) {
1633 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1634 if (!f)
1635 return NULL;
1636
1637 /* Update the boolean indicating if we need to function in
1638 * VLAN mode.
1639 */
1640 if (vlan >= 0)
1641 vsi->has_vlan_filter = true;
1642
1643 ether_addr_copy(f->macaddr, macaddr);
1644 f->vlan = vlan;
1645 f->state = I40E_FILTER_NEW;
1646 INIT_HLIST_NODE(&f->hlist);
1647
1648 key = i40e_addr_to_hkey(macaddr);
1649 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1650
1651 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1652 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1653 }
1654
1655 /* If we're asked to add a filter that has been marked for removal, it
1656 * is safe to simply restore it to active state. __i40e_del_filter
1657 * will have simply deleted any filters which were previously marked
1658 * NEW or FAILED, so if it is currently marked REMOVE it must have
1659 * previously been ACTIVE. Since we haven't yet run the sync filters
1660 * task, just restore this filter to the ACTIVE state so that the
1661 * sync task leaves it in place
1662 */
1663 if (f->state == I40E_FILTER_REMOVE)
1664 f->state = I40E_FILTER_ACTIVE;
1665
1666 return f;
1667 }
1668
1669 /**
1670 * __i40e_del_filter - Remove a specific filter from the VSI
1671 * @vsi: VSI to remove from
1672 * @f: the filter to remove from the list
1673 *
1674 * This function should be called instead of i40e_del_filter only if you know
1675 * the exact filter you will remove already, such as via i40e_find_filter or
1676 * i40e_find_mac.
1677 *
1678 * NOTE: This function is expected to be called with mac_filter_hash_lock
1679 * being held.
1680 * ANOTHER NOTE: This function MUST be called from within the context of
1681 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1682 * instead of list_for_each_entry().
1683 **/
__i40e_del_filter(struct i40e_vsi * vsi,struct i40e_mac_filter * f)1684 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1685 {
1686 if (!f)
1687 return;
1688
1689 /* If the filter was never added to firmware then we can just delete it
1690 * directly and we don't want to set the status to remove or else an
1691 * admin queue command will unnecessarily fire.
1692 */
1693 if ((f->state == I40E_FILTER_FAILED) ||
1694 (f->state == I40E_FILTER_NEW)) {
1695 hash_del(&f->hlist);
1696 kfree(f);
1697 } else {
1698 f->state = I40E_FILTER_REMOVE;
1699 }
1700
1701 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1702 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1703 }
1704
1705 /**
1706 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1707 * @vsi: the VSI to be searched
1708 * @macaddr: the MAC address
1709 * @vlan: the VLAN
1710 *
1711 * NOTE: This function is expected to be called with mac_filter_hash_lock
1712 * being held.
1713 * ANOTHER NOTE: This function MUST be called from within the context of
1714 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1715 * instead of list_for_each_entry().
1716 **/
i40e_del_filter(struct i40e_vsi * vsi,const u8 * macaddr,s16 vlan)1717 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1718 {
1719 struct i40e_mac_filter *f;
1720
1721 if (!vsi || !macaddr)
1722 return;
1723
1724 f = i40e_find_filter(vsi, macaddr, vlan);
1725 __i40e_del_filter(vsi, f);
1726 }
1727
1728 /**
1729 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1730 * @vsi: the VSI to be searched
1731 * @macaddr: the mac address to be filtered
1732 *
1733 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1734 * go through all the macvlan filters and add a macvlan filter for each
1735 * unique vlan that already exists. If a PVID has been assigned, instead only
1736 * add the macaddr to that VLAN.
1737 *
1738 * Returns last filter added on success, else NULL
1739 **/
i40e_add_mac_filter(struct i40e_vsi * vsi,const u8 * macaddr)1740 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1741 const u8 *macaddr)
1742 {
1743 struct i40e_mac_filter *f, *add = NULL;
1744 struct hlist_node *h;
1745 int bkt;
1746
1747 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1748 if (vsi->info.pvid)
1749 return i40e_add_filter(vsi, macaddr,
1750 le16_to_cpu(vsi->info.pvid));
1751
1752 if (!i40e_is_vsi_in_vlan(vsi))
1753 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1754
1755 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1756 if (f->state == I40E_FILTER_REMOVE)
1757 continue;
1758 add = i40e_add_filter(vsi, macaddr, f->vlan);
1759 if (!add)
1760 return NULL;
1761 }
1762
1763 return add;
1764 }
1765
1766 /**
1767 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1768 * @vsi: the VSI to be searched
1769 * @macaddr: the mac address to be removed
1770 *
1771 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1772 * associated with.
1773 *
1774 * Returns 0 for success, or error
1775 **/
i40e_del_mac_filter(struct i40e_vsi * vsi,const u8 * macaddr)1776 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1777 {
1778 struct i40e_mac_filter *f;
1779 struct hlist_node *h;
1780 bool found = false;
1781 int bkt;
1782
1783 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1784 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1785 if (ether_addr_equal(macaddr, f->macaddr)) {
1786 __i40e_del_filter(vsi, f);
1787 found = true;
1788 }
1789 }
1790
1791 if (found)
1792 return 0;
1793 else
1794 return -ENOENT;
1795 }
1796
1797 /**
1798 * i40e_set_mac - NDO callback to set mac address
1799 * @netdev: network interface device structure
1800 * @p: pointer to an address structure
1801 *
1802 * Returns 0 on success, negative on failure
1803 **/
i40e_set_mac(struct net_device * netdev,void * p)1804 static int i40e_set_mac(struct net_device *netdev, void *p)
1805 {
1806 struct i40e_netdev_priv *np = netdev_priv(netdev);
1807 struct i40e_vsi *vsi = np->vsi;
1808 struct i40e_pf *pf = vsi->back;
1809 struct i40e_hw *hw = &pf->hw;
1810 struct sockaddr *addr = p;
1811
1812 if (!is_valid_ether_addr(addr->sa_data))
1813 return -EADDRNOTAVAIL;
1814
1815 if (test_bit(__I40E_DOWN, pf->state) ||
1816 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1817 return -EADDRNOTAVAIL;
1818
1819 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1820 netdev_info(netdev, "returning to hw mac address %pM\n",
1821 hw->mac.addr);
1822 else
1823 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1824
1825 /* Copy the address first, so that we avoid a possible race with
1826 * .set_rx_mode().
1827 * - Remove old address from MAC filter
1828 * - Copy new address
1829 * - Add new address to MAC filter
1830 */
1831 spin_lock_bh(&vsi->mac_filter_hash_lock);
1832 i40e_del_mac_filter(vsi, netdev->dev_addr);
1833 eth_hw_addr_set(netdev, addr->sa_data);
1834 i40e_add_mac_filter(vsi, netdev->dev_addr);
1835 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1836
1837 if (vsi->type == I40E_VSI_MAIN) {
1838 int ret;
1839
1840 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1841 addr->sa_data, NULL);
1842 if (ret)
1843 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %pe, AQ ret %s\n",
1844 ERR_PTR(ret),
1845 i40e_aq_str(hw, hw->aq.asq_last_status));
1846 }
1847
1848 /* schedule our worker thread which will take care of
1849 * applying the new filter changes
1850 */
1851 i40e_service_event_schedule(pf);
1852 return 0;
1853 }
1854
1855 /**
1856 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1857 * @vsi: vsi structure
1858 * @seed: RSS hash seed
1859 * @lut: pointer to lookup table of lut_size
1860 * @lut_size: size of the lookup table
1861 **/
i40e_config_rss_aq(struct i40e_vsi * vsi,const u8 * seed,u8 * lut,u16 lut_size)1862 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1863 u8 *lut, u16 lut_size)
1864 {
1865 struct i40e_pf *pf = vsi->back;
1866 struct i40e_hw *hw = &pf->hw;
1867 int ret = 0;
1868
1869 if (seed) {
1870 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1871 (struct i40e_aqc_get_set_rss_key_data *)seed;
1872 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1873 if (ret) {
1874 dev_info(&pf->pdev->dev,
1875 "Cannot set RSS key, err %pe aq_err %s\n",
1876 ERR_PTR(ret),
1877 i40e_aq_str(hw, hw->aq.asq_last_status));
1878 return ret;
1879 }
1880 }
1881 if (lut) {
1882 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1883
1884 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1885 if (ret) {
1886 dev_info(&pf->pdev->dev,
1887 "Cannot set RSS lut, err %pe aq_err %s\n",
1888 ERR_PTR(ret),
1889 i40e_aq_str(hw, hw->aq.asq_last_status));
1890 return ret;
1891 }
1892 }
1893 return ret;
1894 }
1895
1896 /**
1897 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1898 * @vsi: VSI structure
1899 **/
i40e_vsi_config_rss(struct i40e_vsi * vsi)1900 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1901 {
1902 struct i40e_pf *pf = vsi->back;
1903 u8 seed[I40E_HKEY_ARRAY_SIZE];
1904 u8 *lut;
1905 int ret;
1906
1907 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1908 return 0;
1909 if (!vsi->rss_size)
1910 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1911 vsi->num_queue_pairs);
1912 if (!vsi->rss_size)
1913 return -EINVAL;
1914 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1915 if (!lut)
1916 return -ENOMEM;
1917
1918 /* Use the user configured hash keys and lookup table if there is one,
1919 * otherwise use default
1920 */
1921 if (vsi->rss_lut_user)
1922 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1923 else
1924 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1925 if (vsi->rss_hkey_user)
1926 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1927 else
1928 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1929 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1930 kfree(lut);
1931 return ret;
1932 }
1933
1934 /**
1935 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1936 * @vsi: the VSI being configured,
1937 * @ctxt: VSI context structure
1938 * @enabled_tc: number of traffic classes to enable
1939 *
1940 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1941 **/
i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi * vsi,struct i40e_vsi_context * ctxt,u8 enabled_tc)1942 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1943 struct i40e_vsi_context *ctxt,
1944 u8 enabled_tc)
1945 {
1946 u16 qcount = 0, max_qcount, qmap, sections = 0;
1947 int i, override_q, pow, num_qps, ret;
1948 u8 netdev_tc = 0, offset = 0;
1949
1950 if (vsi->type != I40E_VSI_MAIN)
1951 return -EINVAL;
1952 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1953 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1954 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1955 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1956 num_qps = vsi->mqprio_qopt.qopt.count[0];
1957
1958 /* find the next higher power-of-2 of num queue pairs */
1959 pow = ilog2(num_qps);
1960 if (!is_power_of_2(num_qps))
1961 pow++;
1962 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1963 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1964
1965 /* Setup queue offset/count for all TCs for given VSI */
1966 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1967 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1968 /* See if the given TC is enabled for the given VSI */
1969 if (vsi->tc_config.enabled_tc & BIT(i)) {
1970 offset = vsi->mqprio_qopt.qopt.offset[i];
1971 qcount = vsi->mqprio_qopt.qopt.count[i];
1972 if (qcount > max_qcount)
1973 max_qcount = qcount;
1974 vsi->tc_config.tc_info[i].qoffset = offset;
1975 vsi->tc_config.tc_info[i].qcount = qcount;
1976 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1977 } else {
1978 /* TC is not enabled so set the offset to
1979 * default queue and allocate one queue
1980 * for the given TC.
1981 */
1982 vsi->tc_config.tc_info[i].qoffset = 0;
1983 vsi->tc_config.tc_info[i].qcount = 1;
1984 vsi->tc_config.tc_info[i].netdev_tc = 0;
1985 }
1986 }
1987
1988 /* Set actual Tx/Rx queue pairs */
1989 vsi->num_queue_pairs = offset + qcount;
1990
1991 /* Setup queue TC[0].qmap for given VSI context */
1992 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1993 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1994 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1995 ctxt->info.valid_sections |= cpu_to_le16(sections);
1996
1997 /* Reconfigure RSS for main VSI with max queue count */
1998 vsi->rss_size = max_qcount;
1999 ret = i40e_vsi_config_rss(vsi);
2000 if (ret) {
2001 dev_info(&vsi->back->pdev->dev,
2002 "Failed to reconfig rss for num_queues (%u)\n",
2003 max_qcount);
2004 return ret;
2005 }
2006 vsi->reconfig_rss = true;
2007 dev_dbg(&vsi->back->pdev->dev,
2008 "Reconfigured rss with num_queues (%u)\n", max_qcount);
2009
2010 /* Find queue count available for channel VSIs and starting offset
2011 * for channel VSIs
2012 */
2013 override_q = vsi->mqprio_qopt.qopt.count[0];
2014 if (override_q && override_q < vsi->num_queue_pairs) {
2015 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
2016 vsi->next_base_queue = override_q;
2017 }
2018 return 0;
2019 }
2020
2021 /**
2022 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
2023 * @vsi: the VSI being setup
2024 * @ctxt: VSI context structure
2025 * @enabled_tc: Enabled TCs bitmap
2026 * @is_add: True if called before Add VSI
2027 *
2028 * Setup VSI queue mapping for enabled traffic classes.
2029 **/
i40e_vsi_setup_queue_map(struct i40e_vsi * vsi,struct i40e_vsi_context * ctxt,u8 enabled_tc,bool is_add)2030 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
2031 struct i40e_vsi_context *ctxt,
2032 u8 enabled_tc,
2033 bool is_add)
2034 {
2035 struct i40e_pf *pf = vsi->back;
2036 u16 num_tc_qps = 0;
2037 u16 sections = 0;
2038 u8 netdev_tc = 0;
2039 u16 numtc = 1;
2040 u16 qcount;
2041 u8 offset;
2042 u16 qmap;
2043 int i;
2044
2045 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
2046 offset = 0;
2047 /* zero out queue mapping, it will get updated on the end of the function */
2048 memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
2049
2050 if (vsi->type == I40E_VSI_MAIN) {
2051 /* This code helps add more queue to the VSI if we have
2052 * more cores than RSS can support, the higher cores will
2053 * be served by ATR or other filters. Furthermore, the
2054 * non-zero req_queue_pairs says that user requested a new
2055 * queue count via ethtool's set_channels, so use this
2056 * value for queues distribution across traffic classes
2057 * We need at least one queue pair for the interface
2058 * to be usable as we see in else statement.
2059 */
2060 if (vsi->req_queue_pairs > 0)
2061 vsi->num_queue_pairs = vsi->req_queue_pairs;
2062 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
2063 vsi->num_queue_pairs = pf->num_lan_msix;
2064 else
2065 vsi->num_queue_pairs = 1;
2066 }
2067
2068 /* Number of queues per enabled TC */
2069 if (vsi->type == I40E_VSI_MAIN ||
2070 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
2071 num_tc_qps = vsi->num_queue_pairs;
2072 else
2073 num_tc_qps = vsi->alloc_queue_pairs;
2074
2075 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2076 /* Find numtc from enabled TC bitmap */
2077 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2078 if (enabled_tc & BIT(i)) /* TC is enabled */
2079 numtc++;
2080 }
2081 if (!numtc) {
2082 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
2083 numtc = 1;
2084 }
2085 num_tc_qps = num_tc_qps / numtc;
2086 num_tc_qps = min_t(int, num_tc_qps,
2087 i40e_pf_get_max_q_per_tc(pf));
2088 }
2089
2090 vsi->tc_config.numtc = numtc;
2091 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
2092
2093 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
2094 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
2095 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
2096
2097 /* Setup queue offset/count for all TCs for given VSI */
2098 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2099 /* See if the given TC is enabled for the given VSI */
2100 if (vsi->tc_config.enabled_tc & BIT(i)) {
2101 /* TC is enabled */
2102 int pow, num_qps;
2103
2104 switch (vsi->type) {
2105 case I40E_VSI_MAIN:
2106 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
2107 I40E_FLAG_FD_ATR_ENABLED)) ||
2108 vsi->tc_config.enabled_tc != 1) {
2109 qcount = min_t(int, pf->alloc_rss_size,
2110 num_tc_qps);
2111 break;
2112 }
2113 fallthrough;
2114 case I40E_VSI_FDIR:
2115 case I40E_VSI_SRIOV:
2116 case I40E_VSI_VMDQ2:
2117 default:
2118 qcount = num_tc_qps;
2119 WARN_ON(i != 0);
2120 break;
2121 }
2122 vsi->tc_config.tc_info[i].qoffset = offset;
2123 vsi->tc_config.tc_info[i].qcount = qcount;
2124
2125 /* find the next higher power-of-2 of num queue pairs */
2126 num_qps = qcount;
2127 pow = 0;
2128 while (num_qps && (BIT_ULL(pow) < qcount)) {
2129 pow++;
2130 num_qps >>= 1;
2131 }
2132
2133 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
2134 qmap =
2135 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
2136 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
2137
2138 offset += qcount;
2139 } else {
2140 /* TC is not enabled so set the offset to
2141 * default queue and allocate one queue
2142 * for the given TC.
2143 */
2144 vsi->tc_config.tc_info[i].qoffset = 0;
2145 vsi->tc_config.tc_info[i].qcount = 1;
2146 vsi->tc_config.tc_info[i].netdev_tc = 0;
2147
2148 qmap = 0;
2149 }
2150 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
2151 }
2152 /* Do not change previously set num_queue_pairs for PFs and VFs*/
2153 if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
2154 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
2155 (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
2156 vsi->num_queue_pairs = offset;
2157
2158 /* Scheduler section valid can only be set for ADD VSI */
2159 if (is_add) {
2160 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
2161
2162 ctxt->info.up_enable_bits = enabled_tc;
2163 }
2164 if (vsi->type == I40E_VSI_SRIOV) {
2165 ctxt->info.mapping_flags |=
2166 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
2167 for (i = 0; i < vsi->num_queue_pairs; i++)
2168 ctxt->info.queue_mapping[i] =
2169 cpu_to_le16(vsi->base_queue + i);
2170 } else {
2171 ctxt->info.mapping_flags |=
2172 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
2173 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
2174 }
2175 ctxt->info.valid_sections |= cpu_to_le16(sections);
2176 }
2177
2178 /**
2179 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
2180 * @netdev: the netdevice
2181 * @addr: address to add
2182 *
2183 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
2184 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2185 */
i40e_addr_sync(struct net_device * netdev,const u8 * addr)2186 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
2187 {
2188 struct i40e_netdev_priv *np = netdev_priv(netdev);
2189 struct i40e_vsi *vsi = np->vsi;
2190
2191 if (i40e_add_mac_filter(vsi, addr))
2192 return 0;
2193 else
2194 return -ENOMEM;
2195 }
2196
2197 /**
2198 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
2199 * @netdev: the netdevice
2200 * @addr: address to add
2201 *
2202 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
2203 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2204 */
i40e_addr_unsync(struct net_device * netdev,const u8 * addr)2205 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
2206 {
2207 struct i40e_netdev_priv *np = netdev_priv(netdev);
2208 struct i40e_vsi *vsi = np->vsi;
2209
2210 /* Under some circumstances, we might receive a request to delete
2211 * our own device address from our uc list. Because we store the
2212 * device address in the VSI's MAC/VLAN filter list, we need to ignore
2213 * such requests and not delete our device address from this list.
2214 */
2215 if (ether_addr_equal(addr, netdev->dev_addr))
2216 return 0;
2217
2218 i40e_del_mac_filter(vsi, addr);
2219
2220 return 0;
2221 }
2222
2223 /**
2224 * i40e_set_rx_mode - NDO callback to set the netdev filters
2225 * @netdev: network interface device structure
2226 **/
i40e_set_rx_mode(struct net_device * netdev)2227 static void i40e_set_rx_mode(struct net_device *netdev)
2228 {
2229 struct i40e_netdev_priv *np = netdev_priv(netdev);
2230 struct i40e_vsi *vsi = np->vsi;
2231
2232 spin_lock_bh(&vsi->mac_filter_hash_lock);
2233
2234 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2235 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2236
2237 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2238
2239 /* check for other flag changes */
2240 if (vsi->current_netdev_flags != vsi->netdev->flags) {
2241 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2242 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
2243 }
2244 }
2245
2246 /**
2247 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
2248 * @vsi: Pointer to VSI struct
2249 * @from: Pointer to list which contains MAC filter entries - changes to
2250 * those entries needs to be undone.
2251 *
2252 * MAC filter entries from this list were slated for deletion.
2253 **/
i40e_undo_del_filter_entries(struct i40e_vsi * vsi,struct hlist_head * from)2254 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
2255 struct hlist_head *from)
2256 {
2257 struct i40e_mac_filter *f;
2258 struct hlist_node *h;
2259
2260 hlist_for_each_entry_safe(f, h, from, hlist) {
2261 u64 key = i40e_addr_to_hkey(f->macaddr);
2262
2263 /* Move the element back into MAC filter list*/
2264 hlist_del(&f->hlist);
2265 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2266 }
2267 }
2268
2269 /**
2270 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2271 * @vsi: Pointer to vsi struct
2272 * @from: Pointer to list which contains MAC filter entries - changes to
2273 * those entries needs to be undone.
2274 *
2275 * MAC filter entries from this list were slated for addition.
2276 **/
i40e_undo_add_filter_entries(struct i40e_vsi * vsi,struct hlist_head * from)2277 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2278 struct hlist_head *from)
2279 {
2280 struct i40e_new_mac_filter *new;
2281 struct hlist_node *h;
2282
2283 hlist_for_each_entry_safe(new, h, from, hlist) {
2284 /* We can simply free the wrapper structure */
2285 hlist_del(&new->hlist);
2286 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2287 kfree(new);
2288 }
2289 }
2290
2291 /**
2292 * i40e_next_filter - Get the next non-broadcast filter from a list
2293 * @next: pointer to filter in list
2294 *
2295 * Returns the next non-broadcast filter in the list. Required so that we
2296 * ignore broadcast filters within the list, since these are not handled via
2297 * the normal firmware update path.
2298 */
2299 static
i40e_next_filter(struct i40e_new_mac_filter * next)2300 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2301 {
2302 hlist_for_each_entry_continue(next, hlist) {
2303 if (!is_broadcast_ether_addr(next->f->macaddr))
2304 return next;
2305 }
2306
2307 return NULL;
2308 }
2309
2310 /**
2311 * i40e_update_filter_state - Update filter state based on return data
2312 * from firmware
2313 * @count: Number of filters added
2314 * @add_list: return data from fw
2315 * @add_head: pointer to first filter in current batch
2316 *
2317 * MAC filter entries from list were slated to be added to device. Returns
2318 * number of successful filters. Note that 0 does NOT mean success!
2319 **/
2320 static int
i40e_update_filter_state(int count,struct i40e_aqc_add_macvlan_element_data * add_list,struct i40e_new_mac_filter * add_head)2321 i40e_update_filter_state(int count,
2322 struct i40e_aqc_add_macvlan_element_data *add_list,
2323 struct i40e_new_mac_filter *add_head)
2324 {
2325 int retval = 0;
2326 int i;
2327
2328 for (i = 0; i < count; i++) {
2329 /* Always check status of each filter. We don't need to check
2330 * the firmware return status because we pre-set the filter
2331 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2332 * request to the adminq. Thus, if it no longer matches then
2333 * we know the filter is active.
2334 */
2335 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2336 add_head->state = I40E_FILTER_FAILED;
2337 } else {
2338 add_head->state = I40E_FILTER_ACTIVE;
2339 retval++;
2340 }
2341
2342 add_head = i40e_next_filter(add_head);
2343 if (!add_head)
2344 break;
2345 }
2346
2347 return retval;
2348 }
2349
2350 /**
2351 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2352 * @vsi: ptr to the VSI
2353 * @vsi_name: name to display in messages
2354 * @list: the list of filters to send to firmware
2355 * @num_del: the number of filters to delete
2356 * @retval: Set to -EIO on failure to delete
2357 *
2358 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2359 * *retval instead of a return value so that success does not force ret_val to
2360 * be set to 0. This ensures that a sequence of calls to this function
2361 * preserve the previous value of *retval on successful delete.
2362 */
2363 static
i40e_aqc_del_filters(struct i40e_vsi * vsi,const char * vsi_name,struct i40e_aqc_remove_macvlan_element_data * list,int num_del,int * retval)2364 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2365 struct i40e_aqc_remove_macvlan_element_data *list,
2366 int num_del, int *retval)
2367 {
2368 struct i40e_hw *hw = &vsi->back->hw;
2369 enum i40e_admin_queue_err aq_status;
2370 int aq_ret;
2371
2372 aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL,
2373 &aq_status);
2374
2375 /* Explicitly ignore and do not report when firmware returns ENOENT */
2376 if (aq_ret && !(aq_status == I40E_AQ_RC_ENOENT)) {
2377 *retval = -EIO;
2378 dev_info(&vsi->back->pdev->dev,
2379 "ignoring delete macvlan error on %s, err %pe, aq_err %s\n",
2380 vsi_name, ERR_PTR(aq_ret),
2381 i40e_aq_str(hw, aq_status));
2382 }
2383 }
2384
2385 /**
2386 * i40e_aqc_add_filters - Request firmware to add a set of filters
2387 * @vsi: ptr to the VSI
2388 * @vsi_name: name to display in messages
2389 * @list: the list of filters to send to firmware
2390 * @add_head: Position in the add hlist
2391 * @num_add: the number of filters to add
2392 *
2393 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2394 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2395 * space for more filters.
2396 */
2397 static
i40e_aqc_add_filters(struct i40e_vsi * vsi,const char * vsi_name,struct i40e_aqc_add_macvlan_element_data * list,struct i40e_new_mac_filter * add_head,int num_add)2398 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2399 struct i40e_aqc_add_macvlan_element_data *list,
2400 struct i40e_new_mac_filter *add_head,
2401 int num_add)
2402 {
2403 struct i40e_hw *hw = &vsi->back->hw;
2404 enum i40e_admin_queue_err aq_status;
2405 int fcnt;
2406
2407 i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status);
2408 fcnt = i40e_update_filter_state(num_add, list, add_head);
2409
2410 if (fcnt != num_add) {
2411 if (vsi->type == I40E_VSI_MAIN) {
2412 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2413 dev_warn(&vsi->back->pdev->dev,
2414 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2415 i40e_aq_str(hw, aq_status), vsi_name);
2416 } else if (vsi->type == I40E_VSI_SRIOV ||
2417 vsi->type == I40E_VSI_VMDQ1 ||
2418 vsi->type == I40E_VSI_VMDQ2) {
2419 dev_warn(&vsi->back->pdev->dev,
2420 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2421 i40e_aq_str(hw, aq_status), vsi_name,
2422 vsi_name);
2423 } else {
2424 dev_warn(&vsi->back->pdev->dev,
2425 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2426 i40e_aq_str(hw, aq_status), vsi_name,
2427 vsi->type);
2428 }
2429 }
2430 }
2431
2432 /**
2433 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2434 * @vsi: pointer to the VSI
2435 * @vsi_name: the VSI name
2436 * @f: filter data
2437 *
2438 * This function sets or clears the promiscuous broadcast flags for VLAN
2439 * filters in order to properly receive broadcast frames. Assumes that only
2440 * broadcast filters are passed.
2441 *
2442 * Returns status indicating success or failure;
2443 **/
2444 static int
i40e_aqc_broadcast_filter(struct i40e_vsi * vsi,const char * vsi_name,struct i40e_mac_filter * f)2445 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2446 struct i40e_mac_filter *f)
2447 {
2448 bool enable = f->state == I40E_FILTER_NEW;
2449 struct i40e_hw *hw = &vsi->back->hw;
2450 int aq_ret;
2451
2452 if (f->vlan == I40E_VLAN_ANY) {
2453 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2454 vsi->seid,
2455 enable,
2456 NULL);
2457 } else {
2458 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2459 vsi->seid,
2460 enable,
2461 f->vlan,
2462 NULL);
2463 }
2464
2465 if (aq_ret) {
2466 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2467 dev_warn(&vsi->back->pdev->dev,
2468 "Error %s, forcing overflow promiscuous on %s\n",
2469 i40e_aq_str(hw, hw->aq.asq_last_status),
2470 vsi_name);
2471 }
2472
2473 return aq_ret;
2474 }
2475
2476 /**
2477 * i40e_set_promiscuous - set promiscuous mode
2478 * @pf: board private structure
2479 * @promisc: promisc on or off
2480 *
2481 * There are different ways of setting promiscuous mode on a PF depending on
2482 * what state/environment we're in. This identifies and sets it appropriately.
2483 * Returns 0 on success.
2484 **/
i40e_set_promiscuous(struct i40e_pf * pf,bool promisc)2485 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2486 {
2487 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2488 struct i40e_hw *hw = &pf->hw;
2489 int aq_ret;
2490
2491 if (vsi->type == I40E_VSI_MAIN &&
2492 pf->lan_veb != I40E_NO_VEB &&
2493 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2494 /* set defport ON for Main VSI instead of true promisc
2495 * this way we will get all unicast/multicast and VLAN
2496 * promisc behavior but will not get VF or VMDq traffic
2497 * replicated on the Main VSI.
2498 */
2499 if (promisc)
2500 aq_ret = i40e_aq_set_default_vsi(hw,
2501 vsi->seid,
2502 NULL);
2503 else
2504 aq_ret = i40e_aq_clear_default_vsi(hw,
2505 vsi->seid,
2506 NULL);
2507 if (aq_ret) {
2508 dev_info(&pf->pdev->dev,
2509 "Set default VSI failed, err %pe, aq_err %s\n",
2510 ERR_PTR(aq_ret),
2511 i40e_aq_str(hw, hw->aq.asq_last_status));
2512 }
2513 } else {
2514 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2515 hw,
2516 vsi->seid,
2517 promisc, NULL,
2518 true);
2519 if (aq_ret) {
2520 dev_info(&pf->pdev->dev,
2521 "set unicast promisc failed, err %pe, aq_err %s\n",
2522 ERR_PTR(aq_ret),
2523 i40e_aq_str(hw, hw->aq.asq_last_status));
2524 }
2525 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2526 hw,
2527 vsi->seid,
2528 promisc, NULL);
2529 if (aq_ret) {
2530 dev_info(&pf->pdev->dev,
2531 "set multicast promisc failed, err %pe, aq_err %s\n",
2532 ERR_PTR(aq_ret),
2533 i40e_aq_str(hw, hw->aq.asq_last_status));
2534 }
2535 }
2536
2537 if (!aq_ret)
2538 pf->cur_promisc = promisc;
2539
2540 return aq_ret;
2541 }
2542
2543 /**
2544 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2545 * @vsi: ptr to the VSI
2546 *
2547 * Push any outstanding VSI filter changes through the AdminQ.
2548 *
2549 * Returns 0 or error value
2550 **/
i40e_sync_vsi_filters(struct i40e_vsi * vsi)2551 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2552 {
2553 struct hlist_head tmp_add_list, tmp_del_list;
2554 struct i40e_mac_filter *f;
2555 struct i40e_new_mac_filter *new, *add_head = NULL;
2556 struct i40e_hw *hw = &vsi->back->hw;
2557 bool old_overflow, new_overflow;
2558 unsigned int failed_filters = 0;
2559 unsigned int vlan_filters = 0;
2560 char vsi_name[16] = "PF";
2561 int filter_list_len = 0;
2562 u32 changed_flags = 0;
2563 struct hlist_node *h;
2564 struct i40e_pf *pf;
2565 int num_add = 0;
2566 int num_del = 0;
2567 int aq_ret = 0;
2568 int retval = 0;
2569 u16 cmd_flags;
2570 int list_size;
2571 int bkt;
2572
2573 /* empty array typed pointers, kcalloc later */
2574 struct i40e_aqc_add_macvlan_element_data *add_list;
2575 struct i40e_aqc_remove_macvlan_element_data *del_list;
2576
2577 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2578 usleep_range(1000, 2000);
2579 pf = vsi->back;
2580
2581 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2582
2583 if (vsi->netdev) {
2584 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2585 vsi->current_netdev_flags = vsi->netdev->flags;
2586 }
2587
2588 INIT_HLIST_HEAD(&tmp_add_list);
2589 INIT_HLIST_HEAD(&tmp_del_list);
2590
2591 if (vsi->type == I40E_VSI_SRIOV)
2592 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2593 else if (vsi->type != I40E_VSI_MAIN)
2594 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2595
2596 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2597 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2598
2599 spin_lock_bh(&vsi->mac_filter_hash_lock);
2600 /* Create a list of filters to delete. */
2601 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2602 if (f->state == I40E_FILTER_REMOVE) {
2603 /* Move the element into temporary del_list */
2604 hash_del(&f->hlist);
2605 hlist_add_head(&f->hlist, &tmp_del_list);
2606
2607 /* Avoid counting removed filters */
2608 continue;
2609 }
2610 if (f->state == I40E_FILTER_NEW) {
2611 /* Create a temporary i40e_new_mac_filter */
2612 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2613 if (!new)
2614 goto err_no_memory_locked;
2615
2616 /* Store pointer to the real filter */
2617 new->f = f;
2618 new->state = f->state;
2619
2620 /* Add it to the hash list */
2621 hlist_add_head(&new->hlist, &tmp_add_list);
2622 }
2623
2624 /* Count the number of active (current and new) VLAN
2625 * filters we have now. Does not count filters which
2626 * are marked for deletion.
2627 */
2628 if (f->vlan > 0)
2629 vlan_filters++;
2630 }
2631
2632 if (vsi->type != I40E_VSI_SRIOV)
2633 retval = i40e_correct_mac_vlan_filters
2634 (vsi, &tmp_add_list, &tmp_del_list,
2635 vlan_filters);
2636 else if (pf->vf)
2637 retval = i40e_correct_vf_mac_vlan_filters
2638 (vsi, &tmp_add_list, &tmp_del_list,
2639 vlan_filters, pf->vf[vsi->vf_id].trusted);
2640
2641 hlist_for_each_entry(new, &tmp_add_list, hlist)
2642 netdev_hw_addr_refcnt(new->f, vsi->netdev, 1);
2643
2644 if (retval)
2645 goto err_no_memory_locked;
2646
2647 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2648 }
2649
2650 /* Now process 'del_list' outside the lock */
2651 if (!hlist_empty(&tmp_del_list)) {
2652 filter_list_len = hw->aq.asq_buf_size /
2653 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2654 list_size = filter_list_len *
2655 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2656 del_list = kzalloc(list_size, GFP_ATOMIC);
2657 if (!del_list)
2658 goto err_no_memory;
2659
2660 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2661 cmd_flags = 0;
2662
2663 /* handle broadcast filters by updating the broadcast
2664 * promiscuous flag and release filter list.
2665 */
2666 if (is_broadcast_ether_addr(f->macaddr)) {
2667 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2668
2669 hlist_del(&f->hlist);
2670 kfree(f);
2671 continue;
2672 }
2673
2674 /* add to delete list */
2675 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2676 if (f->vlan == I40E_VLAN_ANY) {
2677 del_list[num_del].vlan_tag = 0;
2678 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2679 } else {
2680 del_list[num_del].vlan_tag =
2681 cpu_to_le16((u16)(f->vlan));
2682 }
2683
2684 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2685 del_list[num_del].flags = cmd_flags;
2686 num_del++;
2687
2688 /* flush a full buffer */
2689 if (num_del == filter_list_len) {
2690 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2691 num_del, &retval);
2692 memset(del_list, 0, list_size);
2693 num_del = 0;
2694 }
2695 /* Release memory for MAC filter entries which were
2696 * synced up with HW.
2697 */
2698 hlist_del(&f->hlist);
2699 kfree(f);
2700 }
2701
2702 if (num_del) {
2703 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2704 num_del, &retval);
2705 }
2706
2707 kfree(del_list);
2708 del_list = NULL;
2709 }
2710
2711 if (!hlist_empty(&tmp_add_list)) {
2712 /* Do all the adds now. */
2713 filter_list_len = hw->aq.asq_buf_size /
2714 sizeof(struct i40e_aqc_add_macvlan_element_data);
2715 list_size = filter_list_len *
2716 sizeof(struct i40e_aqc_add_macvlan_element_data);
2717 add_list = kzalloc(list_size, GFP_ATOMIC);
2718 if (!add_list)
2719 goto err_no_memory;
2720
2721 num_add = 0;
2722 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2723 /* handle broadcast filters by updating the broadcast
2724 * promiscuous flag instead of adding a MAC filter.
2725 */
2726 if (is_broadcast_ether_addr(new->f->macaddr)) {
2727 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2728 new->f))
2729 new->state = I40E_FILTER_FAILED;
2730 else
2731 new->state = I40E_FILTER_ACTIVE;
2732 continue;
2733 }
2734
2735 /* add to add array */
2736 if (num_add == 0)
2737 add_head = new;
2738 cmd_flags = 0;
2739 ether_addr_copy(add_list[num_add].mac_addr,
2740 new->f->macaddr);
2741 if (new->f->vlan == I40E_VLAN_ANY) {
2742 add_list[num_add].vlan_tag = 0;
2743 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2744 } else {
2745 add_list[num_add].vlan_tag =
2746 cpu_to_le16((u16)(new->f->vlan));
2747 }
2748 add_list[num_add].queue_number = 0;
2749 /* set invalid match method for later detection */
2750 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2751 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2752 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2753 num_add++;
2754
2755 /* flush a full buffer */
2756 if (num_add == filter_list_len) {
2757 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2758 add_head, num_add);
2759 memset(add_list, 0, list_size);
2760 num_add = 0;
2761 }
2762 }
2763 if (num_add) {
2764 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2765 num_add);
2766 }
2767 /* Now move all of the filters from the temp add list back to
2768 * the VSI's list.
2769 */
2770 spin_lock_bh(&vsi->mac_filter_hash_lock);
2771 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2772 /* Only update the state if we're still NEW */
2773 if (new->f->state == I40E_FILTER_NEW)
2774 new->f->state = new->state;
2775 hlist_del(&new->hlist);
2776 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2777 kfree(new);
2778 }
2779 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2780 kfree(add_list);
2781 add_list = NULL;
2782 }
2783
2784 /* Determine the number of active and failed filters. */
2785 spin_lock_bh(&vsi->mac_filter_hash_lock);
2786 vsi->active_filters = 0;
2787 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2788 if (f->state == I40E_FILTER_ACTIVE)
2789 vsi->active_filters++;
2790 else if (f->state == I40E_FILTER_FAILED)
2791 failed_filters++;
2792 }
2793 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2794
2795 /* Check if we are able to exit overflow promiscuous mode. We can
2796 * safely exit if we didn't just enter, we no longer have any failed
2797 * filters, and we have reduced filters below the threshold value.
2798 */
2799 if (old_overflow && !failed_filters &&
2800 vsi->active_filters < vsi->promisc_threshold) {
2801 dev_info(&pf->pdev->dev,
2802 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2803 vsi_name);
2804 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2805 vsi->promisc_threshold = 0;
2806 }
2807
2808 /* if the VF is not trusted do not do promisc */
2809 if (vsi->type == I40E_VSI_SRIOV && pf->vf &&
2810 !pf->vf[vsi->vf_id].trusted) {
2811 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2812 goto out;
2813 }
2814
2815 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2816
2817 /* If we are entering overflow promiscuous, we need to calculate a new
2818 * threshold for when we are safe to exit
2819 */
2820 if (!old_overflow && new_overflow)
2821 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2822
2823 /* check for changes in promiscuous modes */
2824 if (changed_flags & IFF_ALLMULTI) {
2825 bool cur_multipromisc;
2826
2827 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2828 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2829 vsi->seid,
2830 cur_multipromisc,
2831 NULL);
2832 if (aq_ret) {
2833 retval = i40e_aq_rc_to_posix(aq_ret,
2834 hw->aq.asq_last_status);
2835 dev_info(&pf->pdev->dev,
2836 "set multi promisc failed on %s, err %pe aq_err %s\n",
2837 vsi_name,
2838 ERR_PTR(aq_ret),
2839 i40e_aq_str(hw, hw->aq.asq_last_status));
2840 } else {
2841 dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2842 cur_multipromisc ? "entering" : "leaving");
2843 }
2844 }
2845
2846 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2847 bool cur_promisc;
2848
2849 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2850 new_overflow);
2851 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2852 if (aq_ret) {
2853 retval = i40e_aq_rc_to_posix(aq_ret,
2854 hw->aq.asq_last_status);
2855 dev_info(&pf->pdev->dev,
2856 "Setting promiscuous %s failed on %s, err %pe aq_err %s\n",
2857 cur_promisc ? "on" : "off",
2858 vsi_name,
2859 ERR_PTR(aq_ret),
2860 i40e_aq_str(hw, hw->aq.asq_last_status));
2861 }
2862 }
2863 out:
2864 /* if something went wrong then set the changed flag so we try again */
2865 if (retval)
2866 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2867
2868 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2869 return retval;
2870
2871 err_no_memory:
2872 /* Restore elements on the temporary add and delete lists */
2873 spin_lock_bh(&vsi->mac_filter_hash_lock);
2874 err_no_memory_locked:
2875 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2876 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2877 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2878
2879 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2880 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2881 return -ENOMEM;
2882 }
2883
2884 /**
2885 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2886 * @pf: board private structure
2887 **/
i40e_sync_filters_subtask(struct i40e_pf * pf)2888 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2889 {
2890 int v;
2891
2892 if (!pf)
2893 return;
2894 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2895 return;
2896 if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2897 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2898 return;
2899 }
2900
2901 for (v = 0; v < pf->num_alloc_vsi; v++) {
2902 if (pf->vsi[v] &&
2903 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
2904 !test_bit(__I40E_VSI_RELEASING, pf->vsi[v]->state)) {
2905 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2906
2907 if (ret) {
2908 /* come back and try again later */
2909 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2910 pf->state);
2911 break;
2912 }
2913 }
2914 }
2915 }
2916
2917 /**
2918 * i40e_calculate_vsi_rx_buf_len - Calculates buffer length
2919 *
2920 * @vsi: VSI to calculate rx_buf_len from
2921 */
i40e_calculate_vsi_rx_buf_len(struct i40e_vsi * vsi)2922 static u16 i40e_calculate_vsi_rx_buf_len(struct i40e_vsi *vsi)
2923 {
2924 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2925 return SKB_WITH_OVERHEAD(I40E_RXBUFFER_2048);
2926
2927 return PAGE_SIZE < 8192 ? I40E_RXBUFFER_3072 : I40E_RXBUFFER_2048;
2928 }
2929
2930 /**
2931 * i40e_max_vsi_frame_size - returns the maximum allowed frame size for VSI
2932 * @vsi: the vsi
2933 * @xdp_prog: XDP program
2934 **/
i40e_max_vsi_frame_size(struct i40e_vsi * vsi,struct bpf_prog * xdp_prog)2935 static int i40e_max_vsi_frame_size(struct i40e_vsi *vsi,
2936 struct bpf_prog *xdp_prog)
2937 {
2938 u16 rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
2939 u16 chain_len;
2940
2941 if (xdp_prog && !xdp_prog->aux->xdp_has_frags)
2942 chain_len = 1;
2943 else
2944 chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
2945
2946 return min_t(u16, rx_buf_len * chain_len, I40E_MAX_RXBUFFER);
2947 }
2948
2949 /**
2950 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2951 * @netdev: network interface device structure
2952 * @new_mtu: new value for maximum frame size
2953 *
2954 * Returns 0 on success, negative on failure
2955 **/
i40e_change_mtu(struct net_device * netdev,int new_mtu)2956 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2957 {
2958 struct i40e_netdev_priv *np = netdev_priv(netdev);
2959 struct i40e_vsi *vsi = np->vsi;
2960 struct i40e_pf *pf = vsi->back;
2961 int frame_size;
2962
2963 frame_size = i40e_max_vsi_frame_size(vsi, vsi->xdp_prog);
2964 if (new_mtu > frame_size - I40E_PACKET_HDR_PAD) {
2965 netdev_err(netdev, "Error changing mtu to %d, Max is %d\n",
2966 new_mtu, frame_size - I40E_PACKET_HDR_PAD);
2967 return -EINVAL;
2968 }
2969
2970 netdev_dbg(netdev, "changing MTU from %d to %d\n",
2971 netdev->mtu, new_mtu);
2972 netdev->mtu = new_mtu;
2973 if (netif_running(netdev))
2974 i40e_vsi_reinit_locked(vsi);
2975 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2976 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2977 return 0;
2978 }
2979
2980 /**
2981 * i40e_ioctl - Access the hwtstamp interface
2982 * @netdev: network interface device structure
2983 * @ifr: interface request data
2984 * @cmd: ioctl command
2985 **/
i40e_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)2986 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2987 {
2988 struct i40e_netdev_priv *np = netdev_priv(netdev);
2989 struct i40e_pf *pf = np->vsi->back;
2990
2991 switch (cmd) {
2992 case SIOCGHWTSTAMP:
2993 return i40e_ptp_get_ts_config(pf, ifr);
2994 case SIOCSHWTSTAMP:
2995 return i40e_ptp_set_ts_config(pf, ifr);
2996 default:
2997 return -EOPNOTSUPP;
2998 }
2999 }
3000
3001 /**
3002 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
3003 * @vsi: the vsi being adjusted
3004 **/
i40e_vlan_stripping_enable(struct i40e_vsi * vsi)3005 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
3006 {
3007 struct i40e_vsi_context ctxt;
3008 int ret;
3009
3010 /* Don't modify stripping options if a port VLAN is active */
3011 if (vsi->info.pvid)
3012 return;
3013
3014 if ((vsi->info.valid_sections &
3015 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3016 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
3017 return; /* already enabled */
3018
3019 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3020 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3021 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
3022
3023 ctxt.seid = vsi->seid;
3024 ctxt.info = vsi->info;
3025 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3026 if (ret) {
3027 dev_info(&vsi->back->pdev->dev,
3028 "update vlan stripping failed, err %pe aq_err %s\n",
3029 ERR_PTR(ret),
3030 i40e_aq_str(&vsi->back->hw,
3031 vsi->back->hw.aq.asq_last_status));
3032 }
3033 }
3034
3035 /**
3036 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
3037 * @vsi: the vsi being adjusted
3038 **/
i40e_vlan_stripping_disable(struct i40e_vsi * vsi)3039 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
3040 {
3041 struct i40e_vsi_context ctxt;
3042 int ret;
3043
3044 /* Don't modify stripping options if a port VLAN is active */
3045 if (vsi->info.pvid)
3046 return;
3047
3048 if ((vsi->info.valid_sections &
3049 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3050 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
3051 I40E_AQ_VSI_PVLAN_EMOD_MASK))
3052 return; /* already disabled */
3053
3054 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3055 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3056 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
3057
3058 ctxt.seid = vsi->seid;
3059 ctxt.info = vsi->info;
3060 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3061 if (ret) {
3062 dev_info(&vsi->back->pdev->dev,
3063 "update vlan stripping failed, err %pe aq_err %s\n",
3064 ERR_PTR(ret),
3065 i40e_aq_str(&vsi->back->hw,
3066 vsi->back->hw.aq.asq_last_status));
3067 }
3068 }
3069
3070 /**
3071 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
3072 * @vsi: the vsi being configured
3073 * @vid: vlan id to be added (0 = untagged only , -1 = any)
3074 *
3075 * This is a helper function for adding a new MAC/VLAN filter with the
3076 * specified VLAN for each existing MAC address already in the hash table.
3077 * This function does *not* perform any accounting to update filters based on
3078 * VLAN mode.
3079 *
3080 * NOTE: this function expects to be called while under the
3081 * mac_filter_hash_lock
3082 **/
i40e_add_vlan_all_mac(struct i40e_vsi * vsi,s16 vid)3083 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3084 {
3085 struct i40e_mac_filter *f, *add_f;
3086 struct hlist_node *h;
3087 int bkt;
3088
3089 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3090 /* If we're asked to add a filter that has been marked for
3091 * removal, it is safe to simply restore it to active state.
3092 * __i40e_del_filter will have simply deleted any filters which
3093 * were previously marked NEW or FAILED, so if it is currently
3094 * marked REMOVE it must have previously been ACTIVE. Since we
3095 * haven't yet run the sync filters task, just restore this
3096 * filter to the ACTIVE state so that the sync task leaves it
3097 * in place.
3098 */
3099 if (f->state == I40E_FILTER_REMOVE && f->vlan == vid) {
3100 f->state = I40E_FILTER_ACTIVE;
3101 continue;
3102 } else if (f->state == I40E_FILTER_REMOVE) {
3103 continue;
3104 }
3105 add_f = i40e_add_filter(vsi, f->macaddr, vid);
3106 if (!add_f) {
3107 dev_info(&vsi->back->pdev->dev,
3108 "Could not add vlan filter %d for %pM\n",
3109 vid, f->macaddr);
3110 return -ENOMEM;
3111 }
3112 }
3113
3114 return 0;
3115 }
3116
3117 /**
3118 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
3119 * @vsi: the VSI being configured
3120 * @vid: VLAN id to be added
3121 **/
i40e_vsi_add_vlan(struct i40e_vsi * vsi,u16 vid)3122 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
3123 {
3124 int err;
3125
3126 if (vsi->info.pvid)
3127 return -EINVAL;
3128
3129 /* The network stack will attempt to add VID=0, with the intention to
3130 * receive priority tagged packets with a VLAN of 0. Our HW receives
3131 * these packets by default when configured to receive untagged
3132 * packets, so we don't need to add a filter for this case.
3133 * Additionally, HW interprets adding a VID=0 filter as meaning to
3134 * receive *only* tagged traffic and stops receiving untagged traffic.
3135 * Thus, we do not want to actually add a filter for VID=0
3136 */
3137 if (!vid)
3138 return 0;
3139
3140 /* Locked once because all functions invoked below iterates list*/
3141 spin_lock_bh(&vsi->mac_filter_hash_lock);
3142 err = i40e_add_vlan_all_mac(vsi, vid);
3143 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3144 if (err)
3145 return err;
3146
3147 /* schedule our worker thread which will take care of
3148 * applying the new filter changes
3149 */
3150 i40e_service_event_schedule(vsi->back);
3151 return 0;
3152 }
3153
3154 /**
3155 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
3156 * @vsi: the vsi being configured
3157 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
3158 *
3159 * This function should be used to remove all VLAN filters which match the
3160 * given VID. It does not schedule the service event and does not take the
3161 * mac_filter_hash_lock so it may be combined with other operations under
3162 * a single invocation of the mac_filter_hash_lock.
3163 *
3164 * NOTE: this function expects to be called while under the
3165 * mac_filter_hash_lock
3166 */
i40e_rm_vlan_all_mac(struct i40e_vsi * vsi,s16 vid)3167 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3168 {
3169 struct i40e_mac_filter *f;
3170 struct hlist_node *h;
3171 int bkt;
3172
3173 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3174 if (f->vlan == vid)
3175 __i40e_del_filter(vsi, f);
3176 }
3177 }
3178
3179 /**
3180 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
3181 * @vsi: the VSI being configured
3182 * @vid: VLAN id to be removed
3183 **/
i40e_vsi_kill_vlan(struct i40e_vsi * vsi,u16 vid)3184 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
3185 {
3186 if (!vid || vsi->info.pvid)
3187 return;
3188
3189 spin_lock_bh(&vsi->mac_filter_hash_lock);
3190 i40e_rm_vlan_all_mac(vsi, vid);
3191 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3192
3193 /* schedule our worker thread which will take care of
3194 * applying the new filter changes
3195 */
3196 i40e_service_event_schedule(vsi->back);
3197 }
3198
3199 /**
3200 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
3201 * @netdev: network interface to be adjusted
3202 * @proto: unused protocol value
3203 * @vid: vlan id to be added
3204 *
3205 * net_device_ops implementation for adding vlan ids
3206 **/
i40e_vlan_rx_add_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)3207 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
3208 __always_unused __be16 proto, u16 vid)
3209 {
3210 struct i40e_netdev_priv *np = netdev_priv(netdev);
3211 struct i40e_vsi *vsi = np->vsi;
3212 int ret = 0;
3213
3214 if (vid >= VLAN_N_VID)
3215 return -EINVAL;
3216
3217 ret = i40e_vsi_add_vlan(vsi, vid);
3218 if (!ret)
3219 set_bit(vid, vsi->active_vlans);
3220
3221 return ret;
3222 }
3223
3224 /**
3225 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
3226 * @netdev: network interface to be adjusted
3227 * @proto: unused protocol value
3228 * @vid: vlan id to be added
3229 **/
i40e_vlan_rx_add_vid_up(struct net_device * netdev,__always_unused __be16 proto,u16 vid)3230 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
3231 __always_unused __be16 proto, u16 vid)
3232 {
3233 struct i40e_netdev_priv *np = netdev_priv(netdev);
3234 struct i40e_vsi *vsi = np->vsi;
3235
3236 if (vid >= VLAN_N_VID)
3237 return;
3238 set_bit(vid, vsi->active_vlans);
3239 }
3240
3241 /**
3242 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
3243 * @netdev: network interface to be adjusted
3244 * @proto: unused protocol value
3245 * @vid: vlan id to be removed
3246 *
3247 * net_device_ops implementation for removing vlan ids
3248 **/
i40e_vlan_rx_kill_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)3249 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
3250 __always_unused __be16 proto, u16 vid)
3251 {
3252 struct i40e_netdev_priv *np = netdev_priv(netdev);
3253 struct i40e_vsi *vsi = np->vsi;
3254
3255 /* return code is ignored as there is nothing a user
3256 * can do about failure to remove and a log message was
3257 * already printed from the other function
3258 */
3259 i40e_vsi_kill_vlan(vsi, vid);
3260
3261 clear_bit(vid, vsi->active_vlans);
3262
3263 return 0;
3264 }
3265
3266 /**
3267 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
3268 * @vsi: the vsi being brought back up
3269 **/
i40e_restore_vlan(struct i40e_vsi * vsi)3270 static void i40e_restore_vlan(struct i40e_vsi *vsi)
3271 {
3272 u16 vid;
3273
3274 if (!vsi->netdev)
3275 return;
3276
3277 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3278 i40e_vlan_stripping_enable(vsi);
3279 else
3280 i40e_vlan_stripping_disable(vsi);
3281
3282 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
3283 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
3284 vid);
3285 }
3286
3287 /**
3288 * i40e_vsi_add_pvid - Add pvid for the VSI
3289 * @vsi: the vsi being adjusted
3290 * @vid: the vlan id to set as a PVID
3291 **/
i40e_vsi_add_pvid(struct i40e_vsi * vsi,u16 vid)3292 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
3293 {
3294 struct i40e_vsi_context ctxt;
3295 int ret;
3296
3297 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3298 vsi->info.pvid = cpu_to_le16(vid);
3299 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
3300 I40E_AQ_VSI_PVLAN_INSERT_PVID |
3301 I40E_AQ_VSI_PVLAN_EMOD_STR;
3302
3303 ctxt.seid = vsi->seid;
3304 ctxt.info = vsi->info;
3305 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3306 if (ret) {
3307 dev_info(&vsi->back->pdev->dev,
3308 "add pvid failed, err %pe aq_err %s\n",
3309 ERR_PTR(ret),
3310 i40e_aq_str(&vsi->back->hw,
3311 vsi->back->hw.aq.asq_last_status));
3312 return -ENOENT;
3313 }
3314
3315 return 0;
3316 }
3317
3318 /**
3319 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3320 * @vsi: the vsi being adjusted
3321 *
3322 * Just use the vlan_rx_register() service to put it back to normal
3323 **/
i40e_vsi_remove_pvid(struct i40e_vsi * vsi)3324 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3325 {
3326 vsi->info.pvid = 0;
3327
3328 i40e_vlan_stripping_disable(vsi);
3329 }
3330
3331 /**
3332 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3333 * @vsi: ptr to the VSI
3334 *
3335 * If this function returns with an error, then it's possible one or
3336 * more of the rings is populated (while the rest are not). It is the
3337 * callers duty to clean those orphaned rings.
3338 *
3339 * Return 0 on success, negative on failure
3340 **/
i40e_vsi_setup_tx_resources(struct i40e_vsi * vsi)3341 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3342 {
3343 int i, err = 0;
3344
3345 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3346 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3347
3348 if (!i40e_enabled_xdp_vsi(vsi))
3349 return err;
3350
3351 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3352 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3353
3354 return err;
3355 }
3356
3357 /**
3358 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3359 * @vsi: ptr to the VSI
3360 *
3361 * Free VSI's transmit software resources
3362 **/
i40e_vsi_free_tx_resources(struct i40e_vsi * vsi)3363 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3364 {
3365 int i;
3366
3367 if (vsi->tx_rings) {
3368 for (i = 0; i < vsi->num_queue_pairs; i++)
3369 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3370 i40e_free_tx_resources(vsi->tx_rings[i]);
3371 }
3372
3373 if (vsi->xdp_rings) {
3374 for (i = 0; i < vsi->num_queue_pairs; i++)
3375 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3376 i40e_free_tx_resources(vsi->xdp_rings[i]);
3377 }
3378 }
3379
3380 /**
3381 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3382 * @vsi: ptr to the VSI
3383 *
3384 * If this function returns with an error, then it's possible one or
3385 * more of the rings is populated (while the rest are not). It is the
3386 * callers duty to clean those orphaned rings.
3387 *
3388 * Return 0 on success, negative on failure
3389 **/
i40e_vsi_setup_rx_resources(struct i40e_vsi * vsi)3390 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3391 {
3392 int i, err = 0;
3393
3394 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3395 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3396 return err;
3397 }
3398
3399 /**
3400 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3401 * @vsi: ptr to the VSI
3402 *
3403 * Free all receive software resources
3404 **/
i40e_vsi_free_rx_resources(struct i40e_vsi * vsi)3405 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3406 {
3407 int i;
3408
3409 if (!vsi->rx_rings)
3410 return;
3411
3412 for (i = 0; i < vsi->num_queue_pairs; i++)
3413 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3414 i40e_free_rx_resources(vsi->rx_rings[i]);
3415 }
3416
3417 /**
3418 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3419 * @ring: The Tx ring to configure
3420 *
3421 * This enables/disables XPS for a given Tx descriptor ring
3422 * based on the TCs enabled for the VSI that ring belongs to.
3423 **/
i40e_config_xps_tx_ring(struct i40e_ring * ring)3424 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3425 {
3426 int cpu;
3427
3428 if (!ring->q_vector || !ring->netdev || ring->ch)
3429 return;
3430
3431 /* We only initialize XPS once, so as not to overwrite user settings */
3432 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3433 return;
3434
3435 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3436 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3437 ring->queue_index);
3438 }
3439
3440 /**
3441 * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3442 * @ring: The Tx or Rx ring
3443 *
3444 * Returns the AF_XDP buffer pool or NULL.
3445 **/
i40e_xsk_pool(struct i40e_ring * ring)3446 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3447 {
3448 bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3449 int qid = ring->queue_index;
3450
3451 if (ring_is_xdp(ring))
3452 qid -= ring->vsi->alloc_queue_pairs;
3453
3454 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3455 return NULL;
3456
3457 return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3458 }
3459
3460 /**
3461 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3462 * @ring: The Tx ring to configure
3463 *
3464 * Configure the Tx descriptor ring in the HMC context.
3465 **/
i40e_configure_tx_ring(struct i40e_ring * ring)3466 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3467 {
3468 struct i40e_vsi *vsi = ring->vsi;
3469 u16 pf_q = vsi->base_queue + ring->queue_index;
3470 struct i40e_hw *hw = &vsi->back->hw;
3471 struct i40e_hmc_obj_txq tx_ctx;
3472 u32 qtx_ctl = 0;
3473 int err = 0;
3474
3475 if (ring_is_xdp(ring))
3476 ring->xsk_pool = i40e_xsk_pool(ring);
3477
3478 /* some ATR related tx ring init */
3479 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3480 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3481 ring->atr_count = 0;
3482 } else {
3483 ring->atr_sample_rate = 0;
3484 }
3485
3486 /* configure XPS */
3487 i40e_config_xps_tx_ring(ring);
3488
3489 /* clear the context structure first */
3490 memset(&tx_ctx, 0, sizeof(tx_ctx));
3491
3492 tx_ctx.new_context = 1;
3493 tx_ctx.base = (ring->dma / 128);
3494 tx_ctx.qlen = ring->count;
3495 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3496 I40E_FLAG_FD_ATR_ENABLED));
3497 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3498 /* FDIR VSI tx ring can still use RS bit and writebacks */
3499 if (vsi->type != I40E_VSI_FDIR)
3500 tx_ctx.head_wb_ena = 1;
3501 tx_ctx.head_wb_addr = ring->dma +
3502 (ring->count * sizeof(struct i40e_tx_desc));
3503
3504 /* As part of VSI creation/update, FW allocates certain
3505 * Tx arbitration queue sets for each TC enabled for
3506 * the VSI. The FW returns the handles to these queue
3507 * sets as part of the response buffer to Add VSI,
3508 * Update VSI, etc. AQ commands. It is expected that
3509 * these queue set handles be associated with the Tx
3510 * queues by the driver as part of the TX queue context
3511 * initialization. This has to be done regardless of
3512 * DCB as by default everything is mapped to TC0.
3513 */
3514
3515 if (ring->ch)
3516 tx_ctx.rdylist =
3517 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3518
3519 else
3520 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3521
3522 tx_ctx.rdylist_act = 0;
3523
3524 /* clear the context in the HMC */
3525 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3526 if (err) {
3527 dev_info(&vsi->back->pdev->dev,
3528 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3529 ring->queue_index, pf_q, err);
3530 return -ENOMEM;
3531 }
3532
3533 /* set the context in the HMC */
3534 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3535 if (err) {
3536 dev_info(&vsi->back->pdev->dev,
3537 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3538 ring->queue_index, pf_q, err);
3539 return -ENOMEM;
3540 }
3541
3542 /* Now associate this queue with this PCI function */
3543 if (ring->ch) {
3544 if (ring->ch->type == I40E_VSI_VMDQ2)
3545 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3546 else
3547 return -EINVAL;
3548
3549 qtx_ctl |= (ring->ch->vsi_number <<
3550 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3551 I40E_QTX_CTL_VFVM_INDX_MASK;
3552 } else {
3553 if (vsi->type == I40E_VSI_VMDQ2) {
3554 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3555 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3556 I40E_QTX_CTL_VFVM_INDX_MASK;
3557 } else {
3558 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3559 }
3560 }
3561
3562 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3563 I40E_QTX_CTL_PF_INDX_MASK);
3564 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3565 i40e_flush(hw);
3566
3567 /* cache tail off for easier writes later */
3568 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3569
3570 return 0;
3571 }
3572
3573 /**
3574 * i40e_rx_offset - Return expected offset into page to access data
3575 * @rx_ring: Ring we are requesting offset of
3576 *
3577 * Returns the offset value for ring into the data buffer.
3578 */
i40e_rx_offset(struct i40e_ring * rx_ring)3579 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3580 {
3581 return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3582 }
3583
3584 /**
3585 * i40e_configure_rx_ring - Configure a receive ring context
3586 * @ring: The Rx ring to configure
3587 *
3588 * Configure the Rx descriptor ring in the HMC context.
3589 **/
i40e_configure_rx_ring(struct i40e_ring * ring)3590 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3591 {
3592 struct i40e_vsi *vsi = ring->vsi;
3593 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3594 u16 pf_q = vsi->base_queue + ring->queue_index;
3595 struct i40e_hw *hw = &vsi->back->hw;
3596 struct i40e_hmc_obj_rxq rx_ctx;
3597 int err = 0;
3598 bool ok;
3599
3600 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3601
3602 /* clear the context structure first */
3603 memset(&rx_ctx, 0, sizeof(rx_ctx));
3604
3605 ring->rx_buf_len = vsi->rx_buf_len;
3606
3607 /* XDP RX-queue info only needed for RX rings exposed to XDP */
3608 if (ring->vsi->type != I40E_VSI_MAIN)
3609 goto skip;
3610
3611 if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
3612 err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
3613 ring->queue_index,
3614 ring->q_vector->napi.napi_id,
3615 ring->rx_buf_len);
3616 if (err)
3617 return err;
3618 }
3619
3620 ring->xsk_pool = i40e_xsk_pool(ring);
3621 if (ring->xsk_pool) {
3622 xdp_rxq_info_unreg(&ring->xdp_rxq);
3623 ring->rx_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool);
3624 err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
3625 ring->queue_index,
3626 ring->q_vector->napi.napi_id,
3627 ring->rx_buf_len);
3628 if (err)
3629 return err;
3630 err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3631 MEM_TYPE_XSK_BUFF_POOL,
3632 NULL);
3633 if (err)
3634 return err;
3635 dev_info(&vsi->back->pdev->dev,
3636 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3637 ring->queue_index);
3638
3639 } else {
3640 err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3641 MEM_TYPE_PAGE_SHARED,
3642 NULL);
3643 if (err)
3644 return err;
3645 }
3646
3647 skip:
3648 xdp_init_buff(&ring->xdp, i40e_rx_pg_size(ring) / 2, &ring->xdp_rxq);
3649
3650 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3651 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3652
3653 rx_ctx.base = (ring->dma / 128);
3654 rx_ctx.qlen = ring->count;
3655
3656 /* use 16 byte descriptors */
3657 rx_ctx.dsize = 0;
3658
3659 /* descriptor type is always zero
3660 * rx_ctx.dtype = 0;
3661 */
3662 rx_ctx.hsplit_0 = 0;
3663
3664 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3665 if (hw->revision_id == 0)
3666 rx_ctx.lrxqthresh = 0;
3667 else
3668 rx_ctx.lrxqthresh = 1;
3669 rx_ctx.crcstrip = 1;
3670 rx_ctx.l2tsel = 1;
3671 /* this controls whether VLAN is stripped from inner headers */
3672 rx_ctx.showiv = 0;
3673 /* set the prefena field to 1 because the manual says to */
3674 rx_ctx.prefena = 1;
3675
3676 /* clear the context in the HMC */
3677 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3678 if (err) {
3679 dev_info(&vsi->back->pdev->dev,
3680 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3681 ring->queue_index, pf_q, err);
3682 return -ENOMEM;
3683 }
3684
3685 /* set the context in the HMC */
3686 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3687 if (err) {
3688 dev_info(&vsi->back->pdev->dev,
3689 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3690 ring->queue_index, pf_q, err);
3691 return -ENOMEM;
3692 }
3693
3694 /* configure Rx buffer alignment */
3695 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3696 if (I40E_2K_TOO_SMALL_WITH_PADDING) {
3697 dev_info(&vsi->back->pdev->dev,
3698 "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
3699 return -EOPNOTSUPP;
3700 }
3701 clear_ring_build_skb_enabled(ring);
3702 } else {
3703 set_ring_build_skb_enabled(ring);
3704 }
3705
3706 ring->rx_offset = i40e_rx_offset(ring);
3707
3708 /* cache tail for quicker writes, and clear the reg before use */
3709 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3710 writel(0, ring->tail);
3711
3712 if (ring->xsk_pool) {
3713 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3714 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3715 } else {
3716 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3717 }
3718 if (!ok) {
3719 /* Log this in case the user has forgotten to give the kernel
3720 * any buffers, even later in the application.
3721 */
3722 dev_info(&vsi->back->pdev->dev,
3723 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3724 ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3725 ring->queue_index, pf_q);
3726 }
3727
3728 return 0;
3729 }
3730
3731 /**
3732 * i40e_vsi_configure_tx - Configure the VSI for Tx
3733 * @vsi: VSI structure describing this set of rings and resources
3734 *
3735 * Configure the Tx VSI for operation.
3736 **/
i40e_vsi_configure_tx(struct i40e_vsi * vsi)3737 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3738 {
3739 int err = 0;
3740 u16 i;
3741
3742 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3743 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3744
3745 if (err || !i40e_enabled_xdp_vsi(vsi))
3746 return err;
3747
3748 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3749 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3750
3751 return err;
3752 }
3753
3754 /**
3755 * i40e_vsi_configure_rx - Configure the VSI for Rx
3756 * @vsi: the VSI being configured
3757 *
3758 * Configure the Rx VSI for operation.
3759 **/
i40e_vsi_configure_rx(struct i40e_vsi * vsi)3760 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3761 {
3762 int err = 0;
3763 u16 i;
3764
3765 vsi->max_frame = i40e_max_vsi_frame_size(vsi, vsi->xdp_prog);
3766 vsi->rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
3767
3768 #if (PAGE_SIZE < 8192)
3769 if (vsi->netdev && !I40E_2K_TOO_SMALL_WITH_PADDING &&
3770 vsi->netdev->mtu <= ETH_DATA_LEN) {
3771 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3772 vsi->max_frame = vsi->rx_buf_len;
3773 }
3774 #endif
3775
3776 /* set up individual rings */
3777 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3778 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3779
3780 return err;
3781 }
3782
3783 /**
3784 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3785 * @vsi: ptr to the VSI
3786 **/
i40e_vsi_config_dcb_rings(struct i40e_vsi * vsi)3787 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3788 {
3789 struct i40e_ring *tx_ring, *rx_ring;
3790 u16 qoffset, qcount;
3791 int i, n;
3792
3793 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3794 /* Reset the TC information */
3795 for (i = 0; i < vsi->num_queue_pairs; i++) {
3796 rx_ring = vsi->rx_rings[i];
3797 tx_ring = vsi->tx_rings[i];
3798 rx_ring->dcb_tc = 0;
3799 tx_ring->dcb_tc = 0;
3800 }
3801 return;
3802 }
3803
3804 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3805 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3806 continue;
3807
3808 qoffset = vsi->tc_config.tc_info[n].qoffset;
3809 qcount = vsi->tc_config.tc_info[n].qcount;
3810 for (i = qoffset; i < (qoffset + qcount); i++) {
3811 rx_ring = vsi->rx_rings[i];
3812 tx_ring = vsi->tx_rings[i];
3813 rx_ring->dcb_tc = n;
3814 tx_ring->dcb_tc = n;
3815 }
3816 }
3817 }
3818
3819 /**
3820 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3821 * @vsi: ptr to the VSI
3822 **/
i40e_set_vsi_rx_mode(struct i40e_vsi * vsi)3823 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3824 {
3825 if (vsi->netdev)
3826 i40e_set_rx_mode(vsi->netdev);
3827 }
3828
3829 /**
3830 * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3831 * @pf: Pointer to the targeted PF
3832 *
3833 * Set all flow director counters to 0.
3834 */
i40e_reset_fdir_filter_cnt(struct i40e_pf * pf)3835 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3836 {
3837 pf->fd_tcp4_filter_cnt = 0;
3838 pf->fd_udp4_filter_cnt = 0;
3839 pf->fd_sctp4_filter_cnt = 0;
3840 pf->fd_ip4_filter_cnt = 0;
3841 pf->fd_tcp6_filter_cnt = 0;
3842 pf->fd_udp6_filter_cnt = 0;
3843 pf->fd_sctp6_filter_cnt = 0;
3844 pf->fd_ip6_filter_cnt = 0;
3845 }
3846
3847 /**
3848 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3849 * @vsi: Pointer to the targeted VSI
3850 *
3851 * This function replays the hlist on the hw where all the SB Flow Director
3852 * filters were saved.
3853 **/
i40e_fdir_filter_restore(struct i40e_vsi * vsi)3854 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3855 {
3856 struct i40e_fdir_filter *filter;
3857 struct i40e_pf *pf = vsi->back;
3858 struct hlist_node *node;
3859
3860 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3861 return;
3862
3863 /* Reset FDir counters as we're replaying all existing filters */
3864 i40e_reset_fdir_filter_cnt(pf);
3865
3866 hlist_for_each_entry_safe(filter, node,
3867 &pf->fdir_filter_list, fdir_node) {
3868 i40e_add_del_fdir(vsi, filter, true);
3869 }
3870 }
3871
3872 /**
3873 * i40e_vsi_configure - Set up the VSI for action
3874 * @vsi: the VSI being configured
3875 **/
i40e_vsi_configure(struct i40e_vsi * vsi)3876 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3877 {
3878 int err;
3879
3880 i40e_set_vsi_rx_mode(vsi);
3881 i40e_restore_vlan(vsi);
3882 i40e_vsi_config_dcb_rings(vsi);
3883 err = i40e_vsi_configure_tx(vsi);
3884 if (!err)
3885 err = i40e_vsi_configure_rx(vsi);
3886
3887 return err;
3888 }
3889
3890 /**
3891 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3892 * @vsi: the VSI being configured
3893 **/
i40e_vsi_configure_msix(struct i40e_vsi * vsi)3894 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3895 {
3896 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3897 struct i40e_pf *pf = vsi->back;
3898 struct i40e_hw *hw = &pf->hw;
3899 u16 vector;
3900 int i, q;
3901 u32 qp;
3902
3903 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3904 * and PFINT_LNKLSTn registers, e.g.:
3905 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3906 */
3907 qp = vsi->base_queue;
3908 vector = vsi->base_vector;
3909 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3910 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3911
3912 q_vector->rx.next_update = jiffies + 1;
3913 q_vector->rx.target_itr =
3914 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3915 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3916 q_vector->rx.target_itr >> 1);
3917 q_vector->rx.current_itr = q_vector->rx.target_itr;
3918
3919 q_vector->tx.next_update = jiffies + 1;
3920 q_vector->tx.target_itr =
3921 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3922 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3923 q_vector->tx.target_itr >> 1);
3924 q_vector->tx.current_itr = q_vector->tx.target_itr;
3925
3926 /* Set ITR for software interrupts triggered after exiting
3927 * busy-loop polling.
3928 */
3929 wr32(hw, I40E_PFINT_ITRN(I40E_SW_ITR, vector - 1),
3930 I40E_ITR_20K);
3931
3932 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3933 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3934
3935 /* begin of linked list for RX queue assigned to this vector */
3936 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3937 for (q = 0; q < q_vector->num_ringpairs; q++) {
3938 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3939 u32 val;
3940
3941 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3942 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3943 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3944 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3945 (I40E_QUEUE_TYPE_TX <<
3946 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3947
3948 wr32(hw, I40E_QINT_RQCTL(qp), val);
3949
3950 if (has_xdp) {
3951 /* TX queue with next queue set to TX */
3952 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3953 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3954 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3955 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3956 (I40E_QUEUE_TYPE_TX <<
3957 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3958
3959 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3960 }
3961 /* TX queue with next RX or end of linked list */
3962 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3963 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3964 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3965 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3966 (I40E_QUEUE_TYPE_RX <<
3967 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3968
3969 /* Terminate the linked list */
3970 if (q == (q_vector->num_ringpairs - 1))
3971 val |= (I40E_QUEUE_END_OF_LIST <<
3972 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3973
3974 wr32(hw, I40E_QINT_TQCTL(qp), val);
3975 qp++;
3976 }
3977 }
3978
3979 i40e_flush(hw);
3980 }
3981
3982 /**
3983 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3984 * @pf: pointer to private device data structure
3985 **/
i40e_enable_misc_int_causes(struct i40e_pf * pf)3986 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3987 {
3988 struct i40e_hw *hw = &pf->hw;
3989 u32 val;
3990
3991 /* clear things first */
3992 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3993 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3994
3995 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3996 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3997 I40E_PFINT_ICR0_ENA_GRST_MASK |
3998 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3999 I40E_PFINT_ICR0_ENA_GPIO_MASK |
4000 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
4001 I40E_PFINT_ICR0_ENA_VFLR_MASK |
4002 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4003
4004 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
4005 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4006
4007 if (pf->flags & I40E_FLAG_PTP)
4008 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4009
4010 wr32(hw, I40E_PFINT_ICR0_ENA, val);
4011
4012 /* SW_ITR_IDX = 0, but don't change INTENA */
4013 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
4014 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
4015
4016 /* OTHER_ITR_IDX = 0 */
4017 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
4018 }
4019
4020 /**
4021 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
4022 * @vsi: the VSI being configured
4023 **/
i40e_configure_msi_and_legacy(struct i40e_vsi * vsi)4024 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
4025 {
4026 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
4027 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4028 struct i40e_pf *pf = vsi->back;
4029 struct i40e_hw *hw = &pf->hw;
4030
4031 /* set the ITR configuration */
4032 q_vector->rx.next_update = jiffies + 1;
4033 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
4034 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
4035 q_vector->rx.current_itr = q_vector->rx.target_itr;
4036 q_vector->tx.next_update = jiffies + 1;
4037 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
4038 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
4039 q_vector->tx.current_itr = q_vector->tx.target_itr;
4040
4041 i40e_enable_misc_int_causes(pf);
4042
4043 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
4044 wr32(hw, I40E_PFINT_LNKLST0, 0);
4045
4046 /* Associate the queue pair to the vector and enable the queue
4047 * interrupt RX queue in linked list with next queue set to TX
4048 */
4049 wr32(hw, I40E_QINT_RQCTL(0), I40E_QINT_RQCTL_VAL(nextqp, 0, TX));
4050
4051 if (i40e_enabled_xdp_vsi(vsi)) {
4052 /* TX queue in linked list with next queue set to TX */
4053 wr32(hw, I40E_QINT_TQCTL(nextqp),
4054 I40E_QINT_TQCTL_VAL(nextqp, 0, TX));
4055 }
4056
4057 /* last TX queue so the next RX queue doesn't matter */
4058 wr32(hw, I40E_QINT_TQCTL(0),
4059 I40E_QINT_TQCTL_VAL(I40E_QUEUE_END_OF_LIST, 0, RX));
4060 i40e_flush(hw);
4061 }
4062
4063 /**
4064 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
4065 * @pf: board private structure
4066 **/
i40e_irq_dynamic_disable_icr0(struct i40e_pf * pf)4067 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
4068 {
4069 struct i40e_hw *hw = &pf->hw;
4070
4071 wr32(hw, I40E_PFINT_DYN_CTL0,
4072 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
4073 i40e_flush(hw);
4074 }
4075
4076 /**
4077 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
4078 * @pf: board private structure
4079 **/
i40e_irq_dynamic_enable_icr0(struct i40e_pf * pf)4080 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
4081 {
4082 struct i40e_hw *hw = &pf->hw;
4083 u32 val;
4084
4085 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
4086 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
4087 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
4088
4089 wr32(hw, I40E_PFINT_DYN_CTL0, val);
4090 i40e_flush(hw);
4091 }
4092
4093 /**
4094 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
4095 * @irq: interrupt number
4096 * @data: pointer to a q_vector
4097 **/
i40e_msix_clean_rings(int irq,void * data)4098 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
4099 {
4100 struct i40e_q_vector *q_vector = data;
4101
4102 if (!q_vector->tx.ring && !q_vector->rx.ring)
4103 return IRQ_HANDLED;
4104
4105 napi_schedule_irqoff(&q_vector->napi);
4106
4107 return IRQ_HANDLED;
4108 }
4109
4110 /**
4111 * i40e_irq_affinity_notify - Callback for affinity changes
4112 * @notify: context as to what irq was changed
4113 * @mask: the new affinity mask
4114 *
4115 * This is a callback function used by the irq_set_affinity_notifier function
4116 * so that we may register to receive changes to the irq affinity masks.
4117 **/
i40e_irq_affinity_notify(struct irq_affinity_notify * notify,const cpumask_t * mask)4118 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
4119 const cpumask_t *mask)
4120 {
4121 struct i40e_q_vector *q_vector =
4122 container_of(notify, struct i40e_q_vector, affinity_notify);
4123
4124 cpumask_copy(&q_vector->affinity_mask, mask);
4125 }
4126
4127 /**
4128 * i40e_irq_affinity_release - Callback for affinity notifier release
4129 * @ref: internal core kernel usage
4130 *
4131 * This is a callback function used by the irq_set_affinity_notifier function
4132 * to inform the current notification subscriber that they will no longer
4133 * receive notifications.
4134 **/
i40e_irq_affinity_release(struct kref * ref)4135 static void i40e_irq_affinity_release(struct kref *ref) {}
4136
4137 /**
4138 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
4139 * @vsi: the VSI being configured
4140 * @basename: name for the vector
4141 *
4142 * Allocates MSI-X vectors and requests interrupts from the kernel.
4143 **/
i40e_vsi_request_irq_msix(struct i40e_vsi * vsi,char * basename)4144 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
4145 {
4146 int q_vectors = vsi->num_q_vectors;
4147 struct i40e_pf *pf = vsi->back;
4148 int base = vsi->base_vector;
4149 int rx_int_idx = 0;
4150 int tx_int_idx = 0;
4151 int vector, err;
4152 int irq_num;
4153 int cpu;
4154
4155 for (vector = 0; vector < q_vectors; vector++) {
4156 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
4157
4158 irq_num = pf->msix_entries[base + vector].vector;
4159
4160 if (q_vector->tx.ring && q_vector->rx.ring) {
4161 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4162 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
4163 tx_int_idx++;
4164 } else if (q_vector->rx.ring) {
4165 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4166 "%s-%s-%d", basename, "rx", rx_int_idx++);
4167 } else if (q_vector->tx.ring) {
4168 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4169 "%s-%s-%d", basename, "tx", tx_int_idx++);
4170 } else {
4171 /* skip this unused q_vector */
4172 continue;
4173 }
4174 err = request_irq(irq_num,
4175 vsi->irq_handler,
4176 0,
4177 q_vector->name,
4178 q_vector);
4179 if (err) {
4180 dev_info(&pf->pdev->dev,
4181 "MSIX request_irq failed, error: %d\n", err);
4182 goto free_queue_irqs;
4183 }
4184
4185 /* register for affinity change notifications */
4186 q_vector->irq_num = irq_num;
4187 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
4188 q_vector->affinity_notify.release = i40e_irq_affinity_release;
4189 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
4190 /* Spread affinity hints out across online CPUs.
4191 *
4192 * get_cpu_mask returns a static constant mask with
4193 * a permanent lifetime so it's ok to pass to
4194 * irq_update_affinity_hint without making a copy.
4195 */
4196 cpu = cpumask_local_spread(q_vector->v_idx, -1);
4197 irq_update_affinity_hint(irq_num, get_cpu_mask(cpu));
4198 }
4199
4200 vsi->irqs_ready = true;
4201 return 0;
4202
4203 free_queue_irqs:
4204 while (vector) {
4205 vector--;
4206 irq_num = pf->msix_entries[base + vector].vector;
4207 irq_set_affinity_notifier(irq_num, NULL);
4208 irq_update_affinity_hint(irq_num, NULL);
4209 free_irq(irq_num, &vsi->q_vectors[vector]);
4210 }
4211 return err;
4212 }
4213
4214 /**
4215 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
4216 * @vsi: the VSI being un-configured
4217 **/
i40e_vsi_disable_irq(struct i40e_vsi * vsi)4218 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
4219 {
4220 struct i40e_pf *pf = vsi->back;
4221 struct i40e_hw *hw = &pf->hw;
4222 int base = vsi->base_vector;
4223 int i;
4224
4225 /* disable interrupt causation from each queue */
4226 for (i = 0; i < vsi->num_queue_pairs; i++) {
4227 u32 val;
4228
4229 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
4230 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
4231 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
4232
4233 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
4234 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
4235 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
4236
4237 if (!i40e_enabled_xdp_vsi(vsi))
4238 continue;
4239 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
4240 }
4241
4242 /* disable each interrupt */
4243 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4244 for (i = vsi->base_vector;
4245 i < (vsi->num_q_vectors + vsi->base_vector); i++)
4246 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
4247
4248 i40e_flush(hw);
4249 for (i = 0; i < vsi->num_q_vectors; i++)
4250 synchronize_irq(pf->msix_entries[i + base].vector);
4251 } else {
4252 /* Legacy and MSI mode - this stops all interrupt handling */
4253 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
4254 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
4255 i40e_flush(hw);
4256 synchronize_irq(pf->pdev->irq);
4257 }
4258 }
4259
4260 /**
4261 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
4262 * @vsi: the VSI being configured
4263 **/
i40e_vsi_enable_irq(struct i40e_vsi * vsi)4264 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
4265 {
4266 struct i40e_pf *pf = vsi->back;
4267 int i;
4268
4269 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4270 for (i = 0; i < vsi->num_q_vectors; i++)
4271 i40e_irq_dynamic_enable(vsi, i);
4272 } else {
4273 i40e_irq_dynamic_enable_icr0(pf);
4274 }
4275
4276 i40e_flush(&pf->hw);
4277 return 0;
4278 }
4279
4280 /**
4281 * i40e_free_misc_vector - Free the vector that handles non-queue events
4282 * @pf: board private structure
4283 **/
i40e_free_misc_vector(struct i40e_pf * pf)4284 static void i40e_free_misc_vector(struct i40e_pf *pf)
4285 {
4286 /* Disable ICR 0 */
4287 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4288 i40e_flush(&pf->hw);
4289
4290 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4291 free_irq(pf->msix_entries[0].vector, pf);
4292 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
4293 }
4294 }
4295
4296 /**
4297 * i40e_intr - MSI/Legacy and non-queue interrupt handler
4298 * @irq: interrupt number
4299 * @data: pointer to a q_vector
4300 *
4301 * This is the handler used for all MSI/Legacy interrupts, and deals
4302 * with both queue and non-queue interrupts. This is also used in
4303 * MSIX mode to handle the non-queue interrupts.
4304 **/
i40e_intr(int irq,void * data)4305 static irqreturn_t i40e_intr(int irq, void *data)
4306 {
4307 struct i40e_pf *pf = (struct i40e_pf *)data;
4308 struct i40e_hw *hw = &pf->hw;
4309 irqreturn_t ret = IRQ_NONE;
4310 u32 icr0, icr0_remaining;
4311 u32 val, ena_mask;
4312
4313 icr0 = rd32(hw, I40E_PFINT_ICR0);
4314 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
4315
4316 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4317 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4318 goto enable_intr;
4319
4320 /* if interrupt but no bits showing, must be SWINT */
4321 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4322 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4323 pf->sw_int_count++;
4324
4325 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4326 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4327 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4328 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4329 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4330 }
4331
4332 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4333 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4334 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4335 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4336
4337 /* We do not have a way to disarm Queue causes while leaving
4338 * interrupt enabled for all other causes, ideally
4339 * interrupt should be disabled while we are in NAPI but
4340 * this is not a performance path and napi_schedule()
4341 * can deal with rescheduling.
4342 */
4343 if (!test_bit(__I40E_DOWN, pf->state))
4344 napi_schedule_irqoff(&q_vector->napi);
4345 }
4346
4347 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4348 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4349 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4350 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4351 }
4352
4353 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4354 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4355 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4356 }
4357
4358 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4359 /* disable any further VFLR event notifications */
4360 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4361 u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4362
4363 reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4364 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4365 } else {
4366 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4367 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4368 }
4369 }
4370
4371 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4372 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4373 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4374 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4375 val = rd32(hw, I40E_GLGEN_RSTAT);
4376 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4377 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4378 if (val == I40E_RESET_CORER) {
4379 pf->corer_count++;
4380 } else if (val == I40E_RESET_GLOBR) {
4381 pf->globr_count++;
4382 } else if (val == I40E_RESET_EMPR) {
4383 pf->empr_count++;
4384 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4385 }
4386 }
4387
4388 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4389 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4390 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4391 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4392 rd32(hw, I40E_PFHMC_ERRORINFO),
4393 rd32(hw, I40E_PFHMC_ERRORDATA));
4394 }
4395
4396 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4397 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4398
4399 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4400 schedule_work(&pf->ptp_extts0_work);
4401
4402 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4403 i40e_ptp_tx_hwtstamp(pf);
4404
4405 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4406 }
4407
4408 /* If a critical error is pending we have no choice but to reset the
4409 * device.
4410 * Report and mask out any remaining unexpected interrupts.
4411 */
4412 icr0_remaining = icr0 & ena_mask;
4413 if (icr0_remaining) {
4414 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4415 icr0_remaining);
4416 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4417 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4418 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4419 dev_info(&pf->pdev->dev, "device will be reset\n");
4420 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4421 i40e_service_event_schedule(pf);
4422 }
4423 ena_mask &= ~icr0_remaining;
4424 }
4425 ret = IRQ_HANDLED;
4426
4427 enable_intr:
4428 /* re-enable interrupt causes */
4429 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4430 if (!test_bit(__I40E_DOWN, pf->state) ||
4431 test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4432 i40e_service_event_schedule(pf);
4433 i40e_irq_dynamic_enable_icr0(pf);
4434 }
4435
4436 return ret;
4437 }
4438
4439 /**
4440 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4441 * @tx_ring: tx ring to clean
4442 * @budget: how many cleans we're allowed
4443 *
4444 * Returns true if there's any budget left (e.g. the clean is finished)
4445 **/
i40e_clean_fdir_tx_irq(struct i40e_ring * tx_ring,int budget)4446 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4447 {
4448 struct i40e_vsi *vsi = tx_ring->vsi;
4449 u16 i = tx_ring->next_to_clean;
4450 struct i40e_tx_buffer *tx_buf;
4451 struct i40e_tx_desc *tx_desc;
4452
4453 tx_buf = &tx_ring->tx_bi[i];
4454 tx_desc = I40E_TX_DESC(tx_ring, i);
4455 i -= tx_ring->count;
4456
4457 do {
4458 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4459
4460 /* if next_to_watch is not set then there is no work pending */
4461 if (!eop_desc)
4462 break;
4463
4464 /* prevent any other reads prior to eop_desc */
4465 smp_rmb();
4466
4467 /* if the descriptor isn't done, no work yet to do */
4468 if (!(eop_desc->cmd_type_offset_bsz &
4469 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4470 break;
4471
4472 /* clear next_to_watch to prevent false hangs */
4473 tx_buf->next_to_watch = NULL;
4474
4475 tx_desc->buffer_addr = 0;
4476 tx_desc->cmd_type_offset_bsz = 0;
4477 /* move past filter desc */
4478 tx_buf++;
4479 tx_desc++;
4480 i++;
4481 if (unlikely(!i)) {
4482 i -= tx_ring->count;
4483 tx_buf = tx_ring->tx_bi;
4484 tx_desc = I40E_TX_DESC(tx_ring, 0);
4485 }
4486 /* unmap skb header data */
4487 dma_unmap_single(tx_ring->dev,
4488 dma_unmap_addr(tx_buf, dma),
4489 dma_unmap_len(tx_buf, len),
4490 DMA_TO_DEVICE);
4491 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4492 kfree(tx_buf->raw_buf);
4493
4494 tx_buf->raw_buf = NULL;
4495 tx_buf->tx_flags = 0;
4496 tx_buf->next_to_watch = NULL;
4497 dma_unmap_len_set(tx_buf, len, 0);
4498 tx_desc->buffer_addr = 0;
4499 tx_desc->cmd_type_offset_bsz = 0;
4500
4501 /* move us past the eop_desc for start of next FD desc */
4502 tx_buf++;
4503 tx_desc++;
4504 i++;
4505 if (unlikely(!i)) {
4506 i -= tx_ring->count;
4507 tx_buf = tx_ring->tx_bi;
4508 tx_desc = I40E_TX_DESC(tx_ring, 0);
4509 }
4510
4511 /* update budget accounting */
4512 budget--;
4513 } while (likely(budget));
4514
4515 i += tx_ring->count;
4516 tx_ring->next_to_clean = i;
4517
4518 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4519 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4520
4521 return budget > 0;
4522 }
4523
4524 /**
4525 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4526 * @irq: interrupt number
4527 * @data: pointer to a q_vector
4528 **/
i40e_fdir_clean_ring(int irq,void * data)4529 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4530 {
4531 struct i40e_q_vector *q_vector = data;
4532 struct i40e_vsi *vsi;
4533
4534 if (!q_vector->tx.ring)
4535 return IRQ_HANDLED;
4536
4537 vsi = q_vector->tx.ring->vsi;
4538 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4539
4540 return IRQ_HANDLED;
4541 }
4542
4543 /**
4544 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4545 * @vsi: the VSI being configured
4546 * @v_idx: vector index
4547 * @qp_idx: queue pair index
4548 **/
i40e_map_vector_to_qp(struct i40e_vsi * vsi,int v_idx,int qp_idx)4549 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4550 {
4551 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4552 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4553 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4554
4555 tx_ring->q_vector = q_vector;
4556 tx_ring->next = q_vector->tx.ring;
4557 q_vector->tx.ring = tx_ring;
4558 q_vector->tx.count++;
4559
4560 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4561 if (i40e_enabled_xdp_vsi(vsi)) {
4562 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4563
4564 xdp_ring->q_vector = q_vector;
4565 xdp_ring->next = q_vector->tx.ring;
4566 q_vector->tx.ring = xdp_ring;
4567 q_vector->tx.count++;
4568 }
4569
4570 rx_ring->q_vector = q_vector;
4571 rx_ring->next = q_vector->rx.ring;
4572 q_vector->rx.ring = rx_ring;
4573 q_vector->rx.count++;
4574 }
4575
4576 /**
4577 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4578 * @vsi: the VSI being configured
4579 *
4580 * This function maps descriptor rings to the queue-specific vectors
4581 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4582 * one vector per queue pair, but on a constrained vector budget, we
4583 * group the queue pairs as "efficiently" as possible.
4584 **/
i40e_vsi_map_rings_to_vectors(struct i40e_vsi * vsi)4585 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4586 {
4587 int qp_remaining = vsi->num_queue_pairs;
4588 int q_vectors = vsi->num_q_vectors;
4589 int num_ringpairs;
4590 int v_start = 0;
4591 int qp_idx = 0;
4592
4593 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4594 * group them so there are multiple queues per vector.
4595 * It is also important to go through all the vectors available to be
4596 * sure that if we don't use all the vectors, that the remaining vectors
4597 * are cleared. This is especially important when decreasing the
4598 * number of queues in use.
4599 */
4600 for (; v_start < q_vectors; v_start++) {
4601 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4602
4603 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4604
4605 q_vector->num_ringpairs = num_ringpairs;
4606 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4607
4608 q_vector->rx.count = 0;
4609 q_vector->tx.count = 0;
4610 q_vector->rx.ring = NULL;
4611 q_vector->tx.ring = NULL;
4612
4613 while (num_ringpairs--) {
4614 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4615 qp_idx++;
4616 qp_remaining--;
4617 }
4618 }
4619 }
4620
4621 /**
4622 * i40e_vsi_request_irq - Request IRQ from the OS
4623 * @vsi: the VSI being configured
4624 * @basename: name for the vector
4625 **/
i40e_vsi_request_irq(struct i40e_vsi * vsi,char * basename)4626 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4627 {
4628 struct i40e_pf *pf = vsi->back;
4629 int err;
4630
4631 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4632 err = i40e_vsi_request_irq_msix(vsi, basename);
4633 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4634 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4635 pf->int_name, pf);
4636 else
4637 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4638 pf->int_name, pf);
4639
4640 if (err)
4641 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4642
4643 return err;
4644 }
4645
4646 #ifdef CONFIG_NET_POLL_CONTROLLER
4647 /**
4648 * i40e_netpoll - A Polling 'interrupt' handler
4649 * @netdev: network interface device structure
4650 *
4651 * This is used by netconsole to send skbs without having to re-enable
4652 * interrupts. It's not called while the normal interrupt routine is executing.
4653 **/
i40e_netpoll(struct net_device * netdev)4654 static void i40e_netpoll(struct net_device *netdev)
4655 {
4656 struct i40e_netdev_priv *np = netdev_priv(netdev);
4657 struct i40e_vsi *vsi = np->vsi;
4658 struct i40e_pf *pf = vsi->back;
4659 int i;
4660
4661 /* if interface is down do nothing */
4662 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4663 return;
4664
4665 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4666 for (i = 0; i < vsi->num_q_vectors; i++)
4667 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4668 } else {
4669 i40e_intr(pf->pdev->irq, netdev);
4670 }
4671 }
4672 #endif
4673
4674 #define I40E_QTX_ENA_WAIT_COUNT 50
4675
4676 /**
4677 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4678 * @pf: the PF being configured
4679 * @pf_q: the PF queue
4680 * @enable: enable or disable state of the queue
4681 *
4682 * This routine will wait for the given Tx queue of the PF to reach the
4683 * enabled or disabled state.
4684 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4685 * multiple retries; else will return 0 in case of success.
4686 **/
i40e_pf_txq_wait(struct i40e_pf * pf,int pf_q,bool enable)4687 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4688 {
4689 int i;
4690 u32 tx_reg;
4691
4692 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4693 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4694 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4695 break;
4696
4697 usleep_range(10, 20);
4698 }
4699 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4700 return -ETIMEDOUT;
4701
4702 return 0;
4703 }
4704
4705 /**
4706 * i40e_control_tx_q - Start or stop a particular Tx queue
4707 * @pf: the PF structure
4708 * @pf_q: the PF queue to configure
4709 * @enable: start or stop the queue
4710 *
4711 * This function enables or disables a single queue. Note that any delay
4712 * required after the operation is expected to be handled by the caller of
4713 * this function.
4714 **/
i40e_control_tx_q(struct i40e_pf * pf,int pf_q,bool enable)4715 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4716 {
4717 struct i40e_hw *hw = &pf->hw;
4718 u32 tx_reg;
4719 int i;
4720
4721 /* warn the TX unit of coming changes */
4722 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4723 if (!enable)
4724 usleep_range(10, 20);
4725
4726 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4727 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4728 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4729 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4730 break;
4731 usleep_range(1000, 2000);
4732 }
4733
4734 /* Skip if the queue is already in the requested state */
4735 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4736 return;
4737
4738 /* turn on/off the queue */
4739 if (enable) {
4740 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4741 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4742 } else {
4743 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4744 }
4745
4746 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4747 }
4748
4749 /**
4750 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4751 * @seid: VSI SEID
4752 * @pf: the PF structure
4753 * @pf_q: the PF queue to configure
4754 * @is_xdp: true if the queue is used for XDP
4755 * @enable: start or stop the queue
4756 **/
i40e_control_wait_tx_q(int seid,struct i40e_pf * pf,int pf_q,bool is_xdp,bool enable)4757 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4758 bool is_xdp, bool enable)
4759 {
4760 int ret;
4761
4762 i40e_control_tx_q(pf, pf_q, enable);
4763
4764 /* wait for the change to finish */
4765 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4766 if (ret) {
4767 dev_info(&pf->pdev->dev,
4768 "VSI seid %d %sTx ring %d %sable timeout\n",
4769 seid, (is_xdp ? "XDP " : ""), pf_q,
4770 (enable ? "en" : "dis"));
4771 }
4772
4773 return ret;
4774 }
4775
4776 /**
4777 * i40e_vsi_enable_tx - Start a VSI's rings
4778 * @vsi: the VSI being configured
4779 **/
i40e_vsi_enable_tx(struct i40e_vsi * vsi)4780 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4781 {
4782 struct i40e_pf *pf = vsi->back;
4783 int i, pf_q, ret = 0;
4784
4785 pf_q = vsi->base_queue;
4786 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4787 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4788 pf_q,
4789 false /*is xdp*/, true);
4790 if (ret)
4791 break;
4792
4793 if (!i40e_enabled_xdp_vsi(vsi))
4794 continue;
4795
4796 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4797 pf_q + vsi->alloc_queue_pairs,
4798 true /*is xdp*/, true);
4799 if (ret)
4800 break;
4801 }
4802 return ret;
4803 }
4804
4805 /**
4806 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4807 * @pf: the PF being configured
4808 * @pf_q: the PF queue
4809 * @enable: enable or disable state of the queue
4810 *
4811 * This routine will wait for the given Rx queue of the PF to reach the
4812 * enabled or disabled state.
4813 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4814 * multiple retries; else will return 0 in case of success.
4815 **/
i40e_pf_rxq_wait(struct i40e_pf * pf,int pf_q,bool enable)4816 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4817 {
4818 int i;
4819 u32 rx_reg;
4820
4821 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4822 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4823 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4824 break;
4825
4826 usleep_range(10, 20);
4827 }
4828 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4829 return -ETIMEDOUT;
4830
4831 return 0;
4832 }
4833
4834 /**
4835 * i40e_control_rx_q - Start or stop a particular Rx queue
4836 * @pf: the PF structure
4837 * @pf_q: the PF queue to configure
4838 * @enable: start or stop the queue
4839 *
4840 * This function enables or disables a single queue. Note that
4841 * any delay required after the operation is expected to be
4842 * handled by the caller of this function.
4843 **/
i40e_control_rx_q(struct i40e_pf * pf,int pf_q,bool enable)4844 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4845 {
4846 struct i40e_hw *hw = &pf->hw;
4847 u32 rx_reg;
4848 int i;
4849
4850 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4851 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4852 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4853 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4854 break;
4855 usleep_range(1000, 2000);
4856 }
4857
4858 /* Skip if the queue is already in the requested state */
4859 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4860 return;
4861
4862 /* turn on/off the queue */
4863 if (enable)
4864 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4865 else
4866 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4867
4868 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4869 }
4870
4871 /**
4872 * i40e_control_wait_rx_q
4873 * @pf: the PF structure
4874 * @pf_q: queue being configured
4875 * @enable: start or stop the rings
4876 *
4877 * This function enables or disables a single queue along with waiting
4878 * for the change to finish. The caller of this function should handle
4879 * the delays needed in the case of disabling queues.
4880 **/
i40e_control_wait_rx_q(struct i40e_pf * pf,int pf_q,bool enable)4881 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4882 {
4883 int ret = 0;
4884
4885 i40e_control_rx_q(pf, pf_q, enable);
4886
4887 /* wait for the change to finish */
4888 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4889 if (ret)
4890 return ret;
4891
4892 return ret;
4893 }
4894
4895 /**
4896 * i40e_vsi_enable_rx - Start a VSI's rings
4897 * @vsi: the VSI being configured
4898 **/
i40e_vsi_enable_rx(struct i40e_vsi * vsi)4899 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4900 {
4901 struct i40e_pf *pf = vsi->back;
4902 int i, pf_q, ret = 0;
4903
4904 pf_q = vsi->base_queue;
4905 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4906 ret = i40e_control_wait_rx_q(pf, pf_q, true);
4907 if (ret) {
4908 dev_info(&pf->pdev->dev,
4909 "VSI seid %d Rx ring %d enable timeout\n",
4910 vsi->seid, pf_q);
4911 break;
4912 }
4913 }
4914
4915 return ret;
4916 }
4917
4918 /**
4919 * i40e_vsi_start_rings - Start a VSI's rings
4920 * @vsi: the VSI being configured
4921 **/
i40e_vsi_start_rings(struct i40e_vsi * vsi)4922 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4923 {
4924 int ret = 0;
4925
4926 /* do rx first for enable and last for disable */
4927 ret = i40e_vsi_enable_rx(vsi);
4928 if (ret)
4929 return ret;
4930 ret = i40e_vsi_enable_tx(vsi);
4931
4932 return ret;
4933 }
4934
4935 #define I40E_DISABLE_TX_GAP_MSEC 50
4936
4937 /**
4938 * i40e_vsi_stop_rings - Stop a VSI's rings
4939 * @vsi: the VSI being configured
4940 **/
i40e_vsi_stop_rings(struct i40e_vsi * vsi)4941 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4942 {
4943 struct i40e_pf *pf = vsi->back;
4944 int pf_q, err, q_end;
4945
4946 /* When port TX is suspended, don't wait */
4947 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4948 return i40e_vsi_stop_rings_no_wait(vsi);
4949
4950 q_end = vsi->base_queue + vsi->num_queue_pairs;
4951 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4952 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false);
4953
4954 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) {
4955 err = i40e_control_wait_rx_q(pf, pf_q, false);
4956 if (err)
4957 dev_info(&pf->pdev->dev,
4958 "VSI seid %d Rx ring %d disable timeout\n",
4959 vsi->seid, pf_q);
4960 }
4961
4962 msleep(I40E_DISABLE_TX_GAP_MSEC);
4963 pf_q = vsi->base_queue;
4964 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4965 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4966
4967 i40e_vsi_wait_queues_disabled(vsi);
4968 }
4969
4970 /**
4971 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4972 * @vsi: the VSI being shutdown
4973 *
4974 * This function stops all the rings for a VSI but does not delay to verify
4975 * that rings have been disabled. It is expected that the caller is shutting
4976 * down multiple VSIs at once and will delay together for all the VSIs after
4977 * initiating the shutdown. This is particularly useful for shutting down lots
4978 * of VFs together. Otherwise, a large delay can be incurred while configuring
4979 * each VSI in serial.
4980 **/
i40e_vsi_stop_rings_no_wait(struct i40e_vsi * vsi)4981 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4982 {
4983 struct i40e_pf *pf = vsi->back;
4984 int i, pf_q;
4985
4986 pf_q = vsi->base_queue;
4987 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4988 i40e_control_tx_q(pf, pf_q, false);
4989 i40e_control_rx_q(pf, pf_q, false);
4990 }
4991 }
4992
4993 /**
4994 * i40e_vsi_free_irq - Free the irq association with the OS
4995 * @vsi: the VSI being configured
4996 **/
i40e_vsi_free_irq(struct i40e_vsi * vsi)4997 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4998 {
4999 struct i40e_pf *pf = vsi->back;
5000 struct i40e_hw *hw = &pf->hw;
5001 int base = vsi->base_vector;
5002 u32 val, qp;
5003 int i;
5004
5005 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
5006 if (!vsi->q_vectors)
5007 return;
5008
5009 if (!vsi->irqs_ready)
5010 return;
5011
5012 vsi->irqs_ready = false;
5013 for (i = 0; i < vsi->num_q_vectors; i++) {
5014 int irq_num;
5015 u16 vector;
5016
5017 vector = i + base;
5018 irq_num = pf->msix_entries[vector].vector;
5019
5020 /* free only the irqs that were actually requested */
5021 if (!vsi->q_vectors[i] ||
5022 !vsi->q_vectors[i]->num_ringpairs)
5023 continue;
5024
5025 /* clear the affinity notifier in the IRQ descriptor */
5026 irq_set_affinity_notifier(irq_num, NULL);
5027 /* remove our suggested affinity mask for this IRQ */
5028 irq_update_affinity_hint(irq_num, NULL);
5029 free_irq(irq_num, vsi->q_vectors[i]);
5030
5031 /* Tear down the interrupt queue link list
5032 *
5033 * We know that they come in pairs and always
5034 * the Rx first, then the Tx. To clear the
5035 * link list, stick the EOL value into the
5036 * next_q field of the registers.
5037 */
5038 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
5039 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
5040 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5041 val |= I40E_QUEUE_END_OF_LIST
5042 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5043 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
5044
5045 while (qp != I40E_QUEUE_END_OF_LIST) {
5046 u32 next;
5047
5048 val = rd32(hw, I40E_QINT_RQCTL(qp));
5049
5050 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
5051 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5052 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
5053 I40E_QINT_RQCTL_INTEVENT_MASK);
5054
5055 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5056 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5057
5058 wr32(hw, I40E_QINT_RQCTL(qp), val);
5059
5060 val = rd32(hw, I40E_QINT_TQCTL(qp));
5061
5062 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
5063 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
5064
5065 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
5066 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5067 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
5068 I40E_QINT_TQCTL_INTEVENT_MASK);
5069
5070 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5071 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5072
5073 wr32(hw, I40E_QINT_TQCTL(qp), val);
5074 qp = next;
5075 }
5076 }
5077 } else {
5078 free_irq(pf->pdev->irq, pf);
5079
5080 val = rd32(hw, I40E_PFINT_LNKLST0);
5081 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
5082 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5083 val |= I40E_QUEUE_END_OF_LIST
5084 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
5085 wr32(hw, I40E_PFINT_LNKLST0, val);
5086
5087 val = rd32(hw, I40E_QINT_RQCTL(qp));
5088 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
5089 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5090 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
5091 I40E_QINT_RQCTL_INTEVENT_MASK);
5092
5093 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5094 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5095
5096 wr32(hw, I40E_QINT_RQCTL(qp), val);
5097
5098 val = rd32(hw, I40E_QINT_TQCTL(qp));
5099
5100 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
5101 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5102 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
5103 I40E_QINT_TQCTL_INTEVENT_MASK);
5104
5105 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5106 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5107
5108 wr32(hw, I40E_QINT_TQCTL(qp), val);
5109 }
5110 }
5111
5112 /**
5113 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
5114 * @vsi: the VSI being configured
5115 * @v_idx: Index of vector to be freed
5116 *
5117 * This function frees the memory allocated to the q_vector. In addition if
5118 * NAPI is enabled it will delete any references to the NAPI struct prior
5119 * to freeing the q_vector.
5120 **/
i40e_free_q_vector(struct i40e_vsi * vsi,int v_idx)5121 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
5122 {
5123 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
5124 struct i40e_ring *ring;
5125
5126 if (!q_vector)
5127 return;
5128
5129 /* disassociate q_vector from rings */
5130 i40e_for_each_ring(ring, q_vector->tx)
5131 ring->q_vector = NULL;
5132
5133 i40e_for_each_ring(ring, q_vector->rx)
5134 ring->q_vector = NULL;
5135
5136 /* only VSI w/ an associated netdev is set up w/ NAPI */
5137 if (vsi->netdev)
5138 netif_napi_del(&q_vector->napi);
5139
5140 vsi->q_vectors[v_idx] = NULL;
5141
5142 kfree_rcu(q_vector, rcu);
5143 }
5144
5145 /**
5146 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
5147 * @vsi: the VSI being un-configured
5148 *
5149 * This frees the memory allocated to the q_vectors and
5150 * deletes references to the NAPI struct.
5151 **/
i40e_vsi_free_q_vectors(struct i40e_vsi * vsi)5152 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
5153 {
5154 int v_idx;
5155
5156 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
5157 i40e_free_q_vector(vsi, v_idx);
5158 }
5159
5160 /**
5161 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
5162 * @pf: board private structure
5163 **/
i40e_reset_interrupt_capability(struct i40e_pf * pf)5164 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
5165 {
5166 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
5167 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
5168 pci_disable_msix(pf->pdev);
5169 kfree(pf->msix_entries);
5170 pf->msix_entries = NULL;
5171 kfree(pf->irq_pile);
5172 pf->irq_pile = NULL;
5173 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
5174 pci_disable_msi(pf->pdev);
5175 }
5176 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
5177 }
5178
5179 /**
5180 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
5181 * @pf: board private structure
5182 *
5183 * We go through and clear interrupt specific resources and reset the structure
5184 * to pre-load conditions
5185 **/
i40e_clear_interrupt_scheme(struct i40e_pf * pf)5186 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5187 {
5188 int i;
5189
5190 if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5191 i40e_free_misc_vector(pf);
5192
5193 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
5194 I40E_IWARP_IRQ_PILE_ID);
5195
5196 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
5197 for (i = 0; i < pf->num_alloc_vsi; i++)
5198 if (pf->vsi[i])
5199 i40e_vsi_free_q_vectors(pf->vsi[i]);
5200 i40e_reset_interrupt_capability(pf);
5201 }
5202
5203 /**
5204 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
5205 * @vsi: the VSI being configured
5206 **/
i40e_napi_enable_all(struct i40e_vsi * vsi)5207 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
5208 {
5209 int q_idx;
5210
5211 if (!vsi->netdev)
5212 return;
5213
5214 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5215 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5216
5217 if (q_vector->rx.ring || q_vector->tx.ring)
5218 napi_enable(&q_vector->napi);
5219 }
5220 }
5221
5222 /**
5223 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
5224 * @vsi: the VSI being configured
5225 **/
i40e_napi_disable_all(struct i40e_vsi * vsi)5226 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
5227 {
5228 int q_idx;
5229
5230 if (!vsi->netdev)
5231 return;
5232
5233 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5234 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5235
5236 if (q_vector->rx.ring || q_vector->tx.ring)
5237 napi_disable(&q_vector->napi);
5238 }
5239 }
5240
5241 /**
5242 * i40e_vsi_close - Shut down a VSI
5243 * @vsi: the vsi to be quelled
5244 **/
i40e_vsi_close(struct i40e_vsi * vsi)5245 static void i40e_vsi_close(struct i40e_vsi *vsi)
5246 {
5247 struct i40e_pf *pf = vsi->back;
5248 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
5249 i40e_down(vsi);
5250 i40e_vsi_free_irq(vsi);
5251 i40e_vsi_free_tx_resources(vsi);
5252 i40e_vsi_free_rx_resources(vsi);
5253 vsi->current_netdev_flags = 0;
5254 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
5255 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5256 set_bit(__I40E_CLIENT_RESET, pf->state);
5257 }
5258
5259 /**
5260 * i40e_quiesce_vsi - Pause a given VSI
5261 * @vsi: the VSI being paused
5262 **/
i40e_quiesce_vsi(struct i40e_vsi * vsi)5263 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
5264 {
5265 if (test_bit(__I40E_VSI_DOWN, vsi->state))
5266 return;
5267
5268 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
5269 if (vsi->netdev && netif_running(vsi->netdev))
5270 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
5271 else
5272 i40e_vsi_close(vsi);
5273 }
5274
5275 /**
5276 * i40e_unquiesce_vsi - Resume a given VSI
5277 * @vsi: the VSI being resumed
5278 **/
i40e_unquiesce_vsi(struct i40e_vsi * vsi)5279 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
5280 {
5281 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
5282 return;
5283
5284 if (vsi->netdev && netif_running(vsi->netdev))
5285 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
5286 else
5287 i40e_vsi_open(vsi); /* this clears the DOWN bit */
5288 }
5289
5290 /**
5291 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
5292 * @pf: the PF
5293 **/
i40e_pf_quiesce_all_vsi(struct i40e_pf * pf)5294 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5295 {
5296 int v;
5297
5298 for (v = 0; v < pf->num_alloc_vsi; v++) {
5299 if (pf->vsi[v])
5300 i40e_quiesce_vsi(pf->vsi[v]);
5301 }
5302 }
5303
5304 /**
5305 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
5306 * @pf: the PF
5307 **/
i40e_pf_unquiesce_all_vsi(struct i40e_pf * pf)5308 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5309 {
5310 int v;
5311
5312 for (v = 0; v < pf->num_alloc_vsi; v++) {
5313 if (pf->vsi[v])
5314 i40e_unquiesce_vsi(pf->vsi[v]);
5315 }
5316 }
5317
5318 /**
5319 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5320 * @vsi: the VSI being configured
5321 *
5322 * Wait until all queues on a given VSI have been disabled.
5323 **/
i40e_vsi_wait_queues_disabled(struct i40e_vsi * vsi)5324 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5325 {
5326 struct i40e_pf *pf = vsi->back;
5327 int i, pf_q, ret;
5328
5329 pf_q = vsi->base_queue;
5330 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5331 /* Check and wait for the Tx queue */
5332 ret = i40e_pf_txq_wait(pf, pf_q, false);
5333 if (ret) {
5334 dev_info(&pf->pdev->dev,
5335 "VSI seid %d Tx ring %d disable timeout\n",
5336 vsi->seid, pf_q);
5337 return ret;
5338 }
5339
5340 if (!i40e_enabled_xdp_vsi(vsi))
5341 goto wait_rx;
5342
5343 /* Check and wait for the XDP Tx queue */
5344 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5345 false);
5346 if (ret) {
5347 dev_info(&pf->pdev->dev,
5348 "VSI seid %d XDP Tx ring %d disable timeout\n",
5349 vsi->seid, pf_q);
5350 return ret;
5351 }
5352 wait_rx:
5353 /* Check and wait for the Rx queue */
5354 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5355 if (ret) {
5356 dev_info(&pf->pdev->dev,
5357 "VSI seid %d Rx ring %d disable timeout\n",
5358 vsi->seid, pf_q);
5359 return ret;
5360 }
5361 }
5362
5363 return 0;
5364 }
5365
5366 #ifdef CONFIG_I40E_DCB
5367 /**
5368 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5369 * @pf: the PF
5370 *
5371 * This function waits for the queues to be in disabled state for all the
5372 * VSIs that are managed by this PF.
5373 **/
i40e_pf_wait_queues_disabled(struct i40e_pf * pf)5374 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5375 {
5376 int v, ret = 0;
5377
5378 for (v = 0; v < pf->num_alloc_vsi; v++) {
5379 if (pf->vsi[v]) {
5380 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5381 if (ret)
5382 break;
5383 }
5384 }
5385
5386 return ret;
5387 }
5388
5389 #endif
5390
5391 /**
5392 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5393 * @pf: pointer to PF
5394 *
5395 * Get TC map for ISCSI PF type that will include iSCSI TC
5396 * and LAN TC.
5397 **/
i40e_get_iscsi_tc_map(struct i40e_pf * pf)5398 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5399 {
5400 struct i40e_dcb_app_priority_table app;
5401 struct i40e_hw *hw = &pf->hw;
5402 u8 enabled_tc = 1; /* TC0 is always enabled */
5403 u8 tc, i;
5404 /* Get the iSCSI APP TLV */
5405 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5406
5407 for (i = 0; i < dcbcfg->numapps; i++) {
5408 app = dcbcfg->app[i];
5409 if (app.selector == I40E_APP_SEL_TCPIP &&
5410 app.protocolid == I40E_APP_PROTOID_ISCSI) {
5411 tc = dcbcfg->etscfg.prioritytable[app.priority];
5412 enabled_tc |= BIT(tc);
5413 break;
5414 }
5415 }
5416
5417 return enabled_tc;
5418 }
5419
5420 /**
5421 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5422 * @dcbcfg: the corresponding DCBx configuration structure
5423 *
5424 * Return the number of TCs from given DCBx configuration
5425 **/
i40e_dcb_get_num_tc(struct i40e_dcbx_config * dcbcfg)5426 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5427 {
5428 int i, tc_unused = 0;
5429 u8 num_tc = 0;
5430 u8 ret = 0;
5431
5432 /* Scan the ETS Config Priority Table to find
5433 * traffic class enabled for a given priority
5434 * and create a bitmask of enabled TCs
5435 */
5436 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5437 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5438
5439 /* Now scan the bitmask to check for
5440 * contiguous TCs starting with TC0
5441 */
5442 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5443 if (num_tc & BIT(i)) {
5444 if (!tc_unused) {
5445 ret++;
5446 } else {
5447 pr_err("Non-contiguous TC - Disabling DCB\n");
5448 return 1;
5449 }
5450 } else {
5451 tc_unused = 1;
5452 }
5453 }
5454
5455 /* There is always at least TC0 */
5456 if (!ret)
5457 ret = 1;
5458
5459 return ret;
5460 }
5461
5462 /**
5463 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5464 * @dcbcfg: the corresponding DCBx configuration structure
5465 *
5466 * Query the current DCB configuration and return the number of
5467 * traffic classes enabled from the given DCBX config
5468 **/
i40e_dcb_get_enabled_tc(struct i40e_dcbx_config * dcbcfg)5469 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5470 {
5471 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5472 u8 enabled_tc = 1;
5473 u8 i;
5474
5475 for (i = 0; i < num_tc; i++)
5476 enabled_tc |= BIT(i);
5477
5478 return enabled_tc;
5479 }
5480
5481 /**
5482 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5483 * @pf: PF being queried
5484 *
5485 * Query the current MQPRIO configuration and return the number of
5486 * traffic classes enabled.
5487 **/
i40e_mqprio_get_enabled_tc(struct i40e_pf * pf)5488 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5489 {
5490 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5491 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5492 u8 enabled_tc = 1, i;
5493
5494 for (i = 1; i < num_tc; i++)
5495 enabled_tc |= BIT(i);
5496 return enabled_tc;
5497 }
5498
5499 /**
5500 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5501 * @pf: PF being queried
5502 *
5503 * Return number of traffic classes enabled for the given PF
5504 **/
i40e_pf_get_num_tc(struct i40e_pf * pf)5505 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5506 {
5507 struct i40e_hw *hw = &pf->hw;
5508 u8 i, enabled_tc = 1;
5509 u8 num_tc = 0;
5510 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5511
5512 if (i40e_is_tc_mqprio_enabled(pf))
5513 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5514
5515 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5516 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5517 return 1;
5518
5519 /* SFP mode will be enabled for all TCs on port */
5520 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5521 return i40e_dcb_get_num_tc(dcbcfg);
5522
5523 /* MFP mode return count of enabled TCs for this PF */
5524 if (pf->hw.func_caps.iscsi)
5525 enabled_tc = i40e_get_iscsi_tc_map(pf);
5526 else
5527 return 1; /* Only TC0 */
5528
5529 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5530 if (enabled_tc & BIT(i))
5531 num_tc++;
5532 }
5533 return num_tc;
5534 }
5535
5536 /**
5537 * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5538 * @pf: PF being queried
5539 *
5540 * Return a bitmap for enabled traffic classes for this PF.
5541 **/
i40e_pf_get_tc_map(struct i40e_pf * pf)5542 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5543 {
5544 if (i40e_is_tc_mqprio_enabled(pf))
5545 return i40e_mqprio_get_enabled_tc(pf);
5546
5547 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5548 * default TC
5549 */
5550 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5551 return I40E_DEFAULT_TRAFFIC_CLASS;
5552
5553 /* SFP mode we want PF to be enabled for all TCs */
5554 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5555 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5556
5557 /* MFP enabled and iSCSI PF type */
5558 if (pf->hw.func_caps.iscsi)
5559 return i40e_get_iscsi_tc_map(pf);
5560 else
5561 return I40E_DEFAULT_TRAFFIC_CLASS;
5562 }
5563
5564 /**
5565 * i40e_vsi_get_bw_info - Query VSI BW Information
5566 * @vsi: the VSI being queried
5567 *
5568 * Returns 0 on success, negative value on failure
5569 **/
i40e_vsi_get_bw_info(struct i40e_vsi * vsi)5570 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5571 {
5572 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5573 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5574 struct i40e_pf *pf = vsi->back;
5575 struct i40e_hw *hw = &pf->hw;
5576 u32 tc_bw_max;
5577 int ret;
5578 int i;
5579
5580 /* Get the VSI level BW configuration */
5581 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5582 if (ret) {
5583 dev_info(&pf->pdev->dev,
5584 "couldn't get PF vsi bw config, err %pe aq_err %s\n",
5585 ERR_PTR(ret),
5586 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5587 return -EINVAL;
5588 }
5589
5590 /* Get the VSI level BW configuration per TC */
5591 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5592 NULL);
5593 if (ret) {
5594 dev_info(&pf->pdev->dev,
5595 "couldn't get PF vsi ets bw config, err %pe aq_err %s\n",
5596 ERR_PTR(ret),
5597 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5598 return -EINVAL;
5599 }
5600
5601 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5602 dev_info(&pf->pdev->dev,
5603 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5604 bw_config.tc_valid_bits,
5605 bw_ets_config.tc_valid_bits);
5606 /* Still continuing */
5607 }
5608
5609 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5610 vsi->bw_max_quanta = bw_config.max_bw;
5611 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5612 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5613 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5614 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5615 vsi->bw_ets_limit_credits[i] =
5616 le16_to_cpu(bw_ets_config.credits[i]);
5617 /* 3 bits out of 4 for each TC */
5618 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5619 }
5620
5621 return 0;
5622 }
5623
5624 /**
5625 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5626 * @vsi: the VSI being configured
5627 * @enabled_tc: TC bitmap
5628 * @bw_share: BW shared credits per TC
5629 *
5630 * Returns 0 on success, negative value on failure
5631 **/
i40e_vsi_configure_bw_alloc(struct i40e_vsi * vsi,u8 enabled_tc,u8 * bw_share)5632 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5633 u8 *bw_share)
5634 {
5635 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5636 struct i40e_pf *pf = vsi->back;
5637 int ret;
5638 int i;
5639
5640 /* There is no need to reset BW when mqprio mode is on. */
5641 if (i40e_is_tc_mqprio_enabled(pf))
5642 return 0;
5643 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5644 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5645 if (ret)
5646 dev_info(&pf->pdev->dev,
5647 "Failed to reset tx rate for vsi->seid %u\n",
5648 vsi->seid);
5649 return ret;
5650 }
5651 memset(&bw_data, 0, sizeof(bw_data));
5652 bw_data.tc_valid_bits = enabled_tc;
5653 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5654 bw_data.tc_bw_credits[i] = bw_share[i];
5655
5656 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5657 if (ret) {
5658 dev_info(&pf->pdev->dev,
5659 "AQ command Config VSI BW allocation per TC failed = %d\n",
5660 pf->hw.aq.asq_last_status);
5661 return -EINVAL;
5662 }
5663
5664 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5665 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5666
5667 return 0;
5668 }
5669
5670 /**
5671 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5672 * @vsi: the VSI being configured
5673 * @enabled_tc: TC map to be enabled
5674 *
5675 **/
i40e_vsi_config_netdev_tc(struct i40e_vsi * vsi,u8 enabled_tc)5676 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5677 {
5678 struct net_device *netdev = vsi->netdev;
5679 struct i40e_pf *pf = vsi->back;
5680 struct i40e_hw *hw = &pf->hw;
5681 u8 netdev_tc = 0;
5682 int i;
5683 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5684
5685 if (!netdev)
5686 return;
5687
5688 if (!enabled_tc) {
5689 netdev_reset_tc(netdev);
5690 return;
5691 }
5692
5693 /* Set up actual enabled TCs on the VSI */
5694 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5695 return;
5696
5697 /* set per TC queues for the VSI */
5698 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5699 /* Only set TC queues for enabled tcs
5700 *
5701 * e.g. For a VSI that has TC0 and TC3 enabled the
5702 * enabled_tc bitmap would be 0x00001001; the driver
5703 * will set the numtc for netdev as 2 that will be
5704 * referenced by the netdev layer as TC 0 and 1.
5705 */
5706 if (vsi->tc_config.enabled_tc & BIT(i))
5707 netdev_set_tc_queue(netdev,
5708 vsi->tc_config.tc_info[i].netdev_tc,
5709 vsi->tc_config.tc_info[i].qcount,
5710 vsi->tc_config.tc_info[i].qoffset);
5711 }
5712
5713 if (i40e_is_tc_mqprio_enabled(pf))
5714 return;
5715
5716 /* Assign UP2TC map for the VSI */
5717 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5718 /* Get the actual TC# for the UP */
5719 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5720 /* Get the mapped netdev TC# for the UP */
5721 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5722 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5723 }
5724 }
5725
5726 /**
5727 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5728 * @vsi: the VSI being configured
5729 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5730 **/
i40e_vsi_update_queue_map(struct i40e_vsi * vsi,struct i40e_vsi_context * ctxt)5731 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5732 struct i40e_vsi_context *ctxt)
5733 {
5734 /* copy just the sections touched not the entire info
5735 * since not all sections are valid as returned by
5736 * update vsi params
5737 */
5738 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5739 memcpy(&vsi->info.queue_mapping,
5740 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5741 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5742 sizeof(vsi->info.tc_mapping));
5743 }
5744
5745 /**
5746 * i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
5747 * @vsi: the VSI being reconfigured
5748 * @vsi_offset: offset from main VF VSI
5749 */
i40e_update_adq_vsi_queues(struct i40e_vsi * vsi,int vsi_offset)5750 int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
5751 {
5752 struct i40e_vsi_context ctxt = {};
5753 struct i40e_pf *pf;
5754 struct i40e_hw *hw;
5755 int ret;
5756
5757 if (!vsi)
5758 return -EINVAL;
5759 pf = vsi->back;
5760 hw = &pf->hw;
5761
5762 ctxt.seid = vsi->seid;
5763 ctxt.pf_num = hw->pf_id;
5764 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
5765 ctxt.uplink_seid = vsi->uplink_seid;
5766 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5767 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5768 ctxt.info = vsi->info;
5769
5770 i40e_vsi_setup_queue_map(vsi, &ctxt, vsi->tc_config.enabled_tc,
5771 false);
5772 if (vsi->reconfig_rss) {
5773 vsi->rss_size = min_t(int, pf->alloc_rss_size,
5774 vsi->num_queue_pairs);
5775 ret = i40e_vsi_config_rss(vsi);
5776 if (ret) {
5777 dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5778 return ret;
5779 }
5780 vsi->reconfig_rss = false;
5781 }
5782
5783 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5784 if (ret) {
5785 dev_info(&pf->pdev->dev, "Update vsi config failed, err %pe aq_err %s\n",
5786 ERR_PTR(ret),
5787 i40e_aq_str(hw, hw->aq.asq_last_status));
5788 return ret;
5789 }
5790 /* update the local VSI info with updated queue map */
5791 i40e_vsi_update_queue_map(vsi, &ctxt);
5792 vsi->info.valid_sections = 0;
5793
5794 return ret;
5795 }
5796
5797 /**
5798 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5799 * @vsi: VSI to be configured
5800 * @enabled_tc: TC bitmap
5801 *
5802 * This configures a particular VSI for TCs that are mapped to the
5803 * given TC bitmap. It uses default bandwidth share for TCs across
5804 * VSIs to configure TC for a particular VSI.
5805 *
5806 * NOTE:
5807 * It is expected that the VSI queues have been quisced before calling
5808 * this function.
5809 **/
i40e_vsi_config_tc(struct i40e_vsi * vsi,u8 enabled_tc)5810 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5811 {
5812 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5813 struct i40e_pf *pf = vsi->back;
5814 struct i40e_hw *hw = &pf->hw;
5815 struct i40e_vsi_context ctxt;
5816 int ret = 0;
5817 int i;
5818
5819 /* Check if enabled_tc is same as existing or new TCs */
5820 if (vsi->tc_config.enabled_tc == enabled_tc &&
5821 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5822 return ret;
5823
5824 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5825 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5826 if (enabled_tc & BIT(i))
5827 bw_share[i] = 1;
5828 }
5829
5830 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5831 if (ret) {
5832 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5833
5834 dev_info(&pf->pdev->dev,
5835 "Failed configuring TC map %d for VSI %d\n",
5836 enabled_tc, vsi->seid);
5837 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5838 &bw_config, NULL);
5839 if (ret) {
5840 dev_info(&pf->pdev->dev,
5841 "Failed querying vsi bw info, err %pe aq_err %s\n",
5842 ERR_PTR(ret),
5843 i40e_aq_str(hw, hw->aq.asq_last_status));
5844 goto out;
5845 }
5846 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5847 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5848
5849 if (!valid_tc)
5850 valid_tc = bw_config.tc_valid_bits;
5851 /* Always enable TC0, no matter what */
5852 valid_tc |= 1;
5853 dev_info(&pf->pdev->dev,
5854 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5855 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5856 enabled_tc = valid_tc;
5857 }
5858
5859 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5860 if (ret) {
5861 dev_err(&pf->pdev->dev,
5862 "Unable to configure TC map %d for VSI %d\n",
5863 enabled_tc, vsi->seid);
5864 goto out;
5865 }
5866 }
5867
5868 /* Update Queue Pairs Mapping for currently enabled UPs */
5869 ctxt.seid = vsi->seid;
5870 ctxt.pf_num = vsi->back->hw.pf_id;
5871 ctxt.vf_num = 0;
5872 ctxt.uplink_seid = vsi->uplink_seid;
5873 ctxt.info = vsi->info;
5874 if (i40e_is_tc_mqprio_enabled(pf)) {
5875 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5876 if (ret)
5877 goto out;
5878 } else {
5879 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5880 }
5881
5882 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5883 * queues changed.
5884 */
5885 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5886 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5887 vsi->num_queue_pairs);
5888 ret = i40e_vsi_config_rss(vsi);
5889 if (ret) {
5890 dev_info(&vsi->back->pdev->dev,
5891 "Failed to reconfig rss for num_queues\n");
5892 return ret;
5893 }
5894 vsi->reconfig_rss = false;
5895 }
5896 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5897 ctxt.info.valid_sections |=
5898 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5899 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5900 }
5901
5902 /* Update the VSI after updating the VSI queue-mapping
5903 * information
5904 */
5905 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5906 if (ret) {
5907 dev_info(&pf->pdev->dev,
5908 "Update vsi tc config failed, err %pe aq_err %s\n",
5909 ERR_PTR(ret),
5910 i40e_aq_str(hw, hw->aq.asq_last_status));
5911 goto out;
5912 }
5913 /* update the local VSI info with updated queue map */
5914 i40e_vsi_update_queue_map(vsi, &ctxt);
5915 vsi->info.valid_sections = 0;
5916
5917 /* Update current VSI BW information */
5918 ret = i40e_vsi_get_bw_info(vsi);
5919 if (ret) {
5920 dev_info(&pf->pdev->dev,
5921 "Failed updating vsi bw info, err %pe aq_err %s\n",
5922 ERR_PTR(ret),
5923 i40e_aq_str(hw, hw->aq.asq_last_status));
5924 goto out;
5925 }
5926
5927 /* Update the netdev TC setup */
5928 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5929 out:
5930 return ret;
5931 }
5932
5933 /**
5934 * i40e_get_link_speed - Returns link speed for the interface
5935 * @vsi: VSI to be configured
5936 *
5937 **/
i40e_get_link_speed(struct i40e_vsi * vsi)5938 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5939 {
5940 struct i40e_pf *pf = vsi->back;
5941
5942 switch (pf->hw.phy.link_info.link_speed) {
5943 case I40E_LINK_SPEED_40GB:
5944 return 40000;
5945 case I40E_LINK_SPEED_25GB:
5946 return 25000;
5947 case I40E_LINK_SPEED_20GB:
5948 return 20000;
5949 case I40E_LINK_SPEED_10GB:
5950 return 10000;
5951 case I40E_LINK_SPEED_1GB:
5952 return 1000;
5953 default:
5954 return -EINVAL;
5955 }
5956 }
5957
5958 /**
5959 * i40e_bw_bytes_to_mbits - Convert max_tx_rate from bytes to mbits
5960 * @vsi: Pointer to vsi structure
5961 * @max_tx_rate: max TX rate in bytes to be converted into Mbits
5962 *
5963 * Helper function to convert units before send to set BW limit
5964 **/
i40e_bw_bytes_to_mbits(struct i40e_vsi * vsi,u64 max_tx_rate)5965 static u64 i40e_bw_bytes_to_mbits(struct i40e_vsi *vsi, u64 max_tx_rate)
5966 {
5967 if (max_tx_rate < I40E_BW_MBPS_DIVISOR) {
5968 dev_warn(&vsi->back->pdev->dev,
5969 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5970 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
5971 } else {
5972 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
5973 }
5974
5975 return max_tx_rate;
5976 }
5977
5978 /**
5979 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5980 * @vsi: VSI to be configured
5981 * @seid: seid of the channel/VSI
5982 * @max_tx_rate: max TX rate to be configured as BW limit
5983 *
5984 * Helper function to set BW limit for a given VSI
5985 **/
i40e_set_bw_limit(struct i40e_vsi * vsi,u16 seid,u64 max_tx_rate)5986 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5987 {
5988 struct i40e_pf *pf = vsi->back;
5989 u64 credits = 0;
5990 int speed = 0;
5991 int ret = 0;
5992
5993 speed = i40e_get_link_speed(vsi);
5994 if (max_tx_rate > speed) {
5995 dev_err(&pf->pdev->dev,
5996 "Invalid max tx rate %llu specified for VSI seid %d.",
5997 max_tx_rate, seid);
5998 return -EINVAL;
5999 }
6000 if (max_tx_rate && max_tx_rate < I40E_BW_CREDIT_DIVISOR) {
6001 dev_warn(&pf->pdev->dev,
6002 "Setting max tx rate to minimum usable value of 50Mbps.\n");
6003 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
6004 }
6005
6006 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
6007 credits = max_tx_rate;
6008 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6009 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
6010 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
6011 if (ret)
6012 dev_err(&pf->pdev->dev,
6013 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %pe aq_err %s\n",
6014 max_tx_rate, seid, ERR_PTR(ret),
6015 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6016 return ret;
6017 }
6018
6019 /**
6020 * i40e_remove_queue_channels - Remove queue channels for the TCs
6021 * @vsi: VSI to be configured
6022 *
6023 * Remove queue channels for the TCs
6024 **/
i40e_remove_queue_channels(struct i40e_vsi * vsi)6025 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
6026 {
6027 enum i40e_admin_queue_err last_aq_status;
6028 struct i40e_cloud_filter *cfilter;
6029 struct i40e_channel *ch, *ch_tmp;
6030 struct i40e_pf *pf = vsi->back;
6031 struct hlist_node *node;
6032 int ret, i;
6033
6034 /* Reset rss size that was stored when reconfiguring rss for
6035 * channel VSIs with non-power-of-2 queue count.
6036 */
6037 vsi->current_rss_size = 0;
6038
6039 /* perform cleanup for channels if they exist */
6040 if (list_empty(&vsi->ch_list))
6041 return;
6042
6043 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6044 struct i40e_vsi *p_vsi;
6045
6046 list_del(&ch->list);
6047 p_vsi = ch->parent_vsi;
6048 if (!p_vsi || !ch->initialized) {
6049 kfree(ch);
6050 continue;
6051 }
6052 /* Reset queue contexts */
6053 for (i = 0; i < ch->num_queue_pairs; i++) {
6054 struct i40e_ring *tx_ring, *rx_ring;
6055 u16 pf_q;
6056
6057 pf_q = ch->base_queue + i;
6058 tx_ring = vsi->tx_rings[pf_q];
6059 tx_ring->ch = NULL;
6060
6061 rx_ring = vsi->rx_rings[pf_q];
6062 rx_ring->ch = NULL;
6063 }
6064
6065 /* Reset BW configured for this VSI via mqprio */
6066 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
6067 if (ret)
6068 dev_info(&vsi->back->pdev->dev,
6069 "Failed to reset tx rate for ch->seid %u\n",
6070 ch->seid);
6071
6072 /* delete cloud filters associated with this channel */
6073 hlist_for_each_entry_safe(cfilter, node,
6074 &pf->cloud_filter_list, cloud_node) {
6075 if (cfilter->seid != ch->seid)
6076 continue;
6077
6078 hash_del(&cfilter->cloud_node);
6079 if (cfilter->dst_port)
6080 ret = i40e_add_del_cloud_filter_big_buf(vsi,
6081 cfilter,
6082 false);
6083 else
6084 ret = i40e_add_del_cloud_filter(vsi, cfilter,
6085 false);
6086 last_aq_status = pf->hw.aq.asq_last_status;
6087 if (ret)
6088 dev_info(&pf->pdev->dev,
6089 "Failed to delete cloud filter, err %pe aq_err %s\n",
6090 ERR_PTR(ret),
6091 i40e_aq_str(&pf->hw, last_aq_status));
6092 kfree(cfilter);
6093 }
6094
6095 /* delete VSI from FW */
6096 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
6097 NULL);
6098 if (ret)
6099 dev_err(&vsi->back->pdev->dev,
6100 "unable to remove channel (%d) for parent VSI(%d)\n",
6101 ch->seid, p_vsi->seid);
6102 kfree(ch);
6103 }
6104 INIT_LIST_HEAD(&vsi->ch_list);
6105 }
6106
6107 /**
6108 * i40e_get_max_queues_for_channel
6109 * @vsi: ptr to VSI to which channels are associated with
6110 *
6111 * Helper function which returns max value among the queue counts set on the
6112 * channels/TCs created.
6113 **/
i40e_get_max_queues_for_channel(struct i40e_vsi * vsi)6114 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
6115 {
6116 struct i40e_channel *ch, *ch_tmp;
6117 int max = 0;
6118
6119 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6120 if (!ch->initialized)
6121 continue;
6122 if (ch->num_queue_pairs > max)
6123 max = ch->num_queue_pairs;
6124 }
6125
6126 return max;
6127 }
6128
6129 /**
6130 * i40e_validate_num_queues - validate num_queues w.r.t channel
6131 * @pf: ptr to PF device
6132 * @num_queues: number of queues
6133 * @vsi: the parent VSI
6134 * @reconfig_rss: indicates should the RSS be reconfigured or not
6135 *
6136 * This function validates number of queues in the context of new channel
6137 * which is being established and determines if RSS should be reconfigured
6138 * or not for parent VSI.
6139 **/
i40e_validate_num_queues(struct i40e_pf * pf,int num_queues,struct i40e_vsi * vsi,bool * reconfig_rss)6140 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
6141 struct i40e_vsi *vsi, bool *reconfig_rss)
6142 {
6143 int max_ch_queues;
6144
6145 if (!reconfig_rss)
6146 return -EINVAL;
6147
6148 *reconfig_rss = false;
6149 if (vsi->current_rss_size) {
6150 if (num_queues > vsi->current_rss_size) {
6151 dev_dbg(&pf->pdev->dev,
6152 "Error: num_queues (%d) > vsi's current_size(%d)\n",
6153 num_queues, vsi->current_rss_size);
6154 return -EINVAL;
6155 } else if ((num_queues < vsi->current_rss_size) &&
6156 (!is_power_of_2(num_queues))) {
6157 dev_dbg(&pf->pdev->dev,
6158 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
6159 num_queues, vsi->current_rss_size);
6160 return -EINVAL;
6161 }
6162 }
6163
6164 if (!is_power_of_2(num_queues)) {
6165 /* Find the max num_queues configured for channel if channel
6166 * exist.
6167 * if channel exist, then enforce 'num_queues' to be more than
6168 * max ever queues configured for channel.
6169 */
6170 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
6171 if (num_queues < max_ch_queues) {
6172 dev_dbg(&pf->pdev->dev,
6173 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
6174 num_queues, max_ch_queues);
6175 return -EINVAL;
6176 }
6177 *reconfig_rss = true;
6178 }
6179
6180 return 0;
6181 }
6182
6183 /**
6184 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
6185 * @vsi: the VSI being setup
6186 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
6187 *
6188 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
6189 **/
i40e_vsi_reconfig_rss(struct i40e_vsi * vsi,u16 rss_size)6190 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
6191 {
6192 struct i40e_pf *pf = vsi->back;
6193 u8 seed[I40E_HKEY_ARRAY_SIZE];
6194 struct i40e_hw *hw = &pf->hw;
6195 int local_rss_size;
6196 u8 *lut;
6197 int ret;
6198
6199 if (!vsi->rss_size)
6200 return -EINVAL;
6201
6202 if (rss_size > vsi->rss_size)
6203 return -EINVAL;
6204
6205 local_rss_size = min_t(int, vsi->rss_size, rss_size);
6206 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
6207 if (!lut)
6208 return -ENOMEM;
6209
6210 /* Ignoring user configured lut if there is one */
6211 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
6212
6213 /* Use user configured hash key if there is one, otherwise
6214 * use default.
6215 */
6216 if (vsi->rss_hkey_user)
6217 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
6218 else
6219 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
6220
6221 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
6222 if (ret) {
6223 dev_info(&pf->pdev->dev,
6224 "Cannot set RSS lut, err %pe aq_err %s\n",
6225 ERR_PTR(ret),
6226 i40e_aq_str(hw, hw->aq.asq_last_status));
6227 kfree(lut);
6228 return ret;
6229 }
6230 kfree(lut);
6231
6232 /* Do the update w.r.t. storing rss_size */
6233 if (!vsi->orig_rss_size)
6234 vsi->orig_rss_size = vsi->rss_size;
6235 vsi->current_rss_size = local_rss_size;
6236
6237 return ret;
6238 }
6239
6240 /**
6241 * i40e_channel_setup_queue_map - Setup a channel queue map
6242 * @pf: ptr to PF device
6243 * @ctxt: VSI context structure
6244 * @ch: ptr to channel structure
6245 *
6246 * Setup queue map for a specific channel
6247 **/
i40e_channel_setup_queue_map(struct i40e_pf * pf,struct i40e_vsi_context * ctxt,struct i40e_channel * ch)6248 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6249 struct i40e_vsi_context *ctxt,
6250 struct i40e_channel *ch)
6251 {
6252 u16 qcount, qmap, sections = 0;
6253 u8 offset = 0;
6254 int pow;
6255
6256 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
6257 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
6258
6259 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6260 ch->num_queue_pairs = qcount;
6261
6262 /* find the next higher power-of-2 of num queue pairs */
6263 pow = ilog2(qcount);
6264 if (!is_power_of_2(qcount))
6265 pow++;
6266
6267 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
6268 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
6269
6270 /* Setup queue TC[0].qmap for given VSI context */
6271 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
6272
6273 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
6274 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
6275 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
6276 ctxt->info.valid_sections |= cpu_to_le16(sections);
6277 }
6278
6279 /**
6280 * i40e_add_channel - add a channel by adding VSI
6281 * @pf: ptr to PF device
6282 * @uplink_seid: underlying HW switching element (VEB) ID
6283 * @ch: ptr to channel structure
6284 *
6285 * Add a channel (VSI) using add_vsi and queue_map
6286 **/
i40e_add_channel(struct i40e_pf * pf,u16 uplink_seid,struct i40e_channel * ch)6287 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6288 struct i40e_channel *ch)
6289 {
6290 struct i40e_hw *hw = &pf->hw;
6291 struct i40e_vsi_context ctxt;
6292 u8 enabled_tc = 0x1; /* TC0 enabled */
6293 int ret;
6294
6295 if (ch->type != I40E_VSI_VMDQ2) {
6296 dev_info(&pf->pdev->dev,
6297 "add new vsi failed, ch->type %d\n", ch->type);
6298 return -EINVAL;
6299 }
6300
6301 memset(&ctxt, 0, sizeof(ctxt));
6302 ctxt.pf_num = hw->pf_id;
6303 ctxt.vf_num = 0;
6304 ctxt.uplink_seid = uplink_seid;
6305 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
6306 if (ch->type == I40E_VSI_VMDQ2)
6307 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6308
6309 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
6310 ctxt.info.valid_sections |=
6311 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6312 ctxt.info.switch_id =
6313 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6314 }
6315
6316 /* Set queue map for a given VSI context */
6317 i40e_channel_setup_queue_map(pf, &ctxt, ch);
6318
6319 /* Now time to create VSI */
6320 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6321 if (ret) {
6322 dev_info(&pf->pdev->dev,
6323 "add new vsi failed, err %pe aq_err %s\n",
6324 ERR_PTR(ret),
6325 i40e_aq_str(&pf->hw,
6326 pf->hw.aq.asq_last_status));
6327 return -ENOENT;
6328 }
6329
6330 /* Success, update channel, set enabled_tc only if the channel
6331 * is not a macvlan
6332 */
6333 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
6334 ch->seid = ctxt.seid;
6335 ch->vsi_number = ctxt.vsi_number;
6336 ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
6337
6338 /* copy just the sections touched not the entire info
6339 * since not all sections are valid as returned by
6340 * update vsi params
6341 */
6342 ch->info.mapping_flags = ctxt.info.mapping_flags;
6343 memcpy(&ch->info.queue_mapping,
6344 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
6345 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
6346 sizeof(ctxt.info.tc_mapping));
6347
6348 return 0;
6349 }
6350
i40e_channel_config_bw(struct i40e_vsi * vsi,struct i40e_channel * ch,u8 * bw_share)6351 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
6352 u8 *bw_share)
6353 {
6354 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
6355 int ret;
6356 int i;
6357
6358 memset(&bw_data, 0, sizeof(bw_data));
6359 bw_data.tc_valid_bits = ch->enabled_tc;
6360 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6361 bw_data.tc_bw_credits[i] = bw_share[i];
6362
6363 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
6364 &bw_data, NULL);
6365 if (ret) {
6366 dev_info(&vsi->back->pdev->dev,
6367 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
6368 vsi->back->hw.aq.asq_last_status, ch->seid);
6369 return -EINVAL;
6370 }
6371
6372 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6373 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6374
6375 return 0;
6376 }
6377
6378 /**
6379 * i40e_channel_config_tx_ring - config TX ring associated with new channel
6380 * @pf: ptr to PF device
6381 * @vsi: the VSI being setup
6382 * @ch: ptr to channel structure
6383 *
6384 * Configure TX rings associated with channel (VSI) since queues are being
6385 * from parent VSI.
6386 **/
i40e_channel_config_tx_ring(struct i40e_pf * pf,struct i40e_vsi * vsi,struct i40e_channel * ch)6387 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6388 struct i40e_vsi *vsi,
6389 struct i40e_channel *ch)
6390 {
6391 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6392 int ret;
6393 int i;
6394
6395 /* Enable ETS TCs with equal BW Share for now across all VSIs */
6396 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6397 if (ch->enabled_tc & BIT(i))
6398 bw_share[i] = 1;
6399 }
6400
6401 /* configure BW for new VSI */
6402 ret = i40e_channel_config_bw(vsi, ch, bw_share);
6403 if (ret) {
6404 dev_info(&vsi->back->pdev->dev,
6405 "Failed configuring TC map %d for channel (seid %u)\n",
6406 ch->enabled_tc, ch->seid);
6407 return ret;
6408 }
6409
6410 for (i = 0; i < ch->num_queue_pairs; i++) {
6411 struct i40e_ring *tx_ring, *rx_ring;
6412 u16 pf_q;
6413
6414 pf_q = ch->base_queue + i;
6415
6416 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6417 * context
6418 */
6419 tx_ring = vsi->tx_rings[pf_q];
6420 tx_ring->ch = ch;
6421
6422 /* Get the RX ring ptr */
6423 rx_ring = vsi->rx_rings[pf_q];
6424 rx_ring->ch = ch;
6425 }
6426
6427 return 0;
6428 }
6429
6430 /**
6431 * i40e_setup_hw_channel - setup new channel
6432 * @pf: ptr to PF device
6433 * @vsi: the VSI being setup
6434 * @ch: ptr to channel structure
6435 * @uplink_seid: underlying HW switching element (VEB) ID
6436 * @type: type of channel to be created (VMDq2/VF)
6437 *
6438 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6439 * and configures TX rings accordingly
6440 **/
i40e_setup_hw_channel(struct i40e_pf * pf,struct i40e_vsi * vsi,struct i40e_channel * ch,u16 uplink_seid,u8 type)6441 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6442 struct i40e_vsi *vsi,
6443 struct i40e_channel *ch,
6444 u16 uplink_seid, u8 type)
6445 {
6446 int ret;
6447
6448 ch->initialized = false;
6449 ch->base_queue = vsi->next_base_queue;
6450 ch->type = type;
6451
6452 /* Proceed with creation of channel (VMDq2) VSI */
6453 ret = i40e_add_channel(pf, uplink_seid, ch);
6454 if (ret) {
6455 dev_info(&pf->pdev->dev,
6456 "failed to add_channel using uplink_seid %u\n",
6457 uplink_seid);
6458 return ret;
6459 }
6460
6461 /* Mark the successful creation of channel */
6462 ch->initialized = true;
6463
6464 /* Reconfigure TX queues using QTX_CTL register */
6465 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6466 if (ret) {
6467 dev_info(&pf->pdev->dev,
6468 "failed to configure TX rings for channel %u\n",
6469 ch->seid);
6470 return ret;
6471 }
6472
6473 /* update 'next_base_queue' */
6474 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6475 dev_dbg(&pf->pdev->dev,
6476 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6477 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6478 ch->num_queue_pairs,
6479 vsi->next_base_queue);
6480 return ret;
6481 }
6482
6483 /**
6484 * i40e_setup_channel - setup new channel using uplink element
6485 * @pf: ptr to PF device
6486 * @vsi: pointer to the VSI to set up the channel within
6487 * @ch: ptr to channel structure
6488 *
6489 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6490 * and uplink switching element (uplink_seid)
6491 **/
i40e_setup_channel(struct i40e_pf * pf,struct i40e_vsi * vsi,struct i40e_channel * ch)6492 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6493 struct i40e_channel *ch)
6494 {
6495 u8 vsi_type;
6496 u16 seid;
6497 int ret;
6498
6499 if (vsi->type == I40E_VSI_MAIN) {
6500 vsi_type = I40E_VSI_VMDQ2;
6501 } else {
6502 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6503 vsi->type);
6504 return false;
6505 }
6506
6507 /* underlying switching element */
6508 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6509
6510 /* create channel (VSI), configure TX rings */
6511 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6512 if (ret) {
6513 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6514 return false;
6515 }
6516
6517 return ch->initialized ? true : false;
6518 }
6519
6520 /**
6521 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6522 * @vsi: ptr to VSI which has PF backing
6523 *
6524 * Sets up switch mode correctly if it needs to be changed and perform
6525 * what are allowed modes.
6526 **/
i40e_validate_and_set_switch_mode(struct i40e_vsi * vsi)6527 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6528 {
6529 u8 mode;
6530 struct i40e_pf *pf = vsi->back;
6531 struct i40e_hw *hw = &pf->hw;
6532 int ret;
6533
6534 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6535 if (ret)
6536 return -EINVAL;
6537
6538 if (hw->dev_caps.switch_mode) {
6539 /* if switch mode is set, support mode2 (non-tunneled for
6540 * cloud filter) for now
6541 */
6542 u32 switch_mode = hw->dev_caps.switch_mode &
6543 I40E_SWITCH_MODE_MASK;
6544 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6545 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6546 return 0;
6547 dev_err(&pf->pdev->dev,
6548 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6549 hw->dev_caps.switch_mode);
6550 return -EINVAL;
6551 }
6552 }
6553
6554 /* Set Bit 7 to be valid */
6555 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6556
6557 /* Set L4type for TCP support */
6558 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6559
6560 /* Set cloud filter mode */
6561 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6562
6563 /* Prep mode field for set_switch_config */
6564 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6565 pf->last_sw_conf_valid_flags,
6566 mode, NULL);
6567 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6568 dev_err(&pf->pdev->dev,
6569 "couldn't set switch config bits, err %pe aq_err %s\n",
6570 ERR_PTR(ret),
6571 i40e_aq_str(hw,
6572 hw->aq.asq_last_status));
6573
6574 return ret;
6575 }
6576
6577 /**
6578 * i40e_create_queue_channel - function to create channel
6579 * @vsi: VSI to be configured
6580 * @ch: ptr to channel (it contains channel specific params)
6581 *
6582 * This function creates channel (VSI) using num_queues specified by user,
6583 * reconfigs RSS if needed.
6584 **/
i40e_create_queue_channel(struct i40e_vsi * vsi,struct i40e_channel * ch)6585 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6586 struct i40e_channel *ch)
6587 {
6588 struct i40e_pf *pf = vsi->back;
6589 bool reconfig_rss;
6590 int err;
6591
6592 if (!ch)
6593 return -EINVAL;
6594
6595 if (!ch->num_queue_pairs) {
6596 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6597 ch->num_queue_pairs);
6598 return -EINVAL;
6599 }
6600
6601 /* validate user requested num_queues for channel */
6602 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6603 &reconfig_rss);
6604 if (err) {
6605 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6606 ch->num_queue_pairs);
6607 return -EINVAL;
6608 }
6609
6610 /* By default we are in VEPA mode, if this is the first VF/VMDq
6611 * VSI to be added switch to VEB mode.
6612 */
6613
6614 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6615 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6616
6617 if (vsi->type == I40E_VSI_MAIN) {
6618 if (i40e_is_tc_mqprio_enabled(pf))
6619 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
6620 else
6621 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6622 }
6623 /* now onwards for main VSI, number of queues will be value
6624 * of TC0's queue count
6625 */
6626 }
6627
6628 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6629 * it should be more than num_queues
6630 */
6631 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6632 dev_dbg(&pf->pdev->dev,
6633 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6634 vsi->cnt_q_avail, ch->num_queue_pairs);
6635 return -EINVAL;
6636 }
6637
6638 /* reconfig_rss only if vsi type is MAIN_VSI */
6639 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6640 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6641 if (err) {
6642 dev_info(&pf->pdev->dev,
6643 "Error: unable to reconfig rss for num_queues (%u)\n",
6644 ch->num_queue_pairs);
6645 return -EINVAL;
6646 }
6647 }
6648
6649 if (!i40e_setup_channel(pf, vsi, ch)) {
6650 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6651 return -EINVAL;
6652 }
6653
6654 dev_info(&pf->pdev->dev,
6655 "Setup channel (id:%u) utilizing num_queues %d\n",
6656 ch->seid, ch->num_queue_pairs);
6657
6658 /* configure VSI for BW limit */
6659 if (ch->max_tx_rate) {
6660 u64 credits = ch->max_tx_rate;
6661
6662 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6663 return -EINVAL;
6664
6665 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6666 dev_dbg(&pf->pdev->dev,
6667 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6668 ch->max_tx_rate,
6669 credits,
6670 ch->seid);
6671 }
6672
6673 /* in case of VF, this will be main SRIOV VSI */
6674 ch->parent_vsi = vsi;
6675
6676 /* and update main_vsi's count for queue_available to use */
6677 vsi->cnt_q_avail -= ch->num_queue_pairs;
6678
6679 return 0;
6680 }
6681
6682 /**
6683 * i40e_configure_queue_channels - Add queue channel for the given TCs
6684 * @vsi: VSI to be configured
6685 *
6686 * Configures queue channel mapping to the given TCs
6687 **/
i40e_configure_queue_channels(struct i40e_vsi * vsi)6688 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6689 {
6690 struct i40e_channel *ch;
6691 u64 max_rate = 0;
6692 int ret = 0, i;
6693
6694 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6695 vsi->tc_seid_map[0] = vsi->seid;
6696 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6697 if (vsi->tc_config.enabled_tc & BIT(i)) {
6698 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6699 if (!ch) {
6700 ret = -ENOMEM;
6701 goto err_free;
6702 }
6703
6704 INIT_LIST_HEAD(&ch->list);
6705 ch->num_queue_pairs =
6706 vsi->tc_config.tc_info[i].qcount;
6707 ch->base_queue =
6708 vsi->tc_config.tc_info[i].qoffset;
6709
6710 /* Bandwidth limit through tc interface is in bytes/s,
6711 * change to Mbit/s
6712 */
6713 max_rate = vsi->mqprio_qopt.max_rate[i];
6714 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6715 ch->max_tx_rate = max_rate;
6716
6717 list_add_tail(&ch->list, &vsi->ch_list);
6718
6719 ret = i40e_create_queue_channel(vsi, ch);
6720 if (ret) {
6721 dev_err(&vsi->back->pdev->dev,
6722 "Failed creating queue channel with TC%d: queues %d\n",
6723 i, ch->num_queue_pairs);
6724 goto err_free;
6725 }
6726 vsi->tc_seid_map[i] = ch->seid;
6727 }
6728 }
6729
6730 /* reset to reconfigure TX queue contexts */
6731 i40e_do_reset(vsi->back, I40E_PF_RESET_FLAG, true);
6732 return ret;
6733
6734 err_free:
6735 i40e_remove_queue_channels(vsi);
6736 return ret;
6737 }
6738
6739 /**
6740 * i40e_veb_config_tc - Configure TCs for given VEB
6741 * @veb: given VEB
6742 * @enabled_tc: TC bitmap
6743 *
6744 * Configures given TC bitmap for VEB (switching) element
6745 **/
i40e_veb_config_tc(struct i40e_veb * veb,u8 enabled_tc)6746 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6747 {
6748 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6749 struct i40e_pf *pf = veb->pf;
6750 int ret = 0;
6751 int i;
6752
6753 /* No TCs or already enabled TCs just return */
6754 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6755 return ret;
6756
6757 bw_data.tc_valid_bits = enabled_tc;
6758 /* bw_data.absolute_credits is not set (relative) */
6759
6760 /* Enable ETS TCs with equal BW Share for now */
6761 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6762 if (enabled_tc & BIT(i))
6763 bw_data.tc_bw_share_credits[i] = 1;
6764 }
6765
6766 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6767 &bw_data, NULL);
6768 if (ret) {
6769 dev_info(&pf->pdev->dev,
6770 "VEB bw config failed, err %pe aq_err %s\n",
6771 ERR_PTR(ret),
6772 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6773 goto out;
6774 }
6775
6776 /* Update the BW information */
6777 ret = i40e_veb_get_bw_info(veb);
6778 if (ret) {
6779 dev_info(&pf->pdev->dev,
6780 "Failed getting veb bw config, err %pe aq_err %s\n",
6781 ERR_PTR(ret),
6782 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6783 }
6784
6785 out:
6786 return ret;
6787 }
6788
6789 #ifdef CONFIG_I40E_DCB
6790 /**
6791 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6792 * @pf: PF struct
6793 *
6794 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6795 * the caller would've quiesce all the VSIs before calling
6796 * this function
6797 **/
i40e_dcb_reconfigure(struct i40e_pf * pf)6798 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6799 {
6800 u8 tc_map = 0;
6801 int ret;
6802 u8 v;
6803
6804 /* Enable the TCs available on PF to all VEBs */
6805 tc_map = i40e_pf_get_tc_map(pf);
6806 if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6807 return;
6808
6809 for (v = 0; v < I40E_MAX_VEB; v++) {
6810 if (!pf->veb[v])
6811 continue;
6812 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6813 if (ret) {
6814 dev_info(&pf->pdev->dev,
6815 "Failed configuring TC for VEB seid=%d\n",
6816 pf->veb[v]->seid);
6817 /* Will try to configure as many components */
6818 }
6819 }
6820
6821 /* Update each VSI */
6822 for (v = 0; v < pf->num_alloc_vsi; v++) {
6823 if (!pf->vsi[v])
6824 continue;
6825
6826 /* - Enable all TCs for the LAN VSI
6827 * - For all others keep them at TC0 for now
6828 */
6829 if (v == pf->lan_vsi)
6830 tc_map = i40e_pf_get_tc_map(pf);
6831 else
6832 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6833
6834 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6835 if (ret) {
6836 dev_info(&pf->pdev->dev,
6837 "Failed configuring TC for VSI seid=%d\n",
6838 pf->vsi[v]->seid);
6839 /* Will try to configure as many components */
6840 } else {
6841 /* Re-configure VSI vectors based on updated TC map */
6842 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6843 if (pf->vsi[v]->netdev)
6844 i40e_dcbnl_set_all(pf->vsi[v]);
6845 }
6846 }
6847 }
6848
6849 /**
6850 * i40e_resume_port_tx - Resume port Tx
6851 * @pf: PF struct
6852 *
6853 * Resume a port's Tx and issue a PF reset in case of failure to
6854 * resume.
6855 **/
i40e_resume_port_tx(struct i40e_pf * pf)6856 static int i40e_resume_port_tx(struct i40e_pf *pf)
6857 {
6858 struct i40e_hw *hw = &pf->hw;
6859 int ret;
6860
6861 ret = i40e_aq_resume_port_tx(hw, NULL);
6862 if (ret) {
6863 dev_info(&pf->pdev->dev,
6864 "Resume Port Tx failed, err %pe aq_err %s\n",
6865 ERR_PTR(ret),
6866 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6867 /* Schedule PF reset to recover */
6868 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6869 i40e_service_event_schedule(pf);
6870 }
6871
6872 return ret;
6873 }
6874
6875 /**
6876 * i40e_suspend_port_tx - Suspend port Tx
6877 * @pf: PF struct
6878 *
6879 * Suspend a port's Tx and issue a PF reset in case of failure.
6880 **/
i40e_suspend_port_tx(struct i40e_pf * pf)6881 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6882 {
6883 struct i40e_hw *hw = &pf->hw;
6884 int ret;
6885
6886 ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6887 if (ret) {
6888 dev_info(&pf->pdev->dev,
6889 "Suspend Port Tx failed, err %pe aq_err %s\n",
6890 ERR_PTR(ret),
6891 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6892 /* Schedule PF reset to recover */
6893 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6894 i40e_service_event_schedule(pf);
6895 }
6896
6897 return ret;
6898 }
6899
6900 /**
6901 * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6902 * @pf: PF being configured
6903 * @new_cfg: New DCBX configuration
6904 *
6905 * Program DCB settings into HW and reconfigure VEB/VSIs on
6906 * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6907 **/
i40e_hw_set_dcb_config(struct i40e_pf * pf,struct i40e_dcbx_config * new_cfg)6908 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6909 struct i40e_dcbx_config *new_cfg)
6910 {
6911 struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6912 int ret;
6913
6914 /* Check if need reconfiguration */
6915 if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6916 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6917 return 0;
6918 }
6919
6920 /* Config change disable all VSIs */
6921 i40e_pf_quiesce_all_vsi(pf);
6922
6923 /* Copy the new config to the current config */
6924 *old_cfg = *new_cfg;
6925 old_cfg->etsrec = old_cfg->etscfg;
6926 ret = i40e_set_dcb_config(&pf->hw);
6927 if (ret) {
6928 dev_info(&pf->pdev->dev,
6929 "Set DCB Config failed, err %pe aq_err %s\n",
6930 ERR_PTR(ret),
6931 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6932 goto out;
6933 }
6934
6935 /* Changes in configuration update VEB/VSI */
6936 i40e_dcb_reconfigure(pf);
6937 out:
6938 /* In case of reset do not try to resume anything */
6939 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6940 /* Re-start the VSIs if disabled */
6941 ret = i40e_resume_port_tx(pf);
6942 /* In case of error no point in resuming VSIs */
6943 if (ret)
6944 goto err;
6945 i40e_pf_unquiesce_all_vsi(pf);
6946 }
6947 err:
6948 return ret;
6949 }
6950
6951 /**
6952 * i40e_hw_dcb_config - Program new DCBX settings into HW
6953 * @pf: PF being configured
6954 * @new_cfg: New DCBX configuration
6955 *
6956 * Program DCB settings into HW and reconfigure VEB/VSIs on
6957 * given PF
6958 **/
i40e_hw_dcb_config(struct i40e_pf * pf,struct i40e_dcbx_config * new_cfg)6959 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6960 {
6961 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6962 u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6963 u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6964 struct i40e_dcbx_config *old_cfg;
6965 u8 mode[I40E_MAX_TRAFFIC_CLASS];
6966 struct i40e_rx_pb_config pb_cfg;
6967 struct i40e_hw *hw = &pf->hw;
6968 u8 num_ports = hw->num_ports;
6969 bool need_reconfig;
6970 int ret = -EINVAL;
6971 u8 lltc_map = 0;
6972 u8 tc_map = 0;
6973 u8 new_numtc;
6974 u8 i;
6975
6976 dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6977 /* Un-pack information to Program ETS HW via shared API
6978 * numtc, tcmap
6979 * LLTC map
6980 * ETS/NON-ETS arbiter mode
6981 * max exponent (credit refills)
6982 * Total number of ports
6983 * PFC priority bit-map
6984 * Priority Table
6985 * BW % per TC
6986 * Arbiter mode between UPs sharing same TC
6987 * TSA table (ETS or non-ETS)
6988 * EEE enabled or not
6989 * MFS TC table
6990 */
6991
6992 new_numtc = i40e_dcb_get_num_tc(new_cfg);
6993
6994 memset(&ets_data, 0, sizeof(ets_data));
6995 for (i = 0; i < new_numtc; i++) {
6996 tc_map |= BIT(i);
6997 switch (new_cfg->etscfg.tsatable[i]) {
6998 case I40E_IEEE_TSA_ETS:
6999 prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
7000 ets_data.tc_bw_share_credits[i] =
7001 new_cfg->etscfg.tcbwtable[i];
7002 break;
7003 case I40E_IEEE_TSA_STRICT:
7004 prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
7005 lltc_map |= BIT(i);
7006 ets_data.tc_bw_share_credits[i] =
7007 I40E_DCB_STRICT_PRIO_CREDITS;
7008 break;
7009 default:
7010 /* Invalid TSA type */
7011 need_reconfig = false;
7012 goto out;
7013 }
7014 }
7015
7016 old_cfg = &hw->local_dcbx_config;
7017 /* Check if need reconfiguration */
7018 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
7019
7020 /* If needed, enable/disable frame tagging, disable all VSIs
7021 * and suspend port tx
7022 */
7023 if (need_reconfig) {
7024 /* Enable DCB tagging only when more than one TC */
7025 if (new_numtc > 1)
7026 pf->flags |= I40E_FLAG_DCB_ENABLED;
7027 else
7028 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7029
7030 set_bit(__I40E_PORT_SUSPENDED, pf->state);
7031 /* Reconfiguration needed quiesce all VSIs */
7032 i40e_pf_quiesce_all_vsi(pf);
7033 ret = i40e_suspend_port_tx(pf);
7034 if (ret)
7035 goto err;
7036 }
7037
7038 /* Configure Port ETS Tx Scheduler */
7039 ets_data.tc_valid_bits = tc_map;
7040 ets_data.tc_strict_priority_flags = lltc_map;
7041 ret = i40e_aq_config_switch_comp_ets
7042 (hw, pf->mac_seid, &ets_data,
7043 i40e_aqc_opc_modify_switching_comp_ets, NULL);
7044 if (ret) {
7045 dev_info(&pf->pdev->dev,
7046 "Modify Port ETS failed, err %pe aq_err %s\n",
7047 ERR_PTR(ret),
7048 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7049 goto out;
7050 }
7051
7052 /* Configure Rx ETS HW */
7053 memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
7054 i40e_dcb_hw_set_num_tc(hw, new_numtc);
7055 i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
7056 I40E_DCB_ARB_MODE_STRICT_PRIORITY,
7057 I40E_DCB_DEFAULT_MAX_EXPONENT,
7058 lltc_map);
7059 i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
7060 i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
7061 prio_type);
7062 i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
7063 new_cfg->etscfg.prioritytable);
7064 i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
7065
7066 /* Configure Rx Packet Buffers in HW */
7067 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7068 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
7069 mfs_tc[i] += I40E_PACKET_HDR_PAD;
7070 }
7071
7072 i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
7073 false, new_cfg->pfc.pfcenable,
7074 mfs_tc, &pb_cfg);
7075 i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
7076
7077 /* Update the local Rx Packet buffer config */
7078 pf->pb_cfg = pb_cfg;
7079
7080 /* Inform the FW about changes to DCB configuration */
7081 ret = i40e_aq_dcb_updated(&pf->hw, NULL);
7082 if (ret) {
7083 dev_info(&pf->pdev->dev,
7084 "DCB Updated failed, err %pe aq_err %s\n",
7085 ERR_PTR(ret),
7086 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7087 goto out;
7088 }
7089
7090 /* Update the port DCBx configuration */
7091 *old_cfg = *new_cfg;
7092
7093 /* Changes in configuration update VEB/VSI */
7094 i40e_dcb_reconfigure(pf);
7095 out:
7096 /* Re-start the VSIs if disabled */
7097 if (need_reconfig) {
7098 ret = i40e_resume_port_tx(pf);
7099
7100 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
7101 /* In case of error no point in resuming VSIs */
7102 if (ret)
7103 goto err;
7104
7105 /* Wait for the PF's queues to be disabled */
7106 ret = i40e_pf_wait_queues_disabled(pf);
7107 if (ret) {
7108 /* Schedule PF reset to recover */
7109 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
7110 i40e_service_event_schedule(pf);
7111 goto err;
7112 } else {
7113 i40e_pf_unquiesce_all_vsi(pf);
7114 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7115 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
7116 }
7117 /* registers are set, lets apply */
7118 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
7119 ret = i40e_hw_set_dcb_config(pf, new_cfg);
7120 }
7121
7122 err:
7123 return ret;
7124 }
7125
7126 /**
7127 * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
7128 * @pf: PF being queried
7129 *
7130 * Set default DCB configuration in case DCB is to be done in SW.
7131 **/
i40e_dcb_sw_default_config(struct i40e_pf * pf)7132 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
7133 {
7134 struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
7135 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
7136 struct i40e_hw *hw = &pf->hw;
7137 int err;
7138
7139 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
7140 /* Update the local cached instance with TC0 ETS */
7141 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
7142 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7143 pf->tmp_cfg.etscfg.maxtcs = 0;
7144 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7145 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
7146 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
7147 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
7148 /* FW needs one App to configure HW */
7149 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
7150 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
7151 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
7152 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
7153
7154 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
7155 }
7156
7157 memset(&ets_data, 0, sizeof(ets_data));
7158 ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
7159 ets_data.tc_strict_priority_flags = 0; /* ETS */
7160 ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
7161
7162 /* Enable ETS on the Physical port */
7163 err = i40e_aq_config_switch_comp_ets
7164 (hw, pf->mac_seid, &ets_data,
7165 i40e_aqc_opc_enable_switching_comp_ets, NULL);
7166 if (err) {
7167 dev_info(&pf->pdev->dev,
7168 "Enable Port ETS failed, err %pe aq_err %s\n",
7169 ERR_PTR(err),
7170 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7171 err = -ENOENT;
7172 goto out;
7173 }
7174
7175 /* Update the local cached instance with TC0 ETS */
7176 dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7177 dcb_cfg->etscfg.cbs = 0;
7178 dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
7179 dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7180
7181 out:
7182 return err;
7183 }
7184
7185 /**
7186 * i40e_init_pf_dcb - Initialize DCB configuration
7187 * @pf: PF being configured
7188 *
7189 * Query the current DCB configuration and cache it
7190 * in the hardware structure
7191 **/
i40e_init_pf_dcb(struct i40e_pf * pf)7192 static int i40e_init_pf_dcb(struct i40e_pf *pf)
7193 {
7194 struct i40e_hw *hw = &pf->hw;
7195 int err;
7196
7197 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
7198 * Also do not enable DCBx if FW LLDP agent is disabled
7199 */
7200 if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
7201 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7202 err = -EOPNOTSUPP;
7203 goto out;
7204 }
7205 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
7206 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7207 err = i40e_dcb_sw_default_config(pf);
7208 if (err) {
7209 dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7210 goto out;
7211 }
7212 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7213 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7214 DCB_CAP_DCBX_VER_IEEE;
7215 /* at init capable but disabled */
7216 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7217 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7218 goto out;
7219 }
7220 err = i40e_init_dcb(hw, true);
7221 if (!err) {
7222 /* Device/Function is not DCBX capable */
7223 if ((!hw->func_caps.dcb) ||
7224 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
7225 dev_info(&pf->pdev->dev,
7226 "DCBX offload is not supported or is disabled for this PF.\n");
7227 } else {
7228 /* When status is not DISABLED then DCBX in FW */
7229 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7230 DCB_CAP_DCBX_VER_IEEE;
7231
7232 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7233 /* Enable DCB tagging only when more than one TC
7234 * or explicitly disable if only one TC
7235 */
7236 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
7237 pf->flags |= I40E_FLAG_DCB_ENABLED;
7238 else
7239 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7240 dev_dbg(&pf->pdev->dev,
7241 "DCBX offload is supported for this PF.\n");
7242 }
7243 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
7244 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7245 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
7246 } else {
7247 dev_info(&pf->pdev->dev,
7248 "Query for DCB configuration failed, err %pe aq_err %s\n",
7249 ERR_PTR(err),
7250 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7251 }
7252
7253 out:
7254 return err;
7255 }
7256 #endif /* CONFIG_I40E_DCB */
7257
7258 /**
7259 * i40e_print_link_message - print link up or down
7260 * @vsi: the VSI for which link needs a message
7261 * @isup: true of link is up, false otherwise
7262 */
i40e_print_link_message(struct i40e_vsi * vsi,bool isup)7263 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
7264 {
7265 enum i40e_aq_link_speed new_speed;
7266 struct i40e_pf *pf = vsi->back;
7267 char *speed = "Unknown";
7268 char *fc = "Unknown";
7269 char *fec = "";
7270 char *req_fec = "";
7271 char *an = "";
7272
7273 if (isup)
7274 new_speed = pf->hw.phy.link_info.link_speed;
7275 else
7276 new_speed = I40E_LINK_SPEED_UNKNOWN;
7277
7278 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
7279 return;
7280 vsi->current_isup = isup;
7281 vsi->current_speed = new_speed;
7282 if (!isup) {
7283 netdev_info(vsi->netdev, "NIC Link is Down\n");
7284 return;
7285 }
7286
7287 /* Warn user if link speed on NPAR enabled partition is not at
7288 * least 10GB
7289 */
7290 if (pf->hw.func_caps.npar_enable &&
7291 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7292 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7293 netdev_warn(vsi->netdev,
7294 "The partition detected link speed that is less than 10Gbps\n");
7295
7296 switch (pf->hw.phy.link_info.link_speed) {
7297 case I40E_LINK_SPEED_40GB:
7298 speed = "40 G";
7299 break;
7300 case I40E_LINK_SPEED_20GB:
7301 speed = "20 G";
7302 break;
7303 case I40E_LINK_SPEED_25GB:
7304 speed = "25 G";
7305 break;
7306 case I40E_LINK_SPEED_10GB:
7307 speed = "10 G";
7308 break;
7309 case I40E_LINK_SPEED_5GB:
7310 speed = "5 G";
7311 break;
7312 case I40E_LINK_SPEED_2_5GB:
7313 speed = "2.5 G";
7314 break;
7315 case I40E_LINK_SPEED_1GB:
7316 speed = "1000 M";
7317 break;
7318 case I40E_LINK_SPEED_100MB:
7319 speed = "100 M";
7320 break;
7321 default:
7322 break;
7323 }
7324
7325 switch (pf->hw.fc.current_mode) {
7326 case I40E_FC_FULL:
7327 fc = "RX/TX";
7328 break;
7329 case I40E_FC_TX_PAUSE:
7330 fc = "TX";
7331 break;
7332 case I40E_FC_RX_PAUSE:
7333 fc = "RX";
7334 break;
7335 default:
7336 fc = "None";
7337 break;
7338 }
7339
7340 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7341 req_fec = "None";
7342 fec = "None";
7343 an = "False";
7344
7345 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7346 an = "True";
7347
7348 if (pf->hw.phy.link_info.fec_info &
7349 I40E_AQ_CONFIG_FEC_KR_ENA)
7350 fec = "CL74 FC-FEC/BASE-R";
7351 else if (pf->hw.phy.link_info.fec_info &
7352 I40E_AQ_CONFIG_FEC_RS_ENA)
7353 fec = "CL108 RS-FEC";
7354
7355 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7356 * both RS and FC are requested
7357 */
7358 if (vsi->back->hw.phy.link_info.req_fec_info &
7359 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7360 if (vsi->back->hw.phy.link_info.req_fec_info &
7361 I40E_AQ_REQUEST_FEC_RS)
7362 req_fec = "CL108 RS-FEC";
7363 else
7364 req_fec = "CL74 FC-FEC/BASE-R";
7365 }
7366 netdev_info(vsi->netdev,
7367 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7368 speed, req_fec, fec, an, fc);
7369 } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7370 req_fec = "None";
7371 fec = "None";
7372 an = "False";
7373
7374 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7375 an = "True";
7376
7377 if (pf->hw.phy.link_info.fec_info &
7378 I40E_AQ_CONFIG_FEC_KR_ENA)
7379 fec = "CL74 FC-FEC/BASE-R";
7380
7381 if (pf->hw.phy.link_info.req_fec_info &
7382 I40E_AQ_REQUEST_FEC_KR)
7383 req_fec = "CL74 FC-FEC/BASE-R";
7384
7385 netdev_info(vsi->netdev,
7386 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7387 speed, req_fec, fec, an, fc);
7388 } else {
7389 netdev_info(vsi->netdev,
7390 "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7391 speed, fc);
7392 }
7393
7394 }
7395
7396 /**
7397 * i40e_up_complete - Finish the last steps of bringing up a connection
7398 * @vsi: the VSI being configured
7399 **/
i40e_up_complete(struct i40e_vsi * vsi)7400 static int i40e_up_complete(struct i40e_vsi *vsi)
7401 {
7402 struct i40e_pf *pf = vsi->back;
7403 int err;
7404
7405 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7406 i40e_vsi_configure_msix(vsi);
7407 else
7408 i40e_configure_msi_and_legacy(vsi);
7409
7410 /* start rings */
7411 err = i40e_vsi_start_rings(vsi);
7412 if (err)
7413 return err;
7414
7415 clear_bit(__I40E_VSI_DOWN, vsi->state);
7416 i40e_napi_enable_all(vsi);
7417 i40e_vsi_enable_irq(vsi);
7418
7419 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7420 (vsi->netdev)) {
7421 i40e_print_link_message(vsi, true);
7422 netif_tx_start_all_queues(vsi->netdev);
7423 netif_carrier_on(vsi->netdev);
7424 }
7425
7426 /* replay FDIR SB filters */
7427 if (vsi->type == I40E_VSI_FDIR) {
7428 /* reset fd counters */
7429 pf->fd_add_err = 0;
7430 pf->fd_atr_cnt = 0;
7431 i40e_fdir_filter_restore(vsi);
7432 }
7433
7434 /* On the next run of the service_task, notify any clients of the new
7435 * opened netdev
7436 */
7437 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7438 i40e_service_event_schedule(pf);
7439
7440 return 0;
7441 }
7442
7443 /**
7444 * i40e_vsi_reinit_locked - Reset the VSI
7445 * @vsi: the VSI being configured
7446 *
7447 * Rebuild the ring structs after some configuration
7448 * has changed, e.g. MTU size.
7449 **/
i40e_vsi_reinit_locked(struct i40e_vsi * vsi)7450 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7451 {
7452 struct i40e_pf *pf = vsi->back;
7453
7454 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7455 usleep_range(1000, 2000);
7456 i40e_down(vsi);
7457
7458 i40e_up(vsi);
7459 clear_bit(__I40E_CONFIG_BUSY, pf->state);
7460 }
7461
7462 /**
7463 * i40e_force_link_state - Force the link status
7464 * @pf: board private structure
7465 * @is_up: whether the link state should be forced up or down
7466 **/
i40e_force_link_state(struct i40e_pf * pf,bool is_up)7467 static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7468 {
7469 struct i40e_aq_get_phy_abilities_resp abilities;
7470 struct i40e_aq_set_phy_config config = {0};
7471 bool non_zero_phy_type = is_up;
7472 struct i40e_hw *hw = &pf->hw;
7473 u64 mask;
7474 u8 speed;
7475 int err;
7476
7477 /* Card might've been put in an unstable state by other drivers
7478 * and applications, which causes incorrect speed values being
7479 * set on startup. In order to clear speed registers, we call
7480 * get_phy_capabilities twice, once to get initial state of
7481 * available speeds, and once to get current PHY config.
7482 */
7483 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7484 NULL);
7485 if (err) {
7486 dev_err(&pf->pdev->dev,
7487 "failed to get phy cap., ret = %pe last_status = %s\n",
7488 ERR_PTR(err),
7489 i40e_aq_str(hw, hw->aq.asq_last_status));
7490 return err;
7491 }
7492 speed = abilities.link_speed;
7493
7494 /* Get the current phy config */
7495 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7496 NULL);
7497 if (err) {
7498 dev_err(&pf->pdev->dev,
7499 "failed to get phy cap., ret = %pe last_status = %s\n",
7500 ERR_PTR(err),
7501 i40e_aq_str(hw, hw->aq.asq_last_status));
7502 return err;
7503 }
7504
7505 /* If link needs to go up, but was not forced to go down,
7506 * and its speed values are OK, no need for a flap
7507 * if non_zero_phy_type was set, still need to force up
7508 */
7509 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7510 non_zero_phy_type = true;
7511 else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7512 return 0;
7513
7514 /* To force link we need to set bits for all supported PHY types,
7515 * but there are now more than 32, so we need to split the bitmap
7516 * across two fields.
7517 */
7518 mask = I40E_PHY_TYPES_BITMASK;
7519 config.phy_type =
7520 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7521 config.phy_type_ext =
7522 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7523 /* Copy the old settings, except of phy_type */
7524 config.abilities = abilities.abilities;
7525 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7526 if (is_up)
7527 config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7528 else
7529 config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7530 }
7531 if (abilities.link_speed != 0)
7532 config.link_speed = abilities.link_speed;
7533 else
7534 config.link_speed = speed;
7535 config.eee_capability = abilities.eee_capability;
7536 config.eeer = abilities.eeer_val;
7537 config.low_power_ctrl = abilities.d3_lpan;
7538 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7539 I40E_AQ_PHY_FEC_CONFIG_MASK;
7540 err = i40e_aq_set_phy_config(hw, &config, NULL);
7541
7542 if (err) {
7543 dev_err(&pf->pdev->dev,
7544 "set phy config ret = %pe last_status = %s\n",
7545 ERR_PTR(err),
7546 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7547 return err;
7548 }
7549
7550 /* Update the link info */
7551 err = i40e_update_link_info(hw);
7552 if (err) {
7553 /* Wait a little bit (on 40G cards it sometimes takes a really
7554 * long time for link to come back from the atomic reset)
7555 * and try once more
7556 */
7557 msleep(1000);
7558 i40e_update_link_info(hw);
7559 }
7560
7561 i40e_aq_set_link_restart_an(hw, is_up, NULL);
7562
7563 return 0;
7564 }
7565
7566 /**
7567 * i40e_up - Bring the connection back up after being down
7568 * @vsi: the VSI being configured
7569 **/
i40e_up(struct i40e_vsi * vsi)7570 int i40e_up(struct i40e_vsi *vsi)
7571 {
7572 int err;
7573
7574 if (vsi->type == I40E_VSI_MAIN &&
7575 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7576 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7577 i40e_force_link_state(vsi->back, true);
7578
7579 err = i40e_vsi_configure(vsi);
7580 if (!err)
7581 err = i40e_up_complete(vsi);
7582
7583 return err;
7584 }
7585
7586 /**
7587 * i40e_down - Shutdown the connection processing
7588 * @vsi: the VSI being stopped
7589 **/
i40e_down(struct i40e_vsi * vsi)7590 void i40e_down(struct i40e_vsi *vsi)
7591 {
7592 int i;
7593
7594 /* It is assumed that the caller of this function
7595 * sets the vsi->state __I40E_VSI_DOWN bit.
7596 */
7597 if (vsi->netdev) {
7598 netif_carrier_off(vsi->netdev);
7599 netif_tx_disable(vsi->netdev);
7600 }
7601 i40e_vsi_disable_irq(vsi);
7602 i40e_vsi_stop_rings(vsi);
7603 if (vsi->type == I40E_VSI_MAIN &&
7604 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7605 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7606 i40e_force_link_state(vsi->back, false);
7607 i40e_napi_disable_all(vsi);
7608
7609 for (i = 0; i < vsi->num_queue_pairs; i++) {
7610 i40e_clean_tx_ring(vsi->tx_rings[i]);
7611 if (i40e_enabled_xdp_vsi(vsi)) {
7612 /* Make sure that in-progress ndo_xdp_xmit and
7613 * ndo_xsk_wakeup calls are completed.
7614 */
7615 synchronize_rcu();
7616 i40e_clean_tx_ring(vsi->xdp_rings[i]);
7617 }
7618 i40e_clean_rx_ring(vsi->rx_rings[i]);
7619 }
7620
7621 }
7622
7623 /**
7624 * i40e_validate_mqprio_qopt- validate queue mapping info
7625 * @vsi: the VSI being configured
7626 * @mqprio_qopt: queue parametrs
7627 **/
i40e_validate_mqprio_qopt(struct i40e_vsi * vsi,struct tc_mqprio_qopt_offload * mqprio_qopt)7628 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7629 struct tc_mqprio_qopt_offload *mqprio_qopt)
7630 {
7631 u64 sum_max_rate = 0;
7632 u64 max_rate = 0;
7633 int i;
7634
7635 if (mqprio_qopt->qopt.offset[0] != 0 ||
7636 mqprio_qopt->qopt.num_tc < 1 ||
7637 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7638 return -EINVAL;
7639 for (i = 0; ; i++) {
7640 if (!mqprio_qopt->qopt.count[i])
7641 return -EINVAL;
7642 if (mqprio_qopt->min_rate[i]) {
7643 dev_err(&vsi->back->pdev->dev,
7644 "Invalid min tx rate (greater than 0) specified\n");
7645 return -EINVAL;
7646 }
7647 max_rate = mqprio_qopt->max_rate[i];
7648 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7649 sum_max_rate += max_rate;
7650
7651 if (i >= mqprio_qopt->qopt.num_tc - 1)
7652 break;
7653 if (mqprio_qopt->qopt.offset[i + 1] !=
7654 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7655 return -EINVAL;
7656 }
7657 if (vsi->num_queue_pairs <
7658 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7659 dev_err(&vsi->back->pdev->dev,
7660 "Failed to create traffic channel, insufficient number of queues.\n");
7661 return -EINVAL;
7662 }
7663 if (sum_max_rate > i40e_get_link_speed(vsi)) {
7664 dev_err(&vsi->back->pdev->dev,
7665 "Invalid max tx rate specified\n");
7666 return -EINVAL;
7667 }
7668 return 0;
7669 }
7670
7671 /**
7672 * i40e_vsi_set_default_tc_config - set default values for tc configuration
7673 * @vsi: the VSI being configured
7674 **/
i40e_vsi_set_default_tc_config(struct i40e_vsi * vsi)7675 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7676 {
7677 u16 qcount;
7678 int i;
7679
7680 /* Only TC0 is enabled */
7681 vsi->tc_config.numtc = 1;
7682 vsi->tc_config.enabled_tc = 1;
7683 qcount = min_t(int, vsi->alloc_queue_pairs,
7684 i40e_pf_get_max_q_per_tc(vsi->back));
7685 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7686 /* For the TC that is not enabled set the offset to default
7687 * queue and allocate one queue for the given TC.
7688 */
7689 vsi->tc_config.tc_info[i].qoffset = 0;
7690 if (i == 0)
7691 vsi->tc_config.tc_info[i].qcount = qcount;
7692 else
7693 vsi->tc_config.tc_info[i].qcount = 1;
7694 vsi->tc_config.tc_info[i].netdev_tc = 0;
7695 }
7696 }
7697
7698 /**
7699 * i40e_del_macvlan_filter
7700 * @hw: pointer to the HW structure
7701 * @seid: seid of the channel VSI
7702 * @macaddr: the mac address to apply as a filter
7703 * @aq_err: store the admin Q error
7704 *
7705 * This function deletes a mac filter on the channel VSI which serves as the
7706 * macvlan. Returns 0 on success.
7707 **/
i40e_del_macvlan_filter(struct i40e_hw * hw,u16 seid,const u8 * macaddr,int * aq_err)7708 static int i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7709 const u8 *macaddr, int *aq_err)
7710 {
7711 struct i40e_aqc_remove_macvlan_element_data element;
7712 int status;
7713
7714 memset(&element, 0, sizeof(element));
7715 ether_addr_copy(element.mac_addr, macaddr);
7716 element.vlan_tag = 0;
7717 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7718 status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7719 *aq_err = hw->aq.asq_last_status;
7720
7721 return status;
7722 }
7723
7724 /**
7725 * i40e_add_macvlan_filter
7726 * @hw: pointer to the HW structure
7727 * @seid: seid of the channel VSI
7728 * @macaddr: the mac address to apply as a filter
7729 * @aq_err: store the admin Q error
7730 *
7731 * This function adds a mac filter on the channel VSI which serves as the
7732 * macvlan. Returns 0 on success.
7733 **/
i40e_add_macvlan_filter(struct i40e_hw * hw,u16 seid,const u8 * macaddr,int * aq_err)7734 static int i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7735 const u8 *macaddr, int *aq_err)
7736 {
7737 struct i40e_aqc_add_macvlan_element_data element;
7738 u16 cmd_flags = 0;
7739 int status;
7740
7741 ether_addr_copy(element.mac_addr, macaddr);
7742 element.vlan_tag = 0;
7743 element.queue_number = 0;
7744 element.match_method = I40E_AQC_MM_ERR_NO_RES;
7745 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7746 element.flags = cpu_to_le16(cmd_flags);
7747 status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7748 *aq_err = hw->aq.asq_last_status;
7749
7750 return status;
7751 }
7752
7753 /**
7754 * i40e_reset_ch_rings - Reset the queue contexts in a channel
7755 * @vsi: the VSI we want to access
7756 * @ch: the channel we want to access
7757 */
i40e_reset_ch_rings(struct i40e_vsi * vsi,struct i40e_channel * ch)7758 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7759 {
7760 struct i40e_ring *tx_ring, *rx_ring;
7761 u16 pf_q;
7762 int i;
7763
7764 for (i = 0; i < ch->num_queue_pairs; i++) {
7765 pf_q = ch->base_queue + i;
7766 tx_ring = vsi->tx_rings[pf_q];
7767 tx_ring->ch = NULL;
7768 rx_ring = vsi->rx_rings[pf_q];
7769 rx_ring->ch = NULL;
7770 }
7771 }
7772
7773 /**
7774 * i40e_free_macvlan_channels
7775 * @vsi: the VSI we want to access
7776 *
7777 * This function frees the Qs of the channel VSI from
7778 * the stack and also deletes the channel VSIs which
7779 * serve as macvlans.
7780 */
i40e_free_macvlan_channels(struct i40e_vsi * vsi)7781 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7782 {
7783 struct i40e_channel *ch, *ch_tmp;
7784 int ret;
7785
7786 if (list_empty(&vsi->macvlan_list))
7787 return;
7788
7789 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7790 struct i40e_vsi *parent_vsi;
7791
7792 if (i40e_is_channel_macvlan(ch)) {
7793 i40e_reset_ch_rings(vsi, ch);
7794 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7795 netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7796 netdev_set_sb_channel(ch->fwd->netdev, 0);
7797 kfree(ch->fwd);
7798 ch->fwd = NULL;
7799 }
7800
7801 list_del(&ch->list);
7802 parent_vsi = ch->parent_vsi;
7803 if (!parent_vsi || !ch->initialized) {
7804 kfree(ch);
7805 continue;
7806 }
7807
7808 /* remove the VSI */
7809 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7810 NULL);
7811 if (ret)
7812 dev_err(&vsi->back->pdev->dev,
7813 "unable to remove channel (%d) for parent VSI(%d)\n",
7814 ch->seid, parent_vsi->seid);
7815 kfree(ch);
7816 }
7817 vsi->macvlan_cnt = 0;
7818 }
7819
7820 /**
7821 * i40e_fwd_ring_up - bring the macvlan device up
7822 * @vsi: the VSI we want to access
7823 * @vdev: macvlan netdevice
7824 * @fwd: the private fwd structure
7825 */
i40e_fwd_ring_up(struct i40e_vsi * vsi,struct net_device * vdev,struct i40e_fwd_adapter * fwd)7826 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7827 struct i40e_fwd_adapter *fwd)
7828 {
7829 struct i40e_channel *ch = NULL, *ch_tmp, *iter;
7830 int ret = 0, num_tc = 1, i, aq_err;
7831 struct i40e_pf *pf = vsi->back;
7832 struct i40e_hw *hw = &pf->hw;
7833
7834 /* Go through the list and find an available channel */
7835 list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7836 if (!i40e_is_channel_macvlan(iter)) {
7837 iter->fwd = fwd;
7838 /* record configuration for macvlan interface in vdev */
7839 for (i = 0; i < num_tc; i++)
7840 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7841 i,
7842 iter->num_queue_pairs,
7843 iter->base_queue);
7844 for (i = 0; i < iter->num_queue_pairs; i++) {
7845 struct i40e_ring *tx_ring, *rx_ring;
7846 u16 pf_q;
7847
7848 pf_q = iter->base_queue + i;
7849
7850 /* Get to TX ring ptr */
7851 tx_ring = vsi->tx_rings[pf_q];
7852 tx_ring->ch = iter;
7853
7854 /* Get the RX ring ptr */
7855 rx_ring = vsi->rx_rings[pf_q];
7856 rx_ring->ch = iter;
7857 }
7858 ch = iter;
7859 break;
7860 }
7861 }
7862
7863 if (!ch)
7864 return -EINVAL;
7865
7866 /* Guarantee all rings are updated before we update the
7867 * MAC address filter.
7868 */
7869 wmb();
7870
7871 /* Add a mac filter */
7872 ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7873 if (ret) {
7874 /* if we cannot add the MAC rule then disable the offload */
7875 macvlan_release_l2fw_offload(vdev);
7876 for (i = 0; i < ch->num_queue_pairs; i++) {
7877 struct i40e_ring *rx_ring;
7878 u16 pf_q;
7879
7880 pf_q = ch->base_queue + i;
7881 rx_ring = vsi->rx_rings[pf_q];
7882 rx_ring->netdev = NULL;
7883 }
7884 dev_info(&pf->pdev->dev,
7885 "Error adding mac filter on macvlan err %pe, aq_err %s\n",
7886 ERR_PTR(ret),
7887 i40e_aq_str(hw, aq_err));
7888 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7889 }
7890
7891 return ret;
7892 }
7893
7894 /**
7895 * i40e_setup_macvlans - create the channels which will be macvlans
7896 * @vsi: the VSI we want to access
7897 * @macvlan_cnt: no. of macvlans to be setup
7898 * @qcnt: no. of Qs per macvlan
7899 * @vdev: macvlan netdevice
7900 */
i40e_setup_macvlans(struct i40e_vsi * vsi,u16 macvlan_cnt,u16 qcnt,struct net_device * vdev)7901 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7902 struct net_device *vdev)
7903 {
7904 struct i40e_pf *pf = vsi->back;
7905 struct i40e_hw *hw = &pf->hw;
7906 struct i40e_vsi_context ctxt;
7907 u16 sections, qmap, num_qps;
7908 struct i40e_channel *ch;
7909 int i, pow, ret = 0;
7910 u8 offset = 0;
7911
7912 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7913 return -EINVAL;
7914
7915 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7916
7917 /* find the next higher power-of-2 of num queue pairs */
7918 pow = fls(roundup_pow_of_two(num_qps) - 1);
7919
7920 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7921 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7922
7923 /* Setup context bits for the main VSI */
7924 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7925 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7926 memset(&ctxt, 0, sizeof(ctxt));
7927 ctxt.seid = vsi->seid;
7928 ctxt.pf_num = vsi->back->hw.pf_id;
7929 ctxt.vf_num = 0;
7930 ctxt.uplink_seid = vsi->uplink_seid;
7931 ctxt.info = vsi->info;
7932 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7933 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7934 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7935 ctxt.info.valid_sections |= cpu_to_le16(sections);
7936
7937 /* Reconfigure RSS for main VSI with new max queue count */
7938 vsi->rss_size = max_t(u16, num_qps, qcnt);
7939 ret = i40e_vsi_config_rss(vsi);
7940 if (ret) {
7941 dev_info(&pf->pdev->dev,
7942 "Failed to reconfig RSS for num_queues (%u)\n",
7943 vsi->rss_size);
7944 return ret;
7945 }
7946 vsi->reconfig_rss = true;
7947 dev_dbg(&vsi->back->pdev->dev,
7948 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7949 vsi->next_base_queue = num_qps;
7950 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7951
7952 /* Update the VSI after updating the VSI queue-mapping
7953 * information
7954 */
7955 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7956 if (ret) {
7957 dev_info(&pf->pdev->dev,
7958 "Update vsi tc config failed, err %pe aq_err %s\n",
7959 ERR_PTR(ret),
7960 i40e_aq_str(hw, hw->aq.asq_last_status));
7961 return ret;
7962 }
7963 /* update the local VSI info with updated queue map */
7964 i40e_vsi_update_queue_map(vsi, &ctxt);
7965 vsi->info.valid_sections = 0;
7966
7967 /* Create channels for macvlans */
7968 INIT_LIST_HEAD(&vsi->macvlan_list);
7969 for (i = 0; i < macvlan_cnt; i++) {
7970 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7971 if (!ch) {
7972 ret = -ENOMEM;
7973 goto err_free;
7974 }
7975 INIT_LIST_HEAD(&ch->list);
7976 ch->num_queue_pairs = qcnt;
7977 if (!i40e_setup_channel(pf, vsi, ch)) {
7978 ret = -EINVAL;
7979 kfree(ch);
7980 goto err_free;
7981 }
7982 ch->parent_vsi = vsi;
7983 vsi->cnt_q_avail -= ch->num_queue_pairs;
7984 vsi->macvlan_cnt++;
7985 list_add_tail(&ch->list, &vsi->macvlan_list);
7986 }
7987
7988 return ret;
7989
7990 err_free:
7991 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7992 i40e_free_macvlan_channels(vsi);
7993
7994 return ret;
7995 }
7996
7997 /**
7998 * i40e_fwd_add - configure macvlans
7999 * @netdev: net device to configure
8000 * @vdev: macvlan netdevice
8001 **/
i40e_fwd_add(struct net_device * netdev,struct net_device * vdev)8002 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
8003 {
8004 struct i40e_netdev_priv *np = netdev_priv(netdev);
8005 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
8006 struct i40e_vsi *vsi = np->vsi;
8007 struct i40e_pf *pf = vsi->back;
8008 struct i40e_fwd_adapter *fwd;
8009 int avail_macvlan, ret;
8010
8011 if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
8012 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
8013 return ERR_PTR(-EINVAL);
8014 }
8015 if (i40e_is_tc_mqprio_enabled(pf)) {
8016 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
8017 return ERR_PTR(-EINVAL);
8018 }
8019 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
8020 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
8021 return ERR_PTR(-EINVAL);
8022 }
8023
8024 /* The macvlan device has to be a single Q device so that the
8025 * tc_to_txq field can be reused to pick the tx queue.
8026 */
8027 if (netif_is_multiqueue(vdev))
8028 return ERR_PTR(-ERANGE);
8029
8030 if (!vsi->macvlan_cnt) {
8031 /* reserve bit 0 for the pf device */
8032 set_bit(0, vsi->fwd_bitmask);
8033
8034 /* Try to reserve as many queues as possible for macvlans. First
8035 * reserve 3/4th of max vectors, then half, then quarter and
8036 * calculate Qs per macvlan as you go
8037 */
8038 vectors = pf->num_lan_msix;
8039 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
8040 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
8041 q_per_macvlan = 4;
8042 macvlan_cnt = (vectors - 32) / 4;
8043 } else if (vectors <= 64 && vectors > 32) {
8044 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
8045 q_per_macvlan = 2;
8046 macvlan_cnt = (vectors - 16) / 2;
8047 } else if (vectors <= 32 && vectors > 16) {
8048 /* allocate 1 Q per macvlan and 16 Qs to the PF*/
8049 q_per_macvlan = 1;
8050 macvlan_cnt = vectors - 16;
8051 } else if (vectors <= 16 && vectors > 8) {
8052 /* allocate 1 Q per macvlan and 8 Qs to the PF */
8053 q_per_macvlan = 1;
8054 macvlan_cnt = vectors - 8;
8055 } else {
8056 /* allocate 1 Q per macvlan and 1 Q to the PF */
8057 q_per_macvlan = 1;
8058 macvlan_cnt = vectors - 1;
8059 }
8060
8061 if (macvlan_cnt == 0)
8062 return ERR_PTR(-EBUSY);
8063
8064 /* Quiesce VSI queues */
8065 i40e_quiesce_vsi(vsi);
8066
8067 /* sets up the macvlans but does not "enable" them */
8068 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
8069 vdev);
8070 if (ret)
8071 return ERR_PTR(ret);
8072
8073 /* Unquiesce VSI */
8074 i40e_unquiesce_vsi(vsi);
8075 }
8076 avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
8077 vsi->macvlan_cnt);
8078 if (avail_macvlan >= I40E_MAX_MACVLANS)
8079 return ERR_PTR(-EBUSY);
8080
8081 /* create the fwd struct */
8082 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
8083 if (!fwd)
8084 return ERR_PTR(-ENOMEM);
8085
8086 set_bit(avail_macvlan, vsi->fwd_bitmask);
8087 fwd->bit_no = avail_macvlan;
8088 netdev_set_sb_channel(vdev, avail_macvlan);
8089 fwd->netdev = vdev;
8090
8091 if (!netif_running(netdev))
8092 return fwd;
8093
8094 /* Set fwd ring up */
8095 ret = i40e_fwd_ring_up(vsi, vdev, fwd);
8096 if (ret) {
8097 /* unbind the queues and drop the subordinate channel config */
8098 netdev_unbind_sb_channel(netdev, vdev);
8099 netdev_set_sb_channel(vdev, 0);
8100
8101 kfree(fwd);
8102 return ERR_PTR(-EINVAL);
8103 }
8104
8105 return fwd;
8106 }
8107
8108 /**
8109 * i40e_del_all_macvlans - Delete all the mac filters on the channels
8110 * @vsi: the VSI we want to access
8111 */
i40e_del_all_macvlans(struct i40e_vsi * vsi)8112 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
8113 {
8114 struct i40e_channel *ch, *ch_tmp;
8115 struct i40e_pf *pf = vsi->back;
8116 struct i40e_hw *hw = &pf->hw;
8117 int aq_err, ret = 0;
8118
8119 if (list_empty(&vsi->macvlan_list))
8120 return;
8121
8122 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8123 if (i40e_is_channel_macvlan(ch)) {
8124 ret = i40e_del_macvlan_filter(hw, ch->seid,
8125 i40e_channel_mac(ch),
8126 &aq_err);
8127 if (!ret) {
8128 /* Reset queue contexts */
8129 i40e_reset_ch_rings(vsi, ch);
8130 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
8131 netdev_unbind_sb_channel(vsi->netdev,
8132 ch->fwd->netdev);
8133 netdev_set_sb_channel(ch->fwd->netdev, 0);
8134 kfree(ch->fwd);
8135 ch->fwd = NULL;
8136 }
8137 }
8138 }
8139 }
8140
8141 /**
8142 * i40e_fwd_del - delete macvlan interfaces
8143 * @netdev: net device to configure
8144 * @vdev: macvlan netdevice
8145 */
i40e_fwd_del(struct net_device * netdev,void * vdev)8146 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
8147 {
8148 struct i40e_netdev_priv *np = netdev_priv(netdev);
8149 struct i40e_fwd_adapter *fwd = vdev;
8150 struct i40e_channel *ch, *ch_tmp;
8151 struct i40e_vsi *vsi = np->vsi;
8152 struct i40e_pf *pf = vsi->back;
8153 struct i40e_hw *hw = &pf->hw;
8154 int aq_err, ret = 0;
8155
8156 /* Find the channel associated with the macvlan and del mac filter */
8157 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8158 if (i40e_is_channel_macvlan(ch) &&
8159 ether_addr_equal(i40e_channel_mac(ch),
8160 fwd->netdev->dev_addr)) {
8161 ret = i40e_del_macvlan_filter(hw, ch->seid,
8162 i40e_channel_mac(ch),
8163 &aq_err);
8164 if (!ret) {
8165 /* Reset queue contexts */
8166 i40e_reset_ch_rings(vsi, ch);
8167 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
8168 netdev_unbind_sb_channel(netdev, fwd->netdev);
8169 netdev_set_sb_channel(fwd->netdev, 0);
8170 kfree(ch->fwd);
8171 ch->fwd = NULL;
8172 } else {
8173 dev_info(&pf->pdev->dev,
8174 "Error deleting mac filter on macvlan err %pe, aq_err %s\n",
8175 ERR_PTR(ret),
8176 i40e_aq_str(hw, aq_err));
8177 }
8178 break;
8179 }
8180 }
8181 }
8182
8183 /**
8184 * i40e_setup_tc - configure multiple traffic classes
8185 * @netdev: net device to configure
8186 * @type_data: tc offload data
8187 **/
i40e_setup_tc(struct net_device * netdev,void * type_data)8188 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
8189 {
8190 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
8191 struct i40e_netdev_priv *np = netdev_priv(netdev);
8192 struct i40e_vsi *vsi = np->vsi;
8193 struct i40e_pf *pf = vsi->back;
8194 u8 enabled_tc = 0, num_tc, hw;
8195 bool need_reset = false;
8196 int old_queue_pairs;
8197 int ret = -EINVAL;
8198 u16 mode;
8199 int i;
8200
8201 old_queue_pairs = vsi->num_queue_pairs;
8202 num_tc = mqprio_qopt->qopt.num_tc;
8203 hw = mqprio_qopt->qopt.hw;
8204 mode = mqprio_qopt->mode;
8205 if (!hw) {
8206 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8207 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
8208 goto config_tc;
8209 }
8210
8211 /* Check if MFP enabled */
8212 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
8213 netdev_info(netdev,
8214 "Configuring TC not supported in MFP mode\n");
8215 return ret;
8216 }
8217 switch (mode) {
8218 case TC_MQPRIO_MODE_DCB:
8219 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8220
8221 /* Check if DCB enabled to continue */
8222 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
8223 netdev_info(netdev,
8224 "DCB is not enabled for adapter\n");
8225 return ret;
8226 }
8227
8228 /* Check whether tc count is within enabled limit */
8229 if (num_tc > i40e_pf_get_num_tc(pf)) {
8230 netdev_info(netdev,
8231 "TC count greater than enabled on link for adapter\n");
8232 return ret;
8233 }
8234 break;
8235 case TC_MQPRIO_MODE_CHANNEL:
8236 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
8237 netdev_info(netdev,
8238 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
8239 return ret;
8240 }
8241 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8242 return ret;
8243 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
8244 if (ret)
8245 return ret;
8246 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
8247 sizeof(*mqprio_qopt));
8248 pf->flags |= I40E_FLAG_TC_MQPRIO;
8249 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8250 break;
8251 default:
8252 return -EINVAL;
8253 }
8254
8255 config_tc:
8256 /* Generate TC map for number of tc requested */
8257 for (i = 0; i < num_tc; i++)
8258 enabled_tc |= BIT(i);
8259
8260 /* Requesting same TC configuration as already enabled */
8261 if (enabled_tc == vsi->tc_config.enabled_tc &&
8262 mode != TC_MQPRIO_MODE_CHANNEL)
8263 return 0;
8264
8265 /* Quiesce VSI queues */
8266 i40e_quiesce_vsi(vsi);
8267
8268 if (!hw && !i40e_is_tc_mqprio_enabled(pf))
8269 i40e_remove_queue_channels(vsi);
8270
8271 /* Configure VSI for enabled TCs */
8272 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8273 if (ret) {
8274 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
8275 vsi->seid);
8276 need_reset = true;
8277 goto exit;
8278 } else if (enabled_tc &&
8279 (!is_power_of_2(vsi->tc_config.tc_info[0].qcount))) {
8280 netdev_info(netdev,
8281 "Failed to create channel. Override queues (%u) not power of 2\n",
8282 vsi->tc_config.tc_info[0].qcount);
8283 ret = -EINVAL;
8284 need_reset = true;
8285 goto exit;
8286 }
8287
8288 dev_info(&vsi->back->pdev->dev,
8289 "Setup channel (id:%u) utilizing num_queues %d\n",
8290 vsi->seid, vsi->tc_config.tc_info[0].qcount);
8291
8292 if (i40e_is_tc_mqprio_enabled(pf)) {
8293 if (vsi->mqprio_qopt.max_rate[0]) {
8294 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
8295 vsi->mqprio_qopt.max_rate[0]);
8296
8297 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
8298 if (!ret) {
8299 u64 credits = max_tx_rate;
8300
8301 do_div(credits, I40E_BW_CREDIT_DIVISOR);
8302 dev_dbg(&vsi->back->pdev->dev,
8303 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
8304 max_tx_rate,
8305 credits,
8306 vsi->seid);
8307 } else {
8308 need_reset = true;
8309 goto exit;
8310 }
8311 }
8312 ret = i40e_configure_queue_channels(vsi);
8313 if (ret) {
8314 vsi->num_queue_pairs = old_queue_pairs;
8315 netdev_info(netdev,
8316 "Failed configuring queue channels\n");
8317 need_reset = true;
8318 goto exit;
8319 }
8320 }
8321
8322 exit:
8323 /* Reset the configuration data to defaults, only TC0 is enabled */
8324 if (need_reset) {
8325 i40e_vsi_set_default_tc_config(vsi);
8326 need_reset = false;
8327 }
8328
8329 /* Unquiesce VSI */
8330 i40e_unquiesce_vsi(vsi);
8331 return ret;
8332 }
8333
8334 /**
8335 * i40e_set_cld_element - sets cloud filter element data
8336 * @filter: cloud filter rule
8337 * @cld: ptr to cloud filter element data
8338 *
8339 * This is helper function to copy data into cloud filter element
8340 **/
8341 static inline void
i40e_set_cld_element(struct i40e_cloud_filter * filter,struct i40e_aqc_cloud_filters_element_data * cld)8342 i40e_set_cld_element(struct i40e_cloud_filter *filter,
8343 struct i40e_aqc_cloud_filters_element_data *cld)
8344 {
8345 u32 ipa;
8346 int i;
8347
8348 memset(cld, 0, sizeof(*cld));
8349 ether_addr_copy(cld->outer_mac, filter->dst_mac);
8350 ether_addr_copy(cld->inner_mac, filter->src_mac);
8351
8352 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8353 return;
8354
8355 if (filter->n_proto == ETH_P_IPV6) {
8356 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
8357 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8358 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8359
8360 *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8361 }
8362 } else {
8363 ipa = be32_to_cpu(filter->dst_ipv4);
8364
8365 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8366 }
8367
8368 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8369
8370 /* tenant_id is not supported by FW now, once the support is enabled
8371 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8372 */
8373 if (filter->tenant_id)
8374 return;
8375 }
8376
8377 /**
8378 * i40e_add_del_cloud_filter - Add/del cloud filter
8379 * @vsi: pointer to VSI
8380 * @filter: cloud filter rule
8381 * @add: if true, add, if false, delete
8382 *
8383 * Add or delete a cloud filter for a specific flow spec.
8384 * Returns 0 if the filter were successfully added.
8385 **/
i40e_add_del_cloud_filter(struct i40e_vsi * vsi,struct i40e_cloud_filter * filter,bool add)8386 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8387 struct i40e_cloud_filter *filter, bool add)
8388 {
8389 struct i40e_aqc_cloud_filters_element_data cld_filter;
8390 struct i40e_pf *pf = vsi->back;
8391 int ret;
8392 static const u16 flag_table[128] = {
8393 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
8394 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8395 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
8396 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8397 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
8398 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8399 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8400 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8401 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8402 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8403 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8404 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8405 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8406 I40E_AQC_ADD_CLOUD_FILTER_IIP,
8407 };
8408
8409 if (filter->flags >= ARRAY_SIZE(flag_table))
8410 return -EIO;
8411
8412 memset(&cld_filter, 0, sizeof(cld_filter));
8413
8414 /* copy element needed to add cloud filter from filter */
8415 i40e_set_cld_element(filter, &cld_filter);
8416
8417 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8418 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8419 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8420
8421 if (filter->n_proto == ETH_P_IPV6)
8422 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8423 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8424 else
8425 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8426 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8427
8428 if (add)
8429 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8430 &cld_filter, 1);
8431 else
8432 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8433 &cld_filter, 1);
8434 if (ret)
8435 dev_dbg(&pf->pdev->dev,
8436 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8437 add ? "add" : "delete", filter->dst_port, ret,
8438 pf->hw.aq.asq_last_status);
8439 else
8440 dev_info(&pf->pdev->dev,
8441 "%s cloud filter for VSI: %d\n",
8442 add ? "Added" : "Deleted", filter->seid);
8443 return ret;
8444 }
8445
8446 /**
8447 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8448 * @vsi: pointer to VSI
8449 * @filter: cloud filter rule
8450 * @add: if true, add, if false, delete
8451 *
8452 * Add or delete a cloud filter for a specific flow spec using big buffer.
8453 * Returns 0 if the filter were successfully added.
8454 **/
i40e_add_del_cloud_filter_big_buf(struct i40e_vsi * vsi,struct i40e_cloud_filter * filter,bool add)8455 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8456 struct i40e_cloud_filter *filter,
8457 bool add)
8458 {
8459 struct i40e_aqc_cloud_filters_element_bb cld_filter;
8460 struct i40e_pf *pf = vsi->back;
8461 int ret;
8462
8463 /* Both (src/dst) valid mac_addr are not supported */
8464 if ((is_valid_ether_addr(filter->dst_mac) &&
8465 is_valid_ether_addr(filter->src_mac)) ||
8466 (is_multicast_ether_addr(filter->dst_mac) &&
8467 is_multicast_ether_addr(filter->src_mac)))
8468 return -EOPNOTSUPP;
8469
8470 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8471 * ports are not supported via big buffer now.
8472 */
8473 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8474 return -EOPNOTSUPP;
8475
8476 /* adding filter using src_port/src_ip is not supported at this stage */
8477 if (filter->src_port ||
8478 (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8479 !ipv6_addr_any(&filter->ip.v6.src_ip6))
8480 return -EOPNOTSUPP;
8481
8482 memset(&cld_filter, 0, sizeof(cld_filter));
8483
8484 /* copy element needed to add cloud filter from filter */
8485 i40e_set_cld_element(filter, &cld_filter.element);
8486
8487 if (is_valid_ether_addr(filter->dst_mac) ||
8488 is_valid_ether_addr(filter->src_mac) ||
8489 is_multicast_ether_addr(filter->dst_mac) ||
8490 is_multicast_ether_addr(filter->src_mac)) {
8491 /* MAC + IP : unsupported mode */
8492 if (filter->dst_ipv4)
8493 return -EOPNOTSUPP;
8494
8495 /* since we validated that L4 port must be valid before
8496 * we get here, start with respective "flags" value
8497 * and update if vlan is present or not
8498 */
8499 cld_filter.element.flags =
8500 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8501
8502 if (filter->vlan_id) {
8503 cld_filter.element.flags =
8504 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8505 }
8506
8507 } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8508 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8509 cld_filter.element.flags =
8510 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8511 if (filter->n_proto == ETH_P_IPV6)
8512 cld_filter.element.flags |=
8513 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8514 else
8515 cld_filter.element.flags |=
8516 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8517 } else {
8518 dev_err(&pf->pdev->dev,
8519 "either mac or ip has to be valid for cloud filter\n");
8520 return -EINVAL;
8521 }
8522
8523 /* Now copy L4 port in Byte 6..7 in general fields */
8524 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8525 be16_to_cpu(filter->dst_port);
8526
8527 if (add) {
8528 /* Validate current device switch mode, change if necessary */
8529 ret = i40e_validate_and_set_switch_mode(vsi);
8530 if (ret) {
8531 dev_err(&pf->pdev->dev,
8532 "failed to set switch mode, ret %d\n",
8533 ret);
8534 return ret;
8535 }
8536
8537 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8538 &cld_filter, 1);
8539 } else {
8540 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8541 &cld_filter, 1);
8542 }
8543
8544 if (ret)
8545 dev_dbg(&pf->pdev->dev,
8546 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8547 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8548 else
8549 dev_info(&pf->pdev->dev,
8550 "%s cloud filter for VSI: %d, L4 port: %d\n",
8551 add ? "add" : "delete", filter->seid,
8552 ntohs(filter->dst_port));
8553 return ret;
8554 }
8555
8556 /**
8557 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8558 * @vsi: Pointer to VSI
8559 * @f: Pointer to struct flow_cls_offload
8560 * @filter: Pointer to cloud filter structure
8561 *
8562 **/
i40e_parse_cls_flower(struct i40e_vsi * vsi,struct flow_cls_offload * f,struct i40e_cloud_filter * filter)8563 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8564 struct flow_cls_offload *f,
8565 struct i40e_cloud_filter *filter)
8566 {
8567 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8568 struct flow_dissector *dissector = rule->match.dissector;
8569 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8570 struct i40e_pf *pf = vsi->back;
8571 u8 field_flags = 0;
8572
8573 if (dissector->used_keys &
8574 ~(BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |
8575 BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |
8576 BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8577 BIT_ULL(FLOW_DISSECTOR_KEY_VLAN) |
8578 BIT_ULL(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8579 BIT_ULL(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8580 BIT_ULL(FLOW_DISSECTOR_KEY_PORTS) |
8581 BIT_ULL(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8582 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%llx\n",
8583 dissector->used_keys);
8584 return -EOPNOTSUPP;
8585 }
8586
8587 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8588 struct flow_match_enc_keyid match;
8589
8590 flow_rule_match_enc_keyid(rule, &match);
8591 if (match.mask->keyid != 0)
8592 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8593
8594 filter->tenant_id = be32_to_cpu(match.key->keyid);
8595 }
8596
8597 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8598 struct flow_match_basic match;
8599
8600 flow_rule_match_basic(rule, &match);
8601 n_proto_key = ntohs(match.key->n_proto);
8602 n_proto_mask = ntohs(match.mask->n_proto);
8603
8604 if (n_proto_key == ETH_P_ALL) {
8605 n_proto_key = 0;
8606 n_proto_mask = 0;
8607 }
8608 filter->n_proto = n_proto_key & n_proto_mask;
8609 filter->ip_proto = match.key->ip_proto;
8610 }
8611
8612 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8613 struct flow_match_eth_addrs match;
8614
8615 flow_rule_match_eth_addrs(rule, &match);
8616
8617 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8618 if (!is_zero_ether_addr(match.mask->dst)) {
8619 if (is_broadcast_ether_addr(match.mask->dst)) {
8620 field_flags |= I40E_CLOUD_FIELD_OMAC;
8621 } else {
8622 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8623 match.mask->dst);
8624 return -EIO;
8625 }
8626 }
8627
8628 if (!is_zero_ether_addr(match.mask->src)) {
8629 if (is_broadcast_ether_addr(match.mask->src)) {
8630 field_flags |= I40E_CLOUD_FIELD_IMAC;
8631 } else {
8632 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8633 match.mask->src);
8634 return -EIO;
8635 }
8636 }
8637 ether_addr_copy(filter->dst_mac, match.key->dst);
8638 ether_addr_copy(filter->src_mac, match.key->src);
8639 }
8640
8641 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8642 struct flow_match_vlan match;
8643
8644 flow_rule_match_vlan(rule, &match);
8645 if (match.mask->vlan_id) {
8646 if (match.mask->vlan_id == VLAN_VID_MASK) {
8647 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8648
8649 } else {
8650 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8651 match.mask->vlan_id);
8652 return -EIO;
8653 }
8654 }
8655
8656 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8657 }
8658
8659 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8660 struct flow_match_control match;
8661
8662 flow_rule_match_control(rule, &match);
8663 addr_type = match.key->addr_type;
8664 }
8665
8666 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8667 struct flow_match_ipv4_addrs match;
8668
8669 flow_rule_match_ipv4_addrs(rule, &match);
8670 if (match.mask->dst) {
8671 if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8672 field_flags |= I40E_CLOUD_FIELD_IIP;
8673 } else {
8674 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8675 &match.mask->dst);
8676 return -EIO;
8677 }
8678 }
8679
8680 if (match.mask->src) {
8681 if (match.mask->src == cpu_to_be32(0xffffffff)) {
8682 field_flags |= I40E_CLOUD_FIELD_IIP;
8683 } else {
8684 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8685 &match.mask->src);
8686 return -EIO;
8687 }
8688 }
8689
8690 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8691 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8692 return -EIO;
8693 }
8694 filter->dst_ipv4 = match.key->dst;
8695 filter->src_ipv4 = match.key->src;
8696 }
8697
8698 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8699 struct flow_match_ipv6_addrs match;
8700
8701 flow_rule_match_ipv6_addrs(rule, &match);
8702
8703 /* src and dest IPV6 address should not be LOOPBACK
8704 * (0:0:0:0:0:0:0:1), which can be represented as ::1
8705 */
8706 if (ipv6_addr_loopback(&match.key->dst) ||
8707 ipv6_addr_loopback(&match.key->src)) {
8708 dev_err(&pf->pdev->dev,
8709 "Bad ipv6, addr is LOOPBACK\n");
8710 return -EIO;
8711 }
8712 if (!ipv6_addr_any(&match.mask->dst) ||
8713 !ipv6_addr_any(&match.mask->src))
8714 field_flags |= I40E_CLOUD_FIELD_IIP;
8715
8716 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8717 sizeof(filter->src_ipv6));
8718 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8719 sizeof(filter->dst_ipv6));
8720 }
8721
8722 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8723 struct flow_match_ports match;
8724
8725 flow_rule_match_ports(rule, &match);
8726 if (match.mask->src) {
8727 if (match.mask->src == cpu_to_be16(0xffff)) {
8728 field_flags |= I40E_CLOUD_FIELD_IIP;
8729 } else {
8730 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8731 be16_to_cpu(match.mask->src));
8732 return -EIO;
8733 }
8734 }
8735
8736 if (match.mask->dst) {
8737 if (match.mask->dst == cpu_to_be16(0xffff)) {
8738 field_flags |= I40E_CLOUD_FIELD_IIP;
8739 } else {
8740 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8741 be16_to_cpu(match.mask->dst));
8742 return -EIO;
8743 }
8744 }
8745
8746 filter->dst_port = match.key->dst;
8747 filter->src_port = match.key->src;
8748
8749 switch (filter->ip_proto) {
8750 case IPPROTO_TCP:
8751 case IPPROTO_UDP:
8752 break;
8753 default:
8754 dev_err(&pf->pdev->dev,
8755 "Only UDP and TCP transport are supported\n");
8756 return -EINVAL;
8757 }
8758 }
8759 filter->flags = field_flags;
8760 return 0;
8761 }
8762
8763 /**
8764 * i40e_handle_tclass: Forward to a traffic class on the device
8765 * @vsi: Pointer to VSI
8766 * @tc: traffic class index on the device
8767 * @filter: Pointer to cloud filter structure
8768 *
8769 **/
i40e_handle_tclass(struct i40e_vsi * vsi,u32 tc,struct i40e_cloud_filter * filter)8770 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8771 struct i40e_cloud_filter *filter)
8772 {
8773 struct i40e_channel *ch, *ch_tmp;
8774
8775 /* direct to a traffic class on the same device */
8776 if (tc == 0) {
8777 filter->seid = vsi->seid;
8778 return 0;
8779 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8780 if (!filter->dst_port) {
8781 dev_err(&vsi->back->pdev->dev,
8782 "Specify destination port to direct to traffic class that is not default\n");
8783 return -EINVAL;
8784 }
8785 if (list_empty(&vsi->ch_list))
8786 return -EINVAL;
8787 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8788 list) {
8789 if (ch->seid == vsi->tc_seid_map[tc])
8790 filter->seid = ch->seid;
8791 }
8792 return 0;
8793 }
8794 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8795 return -EINVAL;
8796 }
8797
8798 /**
8799 * i40e_configure_clsflower - Configure tc flower filters
8800 * @vsi: Pointer to VSI
8801 * @cls_flower: Pointer to struct flow_cls_offload
8802 *
8803 **/
i40e_configure_clsflower(struct i40e_vsi * vsi,struct flow_cls_offload * cls_flower)8804 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8805 struct flow_cls_offload *cls_flower)
8806 {
8807 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8808 struct i40e_cloud_filter *filter = NULL;
8809 struct i40e_pf *pf = vsi->back;
8810 int err = 0;
8811
8812 if (tc < 0) {
8813 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8814 return -EOPNOTSUPP;
8815 }
8816
8817 if (!tc) {
8818 dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8819 return -EINVAL;
8820 }
8821
8822 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8823 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8824 return -EBUSY;
8825
8826 if (pf->fdir_pf_active_filters ||
8827 (!hlist_empty(&pf->fdir_filter_list))) {
8828 dev_err(&vsi->back->pdev->dev,
8829 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8830 return -EINVAL;
8831 }
8832
8833 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8834 dev_err(&vsi->back->pdev->dev,
8835 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8836 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8837 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8838 }
8839
8840 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8841 if (!filter)
8842 return -ENOMEM;
8843
8844 filter->cookie = cls_flower->cookie;
8845
8846 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8847 if (err < 0)
8848 goto err;
8849
8850 err = i40e_handle_tclass(vsi, tc, filter);
8851 if (err < 0)
8852 goto err;
8853
8854 /* Add cloud filter */
8855 if (filter->dst_port)
8856 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8857 else
8858 err = i40e_add_del_cloud_filter(vsi, filter, true);
8859
8860 if (err) {
8861 dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8862 err);
8863 goto err;
8864 }
8865
8866 /* add filter to the ordered list */
8867 INIT_HLIST_NODE(&filter->cloud_node);
8868
8869 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8870
8871 pf->num_cloud_filters++;
8872
8873 return err;
8874 err:
8875 kfree(filter);
8876 return err;
8877 }
8878
8879 /**
8880 * i40e_find_cloud_filter - Find the could filter in the list
8881 * @vsi: Pointer to VSI
8882 * @cookie: filter specific cookie
8883 *
8884 **/
i40e_find_cloud_filter(struct i40e_vsi * vsi,unsigned long * cookie)8885 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8886 unsigned long *cookie)
8887 {
8888 struct i40e_cloud_filter *filter = NULL;
8889 struct hlist_node *node2;
8890
8891 hlist_for_each_entry_safe(filter, node2,
8892 &vsi->back->cloud_filter_list, cloud_node)
8893 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8894 return filter;
8895 return NULL;
8896 }
8897
8898 /**
8899 * i40e_delete_clsflower - Remove tc flower filters
8900 * @vsi: Pointer to VSI
8901 * @cls_flower: Pointer to struct flow_cls_offload
8902 *
8903 **/
i40e_delete_clsflower(struct i40e_vsi * vsi,struct flow_cls_offload * cls_flower)8904 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8905 struct flow_cls_offload *cls_flower)
8906 {
8907 struct i40e_cloud_filter *filter = NULL;
8908 struct i40e_pf *pf = vsi->back;
8909 int err = 0;
8910
8911 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8912
8913 if (!filter)
8914 return -EINVAL;
8915
8916 hash_del(&filter->cloud_node);
8917
8918 if (filter->dst_port)
8919 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8920 else
8921 err = i40e_add_del_cloud_filter(vsi, filter, false);
8922
8923 kfree(filter);
8924 if (err) {
8925 dev_err(&pf->pdev->dev,
8926 "Failed to delete cloud filter, err %pe\n",
8927 ERR_PTR(err));
8928 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8929 }
8930
8931 pf->num_cloud_filters--;
8932 if (!pf->num_cloud_filters)
8933 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8934 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8935 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8936 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8937 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8938 }
8939 return 0;
8940 }
8941
8942 /**
8943 * i40e_setup_tc_cls_flower - flower classifier offloads
8944 * @np: net device to configure
8945 * @cls_flower: offload data
8946 **/
i40e_setup_tc_cls_flower(struct i40e_netdev_priv * np,struct flow_cls_offload * cls_flower)8947 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8948 struct flow_cls_offload *cls_flower)
8949 {
8950 struct i40e_vsi *vsi = np->vsi;
8951
8952 switch (cls_flower->command) {
8953 case FLOW_CLS_REPLACE:
8954 return i40e_configure_clsflower(vsi, cls_flower);
8955 case FLOW_CLS_DESTROY:
8956 return i40e_delete_clsflower(vsi, cls_flower);
8957 case FLOW_CLS_STATS:
8958 return -EOPNOTSUPP;
8959 default:
8960 return -EOPNOTSUPP;
8961 }
8962 }
8963
i40e_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)8964 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8965 void *cb_priv)
8966 {
8967 struct i40e_netdev_priv *np = cb_priv;
8968
8969 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8970 return -EOPNOTSUPP;
8971
8972 switch (type) {
8973 case TC_SETUP_CLSFLOWER:
8974 return i40e_setup_tc_cls_flower(np, type_data);
8975
8976 default:
8977 return -EOPNOTSUPP;
8978 }
8979 }
8980
8981 static LIST_HEAD(i40e_block_cb_list);
8982
__i40e_setup_tc(struct net_device * netdev,enum tc_setup_type type,void * type_data)8983 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8984 void *type_data)
8985 {
8986 struct i40e_netdev_priv *np = netdev_priv(netdev);
8987
8988 switch (type) {
8989 case TC_SETUP_QDISC_MQPRIO:
8990 return i40e_setup_tc(netdev, type_data);
8991 case TC_SETUP_BLOCK:
8992 return flow_block_cb_setup_simple(type_data,
8993 &i40e_block_cb_list,
8994 i40e_setup_tc_block_cb,
8995 np, np, true);
8996 default:
8997 return -EOPNOTSUPP;
8998 }
8999 }
9000
9001 /**
9002 * i40e_open - Called when a network interface is made active
9003 * @netdev: network interface device structure
9004 *
9005 * The open entry point is called when a network interface is made
9006 * active by the system (IFF_UP). At this point all resources needed
9007 * for transmit and receive operations are allocated, the interrupt
9008 * handler is registered with the OS, the netdev watchdog subtask is
9009 * enabled, and the stack is notified that the interface is ready.
9010 *
9011 * Returns 0 on success, negative value on failure
9012 **/
i40e_open(struct net_device * netdev)9013 int i40e_open(struct net_device *netdev)
9014 {
9015 struct i40e_netdev_priv *np = netdev_priv(netdev);
9016 struct i40e_vsi *vsi = np->vsi;
9017 struct i40e_pf *pf = vsi->back;
9018 int err;
9019
9020 /* disallow open during test or if eeprom is broken */
9021 if (test_bit(__I40E_TESTING, pf->state) ||
9022 test_bit(__I40E_BAD_EEPROM, pf->state))
9023 return -EBUSY;
9024
9025 netif_carrier_off(netdev);
9026
9027 if (i40e_force_link_state(pf, true))
9028 return -EAGAIN;
9029
9030 err = i40e_vsi_open(vsi);
9031 if (err)
9032 return err;
9033
9034 /* configure global TSO hardware offload settings */
9035 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
9036 TCP_FLAG_FIN) >> 16);
9037 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
9038 TCP_FLAG_FIN |
9039 TCP_FLAG_CWR) >> 16);
9040 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
9041 udp_tunnel_get_rx_info(netdev);
9042
9043 return 0;
9044 }
9045
9046 /**
9047 * i40e_netif_set_realnum_tx_rx_queues - Update number of tx/rx queues
9048 * @vsi: vsi structure
9049 *
9050 * This updates netdev's number of tx/rx queues
9051 *
9052 * Returns status of setting tx/rx queues
9053 **/
i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi * vsi)9054 static int i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi *vsi)
9055 {
9056 int ret;
9057
9058 ret = netif_set_real_num_rx_queues(vsi->netdev,
9059 vsi->num_queue_pairs);
9060 if (ret)
9061 return ret;
9062
9063 return netif_set_real_num_tx_queues(vsi->netdev,
9064 vsi->num_queue_pairs);
9065 }
9066
9067 /**
9068 * i40e_vsi_open -
9069 * @vsi: the VSI to open
9070 *
9071 * Finish initialization of the VSI.
9072 *
9073 * Returns 0 on success, negative value on failure
9074 *
9075 * Note: expects to be called while under rtnl_lock()
9076 **/
i40e_vsi_open(struct i40e_vsi * vsi)9077 int i40e_vsi_open(struct i40e_vsi *vsi)
9078 {
9079 struct i40e_pf *pf = vsi->back;
9080 char int_name[I40E_INT_NAME_STR_LEN];
9081 int err;
9082
9083 /* allocate descriptors */
9084 err = i40e_vsi_setup_tx_resources(vsi);
9085 if (err)
9086 goto err_setup_tx;
9087 err = i40e_vsi_setup_rx_resources(vsi);
9088 if (err)
9089 goto err_setup_rx;
9090
9091 err = i40e_vsi_configure(vsi);
9092 if (err)
9093 goto err_setup_rx;
9094
9095 if (vsi->netdev) {
9096 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
9097 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
9098 err = i40e_vsi_request_irq(vsi, int_name);
9099 if (err)
9100 goto err_setup_rx;
9101
9102 /* Notify the stack of the actual queue counts. */
9103 err = i40e_netif_set_realnum_tx_rx_queues(vsi);
9104 if (err)
9105 goto err_set_queues;
9106
9107 } else if (vsi->type == I40E_VSI_FDIR) {
9108 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
9109 dev_driver_string(&pf->pdev->dev),
9110 dev_name(&pf->pdev->dev));
9111 err = i40e_vsi_request_irq(vsi, int_name);
9112 if (err)
9113 goto err_setup_rx;
9114
9115 } else {
9116 err = -EINVAL;
9117 goto err_setup_rx;
9118 }
9119
9120 err = i40e_up_complete(vsi);
9121 if (err)
9122 goto err_up_complete;
9123
9124 return 0;
9125
9126 err_up_complete:
9127 i40e_down(vsi);
9128 err_set_queues:
9129 i40e_vsi_free_irq(vsi);
9130 err_setup_rx:
9131 i40e_vsi_free_rx_resources(vsi);
9132 err_setup_tx:
9133 i40e_vsi_free_tx_resources(vsi);
9134 if (vsi == pf->vsi[pf->lan_vsi])
9135 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
9136
9137 return err;
9138 }
9139
9140 /**
9141 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
9142 * @pf: Pointer to PF
9143 *
9144 * This function destroys the hlist where all the Flow Director
9145 * filters were saved.
9146 **/
i40e_fdir_filter_exit(struct i40e_pf * pf)9147 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
9148 {
9149 struct i40e_fdir_filter *filter;
9150 struct i40e_flex_pit *pit_entry, *tmp;
9151 struct hlist_node *node2;
9152
9153 hlist_for_each_entry_safe(filter, node2,
9154 &pf->fdir_filter_list, fdir_node) {
9155 hlist_del(&filter->fdir_node);
9156 kfree(filter);
9157 }
9158
9159 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
9160 list_del(&pit_entry->list);
9161 kfree(pit_entry);
9162 }
9163 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
9164
9165 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
9166 list_del(&pit_entry->list);
9167 kfree(pit_entry);
9168 }
9169 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
9170
9171 pf->fdir_pf_active_filters = 0;
9172 i40e_reset_fdir_filter_cnt(pf);
9173
9174 /* Reprogram the default input set for TCP/IPv4 */
9175 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9176 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9177 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9178
9179 /* Reprogram the default input set for TCP/IPv6 */
9180 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
9181 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9182 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9183
9184 /* Reprogram the default input set for UDP/IPv4 */
9185 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
9186 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9187 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9188
9189 /* Reprogram the default input set for UDP/IPv6 */
9190 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
9191 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9192 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9193
9194 /* Reprogram the default input set for SCTP/IPv4 */
9195 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
9196 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9197 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9198
9199 /* Reprogram the default input set for SCTP/IPv6 */
9200 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
9201 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9202 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9203
9204 /* Reprogram the default input set for Other/IPv4 */
9205 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
9206 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9207
9208 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
9209 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9210
9211 /* Reprogram the default input set for Other/IPv6 */
9212 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
9213 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9214
9215 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
9216 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9217 }
9218
9219 /**
9220 * i40e_cloud_filter_exit - Cleans up the cloud filters
9221 * @pf: Pointer to PF
9222 *
9223 * This function destroys the hlist where all the cloud filters
9224 * were saved.
9225 **/
i40e_cloud_filter_exit(struct i40e_pf * pf)9226 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9227 {
9228 struct i40e_cloud_filter *cfilter;
9229 struct hlist_node *node;
9230
9231 hlist_for_each_entry_safe(cfilter, node,
9232 &pf->cloud_filter_list, cloud_node) {
9233 hlist_del(&cfilter->cloud_node);
9234 kfree(cfilter);
9235 }
9236 pf->num_cloud_filters = 0;
9237
9238 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
9239 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
9240 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
9241 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
9242 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
9243 }
9244 }
9245
9246 /**
9247 * i40e_close - Disables a network interface
9248 * @netdev: network interface device structure
9249 *
9250 * The close entry point is called when an interface is de-activated
9251 * by the OS. The hardware is still under the driver's control, but
9252 * this netdev interface is disabled.
9253 *
9254 * Returns 0, this is not allowed to fail
9255 **/
i40e_close(struct net_device * netdev)9256 int i40e_close(struct net_device *netdev)
9257 {
9258 struct i40e_netdev_priv *np = netdev_priv(netdev);
9259 struct i40e_vsi *vsi = np->vsi;
9260
9261 i40e_vsi_close(vsi);
9262
9263 return 0;
9264 }
9265
9266 /**
9267 * i40e_do_reset - Start a PF or Core Reset sequence
9268 * @pf: board private structure
9269 * @reset_flags: which reset is requested
9270 * @lock_acquired: indicates whether or not the lock has been acquired
9271 * before this function was called.
9272 *
9273 * The essential difference in resets is that the PF Reset
9274 * doesn't clear the packet buffers, doesn't reset the PE
9275 * firmware, and doesn't bother the other PFs on the chip.
9276 **/
i40e_do_reset(struct i40e_pf * pf,u32 reset_flags,bool lock_acquired)9277 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9278 {
9279 u32 val;
9280
9281 /* do the biggest reset indicated */
9282 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
9283
9284 /* Request a Global Reset
9285 *
9286 * This will start the chip's countdown to the actual full
9287 * chip reset event, and a warning interrupt to be sent
9288 * to all PFs, including the requestor. Our handler
9289 * for the warning interrupt will deal with the shutdown
9290 * and recovery of the switch setup.
9291 */
9292 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9293 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9294 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
9295 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9296
9297 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
9298
9299 /* Request a Core Reset
9300 *
9301 * Same as Global Reset, except does *not* include the MAC/PHY
9302 */
9303 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9304 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9305 val |= I40E_GLGEN_RTRIG_CORER_MASK;
9306 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9307 i40e_flush(&pf->hw);
9308
9309 } else if (reset_flags & I40E_PF_RESET_FLAG) {
9310
9311 /* Request a PF Reset
9312 *
9313 * Resets only the PF-specific registers
9314 *
9315 * This goes directly to the tear-down and rebuild of
9316 * the switch, since we need to do all the recovery as
9317 * for the Core Reset.
9318 */
9319 dev_dbg(&pf->pdev->dev, "PFR requested\n");
9320 i40e_handle_reset_warning(pf, lock_acquired);
9321
9322 } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
9323 /* Request a PF Reset
9324 *
9325 * Resets PF and reinitializes PFs VSI.
9326 */
9327 i40e_prep_for_reset(pf);
9328 i40e_reset_and_rebuild(pf, true, lock_acquired);
9329 dev_info(&pf->pdev->dev,
9330 pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
9331 "FW LLDP is disabled\n" :
9332 "FW LLDP is enabled\n");
9333
9334 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
9335 int v;
9336
9337 /* Find the VSI(s) that requested a re-init */
9338 dev_info(&pf->pdev->dev,
9339 "VSI reinit requested\n");
9340 for (v = 0; v < pf->num_alloc_vsi; v++) {
9341 struct i40e_vsi *vsi = pf->vsi[v];
9342
9343 if (vsi != NULL &&
9344 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
9345 vsi->state))
9346 i40e_vsi_reinit_locked(pf->vsi[v]);
9347 }
9348 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
9349 int v;
9350
9351 /* Find the VSI(s) that needs to be brought down */
9352 dev_info(&pf->pdev->dev, "VSI down requested\n");
9353 for (v = 0; v < pf->num_alloc_vsi; v++) {
9354 struct i40e_vsi *vsi = pf->vsi[v];
9355
9356 if (vsi != NULL &&
9357 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
9358 vsi->state)) {
9359 set_bit(__I40E_VSI_DOWN, vsi->state);
9360 i40e_down(vsi);
9361 }
9362 }
9363 } else {
9364 dev_info(&pf->pdev->dev,
9365 "bad reset request 0x%08x\n", reset_flags);
9366 }
9367 }
9368
9369 #ifdef CONFIG_I40E_DCB
9370 /**
9371 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
9372 * @pf: board private structure
9373 * @old_cfg: current DCB config
9374 * @new_cfg: new DCB config
9375 **/
i40e_dcb_need_reconfig(struct i40e_pf * pf,struct i40e_dcbx_config * old_cfg,struct i40e_dcbx_config * new_cfg)9376 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9377 struct i40e_dcbx_config *old_cfg,
9378 struct i40e_dcbx_config *new_cfg)
9379 {
9380 bool need_reconfig = false;
9381
9382 /* Check if ETS configuration has changed */
9383 if (memcmp(&new_cfg->etscfg,
9384 &old_cfg->etscfg,
9385 sizeof(new_cfg->etscfg))) {
9386 /* If Priority Table has changed reconfig is needed */
9387 if (memcmp(&new_cfg->etscfg.prioritytable,
9388 &old_cfg->etscfg.prioritytable,
9389 sizeof(new_cfg->etscfg.prioritytable))) {
9390 need_reconfig = true;
9391 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9392 }
9393
9394 if (memcmp(&new_cfg->etscfg.tcbwtable,
9395 &old_cfg->etscfg.tcbwtable,
9396 sizeof(new_cfg->etscfg.tcbwtable)))
9397 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9398
9399 if (memcmp(&new_cfg->etscfg.tsatable,
9400 &old_cfg->etscfg.tsatable,
9401 sizeof(new_cfg->etscfg.tsatable)))
9402 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9403 }
9404
9405 /* Check if PFC configuration has changed */
9406 if (memcmp(&new_cfg->pfc,
9407 &old_cfg->pfc,
9408 sizeof(new_cfg->pfc))) {
9409 need_reconfig = true;
9410 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9411 }
9412
9413 /* Check if APP Table has changed */
9414 if (memcmp(&new_cfg->app,
9415 &old_cfg->app,
9416 sizeof(new_cfg->app))) {
9417 need_reconfig = true;
9418 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9419 }
9420
9421 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9422 return need_reconfig;
9423 }
9424
9425 /**
9426 * i40e_handle_lldp_event - Handle LLDP Change MIB event
9427 * @pf: board private structure
9428 * @e: event info posted on ARQ
9429 **/
i40e_handle_lldp_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)9430 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9431 struct i40e_arq_event_info *e)
9432 {
9433 struct i40e_aqc_lldp_get_mib *mib =
9434 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9435 struct i40e_hw *hw = &pf->hw;
9436 struct i40e_dcbx_config tmp_dcbx_cfg;
9437 bool need_reconfig = false;
9438 int ret = 0;
9439 u8 type;
9440
9441 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9442 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9443 (hw->phy.link_info.link_speed &
9444 ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9445 !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9446 /* let firmware decide if the DCB should be disabled */
9447 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9448
9449 /* Not DCB capable or capability disabled */
9450 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9451 return ret;
9452
9453 /* Ignore if event is not for Nearest Bridge */
9454 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9455 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9456 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9457 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9458 return ret;
9459
9460 /* Check MIB Type and return if event for Remote MIB update */
9461 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9462 dev_dbg(&pf->pdev->dev,
9463 "LLDP event mib type %s\n", type ? "remote" : "local");
9464 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9465 /* Update the remote cached instance and return */
9466 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9467 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9468 &hw->remote_dcbx_config);
9469 goto exit;
9470 }
9471
9472 /* Store the old configuration */
9473 tmp_dcbx_cfg = hw->local_dcbx_config;
9474
9475 /* Reset the old DCBx configuration data */
9476 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9477 /* Get updated DCBX data from firmware */
9478 ret = i40e_get_dcb_config(&pf->hw);
9479 if (ret) {
9480 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9481 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9482 (hw->phy.link_info.link_speed &
9483 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9484 dev_warn(&pf->pdev->dev,
9485 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9486 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9487 } else {
9488 dev_info(&pf->pdev->dev,
9489 "Failed querying DCB configuration data from firmware, err %pe aq_err %s\n",
9490 ERR_PTR(ret),
9491 i40e_aq_str(&pf->hw,
9492 pf->hw.aq.asq_last_status));
9493 }
9494 goto exit;
9495 }
9496
9497 /* No change detected in DCBX configs */
9498 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9499 sizeof(tmp_dcbx_cfg))) {
9500 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9501 goto exit;
9502 }
9503
9504 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9505 &hw->local_dcbx_config);
9506
9507 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9508
9509 if (!need_reconfig)
9510 goto exit;
9511
9512 /* Enable DCB tagging only when more than one TC */
9513 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9514 pf->flags |= I40E_FLAG_DCB_ENABLED;
9515 else
9516 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9517
9518 set_bit(__I40E_PORT_SUSPENDED, pf->state);
9519 /* Reconfiguration needed quiesce all VSIs */
9520 i40e_pf_quiesce_all_vsi(pf);
9521
9522 /* Changes in configuration update VEB/VSI */
9523 i40e_dcb_reconfigure(pf);
9524
9525 ret = i40e_resume_port_tx(pf);
9526
9527 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9528 /* In case of error no point in resuming VSIs */
9529 if (ret)
9530 goto exit;
9531
9532 /* Wait for the PF's queues to be disabled */
9533 ret = i40e_pf_wait_queues_disabled(pf);
9534 if (ret) {
9535 /* Schedule PF reset to recover */
9536 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9537 i40e_service_event_schedule(pf);
9538 } else {
9539 i40e_pf_unquiesce_all_vsi(pf);
9540 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9541 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9542 }
9543
9544 exit:
9545 return ret;
9546 }
9547 #endif /* CONFIG_I40E_DCB */
9548
9549 /**
9550 * i40e_do_reset_safe - Protected reset path for userland calls.
9551 * @pf: board private structure
9552 * @reset_flags: which reset is requested
9553 *
9554 **/
i40e_do_reset_safe(struct i40e_pf * pf,u32 reset_flags)9555 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9556 {
9557 rtnl_lock();
9558 i40e_do_reset(pf, reset_flags, true);
9559 rtnl_unlock();
9560 }
9561
9562 /**
9563 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9564 * @pf: board private structure
9565 * @e: event info posted on ARQ
9566 *
9567 * Handler for LAN Queue Overflow Event generated by the firmware for PF
9568 * and VF queues
9569 **/
i40e_handle_lan_overflow_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)9570 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9571 struct i40e_arq_event_info *e)
9572 {
9573 struct i40e_aqc_lan_overflow *data =
9574 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9575 u32 queue = le32_to_cpu(data->prtdcb_rupto);
9576 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9577 struct i40e_hw *hw = &pf->hw;
9578 struct i40e_vf *vf;
9579 u16 vf_id;
9580
9581 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9582 queue, qtx_ctl);
9583
9584 /* Queue belongs to VF, find the VF and issue VF reset */
9585 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9586 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9587 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9588 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9589 vf_id -= hw->func_caps.vf_base_id;
9590 vf = &pf->vf[vf_id];
9591 i40e_vc_notify_vf_reset(vf);
9592 /* Allow VF to process pending reset notification */
9593 msleep(20);
9594 i40e_reset_vf(vf, false);
9595 }
9596 }
9597
9598 /**
9599 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9600 * @pf: board private structure
9601 **/
i40e_get_cur_guaranteed_fd_count(struct i40e_pf * pf)9602 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9603 {
9604 u32 val, fcnt_prog;
9605
9606 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9607 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9608 return fcnt_prog;
9609 }
9610
9611 /**
9612 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9613 * @pf: board private structure
9614 **/
i40e_get_current_fd_count(struct i40e_pf * pf)9615 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9616 {
9617 u32 val, fcnt_prog;
9618
9619 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9620 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9621 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9622 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9623 return fcnt_prog;
9624 }
9625
9626 /**
9627 * i40e_get_global_fd_count - Get total FD filters programmed on device
9628 * @pf: board private structure
9629 **/
i40e_get_global_fd_count(struct i40e_pf * pf)9630 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9631 {
9632 u32 val, fcnt_prog;
9633
9634 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9635 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9636 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9637 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9638 return fcnt_prog;
9639 }
9640
9641 /**
9642 * i40e_reenable_fdir_sb - Restore FDir SB capability
9643 * @pf: board private structure
9644 **/
i40e_reenable_fdir_sb(struct i40e_pf * pf)9645 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9646 {
9647 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9648 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9649 (I40E_DEBUG_FD & pf->hw.debug_mask))
9650 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9651 }
9652
9653 /**
9654 * i40e_reenable_fdir_atr - Restore FDir ATR capability
9655 * @pf: board private structure
9656 **/
i40e_reenable_fdir_atr(struct i40e_pf * pf)9657 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9658 {
9659 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9660 /* ATR uses the same filtering logic as SB rules. It only
9661 * functions properly if the input set mask is at the default
9662 * settings. It is safe to restore the default input set
9663 * because there are no active TCPv4 filter rules.
9664 */
9665 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9666 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9667 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9668
9669 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9670 (I40E_DEBUG_FD & pf->hw.debug_mask))
9671 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9672 }
9673 }
9674
9675 /**
9676 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9677 * @pf: board private structure
9678 * @filter: FDir filter to remove
9679 */
i40e_delete_invalid_filter(struct i40e_pf * pf,struct i40e_fdir_filter * filter)9680 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9681 struct i40e_fdir_filter *filter)
9682 {
9683 /* Update counters */
9684 pf->fdir_pf_active_filters--;
9685 pf->fd_inv = 0;
9686
9687 switch (filter->flow_type) {
9688 case TCP_V4_FLOW:
9689 pf->fd_tcp4_filter_cnt--;
9690 break;
9691 case UDP_V4_FLOW:
9692 pf->fd_udp4_filter_cnt--;
9693 break;
9694 case SCTP_V4_FLOW:
9695 pf->fd_sctp4_filter_cnt--;
9696 break;
9697 case TCP_V6_FLOW:
9698 pf->fd_tcp6_filter_cnt--;
9699 break;
9700 case UDP_V6_FLOW:
9701 pf->fd_udp6_filter_cnt--;
9702 break;
9703 case SCTP_V6_FLOW:
9704 pf->fd_udp6_filter_cnt--;
9705 break;
9706 case IP_USER_FLOW:
9707 switch (filter->ipl4_proto) {
9708 case IPPROTO_TCP:
9709 pf->fd_tcp4_filter_cnt--;
9710 break;
9711 case IPPROTO_UDP:
9712 pf->fd_udp4_filter_cnt--;
9713 break;
9714 case IPPROTO_SCTP:
9715 pf->fd_sctp4_filter_cnt--;
9716 break;
9717 case IPPROTO_IP:
9718 pf->fd_ip4_filter_cnt--;
9719 break;
9720 }
9721 break;
9722 case IPV6_USER_FLOW:
9723 switch (filter->ipl4_proto) {
9724 case IPPROTO_TCP:
9725 pf->fd_tcp6_filter_cnt--;
9726 break;
9727 case IPPROTO_UDP:
9728 pf->fd_udp6_filter_cnt--;
9729 break;
9730 case IPPROTO_SCTP:
9731 pf->fd_sctp6_filter_cnt--;
9732 break;
9733 case IPPROTO_IP:
9734 pf->fd_ip6_filter_cnt--;
9735 break;
9736 }
9737 break;
9738 }
9739
9740 /* Remove the filter from the list and free memory */
9741 hlist_del(&filter->fdir_node);
9742 kfree(filter);
9743 }
9744
9745 /**
9746 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9747 * @pf: board private structure
9748 **/
i40e_fdir_check_and_reenable(struct i40e_pf * pf)9749 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9750 {
9751 struct i40e_fdir_filter *filter;
9752 u32 fcnt_prog, fcnt_avail;
9753 struct hlist_node *node;
9754
9755 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9756 return;
9757
9758 /* Check if we have enough room to re-enable FDir SB capability. */
9759 fcnt_prog = i40e_get_global_fd_count(pf);
9760 fcnt_avail = pf->fdir_pf_filter_count;
9761 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9762 (pf->fd_add_err == 0) ||
9763 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9764 i40e_reenable_fdir_sb(pf);
9765
9766 /* We should wait for even more space before re-enabling ATR.
9767 * Additionally, we cannot enable ATR as long as we still have TCP SB
9768 * rules active.
9769 */
9770 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9771 pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9772 i40e_reenable_fdir_atr(pf);
9773
9774 /* if hw had a problem adding a filter, delete it */
9775 if (pf->fd_inv > 0) {
9776 hlist_for_each_entry_safe(filter, node,
9777 &pf->fdir_filter_list, fdir_node)
9778 if (filter->fd_id == pf->fd_inv)
9779 i40e_delete_invalid_filter(pf, filter);
9780 }
9781 }
9782
9783 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9784 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9785 /**
9786 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9787 * @pf: board private structure
9788 **/
i40e_fdir_flush_and_replay(struct i40e_pf * pf)9789 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9790 {
9791 unsigned long min_flush_time;
9792 int flush_wait_retry = 50;
9793 bool disable_atr = false;
9794 int fd_room;
9795 int reg;
9796
9797 if (!time_after(jiffies, pf->fd_flush_timestamp +
9798 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9799 return;
9800
9801 /* If the flush is happening too quick and we have mostly SB rules we
9802 * should not re-enable ATR for some time.
9803 */
9804 min_flush_time = pf->fd_flush_timestamp +
9805 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9806 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9807
9808 if (!(time_after(jiffies, min_flush_time)) &&
9809 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9810 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9811 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9812 disable_atr = true;
9813 }
9814
9815 pf->fd_flush_timestamp = jiffies;
9816 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9817 /* flush all filters */
9818 wr32(&pf->hw, I40E_PFQF_CTL_1,
9819 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9820 i40e_flush(&pf->hw);
9821 pf->fd_flush_cnt++;
9822 pf->fd_add_err = 0;
9823 do {
9824 /* Check FD flush status every 5-6msec */
9825 usleep_range(5000, 6000);
9826 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9827 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9828 break;
9829 } while (flush_wait_retry--);
9830 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9831 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9832 } else {
9833 /* replay sideband filters */
9834 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9835 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9836 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9837 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9838 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9839 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9840 }
9841 }
9842
9843 /**
9844 * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9845 * @pf: board private structure
9846 **/
i40e_get_current_atr_cnt(struct i40e_pf * pf)9847 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9848 {
9849 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9850 }
9851
9852 /**
9853 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9854 * @pf: board private structure
9855 **/
i40e_fdir_reinit_subtask(struct i40e_pf * pf)9856 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9857 {
9858
9859 /* if interface is down do nothing */
9860 if (test_bit(__I40E_DOWN, pf->state))
9861 return;
9862
9863 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9864 i40e_fdir_flush_and_replay(pf);
9865
9866 i40e_fdir_check_and_reenable(pf);
9867
9868 }
9869
9870 /**
9871 * i40e_vsi_link_event - notify VSI of a link event
9872 * @vsi: vsi to be notified
9873 * @link_up: link up or down
9874 **/
i40e_vsi_link_event(struct i40e_vsi * vsi,bool link_up)9875 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9876 {
9877 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9878 return;
9879
9880 switch (vsi->type) {
9881 case I40E_VSI_MAIN:
9882 if (!vsi->netdev || !vsi->netdev_registered)
9883 break;
9884
9885 if (link_up) {
9886 netif_carrier_on(vsi->netdev);
9887 netif_tx_wake_all_queues(vsi->netdev);
9888 } else {
9889 netif_carrier_off(vsi->netdev);
9890 netif_tx_stop_all_queues(vsi->netdev);
9891 }
9892 break;
9893
9894 case I40E_VSI_SRIOV:
9895 case I40E_VSI_VMDQ2:
9896 case I40E_VSI_CTRL:
9897 case I40E_VSI_IWARP:
9898 case I40E_VSI_MIRROR:
9899 default:
9900 /* there is no notification for other VSIs */
9901 break;
9902 }
9903 }
9904
9905 /**
9906 * i40e_veb_link_event - notify elements on the veb of a link event
9907 * @veb: veb to be notified
9908 * @link_up: link up or down
9909 **/
i40e_veb_link_event(struct i40e_veb * veb,bool link_up)9910 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9911 {
9912 struct i40e_pf *pf;
9913 int i;
9914
9915 if (!veb || !veb->pf)
9916 return;
9917 pf = veb->pf;
9918
9919 /* depth first... */
9920 for (i = 0; i < I40E_MAX_VEB; i++)
9921 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9922 i40e_veb_link_event(pf->veb[i], link_up);
9923
9924 /* ... now the local VSIs */
9925 for (i = 0; i < pf->num_alloc_vsi; i++)
9926 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9927 i40e_vsi_link_event(pf->vsi[i], link_up);
9928 }
9929
9930 /**
9931 * i40e_link_event - Update netif_carrier status
9932 * @pf: board private structure
9933 **/
i40e_link_event(struct i40e_pf * pf)9934 static void i40e_link_event(struct i40e_pf *pf)
9935 {
9936 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9937 u8 new_link_speed, old_link_speed;
9938 bool new_link, old_link;
9939 int status;
9940 #ifdef CONFIG_I40E_DCB
9941 int err;
9942 #endif /* CONFIG_I40E_DCB */
9943
9944 /* set this to force the get_link_status call to refresh state */
9945 pf->hw.phy.get_link_info = true;
9946 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9947 status = i40e_get_link_status(&pf->hw, &new_link);
9948
9949 /* On success, disable temp link polling */
9950 if (status == 0) {
9951 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9952 } else {
9953 /* Enable link polling temporarily until i40e_get_link_status
9954 * returns 0
9955 */
9956 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9957 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9958 status);
9959 return;
9960 }
9961
9962 old_link_speed = pf->hw.phy.link_info_old.link_speed;
9963 new_link_speed = pf->hw.phy.link_info.link_speed;
9964
9965 if (new_link == old_link &&
9966 new_link_speed == old_link_speed &&
9967 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9968 new_link == netif_carrier_ok(vsi->netdev)))
9969 return;
9970
9971 i40e_print_link_message(vsi, new_link);
9972
9973 /* Notify the base of the switch tree connected to
9974 * the link. Floating VEBs are not notified.
9975 */
9976 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9977 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9978 else
9979 i40e_vsi_link_event(vsi, new_link);
9980
9981 if (pf->vf)
9982 i40e_vc_notify_link_state(pf);
9983
9984 if (pf->flags & I40E_FLAG_PTP)
9985 i40e_ptp_set_increment(pf);
9986 #ifdef CONFIG_I40E_DCB
9987 if (new_link == old_link)
9988 return;
9989 /* Not SW DCB so firmware will take care of default settings */
9990 if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9991 return;
9992
9993 /* We cover here only link down, as after link up in case of SW DCB
9994 * SW LLDP agent will take care of setting it up
9995 */
9996 if (!new_link) {
9997 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9998 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9999 err = i40e_dcb_sw_default_config(pf);
10000 if (err) {
10001 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10002 I40E_FLAG_DCB_ENABLED);
10003 } else {
10004 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
10005 DCB_CAP_DCBX_VER_IEEE;
10006 pf->flags |= I40E_FLAG_DCB_CAPABLE;
10007 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
10008 }
10009 }
10010 #endif /* CONFIG_I40E_DCB */
10011 }
10012
10013 /**
10014 * i40e_watchdog_subtask - periodic checks not using event driven response
10015 * @pf: board private structure
10016 **/
i40e_watchdog_subtask(struct i40e_pf * pf)10017 static void i40e_watchdog_subtask(struct i40e_pf *pf)
10018 {
10019 int i;
10020
10021 /* if interface is down do nothing */
10022 if (test_bit(__I40E_DOWN, pf->state) ||
10023 test_bit(__I40E_CONFIG_BUSY, pf->state))
10024 return;
10025
10026 /* make sure we don't do these things too often */
10027 if (time_before(jiffies, (pf->service_timer_previous +
10028 pf->service_timer_period)))
10029 return;
10030 pf->service_timer_previous = jiffies;
10031
10032 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
10033 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
10034 i40e_link_event(pf);
10035
10036 /* Update the stats for active netdevs so the network stack
10037 * can look at updated numbers whenever it cares to
10038 */
10039 for (i = 0; i < pf->num_alloc_vsi; i++)
10040 if (pf->vsi[i] && pf->vsi[i]->netdev)
10041 i40e_update_stats(pf->vsi[i]);
10042
10043 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
10044 /* Update the stats for the active switching components */
10045 for (i = 0; i < I40E_MAX_VEB; i++)
10046 if (pf->veb[i])
10047 i40e_update_veb_stats(pf->veb[i]);
10048 }
10049
10050 i40e_ptp_rx_hang(pf);
10051 i40e_ptp_tx_hang(pf);
10052 }
10053
10054 /**
10055 * i40e_reset_subtask - Set up for resetting the device and driver
10056 * @pf: board private structure
10057 **/
i40e_reset_subtask(struct i40e_pf * pf)10058 static void i40e_reset_subtask(struct i40e_pf *pf)
10059 {
10060 u32 reset_flags = 0;
10061
10062 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
10063 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
10064 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
10065 }
10066 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
10067 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
10068 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
10069 }
10070 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
10071 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
10072 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
10073 }
10074 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
10075 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
10076 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
10077 }
10078 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
10079 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
10080 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
10081 }
10082
10083 /* If there's a recovery already waiting, it takes
10084 * precedence before starting a new reset sequence.
10085 */
10086 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
10087 i40e_prep_for_reset(pf);
10088 i40e_reset(pf);
10089 i40e_rebuild(pf, false, false);
10090 }
10091
10092 /* If we're already down or resetting, just bail */
10093 if (reset_flags &&
10094 !test_bit(__I40E_DOWN, pf->state) &&
10095 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
10096 i40e_do_reset(pf, reset_flags, false);
10097 }
10098 }
10099
10100 /**
10101 * i40e_handle_link_event - Handle link event
10102 * @pf: board private structure
10103 * @e: event info posted on ARQ
10104 **/
i40e_handle_link_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)10105 static void i40e_handle_link_event(struct i40e_pf *pf,
10106 struct i40e_arq_event_info *e)
10107 {
10108 struct i40e_aqc_get_link_status *status =
10109 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
10110
10111 /* Do a new status request to re-enable LSE reporting
10112 * and load new status information into the hw struct
10113 * This completely ignores any state information
10114 * in the ARQ event info, instead choosing to always
10115 * issue the AQ update link status command.
10116 */
10117 i40e_link_event(pf);
10118
10119 /* Check if module meets thermal requirements */
10120 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
10121 dev_err(&pf->pdev->dev,
10122 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
10123 dev_err(&pf->pdev->dev,
10124 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10125 } else {
10126 /* check for unqualified module, if link is down, suppress
10127 * the message if link was forced to be down.
10128 */
10129 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
10130 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
10131 (!(status->link_info & I40E_AQ_LINK_UP)) &&
10132 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
10133 dev_err(&pf->pdev->dev,
10134 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
10135 dev_err(&pf->pdev->dev,
10136 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10137 }
10138 }
10139 }
10140
10141 /**
10142 * i40e_clean_adminq_subtask - Clean the AdminQ rings
10143 * @pf: board private structure
10144 **/
i40e_clean_adminq_subtask(struct i40e_pf * pf)10145 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
10146 {
10147 struct i40e_arq_event_info event;
10148 struct i40e_hw *hw = &pf->hw;
10149 u16 pending, i = 0;
10150 u16 opcode;
10151 u32 oldval;
10152 int ret;
10153 u32 val;
10154
10155 /* Do not run clean AQ when PF reset fails */
10156 if (test_bit(__I40E_RESET_FAILED, pf->state))
10157 return;
10158
10159 /* check for error indications */
10160 val = rd32(&pf->hw, pf->hw.aq.arq.len);
10161 oldval = val;
10162 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
10163 if (hw->debug_mask & I40E_DEBUG_AQ)
10164 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
10165 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
10166 }
10167 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
10168 if (hw->debug_mask & I40E_DEBUG_AQ)
10169 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
10170 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
10171 pf->arq_overflows++;
10172 }
10173 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
10174 if (hw->debug_mask & I40E_DEBUG_AQ)
10175 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
10176 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
10177 }
10178 if (oldval != val)
10179 wr32(&pf->hw, pf->hw.aq.arq.len, val);
10180
10181 val = rd32(&pf->hw, pf->hw.aq.asq.len);
10182 oldval = val;
10183 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
10184 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10185 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
10186 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
10187 }
10188 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
10189 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10190 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
10191 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
10192 }
10193 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
10194 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10195 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
10196 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
10197 }
10198 if (oldval != val)
10199 wr32(&pf->hw, pf->hw.aq.asq.len, val);
10200
10201 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
10202 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
10203 if (!event.msg_buf)
10204 return;
10205
10206 do {
10207 ret = i40e_clean_arq_element(hw, &event, &pending);
10208 if (ret == -EALREADY)
10209 break;
10210 else if (ret) {
10211 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10212 break;
10213 }
10214
10215 opcode = le16_to_cpu(event.desc.opcode);
10216 switch (opcode) {
10217
10218 case i40e_aqc_opc_get_link_status:
10219 rtnl_lock();
10220 i40e_handle_link_event(pf, &event);
10221 rtnl_unlock();
10222 break;
10223 case i40e_aqc_opc_send_msg_to_pf:
10224 ret = i40e_vc_process_vf_msg(pf,
10225 le16_to_cpu(event.desc.retval),
10226 le32_to_cpu(event.desc.cookie_high),
10227 le32_to_cpu(event.desc.cookie_low),
10228 event.msg_buf,
10229 event.msg_len);
10230 break;
10231 case i40e_aqc_opc_lldp_update_mib:
10232 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10233 #ifdef CONFIG_I40E_DCB
10234 rtnl_lock();
10235 i40e_handle_lldp_event(pf, &event);
10236 rtnl_unlock();
10237 #endif /* CONFIG_I40E_DCB */
10238 break;
10239 case i40e_aqc_opc_event_lan_overflow:
10240 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10241 i40e_handle_lan_overflow_event(pf, &event);
10242 break;
10243 case i40e_aqc_opc_send_msg_to_peer:
10244 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10245 break;
10246 case i40e_aqc_opc_nvm_erase:
10247 case i40e_aqc_opc_nvm_update:
10248 case i40e_aqc_opc_oem_post_update:
10249 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10250 "ARQ NVM operation 0x%04x completed\n",
10251 opcode);
10252 break;
10253 default:
10254 dev_info(&pf->pdev->dev,
10255 "ARQ: Unknown event 0x%04x ignored\n",
10256 opcode);
10257 break;
10258 }
10259 } while (i++ < pf->adminq_work_limit);
10260
10261 if (i < pf->adminq_work_limit)
10262 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
10263
10264 /* re-enable Admin queue interrupt cause */
10265 val = rd32(hw, I40E_PFINT_ICR0_ENA);
10266 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
10267 wr32(hw, I40E_PFINT_ICR0_ENA, val);
10268 i40e_flush(hw);
10269
10270 kfree(event.msg_buf);
10271 }
10272
10273 /**
10274 * i40e_verify_eeprom - make sure eeprom is good to use
10275 * @pf: board private structure
10276 **/
i40e_verify_eeprom(struct i40e_pf * pf)10277 static void i40e_verify_eeprom(struct i40e_pf *pf)
10278 {
10279 int err;
10280
10281 err = i40e_diag_eeprom_test(&pf->hw);
10282 if (err) {
10283 /* retry in case of garbage read */
10284 err = i40e_diag_eeprom_test(&pf->hw);
10285 if (err) {
10286 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10287 err);
10288 set_bit(__I40E_BAD_EEPROM, pf->state);
10289 }
10290 }
10291
10292 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10293 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10294 clear_bit(__I40E_BAD_EEPROM, pf->state);
10295 }
10296 }
10297
10298 /**
10299 * i40e_enable_pf_switch_lb
10300 * @pf: pointer to the PF structure
10301 *
10302 * enable switch loop back or die - no point in a return value
10303 **/
i40e_enable_pf_switch_lb(struct i40e_pf * pf)10304 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10305 {
10306 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10307 struct i40e_vsi_context ctxt;
10308 int ret;
10309
10310 ctxt.seid = pf->main_vsi_seid;
10311 ctxt.pf_num = pf->hw.pf_id;
10312 ctxt.vf_num = 0;
10313 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10314 if (ret) {
10315 dev_info(&pf->pdev->dev,
10316 "couldn't get PF vsi config, err %pe aq_err %s\n",
10317 ERR_PTR(ret),
10318 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10319 return;
10320 }
10321 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10322 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10323 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10324
10325 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10326 if (ret) {
10327 dev_info(&pf->pdev->dev,
10328 "update vsi switch failed, err %pe aq_err %s\n",
10329 ERR_PTR(ret),
10330 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10331 }
10332 }
10333
10334 /**
10335 * i40e_disable_pf_switch_lb
10336 * @pf: pointer to the PF structure
10337 *
10338 * disable switch loop back or die - no point in a return value
10339 **/
i40e_disable_pf_switch_lb(struct i40e_pf * pf)10340 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10341 {
10342 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10343 struct i40e_vsi_context ctxt;
10344 int ret;
10345
10346 ctxt.seid = pf->main_vsi_seid;
10347 ctxt.pf_num = pf->hw.pf_id;
10348 ctxt.vf_num = 0;
10349 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10350 if (ret) {
10351 dev_info(&pf->pdev->dev,
10352 "couldn't get PF vsi config, err %pe aq_err %s\n",
10353 ERR_PTR(ret),
10354 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10355 return;
10356 }
10357 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10358 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10359 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10360
10361 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10362 if (ret) {
10363 dev_info(&pf->pdev->dev,
10364 "update vsi switch failed, err %pe aq_err %s\n",
10365 ERR_PTR(ret),
10366 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10367 }
10368 }
10369
10370 /**
10371 * i40e_config_bridge_mode - Configure the HW bridge mode
10372 * @veb: pointer to the bridge instance
10373 *
10374 * Configure the loop back mode for the LAN VSI that is downlink to the
10375 * specified HW bridge instance. It is expected this function is called
10376 * when a new HW bridge is instantiated.
10377 **/
i40e_config_bridge_mode(struct i40e_veb * veb)10378 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10379 {
10380 struct i40e_pf *pf = veb->pf;
10381
10382 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10383 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10384 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10385 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10386 i40e_disable_pf_switch_lb(pf);
10387 else
10388 i40e_enable_pf_switch_lb(pf);
10389 }
10390
10391 /**
10392 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10393 * @veb: pointer to the VEB instance
10394 *
10395 * This is a recursive function that first builds the attached VSIs then
10396 * recurses in to build the next layer of VEB. We track the connections
10397 * through our own index numbers because the seid's from the HW could
10398 * change across the reset.
10399 **/
i40e_reconstitute_veb(struct i40e_veb * veb)10400 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10401 {
10402 struct i40e_vsi *ctl_vsi = NULL;
10403 struct i40e_pf *pf = veb->pf;
10404 int v, veb_idx;
10405 int ret;
10406
10407 /* build VSI that owns this VEB, temporarily attached to base VEB */
10408 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10409 if (pf->vsi[v] &&
10410 pf->vsi[v]->veb_idx == veb->idx &&
10411 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10412 ctl_vsi = pf->vsi[v];
10413 break;
10414 }
10415 }
10416 if (!ctl_vsi) {
10417 dev_info(&pf->pdev->dev,
10418 "missing owner VSI for veb_idx %d\n", veb->idx);
10419 ret = -ENOENT;
10420 goto end_reconstitute;
10421 }
10422 if (ctl_vsi != pf->vsi[pf->lan_vsi])
10423 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10424 ret = i40e_add_vsi(ctl_vsi);
10425 if (ret) {
10426 dev_info(&pf->pdev->dev,
10427 "rebuild of veb_idx %d owner VSI failed: %d\n",
10428 veb->idx, ret);
10429 goto end_reconstitute;
10430 }
10431 i40e_vsi_reset_stats(ctl_vsi);
10432
10433 /* create the VEB in the switch and move the VSI onto the VEB */
10434 ret = i40e_add_veb(veb, ctl_vsi);
10435 if (ret)
10436 goto end_reconstitute;
10437
10438 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10439 veb->bridge_mode = BRIDGE_MODE_VEB;
10440 else
10441 veb->bridge_mode = BRIDGE_MODE_VEPA;
10442 i40e_config_bridge_mode(veb);
10443
10444 /* create the remaining VSIs attached to this VEB */
10445 for (v = 0; v < pf->num_alloc_vsi; v++) {
10446 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10447 continue;
10448
10449 if (pf->vsi[v]->veb_idx == veb->idx) {
10450 struct i40e_vsi *vsi = pf->vsi[v];
10451
10452 vsi->uplink_seid = veb->seid;
10453 ret = i40e_add_vsi(vsi);
10454 if (ret) {
10455 dev_info(&pf->pdev->dev,
10456 "rebuild of vsi_idx %d failed: %d\n",
10457 v, ret);
10458 goto end_reconstitute;
10459 }
10460 i40e_vsi_reset_stats(vsi);
10461 }
10462 }
10463
10464 /* create any VEBs attached to this VEB - RECURSION */
10465 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10466 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10467 pf->veb[veb_idx]->uplink_seid = veb->seid;
10468 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10469 if (ret)
10470 break;
10471 }
10472 }
10473
10474 end_reconstitute:
10475 return ret;
10476 }
10477
10478 /**
10479 * i40e_get_capabilities - get info about the HW
10480 * @pf: the PF struct
10481 * @list_type: AQ capability to be queried
10482 **/
i40e_get_capabilities(struct i40e_pf * pf,enum i40e_admin_queue_opc list_type)10483 static int i40e_get_capabilities(struct i40e_pf *pf,
10484 enum i40e_admin_queue_opc list_type)
10485 {
10486 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10487 u16 data_size;
10488 int buf_len;
10489 int err;
10490
10491 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10492 do {
10493 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10494 if (!cap_buf)
10495 return -ENOMEM;
10496
10497 /* this loads the data into the hw struct for us */
10498 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10499 &data_size, list_type,
10500 NULL);
10501 /* data loaded, buffer no longer needed */
10502 kfree(cap_buf);
10503
10504 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10505 /* retry with a larger buffer */
10506 buf_len = data_size;
10507 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10508 dev_info(&pf->pdev->dev,
10509 "capability discovery failed, err %pe aq_err %s\n",
10510 ERR_PTR(err),
10511 i40e_aq_str(&pf->hw,
10512 pf->hw.aq.asq_last_status));
10513 return -ENODEV;
10514 }
10515 } while (err);
10516
10517 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10518 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10519 dev_info(&pf->pdev->dev,
10520 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10521 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10522 pf->hw.func_caps.num_msix_vectors,
10523 pf->hw.func_caps.num_msix_vectors_vf,
10524 pf->hw.func_caps.fd_filters_guaranteed,
10525 pf->hw.func_caps.fd_filters_best_effort,
10526 pf->hw.func_caps.num_tx_qp,
10527 pf->hw.func_caps.num_vsis);
10528 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10529 dev_info(&pf->pdev->dev,
10530 "switch_mode=0x%04x, function_valid=0x%08x\n",
10531 pf->hw.dev_caps.switch_mode,
10532 pf->hw.dev_caps.valid_functions);
10533 dev_info(&pf->pdev->dev,
10534 "SR-IOV=%d, num_vfs for all function=%u\n",
10535 pf->hw.dev_caps.sr_iov_1_1,
10536 pf->hw.dev_caps.num_vfs);
10537 dev_info(&pf->pdev->dev,
10538 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10539 pf->hw.dev_caps.num_vsis,
10540 pf->hw.dev_caps.num_rx_qp,
10541 pf->hw.dev_caps.num_tx_qp);
10542 }
10543 }
10544 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10545 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10546 + pf->hw.func_caps.num_vfs)
10547 if (pf->hw.revision_id == 0 &&
10548 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10549 dev_info(&pf->pdev->dev,
10550 "got num_vsis %d, setting num_vsis to %d\n",
10551 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10552 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10553 }
10554 }
10555 return 0;
10556 }
10557
10558 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10559
10560 /**
10561 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10562 * @pf: board private structure
10563 **/
i40e_fdir_sb_setup(struct i40e_pf * pf)10564 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10565 {
10566 struct i40e_vsi *vsi;
10567
10568 /* quick workaround for an NVM issue that leaves a critical register
10569 * uninitialized
10570 */
10571 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10572 static const u32 hkey[] = {
10573 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10574 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10575 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10576 0x95b3a76d};
10577 int i;
10578
10579 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10580 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10581 }
10582
10583 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10584 return;
10585
10586 /* find existing VSI and see if it needs configuring */
10587 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10588
10589 /* create a new VSI if none exists */
10590 if (!vsi) {
10591 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10592 pf->vsi[pf->lan_vsi]->seid, 0);
10593 if (!vsi) {
10594 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10595 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10596 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10597 return;
10598 }
10599 }
10600
10601 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10602 }
10603
10604 /**
10605 * i40e_fdir_teardown - release the Flow Director resources
10606 * @pf: board private structure
10607 **/
i40e_fdir_teardown(struct i40e_pf * pf)10608 static void i40e_fdir_teardown(struct i40e_pf *pf)
10609 {
10610 struct i40e_vsi *vsi;
10611
10612 i40e_fdir_filter_exit(pf);
10613 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10614 if (vsi)
10615 i40e_vsi_release(vsi);
10616 }
10617
10618 /**
10619 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10620 * @vsi: PF main vsi
10621 * @seid: seid of main or channel VSIs
10622 *
10623 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10624 * existed before reset
10625 **/
i40e_rebuild_cloud_filters(struct i40e_vsi * vsi,u16 seid)10626 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10627 {
10628 struct i40e_cloud_filter *cfilter;
10629 struct i40e_pf *pf = vsi->back;
10630 struct hlist_node *node;
10631 int ret;
10632
10633 /* Add cloud filters back if they exist */
10634 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10635 cloud_node) {
10636 if (cfilter->seid != seid)
10637 continue;
10638
10639 if (cfilter->dst_port)
10640 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10641 true);
10642 else
10643 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10644
10645 if (ret) {
10646 dev_dbg(&pf->pdev->dev,
10647 "Failed to rebuild cloud filter, err %pe aq_err %s\n",
10648 ERR_PTR(ret),
10649 i40e_aq_str(&pf->hw,
10650 pf->hw.aq.asq_last_status));
10651 return ret;
10652 }
10653 }
10654 return 0;
10655 }
10656
10657 /**
10658 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10659 * @vsi: PF main vsi
10660 *
10661 * Rebuilds channel VSIs if they existed before reset
10662 **/
i40e_rebuild_channels(struct i40e_vsi * vsi)10663 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10664 {
10665 struct i40e_channel *ch, *ch_tmp;
10666 int ret;
10667
10668 if (list_empty(&vsi->ch_list))
10669 return 0;
10670
10671 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10672 if (!ch->initialized)
10673 break;
10674 /* Proceed with creation of channel (VMDq2) VSI */
10675 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10676 if (ret) {
10677 dev_info(&vsi->back->pdev->dev,
10678 "failed to rebuild channels using uplink_seid %u\n",
10679 vsi->uplink_seid);
10680 return ret;
10681 }
10682 /* Reconfigure TX queues using QTX_CTL register */
10683 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10684 if (ret) {
10685 dev_info(&vsi->back->pdev->dev,
10686 "failed to configure TX rings for channel %u\n",
10687 ch->seid);
10688 return ret;
10689 }
10690 /* update 'next_base_queue' */
10691 vsi->next_base_queue = vsi->next_base_queue +
10692 ch->num_queue_pairs;
10693 if (ch->max_tx_rate) {
10694 u64 credits = ch->max_tx_rate;
10695
10696 if (i40e_set_bw_limit(vsi, ch->seid,
10697 ch->max_tx_rate))
10698 return -EINVAL;
10699
10700 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10701 dev_dbg(&vsi->back->pdev->dev,
10702 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10703 ch->max_tx_rate,
10704 credits,
10705 ch->seid);
10706 }
10707 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10708 if (ret) {
10709 dev_dbg(&vsi->back->pdev->dev,
10710 "Failed to rebuild cloud filters for channel VSI %u\n",
10711 ch->seid);
10712 return ret;
10713 }
10714 }
10715 return 0;
10716 }
10717
10718 /**
10719 * i40e_clean_xps_state - clean xps state for every tx_ring
10720 * @vsi: ptr to the VSI
10721 **/
i40e_clean_xps_state(struct i40e_vsi * vsi)10722 static void i40e_clean_xps_state(struct i40e_vsi *vsi)
10723 {
10724 int i;
10725
10726 if (vsi->tx_rings)
10727 for (i = 0; i < vsi->num_queue_pairs; i++)
10728 if (vsi->tx_rings[i])
10729 clear_bit(__I40E_TX_XPS_INIT_DONE,
10730 vsi->tx_rings[i]->state);
10731 }
10732
10733 /**
10734 * i40e_prep_for_reset - prep for the core to reset
10735 * @pf: board private structure
10736 *
10737 * Close up the VFs and other things in prep for PF Reset.
10738 **/
i40e_prep_for_reset(struct i40e_pf * pf)10739 static void i40e_prep_for_reset(struct i40e_pf *pf)
10740 {
10741 struct i40e_hw *hw = &pf->hw;
10742 int ret = 0;
10743 u32 v;
10744
10745 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10746 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10747 return;
10748 if (i40e_check_asq_alive(&pf->hw))
10749 i40e_vc_notify_reset(pf);
10750
10751 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10752
10753 /* quiesce the VSIs and their queues that are not already DOWN */
10754 i40e_pf_quiesce_all_vsi(pf);
10755
10756 for (v = 0; v < pf->num_alloc_vsi; v++) {
10757 if (pf->vsi[v]) {
10758 i40e_clean_xps_state(pf->vsi[v]);
10759 pf->vsi[v]->seid = 0;
10760 }
10761 }
10762
10763 i40e_shutdown_adminq(&pf->hw);
10764
10765 /* call shutdown HMC */
10766 if (hw->hmc.hmc_obj) {
10767 ret = i40e_shutdown_lan_hmc(hw);
10768 if (ret)
10769 dev_warn(&pf->pdev->dev,
10770 "shutdown_lan_hmc failed: %d\n", ret);
10771 }
10772
10773 /* Save the current PTP time so that we can restore the time after the
10774 * reset completes.
10775 */
10776 i40e_ptp_save_hw_time(pf);
10777 }
10778
10779 /**
10780 * i40e_send_version - update firmware with driver version
10781 * @pf: PF struct
10782 */
i40e_send_version(struct i40e_pf * pf)10783 static void i40e_send_version(struct i40e_pf *pf)
10784 {
10785 struct i40e_driver_version dv;
10786
10787 dv.major_version = 0xff;
10788 dv.minor_version = 0xff;
10789 dv.build_version = 0xff;
10790 dv.subbuild_version = 0;
10791 strscpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10792 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10793 }
10794
10795 /**
10796 * i40e_get_oem_version - get OEM specific version information
10797 * @hw: pointer to the hardware structure
10798 **/
i40e_get_oem_version(struct i40e_hw * hw)10799 static void i40e_get_oem_version(struct i40e_hw *hw)
10800 {
10801 u16 block_offset = 0xffff;
10802 u16 block_length = 0;
10803 u16 capabilities = 0;
10804 u16 gen_snap = 0;
10805 u16 release = 0;
10806
10807 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
10808 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
10809 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
10810 #define I40E_NVM_OEM_GEN_OFFSET 0x02
10811 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
10812 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
10813 #define I40E_NVM_OEM_LENGTH 3
10814
10815 /* Check if pointer to OEM version block is valid. */
10816 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10817 if (block_offset == 0xffff)
10818 return;
10819
10820 /* Check if OEM version block has correct length. */
10821 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10822 &block_length);
10823 if (block_length < I40E_NVM_OEM_LENGTH)
10824 return;
10825
10826 /* Check if OEM version format is as expected. */
10827 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10828 &capabilities);
10829 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10830 return;
10831
10832 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10833 &gen_snap);
10834 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10835 &release);
10836 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
10837 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10838 }
10839
10840 /**
10841 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10842 * @pf: board private structure
10843 **/
i40e_reset(struct i40e_pf * pf)10844 static int i40e_reset(struct i40e_pf *pf)
10845 {
10846 struct i40e_hw *hw = &pf->hw;
10847 int ret;
10848
10849 ret = i40e_pf_reset(hw);
10850 if (ret) {
10851 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10852 set_bit(__I40E_RESET_FAILED, pf->state);
10853 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10854 } else {
10855 pf->pfr_count++;
10856 }
10857 return ret;
10858 }
10859
10860 /**
10861 * i40e_rebuild - rebuild using a saved config
10862 * @pf: board private structure
10863 * @reinit: if the Main VSI needs to re-initialized.
10864 * @lock_acquired: indicates whether or not the lock has been acquired
10865 * before this function was called.
10866 **/
i40e_rebuild(struct i40e_pf * pf,bool reinit,bool lock_acquired)10867 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10868 {
10869 const bool is_recovery_mode_reported = i40e_check_recovery_mode(pf);
10870 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10871 struct i40e_hw *hw = &pf->hw;
10872 int ret;
10873 u32 val;
10874 int v;
10875
10876 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10877 is_recovery_mode_reported)
10878 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10879
10880 if (test_bit(__I40E_DOWN, pf->state) &&
10881 !test_bit(__I40E_RECOVERY_MODE, pf->state))
10882 goto clear_recovery;
10883 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10884
10885 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10886 ret = i40e_init_adminq(&pf->hw);
10887 if (ret) {
10888 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %pe aq_err %s\n",
10889 ERR_PTR(ret),
10890 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10891 goto clear_recovery;
10892 }
10893 i40e_get_oem_version(&pf->hw);
10894
10895 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10896 /* The following delay is necessary for firmware update. */
10897 mdelay(1000);
10898 }
10899
10900 /* re-verify the eeprom if we just had an EMP reset */
10901 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10902 i40e_verify_eeprom(pf);
10903
10904 /* if we are going out of or into recovery mode we have to act
10905 * accordingly with regard to resources initialization
10906 * and deinitialization
10907 */
10908 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10909 if (i40e_get_capabilities(pf,
10910 i40e_aqc_opc_list_func_capabilities))
10911 goto end_unlock;
10912
10913 if (is_recovery_mode_reported) {
10914 /* we're staying in recovery mode so we'll reinitialize
10915 * misc vector here
10916 */
10917 if (i40e_setup_misc_vector_for_recovery_mode(pf))
10918 goto end_unlock;
10919 } else {
10920 if (!lock_acquired)
10921 rtnl_lock();
10922 /* we're going out of recovery mode so we'll free
10923 * the IRQ allocated specifically for recovery mode
10924 * and restore the interrupt scheme
10925 */
10926 free_irq(pf->pdev->irq, pf);
10927 i40e_clear_interrupt_scheme(pf);
10928 if (i40e_restore_interrupt_scheme(pf))
10929 goto end_unlock;
10930 }
10931
10932 /* tell the firmware that we're starting */
10933 i40e_send_version(pf);
10934
10935 /* bail out in case recovery mode was detected, as there is
10936 * no need for further configuration.
10937 */
10938 goto end_unlock;
10939 }
10940
10941 i40e_clear_pxe_mode(hw);
10942 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10943 if (ret)
10944 goto end_core_reset;
10945
10946 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10947 hw->func_caps.num_rx_qp, 0, 0);
10948 if (ret) {
10949 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10950 goto end_core_reset;
10951 }
10952 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10953 if (ret) {
10954 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10955 goto end_core_reset;
10956 }
10957
10958 #ifdef CONFIG_I40E_DCB
10959 /* Enable FW to write a default DCB config on link-up
10960 * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10961 * is not supported with new link speed
10962 */
10963 if (i40e_is_tc_mqprio_enabled(pf)) {
10964 i40e_aq_set_dcb_parameters(hw, false, NULL);
10965 } else {
10966 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10967 (hw->phy.link_info.link_speed &
10968 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10969 i40e_aq_set_dcb_parameters(hw, false, NULL);
10970 dev_warn(&pf->pdev->dev,
10971 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10972 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10973 } else {
10974 i40e_aq_set_dcb_parameters(hw, true, NULL);
10975 ret = i40e_init_pf_dcb(pf);
10976 if (ret) {
10977 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10978 ret);
10979 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10980 /* Continue without DCB enabled */
10981 }
10982 }
10983 }
10984
10985 #endif /* CONFIG_I40E_DCB */
10986 if (!lock_acquired)
10987 rtnl_lock();
10988 ret = i40e_setup_pf_switch(pf, reinit, true);
10989 if (ret)
10990 goto end_unlock;
10991
10992 /* The driver only wants link up/down and module qualification
10993 * reports from firmware. Note the negative logic.
10994 */
10995 ret = i40e_aq_set_phy_int_mask(&pf->hw,
10996 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10997 I40E_AQ_EVENT_MEDIA_NA |
10998 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10999 if (ret)
11000 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
11001 ERR_PTR(ret),
11002 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11003
11004 /* Rebuild the VSIs and VEBs that existed before reset.
11005 * They are still in our local switch element arrays, so only
11006 * need to rebuild the switch model in the HW.
11007 *
11008 * If there were VEBs but the reconstitution failed, we'll try
11009 * to recover minimal use by getting the basic PF VSI working.
11010 */
11011 if (vsi->uplink_seid != pf->mac_seid) {
11012 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
11013 /* find the one VEB connected to the MAC, and find orphans */
11014 for (v = 0; v < I40E_MAX_VEB; v++) {
11015 if (!pf->veb[v])
11016 continue;
11017
11018 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
11019 pf->veb[v]->uplink_seid == 0) {
11020 ret = i40e_reconstitute_veb(pf->veb[v]);
11021
11022 if (!ret)
11023 continue;
11024
11025 /* If Main VEB failed, we're in deep doodoo,
11026 * so give up rebuilding the switch and set up
11027 * for minimal rebuild of PF VSI.
11028 * If orphan failed, we'll report the error
11029 * but try to keep going.
11030 */
11031 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
11032 dev_info(&pf->pdev->dev,
11033 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
11034 ret);
11035 vsi->uplink_seid = pf->mac_seid;
11036 break;
11037 } else if (pf->veb[v]->uplink_seid == 0) {
11038 dev_info(&pf->pdev->dev,
11039 "rebuild of orphan VEB failed: %d\n",
11040 ret);
11041 }
11042 }
11043 }
11044 }
11045
11046 if (vsi->uplink_seid == pf->mac_seid) {
11047 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
11048 /* no VEB, so rebuild only the Main VSI */
11049 ret = i40e_add_vsi(vsi);
11050 if (ret) {
11051 dev_info(&pf->pdev->dev,
11052 "rebuild of Main VSI failed: %d\n", ret);
11053 goto end_unlock;
11054 }
11055 }
11056
11057 if (vsi->mqprio_qopt.max_rate[0]) {
11058 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
11059 vsi->mqprio_qopt.max_rate[0]);
11060 u64 credits = 0;
11061
11062 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
11063 if (ret)
11064 goto end_unlock;
11065
11066 credits = max_tx_rate;
11067 do_div(credits, I40E_BW_CREDIT_DIVISOR);
11068 dev_dbg(&vsi->back->pdev->dev,
11069 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
11070 max_tx_rate,
11071 credits,
11072 vsi->seid);
11073 }
11074
11075 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
11076 if (ret)
11077 goto end_unlock;
11078
11079 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
11080 * for this main VSI if they exist
11081 */
11082 ret = i40e_rebuild_channels(vsi);
11083 if (ret)
11084 goto end_unlock;
11085
11086 /* Reconfigure hardware for allowing smaller MSS in the case
11087 * of TSO, so that we avoid the MDD being fired and causing
11088 * a reset in the case of small MSS+TSO.
11089 */
11090 #define I40E_REG_MSS 0x000E64DC
11091 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
11092 #define I40E_64BYTE_MSS 0x400000
11093 val = rd32(hw, I40E_REG_MSS);
11094 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11095 val &= ~I40E_REG_MSS_MIN_MASK;
11096 val |= I40E_64BYTE_MSS;
11097 wr32(hw, I40E_REG_MSS, val);
11098 }
11099
11100 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
11101 msleep(75);
11102 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11103 if (ret)
11104 dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
11105 ERR_PTR(ret),
11106 i40e_aq_str(&pf->hw,
11107 pf->hw.aq.asq_last_status));
11108 }
11109 /* reinit the misc interrupt */
11110 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11111 ret = i40e_setup_misc_vector(pf);
11112 if (ret)
11113 goto end_unlock;
11114 }
11115
11116 /* Add a filter to drop all Flow control frames from any VSI from being
11117 * transmitted. By doing so we stop a malicious VF from sending out
11118 * PAUSE or PFC frames and potentially controlling traffic for other
11119 * PF/VF VSIs.
11120 * The FW can still send Flow control frames if enabled.
11121 */
11122 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11123 pf->main_vsi_seid);
11124
11125 /* restart the VSIs that were rebuilt and running before the reset */
11126 i40e_pf_unquiesce_all_vsi(pf);
11127
11128 /* Release the RTNL lock before we start resetting VFs */
11129 if (!lock_acquired)
11130 rtnl_unlock();
11131
11132 /* Restore promiscuous settings */
11133 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
11134 if (ret)
11135 dev_warn(&pf->pdev->dev,
11136 "Failed to restore promiscuous setting: %s, err %pe aq_err %s\n",
11137 pf->cur_promisc ? "on" : "off",
11138 ERR_PTR(ret),
11139 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11140
11141 i40e_reset_all_vfs(pf, true);
11142
11143 /* tell the firmware that we're starting */
11144 i40e_send_version(pf);
11145
11146 /* We've already released the lock, so don't do it again */
11147 goto end_core_reset;
11148
11149 end_unlock:
11150 if (!lock_acquired)
11151 rtnl_unlock();
11152 end_core_reset:
11153 clear_bit(__I40E_RESET_FAILED, pf->state);
11154 clear_recovery:
11155 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
11156 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
11157 }
11158
11159 /**
11160 * i40e_reset_and_rebuild - reset and rebuild using a saved config
11161 * @pf: board private structure
11162 * @reinit: if the Main VSI needs to re-initialized.
11163 * @lock_acquired: indicates whether or not the lock has been acquired
11164 * before this function was called.
11165 **/
i40e_reset_and_rebuild(struct i40e_pf * pf,bool reinit,bool lock_acquired)11166 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
11167 bool lock_acquired)
11168 {
11169 int ret;
11170
11171 if (test_bit(__I40E_IN_REMOVE, pf->state))
11172 return;
11173 /* Now we wait for GRST to settle out.
11174 * We don't have to delete the VEBs or VSIs from the hw switch
11175 * because the reset will make them disappear.
11176 */
11177 ret = i40e_reset(pf);
11178 if (!ret)
11179 i40e_rebuild(pf, reinit, lock_acquired);
11180 }
11181
11182 /**
11183 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
11184 * @pf: board private structure
11185 *
11186 * Close up the VFs and other things in prep for a Core Reset,
11187 * then get ready to rebuild the world.
11188 * @lock_acquired: indicates whether or not the lock has been acquired
11189 * before this function was called.
11190 **/
i40e_handle_reset_warning(struct i40e_pf * pf,bool lock_acquired)11191 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
11192 {
11193 i40e_prep_for_reset(pf);
11194 i40e_reset_and_rebuild(pf, false, lock_acquired);
11195 }
11196
11197 /**
11198 * i40e_handle_mdd_event
11199 * @pf: pointer to the PF structure
11200 *
11201 * Called from the MDD irq handler to identify possibly malicious vfs
11202 **/
i40e_handle_mdd_event(struct i40e_pf * pf)11203 static void i40e_handle_mdd_event(struct i40e_pf *pf)
11204 {
11205 struct i40e_hw *hw = &pf->hw;
11206 bool mdd_detected = false;
11207 struct i40e_vf *vf;
11208 u32 reg;
11209 int i;
11210
11211 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
11212 return;
11213
11214 /* find what triggered the MDD event */
11215 reg = rd32(hw, I40E_GL_MDET_TX);
11216 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
11217 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
11218 I40E_GL_MDET_TX_PF_NUM_SHIFT;
11219 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
11220 I40E_GL_MDET_TX_VF_NUM_SHIFT;
11221 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
11222 I40E_GL_MDET_TX_EVENT_SHIFT;
11223 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
11224 I40E_GL_MDET_TX_QUEUE_SHIFT) -
11225 pf->hw.func_caps.base_queue;
11226 if (netif_msg_tx_err(pf))
11227 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11228 event, queue, pf_num, vf_num);
11229 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
11230 mdd_detected = true;
11231 }
11232 reg = rd32(hw, I40E_GL_MDET_RX);
11233 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
11234 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
11235 I40E_GL_MDET_RX_FUNCTION_SHIFT;
11236 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
11237 I40E_GL_MDET_RX_EVENT_SHIFT;
11238 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
11239 I40E_GL_MDET_RX_QUEUE_SHIFT) -
11240 pf->hw.func_caps.base_queue;
11241 if (netif_msg_rx_err(pf))
11242 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11243 event, queue, func);
11244 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
11245 mdd_detected = true;
11246 }
11247
11248 if (mdd_detected) {
11249 reg = rd32(hw, I40E_PF_MDET_TX);
11250 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
11251 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
11252 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11253 }
11254 reg = rd32(hw, I40E_PF_MDET_RX);
11255 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
11256 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
11257 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11258 }
11259 }
11260
11261 /* see if one of the VFs needs its hand slapped */
11262 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11263 vf = &(pf->vf[i]);
11264 reg = rd32(hw, I40E_VP_MDET_TX(i));
11265 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
11266 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
11267 vf->num_mdd_events++;
11268 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
11269 i);
11270 dev_info(&pf->pdev->dev,
11271 "Use PF Control I/F to re-enable the VF\n");
11272 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11273 }
11274
11275 reg = rd32(hw, I40E_VP_MDET_RX(i));
11276 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
11277 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
11278 vf->num_mdd_events++;
11279 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
11280 i);
11281 dev_info(&pf->pdev->dev,
11282 "Use PF Control I/F to re-enable the VF\n");
11283 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11284 }
11285 }
11286
11287 /* re-enable mdd interrupt cause */
11288 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
11289 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
11290 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
11291 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
11292 i40e_flush(hw);
11293 }
11294
11295 /**
11296 * i40e_service_task - Run the driver's async subtasks
11297 * @work: pointer to work_struct containing our data
11298 **/
i40e_service_task(struct work_struct * work)11299 static void i40e_service_task(struct work_struct *work)
11300 {
11301 struct i40e_pf *pf = container_of(work,
11302 struct i40e_pf,
11303 service_task);
11304 unsigned long start_time = jiffies;
11305
11306 /* don't bother with service tasks if a reset is in progress */
11307 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11308 test_bit(__I40E_SUSPENDED, pf->state))
11309 return;
11310
11311 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
11312 return;
11313
11314 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11315 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
11316 i40e_sync_filters_subtask(pf);
11317 i40e_reset_subtask(pf);
11318 i40e_handle_mdd_event(pf);
11319 i40e_vc_process_vflr_event(pf);
11320 i40e_watchdog_subtask(pf);
11321 i40e_fdir_reinit_subtask(pf);
11322 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
11323 /* Client subtask will reopen next time through. */
11324 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
11325 true);
11326 } else {
11327 i40e_client_subtask(pf);
11328 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
11329 pf->state))
11330 i40e_notify_client_of_l2_param_changes(
11331 pf->vsi[pf->lan_vsi]);
11332 }
11333 i40e_sync_filters_subtask(pf);
11334 } else {
11335 i40e_reset_subtask(pf);
11336 }
11337
11338 i40e_clean_adminq_subtask(pf);
11339
11340 /* flush memory to make sure state is correct before next watchdog */
11341 smp_mb__before_atomic();
11342 clear_bit(__I40E_SERVICE_SCHED, pf->state);
11343
11344 /* If the tasks have taken longer than one timer cycle or there
11345 * is more work to be done, reschedule the service task now
11346 * rather than wait for the timer to tick again.
11347 */
11348 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11349 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
11350 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
11351 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11352 i40e_service_event_schedule(pf);
11353 }
11354
11355 /**
11356 * i40e_service_timer - timer callback
11357 * @t: timer list pointer
11358 **/
i40e_service_timer(struct timer_list * t)11359 static void i40e_service_timer(struct timer_list *t)
11360 {
11361 struct i40e_pf *pf = from_timer(pf, t, service_timer);
11362
11363 mod_timer(&pf->service_timer,
11364 round_jiffies(jiffies + pf->service_timer_period));
11365 i40e_service_event_schedule(pf);
11366 }
11367
11368 /**
11369 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
11370 * @vsi: the VSI being configured
11371 **/
i40e_set_num_rings_in_vsi(struct i40e_vsi * vsi)11372 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
11373 {
11374 struct i40e_pf *pf = vsi->back;
11375
11376 switch (vsi->type) {
11377 case I40E_VSI_MAIN:
11378 vsi->alloc_queue_pairs = pf->num_lan_qps;
11379 if (!vsi->num_tx_desc)
11380 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11381 I40E_REQ_DESCRIPTOR_MULTIPLE);
11382 if (!vsi->num_rx_desc)
11383 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11384 I40E_REQ_DESCRIPTOR_MULTIPLE);
11385 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11386 vsi->num_q_vectors = pf->num_lan_msix;
11387 else
11388 vsi->num_q_vectors = 1;
11389
11390 break;
11391
11392 case I40E_VSI_FDIR:
11393 vsi->alloc_queue_pairs = 1;
11394 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11395 I40E_REQ_DESCRIPTOR_MULTIPLE);
11396 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11397 I40E_REQ_DESCRIPTOR_MULTIPLE);
11398 vsi->num_q_vectors = pf->num_fdsb_msix;
11399 break;
11400
11401 case I40E_VSI_VMDQ2:
11402 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11403 if (!vsi->num_tx_desc)
11404 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11405 I40E_REQ_DESCRIPTOR_MULTIPLE);
11406 if (!vsi->num_rx_desc)
11407 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11408 I40E_REQ_DESCRIPTOR_MULTIPLE);
11409 vsi->num_q_vectors = pf->num_vmdq_msix;
11410 break;
11411
11412 case I40E_VSI_SRIOV:
11413 vsi->alloc_queue_pairs = pf->num_vf_qps;
11414 if (!vsi->num_tx_desc)
11415 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11416 I40E_REQ_DESCRIPTOR_MULTIPLE);
11417 if (!vsi->num_rx_desc)
11418 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11419 I40E_REQ_DESCRIPTOR_MULTIPLE);
11420 break;
11421
11422 default:
11423 WARN_ON(1);
11424 return -ENODATA;
11425 }
11426
11427 if (is_kdump_kernel()) {
11428 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11429 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11430 }
11431
11432 return 0;
11433 }
11434
11435 /**
11436 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11437 * @vsi: VSI pointer
11438 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11439 *
11440 * On error: returns error code (negative)
11441 * On success: returns 0
11442 **/
i40e_vsi_alloc_arrays(struct i40e_vsi * vsi,bool alloc_qvectors)11443 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11444 {
11445 struct i40e_ring **next_rings;
11446 int size;
11447 int ret = 0;
11448
11449 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11450 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11451 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11452 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11453 if (!vsi->tx_rings)
11454 return -ENOMEM;
11455 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11456 if (i40e_enabled_xdp_vsi(vsi)) {
11457 vsi->xdp_rings = next_rings;
11458 next_rings += vsi->alloc_queue_pairs;
11459 }
11460 vsi->rx_rings = next_rings;
11461
11462 if (alloc_qvectors) {
11463 /* allocate memory for q_vector pointers */
11464 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11465 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11466 if (!vsi->q_vectors) {
11467 ret = -ENOMEM;
11468 goto err_vectors;
11469 }
11470 }
11471 return ret;
11472
11473 err_vectors:
11474 kfree(vsi->tx_rings);
11475 return ret;
11476 }
11477
11478 /**
11479 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11480 * @pf: board private structure
11481 * @type: type of VSI
11482 *
11483 * On error: returns error code (negative)
11484 * On success: returns vsi index in PF (positive)
11485 **/
i40e_vsi_mem_alloc(struct i40e_pf * pf,enum i40e_vsi_type type)11486 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11487 {
11488 int ret = -ENODEV;
11489 struct i40e_vsi *vsi;
11490 int vsi_idx;
11491 int i;
11492
11493 /* Need to protect the allocation of the VSIs at the PF level */
11494 mutex_lock(&pf->switch_mutex);
11495
11496 /* VSI list may be fragmented if VSI creation/destruction has
11497 * been happening. We can afford to do a quick scan to look
11498 * for any free VSIs in the list.
11499 *
11500 * find next empty vsi slot, looping back around if necessary
11501 */
11502 i = pf->next_vsi;
11503 while (i < pf->num_alloc_vsi && pf->vsi[i])
11504 i++;
11505 if (i >= pf->num_alloc_vsi) {
11506 i = 0;
11507 while (i < pf->next_vsi && pf->vsi[i])
11508 i++;
11509 }
11510
11511 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11512 vsi_idx = i; /* Found one! */
11513 } else {
11514 ret = -ENODEV;
11515 goto unlock_pf; /* out of VSI slots! */
11516 }
11517 pf->next_vsi = ++i;
11518
11519 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11520 if (!vsi) {
11521 ret = -ENOMEM;
11522 goto unlock_pf;
11523 }
11524 vsi->type = type;
11525 vsi->back = pf;
11526 set_bit(__I40E_VSI_DOWN, vsi->state);
11527 vsi->flags = 0;
11528 vsi->idx = vsi_idx;
11529 vsi->int_rate_limit = 0;
11530 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11531 pf->rss_table_size : 64;
11532 vsi->netdev_registered = false;
11533 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11534 hash_init(vsi->mac_filter_hash);
11535 vsi->irqs_ready = false;
11536
11537 if (type == I40E_VSI_MAIN) {
11538 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11539 if (!vsi->af_xdp_zc_qps)
11540 goto err_rings;
11541 }
11542
11543 ret = i40e_set_num_rings_in_vsi(vsi);
11544 if (ret)
11545 goto err_rings;
11546
11547 ret = i40e_vsi_alloc_arrays(vsi, true);
11548 if (ret)
11549 goto err_rings;
11550
11551 /* Setup default MSIX irq handler for VSI */
11552 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11553
11554 /* Initialize VSI lock */
11555 spin_lock_init(&vsi->mac_filter_hash_lock);
11556 pf->vsi[vsi_idx] = vsi;
11557 ret = vsi_idx;
11558 goto unlock_pf;
11559
11560 err_rings:
11561 bitmap_free(vsi->af_xdp_zc_qps);
11562 pf->next_vsi = i - 1;
11563 kfree(vsi);
11564 unlock_pf:
11565 mutex_unlock(&pf->switch_mutex);
11566 return ret;
11567 }
11568
11569 /**
11570 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11571 * @vsi: VSI pointer
11572 * @free_qvectors: a bool to specify if q_vectors need to be freed.
11573 *
11574 * On error: returns error code (negative)
11575 * On success: returns 0
11576 **/
i40e_vsi_free_arrays(struct i40e_vsi * vsi,bool free_qvectors)11577 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11578 {
11579 /* free the ring and vector containers */
11580 if (free_qvectors) {
11581 kfree(vsi->q_vectors);
11582 vsi->q_vectors = NULL;
11583 }
11584 kfree(vsi->tx_rings);
11585 vsi->tx_rings = NULL;
11586 vsi->rx_rings = NULL;
11587 vsi->xdp_rings = NULL;
11588 }
11589
11590 /**
11591 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11592 * and lookup table
11593 * @vsi: Pointer to VSI structure
11594 */
i40e_clear_rss_config_user(struct i40e_vsi * vsi)11595 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11596 {
11597 if (!vsi)
11598 return;
11599
11600 kfree(vsi->rss_hkey_user);
11601 vsi->rss_hkey_user = NULL;
11602
11603 kfree(vsi->rss_lut_user);
11604 vsi->rss_lut_user = NULL;
11605 }
11606
11607 /**
11608 * i40e_vsi_clear - Deallocate the VSI provided
11609 * @vsi: the VSI being un-configured
11610 **/
i40e_vsi_clear(struct i40e_vsi * vsi)11611 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11612 {
11613 struct i40e_pf *pf;
11614
11615 if (!vsi)
11616 return 0;
11617
11618 if (!vsi->back)
11619 goto free_vsi;
11620 pf = vsi->back;
11621
11622 mutex_lock(&pf->switch_mutex);
11623 if (!pf->vsi[vsi->idx]) {
11624 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11625 vsi->idx, vsi->idx, vsi->type);
11626 goto unlock_vsi;
11627 }
11628
11629 if (pf->vsi[vsi->idx] != vsi) {
11630 dev_err(&pf->pdev->dev,
11631 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11632 pf->vsi[vsi->idx]->idx,
11633 pf->vsi[vsi->idx]->type,
11634 vsi->idx, vsi->type);
11635 goto unlock_vsi;
11636 }
11637
11638 /* updates the PF for this cleared vsi */
11639 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11640 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11641
11642 bitmap_free(vsi->af_xdp_zc_qps);
11643 i40e_vsi_free_arrays(vsi, true);
11644 i40e_clear_rss_config_user(vsi);
11645
11646 pf->vsi[vsi->idx] = NULL;
11647 if (vsi->idx < pf->next_vsi)
11648 pf->next_vsi = vsi->idx;
11649
11650 unlock_vsi:
11651 mutex_unlock(&pf->switch_mutex);
11652 free_vsi:
11653 kfree(vsi);
11654
11655 return 0;
11656 }
11657
11658 /**
11659 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11660 * @vsi: the VSI being cleaned
11661 **/
i40e_vsi_clear_rings(struct i40e_vsi * vsi)11662 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11663 {
11664 int i;
11665
11666 if (vsi->tx_rings && vsi->tx_rings[0]) {
11667 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11668 kfree_rcu(vsi->tx_rings[i], rcu);
11669 WRITE_ONCE(vsi->tx_rings[i], NULL);
11670 WRITE_ONCE(vsi->rx_rings[i], NULL);
11671 if (vsi->xdp_rings)
11672 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11673 }
11674 }
11675 }
11676
11677 /**
11678 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11679 * @vsi: the VSI being configured
11680 **/
i40e_alloc_rings(struct i40e_vsi * vsi)11681 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11682 {
11683 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11684 struct i40e_pf *pf = vsi->back;
11685 struct i40e_ring *ring;
11686
11687 /* Set basic values in the rings to be used later during open() */
11688 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11689 /* allocate space for both Tx and Rx in one shot */
11690 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11691 if (!ring)
11692 goto err_out;
11693
11694 ring->queue_index = i;
11695 ring->reg_idx = vsi->base_queue + i;
11696 ring->ring_active = false;
11697 ring->vsi = vsi;
11698 ring->netdev = vsi->netdev;
11699 ring->dev = &pf->pdev->dev;
11700 ring->count = vsi->num_tx_desc;
11701 ring->size = 0;
11702 ring->dcb_tc = 0;
11703 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11704 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11705 ring->itr_setting = pf->tx_itr_default;
11706 WRITE_ONCE(vsi->tx_rings[i], ring++);
11707
11708 if (!i40e_enabled_xdp_vsi(vsi))
11709 goto setup_rx;
11710
11711 ring->queue_index = vsi->alloc_queue_pairs + i;
11712 ring->reg_idx = vsi->base_queue + ring->queue_index;
11713 ring->ring_active = false;
11714 ring->vsi = vsi;
11715 ring->netdev = NULL;
11716 ring->dev = &pf->pdev->dev;
11717 ring->count = vsi->num_tx_desc;
11718 ring->size = 0;
11719 ring->dcb_tc = 0;
11720 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11721 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11722 set_ring_xdp(ring);
11723 ring->itr_setting = pf->tx_itr_default;
11724 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11725
11726 setup_rx:
11727 ring->queue_index = i;
11728 ring->reg_idx = vsi->base_queue + i;
11729 ring->ring_active = false;
11730 ring->vsi = vsi;
11731 ring->netdev = vsi->netdev;
11732 ring->dev = &pf->pdev->dev;
11733 ring->count = vsi->num_rx_desc;
11734 ring->size = 0;
11735 ring->dcb_tc = 0;
11736 ring->itr_setting = pf->rx_itr_default;
11737 WRITE_ONCE(vsi->rx_rings[i], ring);
11738 }
11739
11740 return 0;
11741
11742 err_out:
11743 i40e_vsi_clear_rings(vsi);
11744 return -ENOMEM;
11745 }
11746
11747 /**
11748 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11749 * @pf: board private structure
11750 * @vectors: the number of MSI-X vectors to request
11751 *
11752 * Returns the number of vectors reserved, or error
11753 **/
i40e_reserve_msix_vectors(struct i40e_pf * pf,int vectors)11754 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11755 {
11756 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11757 I40E_MIN_MSIX, vectors);
11758 if (vectors < 0) {
11759 dev_info(&pf->pdev->dev,
11760 "MSI-X vector reservation failed: %d\n", vectors);
11761 vectors = 0;
11762 }
11763
11764 return vectors;
11765 }
11766
11767 /**
11768 * i40e_init_msix - Setup the MSIX capability
11769 * @pf: board private structure
11770 *
11771 * Work with the OS to set up the MSIX vectors needed.
11772 *
11773 * Returns the number of vectors reserved or negative on failure
11774 **/
i40e_init_msix(struct i40e_pf * pf)11775 static int i40e_init_msix(struct i40e_pf *pf)
11776 {
11777 struct i40e_hw *hw = &pf->hw;
11778 int cpus, extra_vectors;
11779 int vectors_left;
11780 int v_budget, i;
11781 int v_actual;
11782 int iwarp_requested = 0;
11783
11784 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11785 return -ENODEV;
11786
11787 /* The number of vectors we'll request will be comprised of:
11788 * - Add 1 for "other" cause for Admin Queue events, etc.
11789 * - The number of LAN queue pairs
11790 * - Queues being used for RSS.
11791 * We don't need as many as max_rss_size vectors.
11792 * use rss_size instead in the calculation since that
11793 * is governed by number of cpus in the system.
11794 * - assumes symmetric Tx/Rx pairing
11795 * - The number of VMDq pairs
11796 * - The CPU count within the NUMA node if iWARP is enabled
11797 * Once we count this up, try the request.
11798 *
11799 * If we can't get what we want, we'll simplify to nearly nothing
11800 * and try again. If that still fails, we punt.
11801 */
11802 vectors_left = hw->func_caps.num_msix_vectors;
11803 v_budget = 0;
11804
11805 /* reserve one vector for miscellaneous handler */
11806 if (vectors_left) {
11807 v_budget++;
11808 vectors_left--;
11809 }
11810
11811 /* reserve some vectors for the main PF traffic queues. Initially we
11812 * only reserve at most 50% of the available vectors, in the case that
11813 * the number of online CPUs is large. This ensures that we can enable
11814 * extra features as well. Once we've enabled the other features, we
11815 * will use any remaining vectors to reach as close as we can to the
11816 * number of online CPUs.
11817 */
11818 cpus = num_online_cpus();
11819 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11820 vectors_left -= pf->num_lan_msix;
11821
11822 /* reserve one vector for sideband flow director */
11823 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11824 if (vectors_left) {
11825 pf->num_fdsb_msix = 1;
11826 v_budget++;
11827 vectors_left--;
11828 } else {
11829 pf->num_fdsb_msix = 0;
11830 }
11831 }
11832
11833 /* can we reserve enough for iWARP? */
11834 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11835 iwarp_requested = pf->num_iwarp_msix;
11836
11837 if (!vectors_left)
11838 pf->num_iwarp_msix = 0;
11839 else if (vectors_left < pf->num_iwarp_msix)
11840 pf->num_iwarp_msix = 1;
11841 v_budget += pf->num_iwarp_msix;
11842 vectors_left -= pf->num_iwarp_msix;
11843 }
11844
11845 /* any vectors left over go for VMDq support */
11846 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11847 if (!vectors_left) {
11848 pf->num_vmdq_msix = 0;
11849 pf->num_vmdq_qps = 0;
11850 } else {
11851 int vmdq_vecs_wanted =
11852 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11853 int vmdq_vecs =
11854 min_t(int, vectors_left, vmdq_vecs_wanted);
11855
11856 /* if we're short on vectors for what's desired, we limit
11857 * the queues per vmdq. If this is still more than are
11858 * available, the user will need to change the number of
11859 * queues/vectors used by the PF later with the ethtool
11860 * channels command
11861 */
11862 if (vectors_left < vmdq_vecs_wanted) {
11863 pf->num_vmdq_qps = 1;
11864 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11865 vmdq_vecs = min_t(int,
11866 vectors_left,
11867 vmdq_vecs_wanted);
11868 }
11869 pf->num_vmdq_msix = pf->num_vmdq_qps;
11870
11871 v_budget += vmdq_vecs;
11872 vectors_left -= vmdq_vecs;
11873 }
11874 }
11875
11876 /* On systems with a large number of SMP cores, we previously limited
11877 * the number of vectors for num_lan_msix to be at most 50% of the
11878 * available vectors, to allow for other features. Now, we add back
11879 * the remaining vectors. However, we ensure that the total
11880 * num_lan_msix will not exceed num_online_cpus(). To do this, we
11881 * calculate the number of vectors we can add without going over the
11882 * cap of CPUs. For systems with a small number of CPUs this will be
11883 * zero.
11884 */
11885 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11886 pf->num_lan_msix += extra_vectors;
11887 vectors_left -= extra_vectors;
11888
11889 WARN(vectors_left < 0,
11890 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11891
11892 v_budget += pf->num_lan_msix;
11893 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11894 GFP_KERNEL);
11895 if (!pf->msix_entries)
11896 return -ENOMEM;
11897
11898 for (i = 0; i < v_budget; i++)
11899 pf->msix_entries[i].entry = i;
11900 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11901
11902 if (v_actual < I40E_MIN_MSIX) {
11903 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11904 kfree(pf->msix_entries);
11905 pf->msix_entries = NULL;
11906 pci_disable_msix(pf->pdev);
11907 return -ENODEV;
11908
11909 } else if (v_actual == I40E_MIN_MSIX) {
11910 /* Adjust for minimal MSIX use */
11911 pf->num_vmdq_vsis = 0;
11912 pf->num_vmdq_qps = 0;
11913 pf->num_lan_qps = 1;
11914 pf->num_lan_msix = 1;
11915
11916 } else if (v_actual != v_budget) {
11917 /* If we have limited resources, we will start with no vectors
11918 * for the special features and then allocate vectors to some
11919 * of these features based on the policy and at the end disable
11920 * the features that did not get any vectors.
11921 */
11922 int vec;
11923
11924 dev_info(&pf->pdev->dev,
11925 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11926 v_actual, v_budget);
11927 /* reserve the misc vector */
11928 vec = v_actual - 1;
11929
11930 /* Scale vector usage down */
11931 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
11932 pf->num_vmdq_vsis = 1;
11933 pf->num_vmdq_qps = 1;
11934
11935 /* partition out the remaining vectors */
11936 switch (vec) {
11937 case 2:
11938 pf->num_lan_msix = 1;
11939 break;
11940 case 3:
11941 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11942 pf->num_lan_msix = 1;
11943 pf->num_iwarp_msix = 1;
11944 } else {
11945 pf->num_lan_msix = 2;
11946 }
11947 break;
11948 default:
11949 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11950 pf->num_iwarp_msix = min_t(int, (vec / 3),
11951 iwarp_requested);
11952 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11953 I40E_DEFAULT_NUM_VMDQ_VSI);
11954 } else {
11955 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11956 I40E_DEFAULT_NUM_VMDQ_VSI);
11957 }
11958 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11959 pf->num_fdsb_msix = 1;
11960 vec--;
11961 }
11962 pf->num_lan_msix = min_t(int,
11963 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11964 pf->num_lan_msix);
11965 pf->num_lan_qps = pf->num_lan_msix;
11966 break;
11967 }
11968 }
11969
11970 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11971 (pf->num_fdsb_msix == 0)) {
11972 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11973 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11974 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11975 }
11976 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11977 (pf->num_vmdq_msix == 0)) {
11978 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11979 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11980 }
11981
11982 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11983 (pf->num_iwarp_msix == 0)) {
11984 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11985 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11986 }
11987 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11988 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11989 pf->num_lan_msix,
11990 pf->num_vmdq_msix * pf->num_vmdq_vsis,
11991 pf->num_fdsb_msix,
11992 pf->num_iwarp_msix);
11993
11994 return v_actual;
11995 }
11996
11997 /**
11998 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11999 * @vsi: the VSI being configured
12000 * @v_idx: index of the vector in the vsi struct
12001 *
12002 * We allocate one q_vector. If allocation fails we return -ENOMEM.
12003 **/
i40e_vsi_alloc_q_vector(struct i40e_vsi * vsi,int v_idx)12004 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
12005 {
12006 struct i40e_q_vector *q_vector;
12007
12008 /* allocate q_vector */
12009 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
12010 if (!q_vector)
12011 return -ENOMEM;
12012
12013 q_vector->vsi = vsi;
12014 q_vector->v_idx = v_idx;
12015 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
12016
12017 if (vsi->netdev)
12018 netif_napi_add(vsi->netdev, &q_vector->napi, i40e_napi_poll);
12019
12020 /* tie q_vector and vsi together */
12021 vsi->q_vectors[v_idx] = q_vector;
12022
12023 return 0;
12024 }
12025
12026 /**
12027 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
12028 * @vsi: the VSI being configured
12029 *
12030 * We allocate one q_vector per queue interrupt. If allocation fails we
12031 * return -ENOMEM.
12032 **/
i40e_vsi_alloc_q_vectors(struct i40e_vsi * vsi)12033 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
12034 {
12035 struct i40e_pf *pf = vsi->back;
12036 int err, v_idx, num_q_vectors;
12037
12038 /* if not MSIX, give the one vector only to the LAN VSI */
12039 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
12040 num_q_vectors = vsi->num_q_vectors;
12041 else if (vsi == pf->vsi[pf->lan_vsi])
12042 num_q_vectors = 1;
12043 else
12044 return -EINVAL;
12045
12046 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
12047 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
12048 if (err)
12049 goto err_out;
12050 }
12051
12052 return 0;
12053
12054 err_out:
12055 while (v_idx--)
12056 i40e_free_q_vector(vsi, v_idx);
12057
12058 return err;
12059 }
12060
12061 /**
12062 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
12063 * @pf: board private structure to initialize
12064 **/
i40e_init_interrupt_scheme(struct i40e_pf * pf)12065 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
12066 {
12067 int vectors = 0;
12068 ssize_t size;
12069
12070 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12071 vectors = i40e_init_msix(pf);
12072 if (vectors < 0) {
12073 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
12074 I40E_FLAG_IWARP_ENABLED |
12075 I40E_FLAG_RSS_ENABLED |
12076 I40E_FLAG_DCB_CAPABLE |
12077 I40E_FLAG_DCB_ENABLED |
12078 I40E_FLAG_SRIOV_ENABLED |
12079 I40E_FLAG_FD_SB_ENABLED |
12080 I40E_FLAG_FD_ATR_ENABLED |
12081 I40E_FLAG_VMDQ_ENABLED);
12082 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12083
12084 /* rework the queue expectations without MSIX */
12085 i40e_determine_queue_usage(pf);
12086 }
12087 }
12088
12089 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
12090 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
12091 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
12092 vectors = pci_enable_msi(pf->pdev);
12093 if (vectors < 0) {
12094 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
12095 vectors);
12096 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
12097 }
12098 vectors = 1; /* one MSI or Legacy vector */
12099 }
12100
12101 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
12102 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
12103
12104 /* set up vector assignment tracking */
12105 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
12106 pf->irq_pile = kzalloc(size, GFP_KERNEL);
12107 if (!pf->irq_pile)
12108 return -ENOMEM;
12109
12110 pf->irq_pile->num_entries = vectors;
12111
12112 /* track first vector for misc interrupts, ignore return */
12113 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
12114
12115 return 0;
12116 }
12117
12118 /**
12119 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
12120 * @pf: private board data structure
12121 *
12122 * Restore the interrupt scheme that was cleared when we suspended the
12123 * device. This should be called during resume to re-allocate the q_vectors
12124 * and reacquire IRQs.
12125 */
i40e_restore_interrupt_scheme(struct i40e_pf * pf)12126 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
12127 {
12128 int err, i;
12129
12130 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
12131 * scheme. We need to re-enabled them here in order to attempt to
12132 * re-acquire the MSI or MSI-X vectors
12133 */
12134 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
12135
12136 err = i40e_init_interrupt_scheme(pf);
12137 if (err)
12138 return err;
12139
12140 /* Now that we've re-acquired IRQs, we need to remap the vectors and
12141 * rings together again.
12142 */
12143 for (i = 0; i < pf->num_alloc_vsi; i++) {
12144 if (pf->vsi[i]) {
12145 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
12146 if (err)
12147 goto err_unwind;
12148 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
12149 }
12150 }
12151
12152 err = i40e_setup_misc_vector(pf);
12153 if (err)
12154 goto err_unwind;
12155
12156 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
12157 i40e_client_update_msix_info(pf);
12158
12159 return 0;
12160
12161 err_unwind:
12162 while (i--) {
12163 if (pf->vsi[i])
12164 i40e_vsi_free_q_vectors(pf->vsi[i]);
12165 }
12166
12167 return err;
12168 }
12169
12170 /**
12171 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
12172 * non queue events in recovery mode
12173 * @pf: board private structure
12174 *
12175 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
12176 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
12177 * This is handled differently than in recovery mode since no Tx/Rx resources
12178 * are being allocated.
12179 **/
i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf * pf)12180 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
12181 {
12182 int err;
12183
12184 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12185 err = i40e_setup_misc_vector(pf);
12186
12187 if (err) {
12188 dev_info(&pf->pdev->dev,
12189 "MSI-X misc vector request failed, error %d\n",
12190 err);
12191 return err;
12192 }
12193 } else {
12194 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
12195
12196 err = request_irq(pf->pdev->irq, i40e_intr, flags,
12197 pf->int_name, pf);
12198
12199 if (err) {
12200 dev_info(&pf->pdev->dev,
12201 "MSI/legacy misc vector request failed, error %d\n",
12202 err);
12203 return err;
12204 }
12205 i40e_enable_misc_int_causes(pf);
12206 i40e_irq_dynamic_enable_icr0(pf);
12207 }
12208
12209 return 0;
12210 }
12211
12212 /**
12213 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
12214 * @pf: board private structure
12215 *
12216 * This sets up the handler for MSIX 0, which is used to manage the
12217 * non-queue interrupts, e.g. AdminQ and errors. This is not used
12218 * when in MSI or Legacy interrupt mode.
12219 **/
i40e_setup_misc_vector(struct i40e_pf * pf)12220 static int i40e_setup_misc_vector(struct i40e_pf *pf)
12221 {
12222 struct i40e_hw *hw = &pf->hw;
12223 int err = 0;
12224
12225 /* Only request the IRQ once, the first time through. */
12226 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
12227 err = request_irq(pf->msix_entries[0].vector,
12228 i40e_intr, 0, pf->int_name, pf);
12229 if (err) {
12230 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
12231 dev_info(&pf->pdev->dev,
12232 "request_irq for %s failed: %d\n",
12233 pf->int_name, err);
12234 return -EFAULT;
12235 }
12236 }
12237
12238 i40e_enable_misc_int_causes(pf);
12239
12240 /* associate no queues to the misc vector */
12241 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
12242 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
12243
12244 i40e_flush(hw);
12245
12246 i40e_irq_dynamic_enable_icr0(pf);
12247
12248 return err;
12249 }
12250
12251 /**
12252 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
12253 * @vsi: Pointer to vsi structure
12254 * @seed: Buffter to store the hash keys
12255 * @lut: Buffer to store the lookup table entries
12256 * @lut_size: Size of buffer to store the lookup table entries
12257 *
12258 * Return 0 on success, negative on failure
12259 */
i40e_get_rss_aq(struct i40e_vsi * vsi,const u8 * seed,u8 * lut,u16 lut_size)12260 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
12261 u8 *lut, u16 lut_size)
12262 {
12263 struct i40e_pf *pf = vsi->back;
12264 struct i40e_hw *hw = &pf->hw;
12265 int ret = 0;
12266
12267 if (seed) {
12268 ret = i40e_aq_get_rss_key(hw, vsi->id,
12269 (struct i40e_aqc_get_set_rss_key_data *)seed);
12270 if (ret) {
12271 dev_info(&pf->pdev->dev,
12272 "Cannot get RSS key, err %pe aq_err %s\n",
12273 ERR_PTR(ret),
12274 i40e_aq_str(&pf->hw,
12275 pf->hw.aq.asq_last_status));
12276 return ret;
12277 }
12278 }
12279
12280 if (lut) {
12281 bool pf_lut = vsi->type == I40E_VSI_MAIN;
12282
12283 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
12284 if (ret) {
12285 dev_info(&pf->pdev->dev,
12286 "Cannot get RSS lut, err %pe aq_err %s\n",
12287 ERR_PTR(ret),
12288 i40e_aq_str(&pf->hw,
12289 pf->hw.aq.asq_last_status));
12290 return ret;
12291 }
12292 }
12293
12294 return ret;
12295 }
12296
12297 /**
12298 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
12299 * @vsi: Pointer to vsi structure
12300 * @seed: RSS hash seed
12301 * @lut: Lookup table
12302 * @lut_size: Lookup table size
12303 *
12304 * Returns 0 on success, negative on failure
12305 **/
i40e_config_rss_reg(struct i40e_vsi * vsi,const u8 * seed,const u8 * lut,u16 lut_size)12306 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
12307 const u8 *lut, u16 lut_size)
12308 {
12309 struct i40e_pf *pf = vsi->back;
12310 struct i40e_hw *hw = &pf->hw;
12311 u16 vf_id = vsi->vf_id;
12312 u8 i;
12313
12314 /* Fill out hash function seed */
12315 if (seed) {
12316 u32 *seed_dw = (u32 *)seed;
12317
12318 if (vsi->type == I40E_VSI_MAIN) {
12319 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12320 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
12321 } else if (vsi->type == I40E_VSI_SRIOV) {
12322 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
12323 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
12324 } else {
12325 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12326 }
12327 }
12328
12329 if (lut) {
12330 u32 *lut_dw = (u32 *)lut;
12331
12332 if (vsi->type == I40E_VSI_MAIN) {
12333 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12334 return -EINVAL;
12335 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12336 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
12337 } else if (vsi->type == I40E_VSI_SRIOV) {
12338 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
12339 return -EINVAL;
12340 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12341 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
12342 } else {
12343 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12344 }
12345 }
12346 i40e_flush(hw);
12347
12348 return 0;
12349 }
12350
12351 /**
12352 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
12353 * @vsi: Pointer to VSI structure
12354 * @seed: Buffer to store the keys
12355 * @lut: Buffer to store the lookup table entries
12356 * @lut_size: Size of buffer to store the lookup table entries
12357 *
12358 * Returns 0 on success, negative on failure
12359 */
i40e_get_rss_reg(struct i40e_vsi * vsi,u8 * seed,u8 * lut,u16 lut_size)12360 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
12361 u8 *lut, u16 lut_size)
12362 {
12363 struct i40e_pf *pf = vsi->back;
12364 struct i40e_hw *hw = &pf->hw;
12365 u16 i;
12366
12367 if (seed) {
12368 u32 *seed_dw = (u32 *)seed;
12369
12370 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12371 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
12372 }
12373 if (lut) {
12374 u32 *lut_dw = (u32 *)lut;
12375
12376 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12377 return -EINVAL;
12378 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12379 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
12380 }
12381
12382 return 0;
12383 }
12384
12385 /**
12386 * i40e_config_rss - Configure RSS keys and lut
12387 * @vsi: Pointer to VSI structure
12388 * @seed: RSS hash seed
12389 * @lut: Lookup table
12390 * @lut_size: Lookup table size
12391 *
12392 * Returns 0 on success, negative on failure
12393 */
i40e_config_rss(struct i40e_vsi * vsi,u8 * seed,u8 * lut,u16 lut_size)12394 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12395 {
12396 struct i40e_pf *pf = vsi->back;
12397
12398 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12399 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12400 else
12401 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12402 }
12403
12404 /**
12405 * i40e_get_rss - Get RSS keys and lut
12406 * @vsi: Pointer to VSI structure
12407 * @seed: Buffer to store the keys
12408 * @lut: Buffer to store the lookup table entries
12409 * @lut_size: Size of buffer to store the lookup table entries
12410 *
12411 * Returns 0 on success, negative on failure
12412 */
i40e_get_rss(struct i40e_vsi * vsi,u8 * seed,u8 * lut,u16 lut_size)12413 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12414 {
12415 struct i40e_pf *pf = vsi->back;
12416
12417 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12418 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12419 else
12420 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12421 }
12422
12423 /**
12424 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12425 * @pf: Pointer to board private structure
12426 * @lut: Lookup table
12427 * @rss_table_size: Lookup table size
12428 * @rss_size: Range of queue number for hashing
12429 */
i40e_fill_rss_lut(struct i40e_pf * pf,u8 * lut,u16 rss_table_size,u16 rss_size)12430 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12431 u16 rss_table_size, u16 rss_size)
12432 {
12433 u16 i;
12434
12435 for (i = 0; i < rss_table_size; i++)
12436 lut[i] = i % rss_size;
12437 }
12438
12439 /**
12440 * i40e_pf_config_rss - Prepare for RSS if used
12441 * @pf: board private structure
12442 **/
i40e_pf_config_rss(struct i40e_pf * pf)12443 static int i40e_pf_config_rss(struct i40e_pf *pf)
12444 {
12445 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12446 u8 seed[I40E_HKEY_ARRAY_SIZE];
12447 u8 *lut;
12448 struct i40e_hw *hw = &pf->hw;
12449 u32 reg_val;
12450 u64 hena;
12451 int ret;
12452
12453 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12454 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12455 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12456 hena |= i40e_pf_get_default_rss_hena(pf);
12457
12458 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12459 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12460
12461 /* Determine the RSS table size based on the hardware capabilities */
12462 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12463 reg_val = (pf->rss_table_size == 512) ?
12464 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12465 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12466 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12467
12468 /* Determine the RSS size of the VSI */
12469 if (!vsi->rss_size) {
12470 u16 qcount;
12471 /* If the firmware does something weird during VSI init, we
12472 * could end up with zero TCs. Check for that to avoid
12473 * divide-by-zero. It probably won't pass traffic, but it also
12474 * won't panic.
12475 */
12476 qcount = vsi->num_queue_pairs /
12477 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12478 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12479 }
12480 if (!vsi->rss_size)
12481 return -EINVAL;
12482
12483 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12484 if (!lut)
12485 return -ENOMEM;
12486
12487 /* Use user configured lut if there is one, otherwise use default */
12488 if (vsi->rss_lut_user)
12489 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12490 else
12491 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12492
12493 /* Use user configured hash key if there is one, otherwise
12494 * use default.
12495 */
12496 if (vsi->rss_hkey_user)
12497 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12498 else
12499 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12500 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12501 kfree(lut);
12502
12503 return ret;
12504 }
12505
12506 /**
12507 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12508 * @pf: board private structure
12509 * @queue_count: the requested queue count for rss.
12510 *
12511 * returns 0 if rss is not enabled, if enabled returns the final rss queue
12512 * count which may be different from the requested queue count.
12513 * Note: expects to be called while under rtnl_lock()
12514 **/
i40e_reconfig_rss_queues(struct i40e_pf * pf,int queue_count)12515 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12516 {
12517 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12518 int new_rss_size;
12519
12520 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12521 return 0;
12522
12523 queue_count = min_t(int, queue_count, num_online_cpus());
12524 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12525
12526 if (queue_count != vsi->num_queue_pairs) {
12527 u16 qcount;
12528
12529 vsi->req_queue_pairs = queue_count;
12530 i40e_prep_for_reset(pf);
12531 if (test_bit(__I40E_IN_REMOVE, pf->state))
12532 return pf->alloc_rss_size;
12533
12534 pf->alloc_rss_size = new_rss_size;
12535
12536 i40e_reset_and_rebuild(pf, true, true);
12537
12538 /* Discard the user configured hash keys and lut, if less
12539 * queues are enabled.
12540 */
12541 if (queue_count < vsi->rss_size) {
12542 i40e_clear_rss_config_user(vsi);
12543 dev_dbg(&pf->pdev->dev,
12544 "discard user configured hash keys and lut\n");
12545 }
12546
12547 /* Reset vsi->rss_size, as number of enabled queues changed */
12548 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12549 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12550
12551 i40e_pf_config_rss(pf);
12552 }
12553 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
12554 vsi->req_queue_pairs, pf->rss_size_max);
12555 return pf->alloc_rss_size;
12556 }
12557
12558 /**
12559 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12560 * @pf: board private structure
12561 **/
i40e_get_partition_bw_setting(struct i40e_pf * pf)12562 int i40e_get_partition_bw_setting(struct i40e_pf *pf)
12563 {
12564 bool min_valid, max_valid;
12565 u32 max_bw, min_bw;
12566 int status;
12567
12568 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12569 &min_valid, &max_valid);
12570
12571 if (!status) {
12572 if (min_valid)
12573 pf->min_bw = min_bw;
12574 if (max_valid)
12575 pf->max_bw = max_bw;
12576 }
12577
12578 return status;
12579 }
12580
12581 /**
12582 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12583 * @pf: board private structure
12584 **/
i40e_set_partition_bw_setting(struct i40e_pf * pf)12585 int i40e_set_partition_bw_setting(struct i40e_pf *pf)
12586 {
12587 struct i40e_aqc_configure_partition_bw_data bw_data;
12588 int status;
12589
12590 memset(&bw_data, 0, sizeof(bw_data));
12591
12592 /* Set the valid bit for this PF */
12593 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12594 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12595 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12596
12597 /* Set the new bandwidths */
12598 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12599
12600 return status;
12601 }
12602
12603 /**
12604 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12605 * @pf: board private structure
12606 **/
i40e_commit_partition_bw_setting(struct i40e_pf * pf)12607 int i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12608 {
12609 /* Commit temporary BW setting to permanent NVM image */
12610 enum i40e_admin_queue_err last_aq_status;
12611 u16 nvm_word;
12612 int ret;
12613
12614 if (pf->hw.partition_id != 1) {
12615 dev_info(&pf->pdev->dev,
12616 "Commit BW only works on partition 1! This is partition %d",
12617 pf->hw.partition_id);
12618 ret = -EOPNOTSUPP;
12619 goto bw_commit_out;
12620 }
12621
12622 /* Acquire NVM for read access */
12623 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12624 last_aq_status = pf->hw.aq.asq_last_status;
12625 if (ret) {
12626 dev_info(&pf->pdev->dev,
12627 "Cannot acquire NVM for read access, err %pe aq_err %s\n",
12628 ERR_PTR(ret),
12629 i40e_aq_str(&pf->hw, last_aq_status));
12630 goto bw_commit_out;
12631 }
12632
12633 /* Read word 0x10 of NVM - SW compatibility word 1 */
12634 ret = i40e_aq_read_nvm(&pf->hw,
12635 I40E_SR_NVM_CONTROL_WORD,
12636 0x10, sizeof(nvm_word), &nvm_word,
12637 false, NULL);
12638 /* Save off last admin queue command status before releasing
12639 * the NVM
12640 */
12641 last_aq_status = pf->hw.aq.asq_last_status;
12642 i40e_release_nvm(&pf->hw);
12643 if (ret) {
12644 dev_info(&pf->pdev->dev, "NVM read error, err %pe aq_err %s\n",
12645 ERR_PTR(ret),
12646 i40e_aq_str(&pf->hw, last_aq_status));
12647 goto bw_commit_out;
12648 }
12649
12650 /* Wait a bit for NVM release to complete */
12651 msleep(50);
12652
12653 /* Acquire NVM for write access */
12654 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12655 last_aq_status = pf->hw.aq.asq_last_status;
12656 if (ret) {
12657 dev_info(&pf->pdev->dev,
12658 "Cannot acquire NVM for write access, err %pe aq_err %s\n",
12659 ERR_PTR(ret),
12660 i40e_aq_str(&pf->hw, last_aq_status));
12661 goto bw_commit_out;
12662 }
12663 /* Write it back out unchanged to initiate update NVM,
12664 * which will force a write of the shadow (alt) RAM to
12665 * the NVM - thus storing the bandwidth values permanently.
12666 */
12667 ret = i40e_aq_update_nvm(&pf->hw,
12668 I40E_SR_NVM_CONTROL_WORD,
12669 0x10, sizeof(nvm_word),
12670 &nvm_word, true, 0, NULL);
12671 /* Save off last admin queue command status before releasing
12672 * the NVM
12673 */
12674 last_aq_status = pf->hw.aq.asq_last_status;
12675 i40e_release_nvm(&pf->hw);
12676 if (ret)
12677 dev_info(&pf->pdev->dev,
12678 "BW settings NOT SAVED, err %pe aq_err %s\n",
12679 ERR_PTR(ret),
12680 i40e_aq_str(&pf->hw, last_aq_status));
12681 bw_commit_out:
12682
12683 return ret;
12684 }
12685
12686 /**
12687 * i40e_is_total_port_shutdown_enabled - read NVM and return value
12688 * if total port shutdown feature is enabled for this PF
12689 * @pf: board private structure
12690 **/
i40e_is_total_port_shutdown_enabled(struct i40e_pf * pf)12691 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12692 {
12693 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED BIT(4)
12694 #define I40E_FEATURES_ENABLE_PTR 0x2A
12695 #define I40E_CURRENT_SETTING_PTR 0x2B
12696 #define I40E_LINK_BEHAVIOR_WORD_OFFSET 0x2D
12697 #define I40E_LINK_BEHAVIOR_WORD_LENGTH 0x1
12698 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED BIT(0)
12699 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH 4
12700 u16 sr_emp_sr_settings_ptr = 0;
12701 u16 features_enable = 0;
12702 u16 link_behavior = 0;
12703 int read_status = 0;
12704 bool ret = false;
12705
12706 read_status = i40e_read_nvm_word(&pf->hw,
12707 I40E_SR_EMP_SR_SETTINGS_PTR,
12708 &sr_emp_sr_settings_ptr);
12709 if (read_status)
12710 goto err_nvm;
12711 read_status = i40e_read_nvm_word(&pf->hw,
12712 sr_emp_sr_settings_ptr +
12713 I40E_FEATURES_ENABLE_PTR,
12714 &features_enable);
12715 if (read_status)
12716 goto err_nvm;
12717 if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12718 read_status = i40e_read_nvm_module_data(&pf->hw,
12719 I40E_SR_EMP_SR_SETTINGS_PTR,
12720 I40E_CURRENT_SETTING_PTR,
12721 I40E_LINK_BEHAVIOR_WORD_OFFSET,
12722 I40E_LINK_BEHAVIOR_WORD_LENGTH,
12723 &link_behavior);
12724 if (read_status)
12725 goto err_nvm;
12726 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12727 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12728 }
12729 return ret;
12730
12731 err_nvm:
12732 dev_warn(&pf->pdev->dev,
12733 "total-port-shutdown feature is off due to read nvm error: %pe\n",
12734 ERR_PTR(read_status));
12735 return ret;
12736 }
12737
12738 /**
12739 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12740 * @pf: board private structure to initialize
12741 *
12742 * i40e_sw_init initializes the Adapter private data structure.
12743 * Fields are initialized based on PCI device information and
12744 * OS network device settings (MTU size).
12745 **/
i40e_sw_init(struct i40e_pf * pf)12746 static int i40e_sw_init(struct i40e_pf *pf)
12747 {
12748 int err = 0;
12749 int size;
12750 u16 pow;
12751
12752 /* Set default capability flags */
12753 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12754 I40E_FLAG_MSI_ENABLED |
12755 I40E_FLAG_MSIX_ENABLED;
12756
12757 /* Set default ITR */
12758 pf->rx_itr_default = I40E_ITR_RX_DEF;
12759 pf->tx_itr_default = I40E_ITR_TX_DEF;
12760
12761 /* Depending on PF configurations, it is possible that the RSS
12762 * maximum might end up larger than the available queues
12763 */
12764 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12765 pf->alloc_rss_size = 1;
12766 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12767 pf->rss_size_max = min_t(int, pf->rss_size_max,
12768 pf->hw.func_caps.num_tx_qp);
12769
12770 /* find the next higher power-of-2 of num cpus */
12771 pow = roundup_pow_of_two(num_online_cpus());
12772 pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12773
12774 if (pf->hw.func_caps.rss) {
12775 pf->flags |= I40E_FLAG_RSS_ENABLED;
12776 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12777 num_online_cpus());
12778 }
12779
12780 /* MFP mode enabled */
12781 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12782 pf->flags |= I40E_FLAG_MFP_ENABLED;
12783 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12784 if (i40e_get_partition_bw_setting(pf)) {
12785 dev_warn(&pf->pdev->dev,
12786 "Could not get partition bw settings\n");
12787 } else {
12788 dev_info(&pf->pdev->dev,
12789 "Partition BW Min = %8.8x, Max = %8.8x\n",
12790 pf->min_bw, pf->max_bw);
12791
12792 /* nudge the Tx scheduler */
12793 i40e_set_partition_bw_setting(pf);
12794 }
12795 }
12796
12797 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12798 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12799 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12800 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12801 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12802 pf->hw.num_partitions > 1)
12803 dev_info(&pf->pdev->dev,
12804 "Flow Director Sideband mode Disabled in MFP mode\n");
12805 else
12806 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12807 pf->fdir_pf_filter_count =
12808 pf->hw.func_caps.fd_filters_guaranteed;
12809 pf->hw.fdir_shared_filter_count =
12810 pf->hw.func_caps.fd_filters_best_effort;
12811 }
12812
12813 if (pf->hw.mac.type == I40E_MAC_X722) {
12814 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12815 I40E_HW_128_QP_RSS_CAPABLE |
12816 I40E_HW_ATR_EVICT_CAPABLE |
12817 I40E_HW_WB_ON_ITR_CAPABLE |
12818 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12819 I40E_HW_NO_PCI_LINK_CHECK |
12820 I40E_HW_USE_SET_LLDP_MIB |
12821 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12822 I40E_HW_PTP_L4_CAPABLE |
12823 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12824 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12825
12826 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12827 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12828 I40E_FDEVICT_PCTYPE_DEFAULT) {
12829 dev_warn(&pf->pdev->dev,
12830 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12831 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12832 }
12833 } else if ((pf->hw.aq.api_maj_ver > 1) ||
12834 ((pf->hw.aq.api_maj_ver == 1) &&
12835 (pf->hw.aq.api_min_ver > 4))) {
12836 /* Supported in FW API version higher than 1.4 */
12837 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12838 }
12839
12840 /* Enable HW ATR eviction if possible */
12841 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12842 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12843
12844 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12845 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12846 (pf->hw.aq.fw_maj_ver < 4))) {
12847 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12848 /* No DCB support for FW < v4.33 */
12849 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12850 }
12851
12852 /* Disable FW LLDP if FW < v4.3 */
12853 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12854 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12855 (pf->hw.aq.fw_maj_ver < 4)))
12856 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12857
12858 /* Use the FW Set LLDP MIB API if FW > v4.40 */
12859 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12860 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12861 (pf->hw.aq.fw_maj_ver >= 5)))
12862 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12863
12864 /* Enable PTP L4 if FW > v6.0 */
12865 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12866 pf->hw.aq.fw_maj_ver >= 6)
12867 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12868
12869 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12870 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12871 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12872 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12873 }
12874
12875 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12876 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12877 /* IWARP needs one extra vector for CQP just like MISC.*/
12878 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12879 }
12880 /* Stopping FW LLDP engine is supported on XL710 and X722
12881 * starting from FW versions determined in i40e_init_adminq.
12882 * Stopping the FW LLDP engine is not supported on XL710
12883 * if NPAR is functioning so unset this hw flag in this case.
12884 */
12885 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12886 pf->hw.func_caps.npar_enable &&
12887 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12888 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12889
12890 #ifdef CONFIG_PCI_IOV
12891 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12892 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12893 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12894 pf->num_req_vfs = min_t(int,
12895 pf->hw.func_caps.num_vfs,
12896 I40E_MAX_VF_COUNT);
12897 }
12898 #endif /* CONFIG_PCI_IOV */
12899 pf->eeprom_version = 0xDEAD;
12900 pf->lan_veb = I40E_NO_VEB;
12901 pf->lan_vsi = I40E_NO_VSI;
12902
12903 /* By default FW has this off for performance reasons */
12904 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12905
12906 /* set up queue assignment tracking */
12907 size = sizeof(struct i40e_lump_tracking)
12908 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12909 pf->qp_pile = kzalloc(size, GFP_KERNEL);
12910 if (!pf->qp_pile) {
12911 err = -ENOMEM;
12912 goto sw_init_done;
12913 }
12914 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12915
12916 pf->tx_timeout_recovery_level = 1;
12917
12918 if (pf->hw.mac.type != I40E_MAC_X722 &&
12919 i40e_is_total_port_shutdown_enabled(pf)) {
12920 /* Link down on close must be on when total port shutdown
12921 * is enabled for a given port
12922 */
12923 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12924 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12925 dev_info(&pf->pdev->dev,
12926 "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12927 }
12928 mutex_init(&pf->switch_mutex);
12929
12930 sw_init_done:
12931 return err;
12932 }
12933
12934 /**
12935 * i40e_set_ntuple - set the ntuple feature flag and take action
12936 * @pf: board private structure to initialize
12937 * @features: the feature set that the stack is suggesting
12938 *
12939 * returns a bool to indicate if reset needs to happen
12940 **/
i40e_set_ntuple(struct i40e_pf * pf,netdev_features_t features)12941 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12942 {
12943 bool need_reset = false;
12944
12945 /* Check if Flow Director n-tuple support was enabled or disabled. If
12946 * the state changed, we need to reset.
12947 */
12948 if (features & NETIF_F_NTUPLE) {
12949 /* Enable filters and mark for reset */
12950 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12951 need_reset = true;
12952 /* enable FD_SB only if there is MSI-X vector and no cloud
12953 * filters exist
12954 */
12955 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12956 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12957 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12958 }
12959 } else {
12960 /* turn off filters, mark for reset and clear SW filter list */
12961 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12962 need_reset = true;
12963 i40e_fdir_filter_exit(pf);
12964 }
12965 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12966 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12967 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12968
12969 /* reset fd counters */
12970 pf->fd_add_err = 0;
12971 pf->fd_atr_cnt = 0;
12972 /* if ATR was auto disabled it can be re-enabled. */
12973 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12974 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12975 (I40E_DEBUG_FD & pf->hw.debug_mask))
12976 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12977 }
12978 return need_reset;
12979 }
12980
12981 /**
12982 * i40e_clear_rss_lut - clear the rx hash lookup table
12983 * @vsi: the VSI being configured
12984 **/
i40e_clear_rss_lut(struct i40e_vsi * vsi)12985 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12986 {
12987 struct i40e_pf *pf = vsi->back;
12988 struct i40e_hw *hw = &pf->hw;
12989 u16 vf_id = vsi->vf_id;
12990 u8 i;
12991
12992 if (vsi->type == I40E_VSI_MAIN) {
12993 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12994 wr32(hw, I40E_PFQF_HLUT(i), 0);
12995 } else if (vsi->type == I40E_VSI_SRIOV) {
12996 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12997 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12998 } else {
12999 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
13000 }
13001 }
13002
13003 /**
13004 * i40e_set_loopback - turn on/off loopback mode on underlying PF
13005 * @vsi: ptr to VSI
13006 * @ena: flag to indicate the on/off setting
13007 */
i40e_set_loopback(struct i40e_vsi * vsi,bool ena)13008 static int i40e_set_loopback(struct i40e_vsi *vsi, bool ena)
13009 {
13010 bool if_running = netif_running(vsi->netdev) &&
13011 !test_and_set_bit(__I40E_VSI_DOWN, vsi->state);
13012 int ret;
13013
13014 if (if_running)
13015 i40e_down(vsi);
13016
13017 ret = i40e_aq_set_mac_loopback(&vsi->back->hw, ena, NULL);
13018 if (ret)
13019 netdev_err(vsi->netdev, "Failed to toggle loopback state\n");
13020 if (if_running)
13021 i40e_up(vsi);
13022
13023 return ret;
13024 }
13025
13026 /**
13027 * i40e_set_features - set the netdev feature flags
13028 * @netdev: ptr to the netdev being adjusted
13029 * @features: the feature set that the stack is suggesting
13030 * Note: expects to be called while under rtnl_lock()
13031 **/
i40e_set_features(struct net_device * netdev,netdev_features_t features)13032 static int i40e_set_features(struct net_device *netdev,
13033 netdev_features_t features)
13034 {
13035 struct i40e_netdev_priv *np = netdev_priv(netdev);
13036 struct i40e_vsi *vsi = np->vsi;
13037 struct i40e_pf *pf = vsi->back;
13038 bool need_reset;
13039
13040 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
13041 i40e_pf_config_rss(pf);
13042 else if (!(features & NETIF_F_RXHASH) &&
13043 netdev->features & NETIF_F_RXHASH)
13044 i40e_clear_rss_lut(vsi);
13045
13046 if (features & NETIF_F_HW_VLAN_CTAG_RX)
13047 i40e_vlan_stripping_enable(vsi);
13048 else
13049 i40e_vlan_stripping_disable(vsi);
13050
13051 if (!(features & NETIF_F_HW_TC) &&
13052 (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
13053 dev_err(&pf->pdev->dev,
13054 "Offloaded tc filters active, can't turn hw_tc_offload off");
13055 return -EINVAL;
13056 }
13057
13058 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
13059 i40e_del_all_macvlans(vsi);
13060
13061 need_reset = i40e_set_ntuple(pf, features);
13062
13063 if (need_reset)
13064 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13065
13066 if ((features ^ netdev->features) & NETIF_F_LOOPBACK)
13067 return i40e_set_loopback(vsi, !!(features & NETIF_F_LOOPBACK));
13068
13069 return 0;
13070 }
13071
i40e_udp_tunnel_set_port(struct net_device * netdev,unsigned int table,unsigned int idx,struct udp_tunnel_info * ti)13072 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
13073 unsigned int table, unsigned int idx,
13074 struct udp_tunnel_info *ti)
13075 {
13076 struct i40e_netdev_priv *np = netdev_priv(netdev);
13077 struct i40e_hw *hw = &np->vsi->back->hw;
13078 u8 type, filter_index;
13079 int ret;
13080
13081 type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
13082 I40E_AQC_TUNNEL_TYPE_NGE;
13083
13084 ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
13085 NULL);
13086 if (ret) {
13087 netdev_info(netdev, "add UDP port failed, err %pe aq_err %s\n",
13088 ERR_PTR(ret),
13089 i40e_aq_str(hw, hw->aq.asq_last_status));
13090 return -EIO;
13091 }
13092
13093 udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
13094 return 0;
13095 }
13096
i40e_udp_tunnel_unset_port(struct net_device * netdev,unsigned int table,unsigned int idx,struct udp_tunnel_info * ti)13097 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
13098 unsigned int table, unsigned int idx,
13099 struct udp_tunnel_info *ti)
13100 {
13101 struct i40e_netdev_priv *np = netdev_priv(netdev);
13102 struct i40e_hw *hw = &np->vsi->back->hw;
13103 int ret;
13104
13105 ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
13106 if (ret) {
13107 netdev_info(netdev, "delete UDP port failed, err %pe aq_err %s\n",
13108 ERR_PTR(ret),
13109 i40e_aq_str(hw, hw->aq.asq_last_status));
13110 return -EIO;
13111 }
13112
13113 return 0;
13114 }
13115
i40e_get_phys_port_id(struct net_device * netdev,struct netdev_phys_item_id * ppid)13116 static int i40e_get_phys_port_id(struct net_device *netdev,
13117 struct netdev_phys_item_id *ppid)
13118 {
13119 struct i40e_netdev_priv *np = netdev_priv(netdev);
13120 struct i40e_pf *pf = np->vsi->back;
13121 struct i40e_hw *hw = &pf->hw;
13122
13123 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
13124 return -EOPNOTSUPP;
13125
13126 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
13127 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
13128
13129 return 0;
13130 }
13131
13132 /**
13133 * i40e_ndo_fdb_add - add an entry to the hardware database
13134 * @ndm: the input from the stack
13135 * @tb: pointer to array of nladdr (unused)
13136 * @dev: the net device pointer
13137 * @addr: the MAC address entry being added
13138 * @vid: VLAN ID
13139 * @flags: instructions from stack about fdb operation
13140 * @extack: netlink extended ack, unused currently
13141 */
i40e_ndo_fdb_add(struct ndmsg * ndm,struct nlattr * tb[],struct net_device * dev,const unsigned char * addr,u16 vid,u16 flags,struct netlink_ext_ack * extack)13142 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
13143 struct net_device *dev,
13144 const unsigned char *addr, u16 vid,
13145 u16 flags,
13146 struct netlink_ext_ack *extack)
13147 {
13148 struct i40e_netdev_priv *np = netdev_priv(dev);
13149 struct i40e_pf *pf = np->vsi->back;
13150 int err = 0;
13151
13152 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
13153 return -EOPNOTSUPP;
13154
13155 if (vid) {
13156 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
13157 return -EINVAL;
13158 }
13159
13160 /* Hardware does not support aging addresses so if a
13161 * ndm_state is given only allow permanent addresses
13162 */
13163 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
13164 netdev_info(dev, "FDB only supports static addresses\n");
13165 return -EINVAL;
13166 }
13167
13168 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
13169 err = dev_uc_add_excl(dev, addr);
13170 else if (is_multicast_ether_addr(addr))
13171 err = dev_mc_add_excl(dev, addr);
13172 else
13173 err = -EINVAL;
13174
13175 /* Only return duplicate errors if NLM_F_EXCL is set */
13176 if (err == -EEXIST && !(flags & NLM_F_EXCL))
13177 err = 0;
13178
13179 return err;
13180 }
13181
13182 /**
13183 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
13184 * @dev: the netdev being configured
13185 * @nlh: RTNL message
13186 * @flags: bridge flags
13187 * @extack: netlink extended ack
13188 *
13189 * Inserts a new hardware bridge if not already created and
13190 * enables the bridging mode requested (VEB or VEPA). If the
13191 * hardware bridge has already been inserted and the request
13192 * is to change the mode then that requires a PF reset to
13193 * allow rebuild of the components with required hardware
13194 * bridge mode enabled.
13195 *
13196 * Note: expects to be called while under rtnl_lock()
13197 **/
i40e_ndo_bridge_setlink(struct net_device * dev,struct nlmsghdr * nlh,u16 flags,struct netlink_ext_ack * extack)13198 static int i40e_ndo_bridge_setlink(struct net_device *dev,
13199 struct nlmsghdr *nlh,
13200 u16 flags,
13201 struct netlink_ext_ack *extack)
13202 {
13203 struct i40e_netdev_priv *np = netdev_priv(dev);
13204 struct i40e_vsi *vsi = np->vsi;
13205 struct i40e_pf *pf = vsi->back;
13206 struct i40e_veb *veb = NULL;
13207 struct nlattr *attr, *br_spec;
13208 int i, rem;
13209
13210 /* Only for PF VSI for now */
13211 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13212 return -EOPNOTSUPP;
13213
13214 /* Find the HW bridge for PF VSI */
13215 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13216 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13217 veb = pf->veb[i];
13218 }
13219
13220 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
13221 if (!br_spec)
13222 return -EINVAL;
13223
13224 nla_for_each_nested(attr, br_spec, rem) {
13225 __u16 mode;
13226
13227 if (nla_type(attr) != IFLA_BRIDGE_MODE)
13228 continue;
13229
13230 mode = nla_get_u16(attr);
13231 if ((mode != BRIDGE_MODE_VEPA) &&
13232 (mode != BRIDGE_MODE_VEB))
13233 return -EINVAL;
13234
13235 /* Insert a new HW bridge */
13236 if (!veb) {
13237 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
13238 vsi->tc_config.enabled_tc);
13239 if (veb) {
13240 veb->bridge_mode = mode;
13241 i40e_config_bridge_mode(veb);
13242 } else {
13243 /* No Bridge HW offload available */
13244 return -ENOENT;
13245 }
13246 break;
13247 } else if (mode != veb->bridge_mode) {
13248 /* Existing HW bridge but different mode needs reset */
13249 veb->bridge_mode = mode;
13250 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
13251 if (mode == BRIDGE_MODE_VEB)
13252 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
13253 else
13254 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
13255 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13256 break;
13257 }
13258 }
13259
13260 return 0;
13261 }
13262
13263 /**
13264 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
13265 * @skb: skb buff
13266 * @pid: process id
13267 * @seq: RTNL message seq #
13268 * @dev: the netdev being configured
13269 * @filter_mask: unused
13270 * @nlflags: netlink flags passed in
13271 *
13272 * Return the mode in which the hardware bridge is operating in
13273 * i.e VEB or VEPA.
13274 **/
i40e_ndo_bridge_getlink(struct sk_buff * skb,u32 pid,u32 seq,struct net_device * dev,u32 __always_unused filter_mask,int nlflags)13275 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
13276 struct net_device *dev,
13277 u32 __always_unused filter_mask,
13278 int nlflags)
13279 {
13280 struct i40e_netdev_priv *np = netdev_priv(dev);
13281 struct i40e_vsi *vsi = np->vsi;
13282 struct i40e_pf *pf = vsi->back;
13283 struct i40e_veb *veb = NULL;
13284 int i;
13285
13286 /* Only for PF VSI for now */
13287 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13288 return -EOPNOTSUPP;
13289
13290 /* Find the HW bridge for the PF VSI */
13291 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13292 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13293 veb = pf->veb[i];
13294 }
13295
13296 if (!veb)
13297 return 0;
13298
13299 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
13300 0, 0, nlflags, filter_mask, NULL);
13301 }
13302
13303 /**
13304 * i40e_features_check - Validate encapsulated packet conforms to limits
13305 * @skb: skb buff
13306 * @dev: This physical port's netdev
13307 * @features: Offload features that the stack believes apply
13308 **/
i40e_features_check(struct sk_buff * skb,struct net_device * dev,netdev_features_t features)13309 static netdev_features_t i40e_features_check(struct sk_buff *skb,
13310 struct net_device *dev,
13311 netdev_features_t features)
13312 {
13313 size_t len;
13314
13315 /* No point in doing any of this if neither checksum nor GSO are
13316 * being requested for this frame. We can rule out both by just
13317 * checking for CHECKSUM_PARTIAL
13318 */
13319 if (skb->ip_summed != CHECKSUM_PARTIAL)
13320 return features;
13321
13322 /* We cannot support GSO if the MSS is going to be less than
13323 * 64 bytes. If it is then we need to drop support for GSO.
13324 */
13325 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
13326 features &= ~NETIF_F_GSO_MASK;
13327
13328 /* MACLEN can support at most 63 words */
13329 len = skb_network_header(skb) - skb->data;
13330 if (len & ~(63 * 2))
13331 goto out_err;
13332
13333 /* IPLEN and EIPLEN can support at most 127 dwords */
13334 len = skb_transport_header(skb) - skb_network_header(skb);
13335 if (len & ~(127 * 4))
13336 goto out_err;
13337
13338 if (skb->encapsulation) {
13339 /* L4TUNLEN can support 127 words */
13340 len = skb_inner_network_header(skb) - skb_transport_header(skb);
13341 if (len & ~(127 * 2))
13342 goto out_err;
13343
13344 /* IPLEN can support at most 127 dwords */
13345 len = skb_inner_transport_header(skb) -
13346 skb_inner_network_header(skb);
13347 if (len & ~(127 * 4))
13348 goto out_err;
13349 }
13350
13351 /* No need to validate L4LEN as TCP is the only protocol with a
13352 * flexible value and we support all possible values supported
13353 * by TCP, which is at most 15 dwords
13354 */
13355
13356 return features;
13357 out_err:
13358 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
13359 }
13360
13361 /**
13362 * i40e_xdp_setup - add/remove an XDP program
13363 * @vsi: VSI to changed
13364 * @prog: XDP program
13365 * @extack: netlink extended ack
13366 **/
i40e_xdp_setup(struct i40e_vsi * vsi,struct bpf_prog * prog,struct netlink_ext_ack * extack)13367 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
13368 struct netlink_ext_ack *extack)
13369 {
13370 int frame_size = i40e_max_vsi_frame_size(vsi, prog);
13371 struct i40e_pf *pf = vsi->back;
13372 struct bpf_prog *old_prog;
13373 bool need_reset;
13374 int i;
13375
13376 /* VSI shall be deleted in a moment, block loading new programs */
13377 if (prog && test_bit(__I40E_IN_REMOVE, pf->state))
13378 return -EINVAL;
13379
13380 /* Don't allow frames that span over multiple buffers */
13381 if (vsi->netdev->mtu > frame_size - I40E_PACKET_HDR_PAD) {
13382 NL_SET_ERR_MSG_MOD(extack, "MTU too large for linear frames and XDP prog does not support frags");
13383 return -EINVAL;
13384 }
13385
13386 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
13387 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
13388 if (need_reset)
13389 i40e_prep_for_reset(pf);
13390
13391 old_prog = xchg(&vsi->xdp_prog, prog);
13392
13393 if (need_reset) {
13394 if (!prog) {
13395 xdp_features_clear_redirect_target(vsi->netdev);
13396 /* Wait until ndo_xsk_wakeup completes. */
13397 synchronize_rcu();
13398 }
13399 i40e_reset_and_rebuild(pf, true, true);
13400 }
13401
13402 if (!i40e_enabled_xdp_vsi(vsi) && prog) {
13403 if (i40e_realloc_rx_bi_zc(vsi, true))
13404 return -ENOMEM;
13405 } else if (i40e_enabled_xdp_vsi(vsi) && !prog) {
13406 if (i40e_realloc_rx_bi_zc(vsi, false))
13407 return -ENOMEM;
13408 }
13409
13410 for (i = 0; i < vsi->num_queue_pairs; i++)
13411 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
13412
13413 if (old_prog)
13414 bpf_prog_put(old_prog);
13415
13416 /* Kick start the NAPI context if there is an AF_XDP socket open
13417 * on that queue id. This so that receiving will start.
13418 */
13419 if (need_reset && prog) {
13420 for (i = 0; i < vsi->num_queue_pairs; i++)
13421 if (vsi->xdp_rings[i]->xsk_pool)
13422 (void)i40e_xsk_wakeup(vsi->netdev, i,
13423 XDP_WAKEUP_RX);
13424 xdp_features_set_redirect_target(vsi->netdev, true);
13425 }
13426
13427 return 0;
13428 }
13429
13430 /**
13431 * i40e_enter_busy_conf - Enters busy config state
13432 * @vsi: vsi
13433 *
13434 * Returns 0 on success, <0 for failure.
13435 **/
i40e_enter_busy_conf(struct i40e_vsi * vsi)13436 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13437 {
13438 struct i40e_pf *pf = vsi->back;
13439 int timeout = 50;
13440
13441 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13442 timeout--;
13443 if (!timeout)
13444 return -EBUSY;
13445 usleep_range(1000, 2000);
13446 }
13447
13448 return 0;
13449 }
13450
13451 /**
13452 * i40e_exit_busy_conf - Exits busy config state
13453 * @vsi: vsi
13454 **/
i40e_exit_busy_conf(struct i40e_vsi * vsi)13455 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13456 {
13457 struct i40e_pf *pf = vsi->back;
13458
13459 clear_bit(__I40E_CONFIG_BUSY, pf->state);
13460 }
13461
13462 /**
13463 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13464 * @vsi: vsi
13465 * @queue_pair: queue pair
13466 **/
i40e_queue_pair_reset_stats(struct i40e_vsi * vsi,int queue_pair)13467 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13468 {
13469 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13470 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13471 memset(&vsi->tx_rings[queue_pair]->stats, 0,
13472 sizeof(vsi->tx_rings[queue_pair]->stats));
13473 if (i40e_enabled_xdp_vsi(vsi)) {
13474 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13475 sizeof(vsi->xdp_rings[queue_pair]->stats));
13476 }
13477 }
13478
13479 /**
13480 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13481 * @vsi: vsi
13482 * @queue_pair: queue pair
13483 **/
i40e_queue_pair_clean_rings(struct i40e_vsi * vsi,int queue_pair)13484 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13485 {
13486 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13487 if (i40e_enabled_xdp_vsi(vsi)) {
13488 /* Make sure that in-progress ndo_xdp_xmit calls are
13489 * completed.
13490 */
13491 synchronize_rcu();
13492 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13493 }
13494 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13495 }
13496
13497 /**
13498 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13499 * @vsi: vsi
13500 * @queue_pair: queue pair
13501 * @enable: true for enable, false for disable
13502 **/
i40e_queue_pair_toggle_napi(struct i40e_vsi * vsi,int queue_pair,bool enable)13503 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13504 bool enable)
13505 {
13506 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13507 struct i40e_q_vector *q_vector = rxr->q_vector;
13508
13509 if (!vsi->netdev)
13510 return;
13511
13512 /* All rings in a qp belong to the same qvector. */
13513 if (q_vector->rx.ring || q_vector->tx.ring) {
13514 if (enable)
13515 napi_enable(&q_vector->napi);
13516 else
13517 napi_disable(&q_vector->napi);
13518 }
13519 }
13520
13521 /**
13522 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13523 * @vsi: vsi
13524 * @queue_pair: queue pair
13525 * @enable: true for enable, false for disable
13526 *
13527 * Returns 0 on success, <0 on failure.
13528 **/
i40e_queue_pair_toggle_rings(struct i40e_vsi * vsi,int queue_pair,bool enable)13529 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13530 bool enable)
13531 {
13532 struct i40e_pf *pf = vsi->back;
13533 int pf_q, ret = 0;
13534
13535 pf_q = vsi->base_queue + queue_pair;
13536 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13537 false /*is xdp*/, enable);
13538 if (ret) {
13539 dev_info(&pf->pdev->dev,
13540 "VSI seid %d Tx ring %d %sable timeout\n",
13541 vsi->seid, pf_q, (enable ? "en" : "dis"));
13542 return ret;
13543 }
13544
13545 i40e_control_rx_q(pf, pf_q, enable);
13546 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13547 if (ret) {
13548 dev_info(&pf->pdev->dev,
13549 "VSI seid %d Rx ring %d %sable timeout\n",
13550 vsi->seid, pf_q, (enable ? "en" : "dis"));
13551 return ret;
13552 }
13553
13554 /* Due to HW errata, on Rx disable only, the register can
13555 * indicate done before it really is. Needs 50ms to be sure
13556 */
13557 if (!enable)
13558 mdelay(50);
13559
13560 if (!i40e_enabled_xdp_vsi(vsi))
13561 return ret;
13562
13563 ret = i40e_control_wait_tx_q(vsi->seid, pf,
13564 pf_q + vsi->alloc_queue_pairs,
13565 true /*is xdp*/, enable);
13566 if (ret) {
13567 dev_info(&pf->pdev->dev,
13568 "VSI seid %d XDP Tx ring %d %sable timeout\n",
13569 vsi->seid, pf_q, (enable ? "en" : "dis"));
13570 }
13571
13572 return ret;
13573 }
13574
13575 /**
13576 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13577 * @vsi: vsi
13578 * @queue_pair: queue_pair
13579 **/
i40e_queue_pair_enable_irq(struct i40e_vsi * vsi,int queue_pair)13580 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13581 {
13582 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13583 struct i40e_pf *pf = vsi->back;
13584 struct i40e_hw *hw = &pf->hw;
13585
13586 /* All rings in a qp belong to the same qvector. */
13587 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13588 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13589 else
13590 i40e_irq_dynamic_enable_icr0(pf);
13591
13592 i40e_flush(hw);
13593 }
13594
13595 /**
13596 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13597 * @vsi: vsi
13598 * @queue_pair: queue_pair
13599 **/
i40e_queue_pair_disable_irq(struct i40e_vsi * vsi,int queue_pair)13600 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13601 {
13602 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13603 struct i40e_pf *pf = vsi->back;
13604 struct i40e_hw *hw = &pf->hw;
13605
13606 /* For simplicity, instead of removing the qp interrupt causes
13607 * from the interrupt linked list, we simply disable the interrupt, and
13608 * leave the list intact.
13609 *
13610 * All rings in a qp belong to the same qvector.
13611 */
13612 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13613 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13614
13615 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13616 i40e_flush(hw);
13617 synchronize_irq(pf->msix_entries[intpf].vector);
13618 } else {
13619 /* Legacy and MSI mode - this stops all interrupt handling */
13620 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13621 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13622 i40e_flush(hw);
13623 synchronize_irq(pf->pdev->irq);
13624 }
13625 }
13626
13627 /**
13628 * i40e_queue_pair_disable - Disables a queue pair
13629 * @vsi: vsi
13630 * @queue_pair: queue pair
13631 *
13632 * Returns 0 on success, <0 on failure.
13633 **/
i40e_queue_pair_disable(struct i40e_vsi * vsi,int queue_pair)13634 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13635 {
13636 int err;
13637
13638 err = i40e_enter_busy_conf(vsi);
13639 if (err)
13640 return err;
13641
13642 i40e_queue_pair_disable_irq(vsi, queue_pair);
13643 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13644 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13645 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13646 i40e_queue_pair_clean_rings(vsi, queue_pair);
13647 i40e_queue_pair_reset_stats(vsi, queue_pair);
13648
13649 return err;
13650 }
13651
13652 /**
13653 * i40e_queue_pair_enable - Enables a queue pair
13654 * @vsi: vsi
13655 * @queue_pair: queue pair
13656 *
13657 * Returns 0 on success, <0 on failure.
13658 **/
i40e_queue_pair_enable(struct i40e_vsi * vsi,int queue_pair)13659 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13660 {
13661 int err;
13662
13663 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13664 if (err)
13665 return err;
13666
13667 if (i40e_enabled_xdp_vsi(vsi)) {
13668 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13669 if (err)
13670 return err;
13671 }
13672
13673 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13674 if (err)
13675 return err;
13676
13677 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13678 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13679 i40e_queue_pair_enable_irq(vsi, queue_pair);
13680
13681 i40e_exit_busy_conf(vsi);
13682
13683 return err;
13684 }
13685
13686 /**
13687 * i40e_xdp - implements ndo_bpf for i40e
13688 * @dev: netdevice
13689 * @xdp: XDP command
13690 **/
i40e_xdp(struct net_device * dev,struct netdev_bpf * xdp)13691 static int i40e_xdp(struct net_device *dev,
13692 struct netdev_bpf *xdp)
13693 {
13694 struct i40e_netdev_priv *np = netdev_priv(dev);
13695 struct i40e_vsi *vsi = np->vsi;
13696
13697 if (vsi->type != I40E_VSI_MAIN)
13698 return -EINVAL;
13699
13700 switch (xdp->command) {
13701 case XDP_SETUP_PROG:
13702 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13703 case XDP_SETUP_XSK_POOL:
13704 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13705 xdp->xsk.queue_id);
13706 default:
13707 return -EINVAL;
13708 }
13709 }
13710
13711 static const struct net_device_ops i40e_netdev_ops = {
13712 .ndo_open = i40e_open,
13713 .ndo_stop = i40e_close,
13714 .ndo_start_xmit = i40e_lan_xmit_frame,
13715 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
13716 .ndo_set_rx_mode = i40e_set_rx_mode,
13717 .ndo_validate_addr = eth_validate_addr,
13718 .ndo_set_mac_address = i40e_set_mac,
13719 .ndo_change_mtu = i40e_change_mtu,
13720 .ndo_eth_ioctl = i40e_ioctl,
13721 .ndo_tx_timeout = i40e_tx_timeout,
13722 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
13723 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
13724 #ifdef CONFIG_NET_POLL_CONTROLLER
13725 .ndo_poll_controller = i40e_netpoll,
13726 #endif
13727 .ndo_setup_tc = __i40e_setup_tc,
13728 .ndo_select_queue = i40e_lan_select_queue,
13729 .ndo_set_features = i40e_set_features,
13730 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
13731 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
13732 .ndo_get_vf_stats = i40e_get_vf_stats,
13733 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
13734 .ndo_get_vf_config = i40e_ndo_get_vf_config,
13735 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
13736 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
13737 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
13738 .ndo_get_phys_port_id = i40e_get_phys_port_id,
13739 .ndo_fdb_add = i40e_ndo_fdb_add,
13740 .ndo_features_check = i40e_features_check,
13741 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
13742 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
13743 .ndo_bpf = i40e_xdp,
13744 .ndo_xdp_xmit = i40e_xdp_xmit,
13745 .ndo_xsk_wakeup = i40e_xsk_wakeup,
13746 .ndo_dfwd_add_station = i40e_fwd_add,
13747 .ndo_dfwd_del_station = i40e_fwd_del,
13748 };
13749
13750 /**
13751 * i40e_config_netdev - Setup the netdev flags
13752 * @vsi: the VSI being configured
13753 *
13754 * Returns 0 on success, negative value on failure
13755 **/
i40e_config_netdev(struct i40e_vsi * vsi)13756 static int i40e_config_netdev(struct i40e_vsi *vsi)
13757 {
13758 struct i40e_pf *pf = vsi->back;
13759 struct i40e_hw *hw = &pf->hw;
13760 struct i40e_netdev_priv *np;
13761 struct net_device *netdev;
13762 u8 broadcast[ETH_ALEN];
13763 u8 mac_addr[ETH_ALEN];
13764 int etherdev_size;
13765 netdev_features_t hw_enc_features;
13766 netdev_features_t hw_features;
13767
13768 etherdev_size = sizeof(struct i40e_netdev_priv);
13769 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13770 if (!netdev)
13771 return -ENOMEM;
13772
13773 vsi->netdev = netdev;
13774 np = netdev_priv(netdev);
13775 np->vsi = vsi;
13776
13777 hw_enc_features = NETIF_F_SG |
13778 NETIF_F_HW_CSUM |
13779 NETIF_F_HIGHDMA |
13780 NETIF_F_SOFT_FEATURES |
13781 NETIF_F_TSO |
13782 NETIF_F_TSO_ECN |
13783 NETIF_F_TSO6 |
13784 NETIF_F_GSO_GRE |
13785 NETIF_F_GSO_GRE_CSUM |
13786 NETIF_F_GSO_PARTIAL |
13787 NETIF_F_GSO_IPXIP4 |
13788 NETIF_F_GSO_IPXIP6 |
13789 NETIF_F_GSO_UDP_TUNNEL |
13790 NETIF_F_GSO_UDP_TUNNEL_CSUM |
13791 NETIF_F_GSO_UDP_L4 |
13792 NETIF_F_SCTP_CRC |
13793 NETIF_F_RXHASH |
13794 NETIF_F_RXCSUM |
13795 0;
13796
13797 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13798 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13799
13800 netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13801
13802 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13803
13804 netdev->hw_enc_features |= hw_enc_features;
13805
13806 /* record features VLANs can make use of */
13807 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13808
13809 #define I40E_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
13810 NETIF_F_GSO_GRE_CSUM | \
13811 NETIF_F_GSO_IPXIP4 | \
13812 NETIF_F_GSO_IPXIP6 | \
13813 NETIF_F_GSO_UDP_TUNNEL | \
13814 NETIF_F_GSO_UDP_TUNNEL_CSUM)
13815
13816 netdev->gso_partial_features = I40E_GSO_PARTIAL_FEATURES;
13817 netdev->features |= NETIF_F_GSO_PARTIAL |
13818 I40E_GSO_PARTIAL_FEATURES;
13819
13820 netdev->mpls_features |= NETIF_F_SG;
13821 netdev->mpls_features |= NETIF_F_HW_CSUM;
13822 netdev->mpls_features |= NETIF_F_TSO;
13823 netdev->mpls_features |= NETIF_F_TSO6;
13824 netdev->mpls_features |= I40E_GSO_PARTIAL_FEATURES;
13825
13826 /* enable macvlan offloads */
13827 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13828
13829 hw_features = hw_enc_features |
13830 NETIF_F_HW_VLAN_CTAG_TX |
13831 NETIF_F_HW_VLAN_CTAG_RX;
13832
13833 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13834 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13835
13836 netdev->hw_features |= hw_features | NETIF_F_LOOPBACK;
13837
13838 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13839 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13840
13841 netdev->features &= ~NETIF_F_HW_TC;
13842
13843 if (vsi->type == I40E_VSI_MAIN) {
13844 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13845 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13846 /* The following steps are necessary for two reasons. First,
13847 * some older NVM configurations load a default MAC-VLAN
13848 * filter that will accept any tagged packet, and we want to
13849 * replace this with a normal filter. Additionally, it is
13850 * possible our MAC address was provided by the platform using
13851 * Open Firmware or similar.
13852 *
13853 * Thus, we need to remove the default filter and install one
13854 * specific to the MAC address.
13855 */
13856 i40e_rm_default_mac_filter(vsi, mac_addr);
13857 spin_lock_bh(&vsi->mac_filter_hash_lock);
13858 i40e_add_mac_filter(vsi, mac_addr);
13859 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13860
13861 netdev->xdp_features = NETDEV_XDP_ACT_BASIC |
13862 NETDEV_XDP_ACT_REDIRECT |
13863 NETDEV_XDP_ACT_XSK_ZEROCOPY |
13864 NETDEV_XDP_ACT_RX_SG;
13865 netdev->xdp_zc_max_segs = I40E_MAX_BUFFER_TXD;
13866 } else {
13867 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13868 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13869 * the end, which is 4 bytes long, so force truncation of the
13870 * original name by IFNAMSIZ - 4
13871 */
13872 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13873 IFNAMSIZ - 4,
13874 pf->vsi[pf->lan_vsi]->netdev->name);
13875 eth_random_addr(mac_addr);
13876
13877 spin_lock_bh(&vsi->mac_filter_hash_lock);
13878 i40e_add_mac_filter(vsi, mac_addr);
13879 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13880 }
13881
13882 /* Add the broadcast filter so that we initially will receive
13883 * broadcast packets. Note that when a new VLAN is first added the
13884 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13885 * specific filters as part of transitioning into "vlan" operation.
13886 * When more VLANs are added, the driver will copy each existing MAC
13887 * filter and add it for the new VLAN.
13888 *
13889 * Broadcast filters are handled specially by
13890 * i40e_sync_filters_subtask, as the driver must to set the broadcast
13891 * promiscuous bit instead of adding this directly as a MAC/VLAN
13892 * filter. The subtask will update the correct broadcast promiscuous
13893 * bits as VLANs become active or inactive.
13894 */
13895 eth_broadcast_addr(broadcast);
13896 spin_lock_bh(&vsi->mac_filter_hash_lock);
13897 i40e_add_mac_filter(vsi, broadcast);
13898 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13899
13900 eth_hw_addr_set(netdev, mac_addr);
13901 ether_addr_copy(netdev->perm_addr, mac_addr);
13902
13903 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13904 netdev->neigh_priv_len = sizeof(u32) * 4;
13905
13906 netdev->priv_flags |= IFF_UNICAST_FLT;
13907 netdev->priv_flags |= IFF_SUPP_NOFCS;
13908 /* Setup netdev TC information */
13909 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13910
13911 netdev->netdev_ops = &i40e_netdev_ops;
13912 netdev->watchdog_timeo = 5 * HZ;
13913 i40e_set_ethtool_ops(netdev);
13914
13915 /* MTU range: 68 - 9706 */
13916 netdev->min_mtu = ETH_MIN_MTU;
13917 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13918
13919 return 0;
13920 }
13921
13922 /**
13923 * i40e_vsi_delete - Delete a VSI from the switch
13924 * @vsi: the VSI being removed
13925 *
13926 * Returns 0 on success, negative value on failure
13927 **/
i40e_vsi_delete(struct i40e_vsi * vsi)13928 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13929 {
13930 /* remove default VSI is not allowed */
13931 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13932 return;
13933
13934 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13935 }
13936
13937 /**
13938 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13939 * @vsi: the VSI being queried
13940 *
13941 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13942 **/
i40e_is_vsi_uplink_mode_veb(struct i40e_vsi * vsi)13943 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13944 {
13945 struct i40e_veb *veb;
13946 struct i40e_pf *pf = vsi->back;
13947
13948 /* Uplink is not a bridge so default to VEB */
13949 if (vsi->veb_idx >= I40E_MAX_VEB)
13950 return 1;
13951
13952 veb = pf->veb[vsi->veb_idx];
13953 if (!veb) {
13954 dev_info(&pf->pdev->dev,
13955 "There is no veb associated with the bridge\n");
13956 return -ENOENT;
13957 }
13958
13959 /* Uplink is a bridge in VEPA mode */
13960 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13961 return 0;
13962 } else {
13963 /* Uplink is a bridge in VEB mode */
13964 return 1;
13965 }
13966
13967 /* VEPA is now default bridge, so return 0 */
13968 return 0;
13969 }
13970
13971 /**
13972 * i40e_add_vsi - Add a VSI to the switch
13973 * @vsi: the VSI being configured
13974 *
13975 * This initializes a VSI context depending on the VSI type to be added and
13976 * passes it down to the add_vsi aq command.
13977 **/
i40e_add_vsi(struct i40e_vsi * vsi)13978 static int i40e_add_vsi(struct i40e_vsi *vsi)
13979 {
13980 int ret = -ENODEV;
13981 struct i40e_pf *pf = vsi->back;
13982 struct i40e_hw *hw = &pf->hw;
13983 struct i40e_vsi_context ctxt;
13984 struct i40e_mac_filter *f;
13985 struct hlist_node *h;
13986 int bkt;
13987
13988 u8 enabled_tc = 0x1; /* TC0 enabled */
13989 int f_count = 0;
13990
13991 memset(&ctxt, 0, sizeof(ctxt));
13992 switch (vsi->type) {
13993 case I40E_VSI_MAIN:
13994 /* The PF's main VSI is already setup as part of the
13995 * device initialization, so we'll not bother with
13996 * the add_vsi call, but we will retrieve the current
13997 * VSI context.
13998 */
13999 ctxt.seid = pf->main_vsi_seid;
14000 ctxt.pf_num = pf->hw.pf_id;
14001 ctxt.vf_num = 0;
14002 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
14003 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
14004 if (ret) {
14005 dev_info(&pf->pdev->dev,
14006 "couldn't get PF vsi config, err %pe aq_err %s\n",
14007 ERR_PTR(ret),
14008 i40e_aq_str(&pf->hw,
14009 pf->hw.aq.asq_last_status));
14010 return -ENOENT;
14011 }
14012 vsi->info = ctxt.info;
14013 vsi->info.valid_sections = 0;
14014
14015 vsi->seid = ctxt.seid;
14016 vsi->id = ctxt.vsi_number;
14017
14018 enabled_tc = i40e_pf_get_tc_map(pf);
14019
14020 /* Source pruning is enabled by default, so the flag is
14021 * negative logic - if it's set, we need to fiddle with
14022 * the VSI to disable source pruning.
14023 */
14024 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
14025 memset(&ctxt, 0, sizeof(ctxt));
14026 ctxt.seid = pf->main_vsi_seid;
14027 ctxt.pf_num = pf->hw.pf_id;
14028 ctxt.vf_num = 0;
14029 ctxt.info.valid_sections |=
14030 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14031 ctxt.info.switch_id =
14032 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
14033 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
14034 if (ret) {
14035 dev_info(&pf->pdev->dev,
14036 "update vsi failed, err %d aq_err %s\n",
14037 ret,
14038 i40e_aq_str(&pf->hw,
14039 pf->hw.aq.asq_last_status));
14040 ret = -ENOENT;
14041 goto err;
14042 }
14043 }
14044
14045 /* MFP mode setup queue map and update VSI */
14046 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
14047 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
14048 memset(&ctxt, 0, sizeof(ctxt));
14049 ctxt.seid = pf->main_vsi_seid;
14050 ctxt.pf_num = pf->hw.pf_id;
14051 ctxt.vf_num = 0;
14052 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
14053 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
14054 if (ret) {
14055 dev_info(&pf->pdev->dev,
14056 "update vsi failed, err %pe aq_err %s\n",
14057 ERR_PTR(ret),
14058 i40e_aq_str(&pf->hw,
14059 pf->hw.aq.asq_last_status));
14060 ret = -ENOENT;
14061 goto err;
14062 }
14063 /* update the local VSI info queue map */
14064 i40e_vsi_update_queue_map(vsi, &ctxt);
14065 vsi->info.valid_sections = 0;
14066 } else {
14067 /* Default/Main VSI is only enabled for TC0
14068 * reconfigure it to enable all TCs that are
14069 * available on the port in SFP mode.
14070 * For MFP case the iSCSI PF would use this
14071 * flow to enable LAN+iSCSI TC.
14072 */
14073 ret = i40e_vsi_config_tc(vsi, enabled_tc);
14074 if (ret) {
14075 /* Single TC condition is not fatal,
14076 * message and continue
14077 */
14078 dev_info(&pf->pdev->dev,
14079 "failed to configure TCs for main VSI tc_map 0x%08x, err %pe aq_err %s\n",
14080 enabled_tc,
14081 ERR_PTR(ret),
14082 i40e_aq_str(&pf->hw,
14083 pf->hw.aq.asq_last_status));
14084 }
14085 }
14086 break;
14087
14088 case I40E_VSI_FDIR:
14089 ctxt.pf_num = hw->pf_id;
14090 ctxt.vf_num = 0;
14091 ctxt.uplink_seid = vsi->uplink_seid;
14092 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14093 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
14094 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
14095 (i40e_is_vsi_uplink_mode_veb(vsi))) {
14096 ctxt.info.valid_sections |=
14097 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14098 ctxt.info.switch_id =
14099 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14100 }
14101 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14102 break;
14103
14104 case I40E_VSI_VMDQ2:
14105 ctxt.pf_num = hw->pf_id;
14106 ctxt.vf_num = 0;
14107 ctxt.uplink_seid = vsi->uplink_seid;
14108 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14109 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
14110
14111 /* This VSI is connected to VEB so the switch_id
14112 * should be set to zero by default.
14113 */
14114 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
14115 ctxt.info.valid_sections |=
14116 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14117 ctxt.info.switch_id =
14118 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14119 }
14120
14121 /* Setup the VSI tx/rx queue map for TC0 only for now */
14122 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14123 break;
14124
14125 case I40E_VSI_SRIOV:
14126 ctxt.pf_num = hw->pf_id;
14127 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
14128 ctxt.uplink_seid = vsi->uplink_seid;
14129 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14130 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
14131
14132 /* This VSI is connected to VEB so the switch_id
14133 * should be set to zero by default.
14134 */
14135 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
14136 ctxt.info.valid_sections |=
14137 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14138 ctxt.info.switch_id =
14139 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14140 }
14141
14142 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
14143 ctxt.info.valid_sections |=
14144 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
14145 ctxt.info.queueing_opt_flags |=
14146 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
14147 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
14148 }
14149
14150 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
14151 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
14152 if (pf->vf[vsi->vf_id].spoofchk) {
14153 ctxt.info.valid_sections |=
14154 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
14155 ctxt.info.sec_flags |=
14156 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
14157 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
14158 }
14159 /* Setup the VSI tx/rx queue map for TC0 only for now */
14160 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14161 break;
14162
14163 case I40E_VSI_IWARP:
14164 /* send down message to iWARP */
14165 break;
14166
14167 default:
14168 return -ENODEV;
14169 }
14170
14171 if (vsi->type != I40E_VSI_MAIN) {
14172 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
14173 if (ret) {
14174 dev_info(&vsi->back->pdev->dev,
14175 "add vsi failed, err %pe aq_err %s\n",
14176 ERR_PTR(ret),
14177 i40e_aq_str(&pf->hw,
14178 pf->hw.aq.asq_last_status));
14179 ret = -ENOENT;
14180 goto err;
14181 }
14182 vsi->info = ctxt.info;
14183 vsi->info.valid_sections = 0;
14184 vsi->seid = ctxt.seid;
14185 vsi->id = ctxt.vsi_number;
14186 }
14187
14188 spin_lock_bh(&vsi->mac_filter_hash_lock);
14189 vsi->active_filters = 0;
14190 /* If macvlan filters already exist, force them to get loaded */
14191 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
14192 f->state = I40E_FILTER_NEW;
14193 f_count++;
14194 }
14195 spin_unlock_bh(&vsi->mac_filter_hash_lock);
14196 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
14197
14198 if (f_count) {
14199 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
14200 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
14201 }
14202
14203 /* Update VSI BW information */
14204 ret = i40e_vsi_get_bw_info(vsi);
14205 if (ret) {
14206 dev_info(&pf->pdev->dev,
14207 "couldn't get vsi bw info, err %pe aq_err %s\n",
14208 ERR_PTR(ret),
14209 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14210 /* VSI is already added so not tearing that up */
14211 ret = 0;
14212 }
14213
14214 err:
14215 return ret;
14216 }
14217
14218 /**
14219 * i40e_vsi_release - Delete a VSI and free its resources
14220 * @vsi: the VSI being removed
14221 *
14222 * Returns 0 on success or < 0 on error
14223 **/
i40e_vsi_release(struct i40e_vsi * vsi)14224 int i40e_vsi_release(struct i40e_vsi *vsi)
14225 {
14226 struct i40e_mac_filter *f;
14227 struct hlist_node *h;
14228 struct i40e_veb *veb = NULL;
14229 struct i40e_pf *pf;
14230 u16 uplink_seid;
14231 int i, n, bkt;
14232
14233 pf = vsi->back;
14234
14235 /* release of a VEB-owner or last VSI is not allowed */
14236 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
14237 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
14238 vsi->seid, vsi->uplink_seid);
14239 return -ENODEV;
14240 }
14241 if (vsi == pf->vsi[pf->lan_vsi] &&
14242 !test_bit(__I40E_DOWN, pf->state)) {
14243 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
14244 return -ENODEV;
14245 }
14246 set_bit(__I40E_VSI_RELEASING, vsi->state);
14247 uplink_seid = vsi->uplink_seid;
14248 if (vsi->type != I40E_VSI_SRIOV) {
14249 if (vsi->netdev_registered) {
14250 vsi->netdev_registered = false;
14251 if (vsi->netdev) {
14252 /* results in a call to i40e_close() */
14253 unregister_netdev(vsi->netdev);
14254 }
14255 } else {
14256 i40e_vsi_close(vsi);
14257 }
14258 i40e_vsi_disable_irq(vsi);
14259 }
14260
14261 spin_lock_bh(&vsi->mac_filter_hash_lock);
14262
14263 /* clear the sync flag on all filters */
14264 if (vsi->netdev) {
14265 __dev_uc_unsync(vsi->netdev, NULL);
14266 __dev_mc_unsync(vsi->netdev, NULL);
14267 }
14268
14269 /* make sure any remaining filters are marked for deletion */
14270 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
14271 __i40e_del_filter(vsi, f);
14272
14273 spin_unlock_bh(&vsi->mac_filter_hash_lock);
14274
14275 i40e_sync_vsi_filters(vsi);
14276
14277 i40e_vsi_delete(vsi);
14278 i40e_vsi_free_q_vectors(vsi);
14279 if (vsi->netdev) {
14280 free_netdev(vsi->netdev);
14281 vsi->netdev = NULL;
14282 }
14283 i40e_vsi_clear_rings(vsi);
14284 i40e_vsi_clear(vsi);
14285
14286 /* If this was the last thing on the VEB, except for the
14287 * controlling VSI, remove the VEB, which puts the controlling
14288 * VSI onto the next level down in the switch.
14289 *
14290 * Well, okay, there's one more exception here: don't remove
14291 * the orphan VEBs yet. We'll wait for an explicit remove request
14292 * from up the network stack.
14293 */
14294 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
14295 if (pf->vsi[i] &&
14296 pf->vsi[i]->uplink_seid == uplink_seid &&
14297 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14298 n++; /* count the VSIs */
14299 }
14300 }
14301 for (i = 0; i < I40E_MAX_VEB; i++) {
14302 if (!pf->veb[i])
14303 continue;
14304 if (pf->veb[i]->uplink_seid == uplink_seid)
14305 n++; /* count the VEBs */
14306 if (pf->veb[i]->seid == uplink_seid)
14307 veb = pf->veb[i];
14308 }
14309 if (n == 0 && veb && veb->uplink_seid != 0)
14310 i40e_veb_release(veb);
14311
14312 return 0;
14313 }
14314
14315 /**
14316 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
14317 * @vsi: ptr to the VSI
14318 *
14319 * This should only be called after i40e_vsi_mem_alloc() which allocates the
14320 * corresponding SW VSI structure and initializes num_queue_pairs for the
14321 * newly allocated VSI.
14322 *
14323 * Returns 0 on success or negative on failure
14324 **/
i40e_vsi_setup_vectors(struct i40e_vsi * vsi)14325 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
14326 {
14327 int ret = -ENOENT;
14328 struct i40e_pf *pf = vsi->back;
14329
14330 if (vsi->q_vectors[0]) {
14331 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14332 vsi->seid);
14333 return -EEXIST;
14334 }
14335
14336 if (vsi->base_vector) {
14337 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14338 vsi->seid, vsi->base_vector);
14339 return -EEXIST;
14340 }
14341
14342 ret = i40e_vsi_alloc_q_vectors(vsi);
14343 if (ret) {
14344 dev_info(&pf->pdev->dev,
14345 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
14346 vsi->num_q_vectors, vsi->seid, ret);
14347 vsi->num_q_vectors = 0;
14348 goto vector_setup_out;
14349 }
14350
14351 /* In Legacy mode, we do not have to get any other vector since we
14352 * piggyback on the misc/ICR0 for queue interrupts.
14353 */
14354 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
14355 return ret;
14356 if (vsi->num_q_vectors)
14357 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
14358 vsi->num_q_vectors, vsi->idx);
14359 if (vsi->base_vector < 0) {
14360 dev_info(&pf->pdev->dev,
14361 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
14362 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
14363 i40e_vsi_free_q_vectors(vsi);
14364 ret = -ENOENT;
14365 goto vector_setup_out;
14366 }
14367
14368 vector_setup_out:
14369 return ret;
14370 }
14371
14372 /**
14373 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
14374 * @vsi: pointer to the vsi.
14375 *
14376 * This re-allocates a vsi's queue resources.
14377 *
14378 * Returns pointer to the successfully allocated and configured VSI sw struct
14379 * on success, otherwise returns NULL on failure.
14380 **/
i40e_vsi_reinit_setup(struct i40e_vsi * vsi)14381 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
14382 {
14383 u16 alloc_queue_pairs;
14384 struct i40e_pf *pf;
14385 u8 enabled_tc;
14386 int ret;
14387
14388 if (!vsi)
14389 return NULL;
14390
14391 pf = vsi->back;
14392
14393 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
14394 i40e_vsi_clear_rings(vsi);
14395
14396 i40e_vsi_free_arrays(vsi, false);
14397 i40e_set_num_rings_in_vsi(vsi);
14398 ret = i40e_vsi_alloc_arrays(vsi, false);
14399 if (ret)
14400 goto err_vsi;
14401
14402 alloc_queue_pairs = vsi->alloc_queue_pairs *
14403 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14404
14405 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14406 if (ret < 0) {
14407 dev_info(&pf->pdev->dev,
14408 "failed to get tracking for %d queues for VSI %d err %d\n",
14409 alloc_queue_pairs, vsi->seid, ret);
14410 goto err_vsi;
14411 }
14412 vsi->base_queue = ret;
14413
14414 /* Update the FW view of the VSI. Force a reset of TC and queue
14415 * layout configurations.
14416 */
14417 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14418 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14419 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14420 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14421 if (vsi->type == I40E_VSI_MAIN)
14422 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
14423
14424 /* assign it some queues */
14425 ret = i40e_alloc_rings(vsi);
14426 if (ret)
14427 goto err_rings;
14428
14429 /* map all of the rings to the q_vectors */
14430 i40e_vsi_map_rings_to_vectors(vsi);
14431 return vsi;
14432
14433 err_rings:
14434 i40e_vsi_free_q_vectors(vsi);
14435 if (vsi->netdev_registered) {
14436 vsi->netdev_registered = false;
14437 unregister_netdev(vsi->netdev);
14438 free_netdev(vsi->netdev);
14439 vsi->netdev = NULL;
14440 }
14441 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14442 err_vsi:
14443 i40e_vsi_clear(vsi);
14444 return NULL;
14445 }
14446
14447 /**
14448 * i40e_vsi_setup - Set up a VSI by a given type
14449 * @pf: board private structure
14450 * @type: VSI type
14451 * @uplink_seid: the switch element to link to
14452 * @param1: usage depends upon VSI type. For VF types, indicates VF id
14453 *
14454 * This allocates the sw VSI structure and its queue resources, then add a VSI
14455 * to the identified VEB.
14456 *
14457 * Returns pointer to the successfully allocated and configure VSI sw struct on
14458 * success, otherwise returns NULL on failure.
14459 **/
i40e_vsi_setup(struct i40e_pf * pf,u8 type,u16 uplink_seid,u32 param1)14460 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14461 u16 uplink_seid, u32 param1)
14462 {
14463 struct i40e_vsi *vsi = NULL;
14464 struct i40e_veb *veb = NULL;
14465 u16 alloc_queue_pairs;
14466 int ret, i;
14467 int v_idx;
14468
14469 /* The requested uplink_seid must be either
14470 * - the PF's port seid
14471 * no VEB is needed because this is the PF
14472 * or this is a Flow Director special case VSI
14473 * - seid of an existing VEB
14474 * - seid of a VSI that owns an existing VEB
14475 * - seid of a VSI that doesn't own a VEB
14476 * a new VEB is created and the VSI becomes the owner
14477 * - seid of the PF VSI, which is what creates the first VEB
14478 * this is a special case of the previous
14479 *
14480 * Find which uplink_seid we were given and create a new VEB if needed
14481 */
14482 for (i = 0; i < I40E_MAX_VEB; i++) {
14483 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14484 veb = pf->veb[i];
14485 break;
14486 }
14487 }
14488
14489 if (!veb && uplink_seid != pf->mac_seid) {
14490
14491 for (i = 0; i < pf->num_alloc_vsi; i++) {
14492 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14493 vsi = pf->vsi[i];
14494 break;
14495 }
14496 }
14497 if (!vsi) {
14498 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14499 uplink_seid);
14500 return NULL;
14501 }
14502
14503 if (vsi->uplink_seid == pf->mac_seid)
14504 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14505 vsi->tc_config.enabled_tc);
14506 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14507 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14508 vsi->tc_config.enabled_tc);
14509 if (veb) {
14510 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14511 dev_info(&vsi->back->pdev->dev,
14512 "New VSI creation error, uplink seid of LAN VSI expected.\n");
14513 return NULL;
14514 }
14515 /* We come up by default in VEPA mode if SRIOV is not
14516 * already enabled, in which case we can't force VEPA
14517 * mode.
14518 */
14519 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14520 veb->bridge_mode = BRIDGE_MODE_VEPA;
14521 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14522 }
14523 i40e_config_bridge_mode(veb);
14524 }
14525 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14526 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14527 veb = pf->veb[i];
14528 }
14529 if (!veb) {
14530 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14531 return NULL;
14532 }
14533
14534 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14535 uplink_seid = veb->seid;
14536 }
14537
14538 /* get vsi sw struct */
14539 v_idx = i40e_vsi_mem_alloc(pf, type);
14540 if (v_idx < 0)
14541 goto err_alloc;
14542 vsi = pf->vsi[v_idx];
14543 if (!vsi)
14544 goto err_alloc;
14545 vsi->type = type;
14546 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14547
14548 if (type == I40E_VSI_MAIN)
14549 pf->lan_vsi = v_idx;
14550 else if (type == I40E_VSI_SRIOV)
14551 vsi->vf_id = param1;
14552 /* assign it some queues */
14553 alloc_queue_pairs = vsi->alloc_queue_pairs *
14554 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14555
14556 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14557 if (ret < 0) {
14558 dev_info(&pf->pdev->dev,
14559 "failed to get tracking for %d queues for VSI %d err=%d\n",
14560 alloc_queue_pairs, vsi->seid, ret);
14561 goto err_vsi;
14562 }
14563 vsi->base_queue = ret;
14564
14565 /* get a VSI from the hardware */
14566 vsi->uplink_seid = uplink_seid;
14567 ret = i40e_add_vsi(vsi);
14568 if (ret)
14569 goto err_vsi;
14570
14571 switch (vsi->type) {
14572 /* setup the netdev if needed */
14573 case I40E_VSI_MAIN:
14574 case I40E_VSI_VMDQ2:
14575 ret = i40e_config_netdev(vsi);
14576 if (ret)
14577 goto err_netdev;
14578 ret = i40e_netif_set_realnum_tx_rx_queues(vsi);
14579 if (ret)
14580 goto err_netdev;
14581 ret = register_netdev(vsi->netdev);
14582 if (ret)
14583 goto err_netdev;
14584 vsi->netdev_registered = true;
14585 netif_carrier_off(vsi->netdev);
14586 #ifdef CONFIG_I40E_DCB
14587 /* Setup DCB netlink interface */
14588 i40e_dcbnl_setup(vsi);
14589 #endif /* CONFIG_I40E_DCB */
14590 fallthrough;
14591 case I40E_VSI_FDIR:
14592 /* set up vectors and rings if needed */
14593 ret = i40e_vsi_setup_vectors(vsi);
14594 if (ret)
14595 goto err_msix;
14596
14597 ret = i40e_alloc_rings(vsi);
14598 if (ret)
14599 goto err_rings;
14600
14601 /* map all of the rings to the q_vectors */
14602 i40e_vsi_map_rings_to_vectors(vsi);
14603
14604 i40e_vsi_reset_stats(vsi);
14605 break;
14606 default:
14607 /* no netdev or rings for the other VSI types */
14608 break;
14609 }
14610
14611 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14612 (vsi->type == I40E_VSI_VMDQ2)) {
14613 ret = i40e_vsi_config_rss(vsi);
14614 }
14615 return vsi;
14616
14617 err_rings:
14618 i40e_vsi_free_q_vectors(vsi);
14619 err_msix:
14620 if (vsi->netdev_registered) {
14621 vsi->netdev_registered = false;
14622 unregister_netdev(vsi->netdev);
14623 free_netdev(vsi->netdev);
14624 vsi->netdev = NULL;
14625 }
14626 err_netdev:
14627 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14628 err_vsi:
14629 i40e_vsi_clear(vsi);
14630 err_alloc:
14631 return NULL;
14632 }
14633
14634 /**
14635 * i40e_veb_get_bw_info - Query VEB BW information
14636 * @veb: the veb to query
14637 *
14638 * Query the Tx scheduler BW configuration data for given VEB
14639 **/
i40e_veb_get_bw_info(struct i40e_veb * veb)14640 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14641 {
14642 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14643 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14644 struct i40e_pf *pf = veb->pf;
14645 struct i40e_hw *hw = &pf->hw;
14646 u32 tc_bw_max;
14647 int ret = 0;
14648 int i;
14649
14650 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14651 &bw_data, NULL);
14652 if (ret) {
14653 dev_info(&pf->pdev->dev,
14654 "query veb bw config failed, err %pe aq_err %s\n",
14655 ERR_PTR(ret),
14656 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14657 goto out;
14658 }
14659
14660 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14661 &ets_data, NULL);
14662 if (ret) {
14663 dev_info(&pf->pdev->dev,
14664 "query veb bw ets config failed, err %pe aq_err %s\n",
14665 ERR_PTR(ret),
14666 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14667 goto out;
14668 }
14669
14670 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14671 veb->bw_max_quanta = ets_data.tc_bw_max;
14672 veb->is_abs_credits = bw_data.absolute_credits_enable;
14673 veb->enabled_tc = ets_data.tc_valid_bits;
14674 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14675 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14676 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14677 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14678 veb->bw_tc_limit_credits[i] =
14679 le16_to_cpu(bw_data.tc_bw_limits[i]);
14680 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14681 }
14682
14683 out:
14684 return ret;
14685 }
14686
14687 /**
14688 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14689 * @pf: board private structure
14690 *
14691 * On error: returns error code (negative)
14692 * On success: returns vsi index in PF (positive)
14693 **/
i40e_veb_mem_alloc(struct i40e_pf * pf)14694 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14695 {
14696 int ret = -ENOENT;
14697 struct i40e_veb *veb;
14698 int i;
14699
14700 /* Need to protect the allocation of switch elements at the PF level */
14701 mutex_lock(&pf->switch_mutex);
14702
14703 /* VEB list may be fragmented if VEB creation/destruction has
14704 * been happening. We can afford to do a quick scan to look
14705 * for any free slots in the list.
14706 *
14707 * find next empty veb slot, looping back around if necessary
14708 */
14709 i = 0;
14710 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14711 i++;
14712 if (i >= I40E_MAX_VEB) {
14713 ret = -ENOMEM;
14714 goto err_alloc_veb; /* out of VEB slots! */
14715 }
14716
14717 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14718 if (!veb) {
14719 ret = -ENOMEM;
14720 goto err_alloc_veb;
14721 }
14722 veb->pf = pf;
14723 veb->idx = i;
14724 veb->enabled_tc = 1;
14725
14726 pf->veb[i] = veb;
14727 ret = i;
14728 err_alloc_veb:
14729 mutex_unlock(&pf->switch_mutex);
14730 return ret;
14731 }
14732
14733 /**
14734 * i40e_switch_branch_release - Delete a branch of the switch tree
14735 * @branch: where to start deleting
14736 *
14737 * This uses recursion to find the tips of the branch to be
14738 * removed, deleting until we get back to and can delete this VEB.
14739 **/
i40e_switch_branch_release(struct i40e_veb * branch)14740 static void i40e_switch_branch_release(struct i40e_veb *branch)
14741 {
14742 struct i40e_pf *pf = branch->pf;
14743 u16 branch_seid = branch->seid;
14744 u16 veb_idx = branch->idx;
14745 int i;
14746
14747 /* release any VEBs on this VEB - RECURSION */
14748 for (i = 0; i < I40E_MAX_VEB; i++) {
14749 if (!pf->veb[i])
14750 continue;
14751 if (pf->veb[i]->uplink_seid == branch->seid)
14752 i40e_switch_branch_release(pf->veb[i]);
14753 }
14754
14755 /* Release the VSIs on this VEB, but not the owner VSI.
14756 *
14757 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14758 * the VEB itself, so don't use (*branch) after this loop.
14759 */
14760 for (i = 0; i < pf->num_alloc_vsi; i++) {
14761 if (!pf->vsi[i])
14762 continue;
14763 if (pf->vsi[i]->uplink_seid == branch_seid &&
14764 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14765 i40e_vsi_release(pf->vsi[i]);
14766 }
14767 }
14768
14769 /* There's one corner case where the VEB might not have been
14770 * removed, so double check it here and remove it if needed.
14771 * This case happens if the veb was created from the debugfs
14772 * commands and no VSIs were added to it.
14773 */
14774 if (pf->veb[veb_idx])
14775 i40e_veb_release(pf->veb[veb_idx]);
14776 }
14777
14778 /**
14779 * i40e_veb_clear - remove veb struct
14780 * @veb: the veb to remove
14781 **/
i40e_veb_clear(struct i40e_veb * veb)14782 static void i40e_veb_clear(struct i40e_veb *veb)
14783 {
14784 if (!veb)
14785 return;
14786
14787 if (veb->pf) {
14788 struct i40e_pf *pf = veb->pf;
14789
14790 mutex_lock(&pf->switch_mutex);
14791 if (pf->veb[veb->idx] == veb)
14792 pf->veb[veb->idx] = NULL;
14793 mutex_unlock(&pf->switch_mutex);
14794 }
14795
14796 kfree(veb);
14797 }
14798
14799 /**
14800 * i40e_veb_release - Delete a VEB and free its resources
14801 * @veb: the VEB being removed
14802 **/
i40e_veb_release(struct i40e_veb * veb)14803 void i40e_veb_release(struct i40e_veb *veb)
14804 {
14805 struct i40e_vsi *vsi = NULL;
14806 struct i40e_pf *pf;
14807 int i, n = 0;
14808
14809 pf = veb->pf;
14810
14811 /* find the remaining VSI and check for extras */
14812 for (i = 0; i < pf->num_alloc_vsi; i++) {
14813 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14814 n++;
14815 vsi = pf->vsi[i];
14816 }
14817 }
14818 if (n != 1) {
14819 dev_info(&pf->pdev->dev,
14820 "can't remove VEB %d with %d VSIs left\n",
14821 veb->seid, n);
14822 return;
14823 }
14824
14825 /* move the remaining VSI to uplink veb */
14826 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14827 if (veb->uplink_seid) {
14828 vsi->uplink_seid = veb->uplink_seid;
14829 if (veb->uplink_seid == pf->mac_seid)
14830 vsi->veb_idx = I40E_NO_VEB;
14831 else
14832 vsi->veb_idx = veb->veb_idx;
14833 } else {
14834 /* floating VEB */
14835 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14836 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14837 }
14838
14839 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14840 i40e_veb_clear(veb);
14841 }
14842
14843 /**
14844 * i40e_add_veb - create the VEB in the switch
14845 * @veb: the VEB to be instantiated
14846 * @vsi: the controlling VSI
14847 **/
i40e_add_veb(struct i40e_veb * veb,struct i40e_vsi * vsi)14848 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14849 {
14850 struct i40e_pf *pf = veb->pf;
14851 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14852 int ret;
14853
14854 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14855 veb->enabled_tc, false,
14856 &veb->seid, enable_stats, NULL);
14857
14858 /* get a VEB from the hardware */
14859 if (ret) {
14860 dev_info(&pf->pdev->dev,
14861 "couldn't add VEB, err %pe aq_err %s\n",
14862 ERR_PTR(ret),
14863 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14864 return -EPERM;
14865 }
14866
14867 /* get statistics counter */
14868 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14869 &veb->stats_idx, NULL, NULL, NULL);
14870 if (ret) {
14871 dev_info(&pf->pdev->dev,
14872 "couldn't get VEB statistics idx, err %pe aq_err %s\n",
14873 ERR_PTR(ret),
14874 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14875 return -EPERM;
14876 }
14877 ret = i40e_veb_get_bw_info(veb);
14878 if (ret) {
14879 dev_info(&pf->pdev->dev,
14880 "couldn't get VEB bw info, err %pe aq_err %s\n",
14881 ERR_PTR(ret),
14882 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14883 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14884 return -ENOENT;
14885 }
14886
14887 vsi->uplink_seid = veb->seid;
14888 vsi->veb_idx = veb->idx;
14889 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14890
14891 return 0;
14892 }
14893
14894 /**
14895 * i40e_veb_setup - Set up a VEB
14896 * @pf: board private structure
14897 * @flags: VEB setup flags
14898 * @uplink_seid: the switch element to link to
14899 * @vsi_seid: the initial VSI seid
14900 * @enabled_tc: Enabled TC bit-map
14901 *
14902 * This allocates the sw VEB structure and links it into the switch
14903 * It is possible and legal for this to be a duplicate of an already
14904 * existing VEB. It is also possible for both uplink and vsi seids
14905 * to be zero, in order to create a floating VEB.
14906 *
14907 * Returns pointer to the successfully allocated VEB sw struct on
14908 * success, otherwise returns NULL on failure.
14909 **/
i40e_veb_setup(struct i40e_pf * pf,u16 flags,u16 uplink_seid,u16 vsi_seid,u8 enabled_tc)14910 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14911 u16 uplink_seid, u16 vsi_seid,
14912 u8 enabled_tc)
14913 {
14914 struct i40e_veb *veb, *uplink_veb = NULL;
14915 int vsi_idx, veb_idx;
14916 int ret;
14917
14918 /* if one seid is 0, the other must be 0 to create a floating relay */
14919 if ((uplink_seid == 0 || vsi_seid == 0) &&
14920 (uplink_seid + vsi_seid != 0)) {
14921 dev_info(&pf->pdev->dev,
14922 "one, not both seid's are 0: uplink=%d vsi=%d\n",
14923 uplink_seid, vsi_seid);
14924 return NULL;
14925 }
14926
14927 /* make sure there is such a vsi and uplink */
14928 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14929 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14930 break;
14931 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14932 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14933 vsi_seid);
14934 return NULL;
14935 }
14936
14937 if (uplink_seid && uplink_seid != pf->mac_seid) {
14938 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14939 if (pf->veb[veb_idx] &&
14940 pf->veb[veb_idx]->seid == uplink_seid) {
14941 uplink_veb = pf->veb[veb_idx];
14942 break;
14943 }
14944 }
14945 if (!uplink_veb) {
14946 dev_info(&pf->pdev->dev,
14947 "uplink seid %d not found\n", uplink_seid);
14948 return NULL;
14949 }
14950 }
14951
14952 /* get veb sw struct */
14953 veb_idx = i40e_veb_mem_alloc(pf);
14954 if (veb_idx < 0)
14955 goto err_alloc;
14956 veb = pf->veb[veb_idx];
14957 veb->flags = flags;
14958 veb->uplink_seid = uplink_seid;
14959 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14960 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14961
14962 /* create the VEB in the switch */
14963 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14964 if (ret)
14965 goto err_veb;
14966 if (vsi_idx == pf->lan_vsi)
14967 pf->lan_veb = veb->idx;
14968
14969 return veb;
14970
14971 err_veb:
14972 i40e_veb_clear(veb);
14973 err_alloc:
14974 return NULL;
14975 }
14976
14977 /**
14978 * i40e_setup_pf_switch_element - set PF vars based on switch type
14979 * @pf: board private structure
14980 * @ele: element we are building info from
14981 * @num_reported: total number of elements
14982 * @printconfig: should we print the contents
14983 *
14984 * helper function to assist in extracting a few useful SEID values.
14985 **/
i40e_setup_pf_switch_element(struct i40e_pf * pf,struct i40e_aqc_switch_config_element_resp * ele,u16 num_reported,bool printconfig)14986 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14987 struct i40e_aqc_switch_config_element_resp *ele,
14988 u16 num_reported, bool printconfig)
14989 {
14990 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14991 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14992 u8 element_type = ele->element_type;
14993 u16 seid = le16_to_cpu(ele->seid);
14994
14995 if (printconfig)
14996 dev_info(&pf->pdev->dev,
14997 "type=%d seid=%d uplink=%d downlink=%d\n",
14998 element_type, seid, uplink_seid, downlink_seid);
14999
15000 switch (element_type) {
15001 case I40E_SWITCH_ELEMENT_TYPE_MAC:
15002 pf->mac_seid = seid;
15003 break;
15004 case I40E_SWITCH_ELEMENT_TYPE_VEB:
15005 /* Main VEB? */
15006 if (uplink_seid != pf->mac_seid)
15007 break;
15008 if (pf->lan_veb >= I40E_MAX_VEB) {
15009 int v;
15010
15011 /* find existing or else empty VEB */
15012 for (v = 0; v < I40E_MAX_VEB; v++) {
15013 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
15014 pf->lan_veb = v;
15015 break;
15016 }
15017 }
15018 if (pf->lan_veb >= I40E_MAX_VEB) {
15019 v = i40e_veb_mem_alloc(pf);
15020 if (v < 0)
15021 break;
15022 pf->lan_veb = v;
15023 }
15024 }
15025 if (pf->lan_veb >= I40E_MAX_VEB)
15026 break;
15027
15028 pf->veb[pf->lan_veb]->seid = seid;
15029 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
15030 pf->veb[pf->lan_veb]->pf = pf;
15031 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
15032 break;
15033 case I40E_SWITCH_ELEMENT_TYPE_VSI:
15034 if (num_reported != 1)
15035 break;
15036 /* This is immediately after a reset so we can assume this is
15037 * the PF's VSI
15038 */
15039 pf->mac_seid = uplink_seid;
15040 pf->pf_seid = downlink_seid;
15041 pf->main_vsi_seid = seid;
15042 if (printconfig)
15043 dev_info(&pf->pdev->dev,
15044 "pf_seid=%d main_vsi_seid=%d\n",
15045 pf->pf_seid, pf->main_vsi_seid);
15046 break;
15047 case I40E_SWITCH_ELEMENT_TYPE_PF:
15048 case I40E_SWITCH_ELEMENT_TYPE_VF:
15049 case I40E_SWITCH_ELEMENT_TYPE_EMP:
15050 case I40E_SWITCH_ELEMENT_TYPE_BMC:
15051 case I40E_SWITCH_ELEMENT_TYPE_PE:
15052 case I40E_SWITCH_ELEMENT_TYPE_PA:
15053 /* ignore these for now */
15054 break;
15055 default:
15056 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
15057 element_type, seid);
15058 break;
15059 }
15060 }
15061
15062 /**
15063 * i40e_fetch_switch_configuration - Get switch config from firmware
15064 * @pf: board private structure
15065 * @printconfig: should we print the contents
15066 *
15067 * Get the current switch configuration from the device and
15068 * extract a few useful SEID values.
15069 **/
i40e_fetch_switch_configuration(struct i40e_pf * pf,bool printconfig)15070 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
15071 {
15072 struct i40e_aqc_get_switch_config_resp *sw_config;
15073 u16 next_seid = 0;
15074 int ret = 0;
15075 u8 *aq_buf;
15076 int i;
15077
15078 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
15079 if (!aq_buf)
15080 return -ENOMEM;
15081
15082 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
15083 do {
15084 u16 num_reported, num_total;
15085
15086 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
15087 I40E_AQ_LARGE_BUF,
15088 &next_seid, NULL);
15089 if (ret) {
15090 dev_info(&pf->pdev->dev,
15091 "get switch config failed err %d aq_err %s\n",
15092 ret,
15093 i40e_aq_str(&pf->hw,
15094 pf->hw.aq.asq_last_status));
15095 kfree(aq_buf);
15096 return -ENOENT;
15097 }
15098
15099 num_reported = le16_to_cpu(sw_config->header.num_reported);
15100 num_total = le16_to_cpu(sw_config->header.num_total);
15101
15102 if (printconfig)
15103 dev_info(&pf->pdev->dev,
15104 "header: %d reported %d total\n",
15105 num_reported, num_total);
15106
15107 for (i = 0; i < num_reported; i++) {
15108 struct i40e_aqc_switch_config_element_resp *ele =
15109 &sw_config->element[i];
15110
15111 i40e_setup_pf_switch_element(pf, ele, num_reported,
15112 printconfig);
15113 }
15114 } while (next_seid != 0);
15115
15116 kfree(aq_buf);
15117 return ret;
15118 }
15119
15120 /**
15121 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
15122 * @pf: board private structure
15123 * @reinit: if the Main VSI needs to re-initialized.
15124 * @lock_acquired: indicates whether or not the lock has been acquired
15125 *
15126 * Returns 0 on success, negative value on failure
15127 **/
i40e_setup_pf_switch(struct i40e_pf * pf,bool reinit,bool lock_acquired)15128 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
15129 {
15130 u16 flags = 0;
15131 int ret;
15132
15133 /* find out what's out there already */
15134 ret = i40e_fetch_switch_configuration(pf, false);
15135 if (ret) {
15136 dev_info(&pf->pdev->dev,
15137 "couldn't fetch switch config, err %pe aq_err %s\n",
15138 ERR_PTR(ret),
15139 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15140 return ret;
15141 }
15142 i40e_pf_reset_stats(pf);
15143
15144 /* set the switch config bit for the whole device to
15145 * support limited promisc or true promisc
15146 * when user requests promisc. The default is limited
15147 * promisc.
15148 */
15149
15150 if ((pf->hw.pf_id == 0) &&
15151 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
15152 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
15153 pf->last_sw_conf_flags = flags;
15154 }
15155
15156 if (pf->hw.pf_id == 0) {
15157 u16 valid_flags;
15158
15159 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
15160 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
15161 NULL);
15162 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
15163 dev_info(&pf->pdev->dev,
15164 "couldn't set switch config bits, err %pe aq_err %s\n",
15165 ERR_PTR(ret),
15166 i40e_aq_str(&pf->hw,
15167 pf->hw.aq.asq_last_status));
15168 /* not a fatal problem, just keep going */
15169 }
15170 pf->last_sw_conf_valid_flags = valid_flags;
15171 }
15172
15173 /* first time setup */
15174 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
15175 struct i40e_vsi *vsi = NULL;
15176 u16 uplink_seid;
15177
15178 /* Set up the PF VSI associated with the PF's main VSI
15179 * that is already in the HW switch
15180 */
15181 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
15182 uplink_seid = pf->veb[pf->lan_veb]->seid;
15183 else
15184 uplink_seid = pf->mac_seid;
15185 if (pf->lan_vsi == I40E_NO_VSI)
15186 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
15187 else if (reinit)
15188 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
15189 if (!vsi) {
15190 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
15191 i40e_cloud_filter_exit(pf);
15192 i40e_fdir_teardown(pf);
15193 return -EAGAIN;
15194 }
15195 } else {
15196 /* force a reset of TC and queue layout configurations */
15197 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
15198
15199 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
15200 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
15201 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
15202 }
15203 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
15204
15205 i40e_fdir_sb_setup(pf);
15206
15207 /* Setup static PF queue filter control settings */
15208 ret = i40e_setup_pf_filter_control(pf);
15209 if (ret) {
15210 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
15211 ret);
15212 /* Failure here should not stop continuing other steps */
15213 }
15214
15215 /* enable RSS in the HW, even for only one queue, as the stack can use
15216 * the hash
15217 */
15218 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
15219 i40e_pf_config_rss(pf);
15220
15221 /* fill in link information and enable LSE reporting */
15222 i40e_link_event(pf);
15223
15224 /* Initialize user-specific link properties */
15225 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
15226 I40E_AQ_AN_COMPLETED) ? true : false);
15227
15228 i40e_ptp_init(pf);
15229
15230 if (!lock_acquired)
15231 rtnl_lock();
15232
15233 /* repopulate tunnel port filters */
15234 udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
15235
15236 if (!lock_acquired)
15237 rtnl_unlock();
15238
15239 return ret;
15240 }
15241
15242 /**
15243 * i40e_determine_queue_usage - Work out queue distribution
15244 * @pf: board private structure
15245 **/
i40e_determine_queue_usage(struct i40e_pf * pf)15246 static void i40e_determine_queue_usage(struct i40e_pf *pf)
15247 {
15248 int queues_left;
15249 int q_max;
15250
15251 pf->num_lan_qps = 0;
15252
15253 /* Find the max queues to be put into basic use. We'll always be
15254 * using TC0, whether or not DCB is running, and TC0 will get the
15255 * big RSS set.
15256 */
15257 queues_left = pf->hw.func_caps.num_tx_qp;
15258
15259 if ((queues_left == 1) ||
15260 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
15261 /* one qp for PF, no queues for anything else */
15262 queues_left = 0;
15263 pf->alloc_rss_size = pf->num_lan_qps = 1;
15264
15265 /* make sure all the fancies are disabled */
15266 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15267 I40E_FLAG_IWARP_ENABLED |
15268 I40E_FLAG_FD_SB_ENABLED |
15269 I40E_FLAG_FD_ATR_ENABLED |
15270 I40E_FLAG_DCB_CAPABLE |
15271 I40E_FLAG_DCB_ENABLED |
15272 I40E_FLAG_SRIOV_ENABLED |
15273 I40E_FLAG_VMDQ_ENABLED);
15274 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15275 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
15276 I40E_FLAG_FD_SB_ENABLED |
15277 I40E_FLAG_FD_ATR_ENABLED |
15278 I40E_FLAG_DCB_CAPABLE))) {
15279 /* one qp for PF */
15280 pf->alloc_rss_size = pf->num_lan_qps = 1;
15281 queues_left -= pf->num_lan_qps;
15282
15283 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15284 I40E_FLAG_IWARP_ENABLED |
15285 I40E_FLAG_FD_SB_ENABLED |
15286 I40E_FLAG_FD_ATR_ENABLED |
15287 I40E_FLAG_DCB_ENABLED |
15288 I40E_FLAG_VMDQ_ENABLED);
15289 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15290 } else {
15291 /* Not enough queues for all TCs */
15292 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
15293 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
15294 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
15295 I40E_FLAG_DCB_ENABLED);
15296 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15297 }
15298
15299 /* limit lan qps to the smaller of qps, cpus or msix */
15300 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15301 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15302 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15303 pf->num_lan_qps = q_max;
15304
15305 queues_left -= pf->num_lan_qps;
15306 }
15307
15308 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15309 if (queues_left > 1) {
15310 queues_left -= 1; /* save 1 queue for FD */
15311 } else {
15312 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
15313 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15314 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15315 }
15316 }
15317
15318 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15319 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15320 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15321 (queues_left / pf->num_vf_qps));
15322 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15323 }
15324
15325 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
15326 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15327 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15328 (queues_left / pf->num_vmdq_qps));
15329 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15330 }
15331
15332 pf->queues_left = queues_left;
15333 dev_dbg(&pf->pdev->dev,
15334 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
15335 pf->hw.func_caps.num_tx_qp,
15336 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
15337 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15338 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15339 queues_left);
15340 }
15341
15342 /**
15343 * i40e_setup_pf_filter_control - Setup PF static filter control
15344 * @pf: PF to be setup
15345 *
15346 * i40e_setup_pf_filter_control sets up a PF's initial filter control
15347 * settings. If PE/FCoE are enabled then it will also set the per PF
15348 * based filter sizes required for them. It also enables Flow director,
15349 * ethertype and macvlan type filter settings for the pf.
15350 *
15351 * Returns 0 on success, negative on failure
15352 **/
i40e_setup_pf_filter_control(struct i40e_pf * pf)15353 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15354 {
15355 struct i40e_filter_control_settings *settings = &pf->filter_settings;
15356
15357 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
15358
15359 /* Flow Director is enabled */
15360 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
15361 settings->enable_fdir = true;
15362
15363 /* Ethtype and MACVLAN filters enabled for PF */
15364 settings->enable_ethtype = true;
15365 settings->enable_macvlan = true;
15366
15367 if (i40e_set_filter_control(&pf->hw, settings))
15368 return -ENOENT;
15369
15370 return 0;
15371 }
15372
15373 #define INFO_STRING_LEN 255
15374 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
i40e_print_features(struct i40e_pf * pf)15375 static void i40e_print_features(struct i40e_pf *pf)
15376 {
15377 struct i40e_hw *hw = &pf->hw;
15378 char *buf;
15379 int i;
15380
15381 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
15382 if (!buf)
15383 return;
15384
15385 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
15386 #ifdef CONFIG_PCI_IOV
15387 i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
15388 #endif
15389 i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
15390 pf->hw.func_caps.num_vsis,
15391 pf->vsi[pf->lan_vsi]->num_queue_pairs);
15392 if (pf->flags & I40E_FLAG_RSS_ENABLED)
15393 i += scnprintf(&buf[i], REMAIN(i), " RSS");
15394 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
15395 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
15396 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15397 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
15398 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
15399 }
15400 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
15401 i += scnprintf(&buf[i], REMAIN(i), " DCB");
15402 i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
15403 i += scnprintf(&buf[i], REMAIN(i), " Geneve");
15404 if (pf->flags & I40E_FLAG_PTP)
15405 i += scnprintf(&buf[i], REMAIN(i), " PTP");
15406 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
15407 i += scnprintf(&buf[i], REMAIN(i), " VEB");
15408 else
15409 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
15410
15411 dev_info(&pf->pdev->dev, "%s\n", buf);
15412 kfree(buf);
15413 WARN_ON(i > INFO_STRING_LEN);
15414 }
15415
15416 /**
15417 * i40e_get_platform_mac_addr - get platform-specific MAC address
15418 * @pdev: PCI device information struct
15419 * @pf: board private structure
15420 *
15421 * Look up the MAC address for the device. First we'll try
15422 * eth_platform_get_mac_address, which will check Open Firmware, or arch
15423 * specific fallback. Otherwise, we'll default to the stored value in
15424 * firmware.
15425 **/
i40e_get_platform_mac_addr(struct pci_dev * pdev,struct i40e_pf * pf)15426 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15427 {
15428 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
15429 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
15430 }
15431
15432 /**
15433 * i40e_set_fec_in_flags - helper function for setting FEC options in flags
15434 * @fec_cfg: FEC option to set in flags
15435 * @flags: ptr to flags in which we set FEC option
15436 **/
i40e_set_fec_in_flags(u8 fec_cfg,u32 * flags)15437 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
15438 {
15439 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
15440 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
15441 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
15442 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
15443 *flags |= I40E_FLAG_RS_FEC;
15444 *flags &= ~I40E_FLAG_BASE_R_FEC;
15445 }
15446 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
15447 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
15448 *flags |= I40E_FLAG_BASE_R_FEC;
15449 *flags &= ~I40E_FLAG_RS_FEC;
15450 }
15451 if (fec_cfg == 0)
15452 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
15453 }
15454
15455 /**
15456 * i40e_check_recovery_mode - check if we are running transition firmware
15457 * @pf: board private structure
15458 *
15459 * Check registers indicating the firmware runs in recovery mode. Sets the
15460 * appropriate driver state.
15461 *
15462 * Returns true if the recovery mode was detected, false otherwise
15463 **/
i40e_check_recovery_mode(struct i40e_pf * pf)15464 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15465 {
15466 u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15467
15468 if (val & I40E_GL_FWSTS_FWS1B_MASK) {
15469 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15470 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15471 set_bit(__I40E_RECOVERY_MODE, pf->state);
15472
15473 return true;
15474 }
15475 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15476 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15477
15478 return false;
15479 }
15480
15481 /**
15482 * i40e_pf_loop_reset - perform reset in a loop.
15483 * @pf: board private structure
15484 *
15485 * This function is useful when a NIC is about to enter recovery mode.
15486 * When a NIC's internal data structures are corrupted the NIC's
15487 * firmware is going to enter recovery mode.
15488 * Right after a POR it takes about 7 minutes for firmware to enter
15489 * recovery mode. Until that time a NIC is in some kind of intermediate
15490 * state. After that time period the NIC almost surely enters
15491 * recovery mode. The only way for a driver to detect intermediate
15492 * state is to issue a series of pf-resets and check a return value.
15493 * If a PF reset returns success then the firmware could be in recovery
15494 * mode so the caller of this code needs to check for recovery mode
15495 * if this function returns success. There is a little chance that
15496 * firmware will hang in intermediate state forever.
15497 * Since waiting 7 minutes is quite a lot of time this function waits
15498 * 10 seconds and then gives up by returning an error.
15499 *
15500 * Return 0 on success, negative on failure.
15501 **/
i40e_pf_loop_reset(struct i40e_pf * pf)15502 static int i40e_pf_loop_reset(struct i40e_pf *pf)
15503 {
15504 /* wait max 10 seconds for PF reset to succeed */
15505 const unsigned long time_end = jiffies + 10 * HZ;
15506 struct i40e_hw *hw = &pf->hw;
15507 int ret;
15508
15509 ret = i40e_pf_reset(hw);
15510 while (ret != 0 && time_before(jiffies, time_end)) {
15511 usleep_range(10000, 20000);
15512 ret = i40e_pf_reset(hw);
15513 }
15514
15515 if (ret == 0)
15516 pf->pfr_count++;
15517 else
15518 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15519
15520 return ret;
15521 }
15522
15523 /**
15524 * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15525 * @pf: board private structure
15526 *
15527 * Check FW registers to determine if FW issued unexpected EMP Reset.
15528 * Every time when unexpected EMP Reset occurs the FW increments
15529 * a counter of unexpected EMP Resets. When the counter reaches 10
15530 * the FW should enter the Recovery mode
15531 *
15532 * Returns true if FW issued unexpected EMP Reset
15533 **/
i40e_check_fw_empr(struct i40e_pf * pf)15534 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15535 {
15536 const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15537 I40E_GL_FWSTS_FWS1B_MASK;
15538 return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15539 (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15540 }
15541
15542 /**
15543 * i40e_handle_resets - handle EMP resets and PF resets
15544 * @pf: board private structure
15545 *
15546 * Handle both EMP resets and PF resets and conclude whether there are
15547 * any issues regarding these resets. If there are any issues then
15548 * generate log entry.
15549 *
15550 * Return 0 if NIC is healthy or negative value when there are issues
15551 * with resets
15552 **/
i40e_handle_resets(struct i40e_pf * pf)15553 static int i40e_handle_resets(struct i40e_pf *pf)
15554 {
15555 const int pfr = i40e_pf_loop_reset(pf);
15556 const bool is_empr = i40e_check_fw_empr(pf);
15557
15558 if (is_empr || pfr != 0)
15559 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15560
15561 return is_empr ? -EIO : pfr;
15562 }
15563
15564 /**
15565 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15566 * @pf: board private structure
15567 * @hw: ptr to the hardware info
15568 *
15569 * This function does a minimal setup of all subsystems needed for running
15570 * recovery mode.
15571 *
15572 * Returns 0 on success, negative on failure
15573 **/
i40e_init_recovery_mode(struct i40e_pf * pf,struct i40e_hw * hw)15574 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15575 {
15576 struct i40e_vsi *vsi;
15577 int err;
15578 int v_idx;
15579
15580 pci_set_drvdata(pf->pdev, pf);
15581 pci_save_state(pf->pdev);
15582
15583 /* set up periodic task facility */
15584 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15585 pf->service_timer_period = HZ;
15586
15587 INIT_WORK(&pf->service_task, i40e_service_task);
15588 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15589
15590 err = i40e_init_interrupt_scheme(pf);
15591 if (err)
15592 goto err_switch_setup;
15593
15594 /* The number of VSIs reported by the FW is the minimum guaranteed
15595 * to us; HW supports far more and we share the remaining pool with
15596 * the other PFs. We allocate space for more than the guarantee with
15597 * the understanding that we might not get them all later.
15598 */
15599 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15600 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15601 else
15602 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15603
15604 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15605 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15606 GFP_KERNEL);
15607 if (!pf->vsi) {
15608 err = -ENOMEM;
15609 goto err_switch_setup;
15610 }
15611
15612 /* We allocate one VSI which is needed as absolute minimum
15613 * in order to register the netdev
15614 */
15615 v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15616 if (v_idx < 0) {
15617 err = v_idx;
15618 goto err_switch_setup;
15619 }
15620 pf->lan_vsi = v_idx;
15621 vsi = pf->vsi[v_idx];
15622 if (!vsi) {
15623 err = -EFAULT;
15624 goto err_switch_setup;
15625 }
15626 vsi->alloc_queue_pairs = 1;
15627 err = i40e_config_netdev(vsi);
15628 if (err)
15629 goto err_switch_setup;
15630 err = register_netdev(vsi->netdev);
15631 if (err)
15632 goto err_switch_setup;
15633 vsi->netdev_registered = true;
15634 i40e_dbg_pf_init(pf);
15635
15636 err = i40e_setup_misc_vector_for_recovery_mode(pf);
15637 if (err)
15638 goto err_switch_setup;
15639
15640 /* tell the firmware that we're starting */
15641 i40e_send_version(pf);
15642
15643 /* since everything's happy, start the service_task timer */
15644 mod_timer(&pf->service_timer,
15645 round_jiffies(jiffies + pf->service_timer_period));
15646
15647 return 0;
15648
15649 err_switch_setup:
15650 i40e_reset_interrupt_capability(pf);
15651 timer_shutdown_sync(&pf->service_timer);
15652 i40e_shutdown_adminq(hw);
15653 iounmap(hw->hw_addr);
15654 pci_release_mem_regions(pf->pdev);
15655 pci_disable_device(pf->pdev);
15656 kfree(pf);
15657
15658 return err;
15659 }
15660
15661 /**
15662 * i40e_set_subsystem_device_id - set subsystem device id
15663 * @hw: pointer to the hardware info
15664 *
15665 * Set PCI subsystem device id either from a pci_dev structure or
15666 * a specific FW register.
15667 **/
i40e_set_subsystem_device_id(struct i40e_hw * hw)15668 static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15669 {
15670 struct i40e_pf *pf = i40e_hw_to_pf(hw);
15671
15672 hw->subsystem_device_id = pf->pdev->subsystem_device ?
15673 pf->pdev->subsystem_device :
15674 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15675 }
15676
15677 /**
15678 * i40e_probe - Device initialization routine
15679 * @pdev: PCI device information struct
15680 * @ent: entry in i40e_pci_tbl
15681 *
15682 * i40e_probe initializes a PF identified by a pci_dev structure.
15683 * The OS initialization, configuring of the PF private structure,
15684 * and a hardware reset occur.
15685 *
15686 * Returns 0 on success, negative on failure
15687 **/
i40e_probe(struct pci_dev * pdev,const struct pci_device_id * ent)15688 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15689 {
15690 struct i40e_aq_get_phy_abilities_resp abilities;
15691 #ifdef CONFIG_I40E_DCB
15692 enum i40e_get_fw_lldp_status_resp lldp_status;
15693 #endif /* CONFIG_I40E_DCB */
15694 struct i40e_pf *pf;
15695 struct i40e_hw *hw;
15696 static u16 pfs_found;
15697 u16 wol_nvm_bits;
15698 u16 link_status;
15699 #ifdef CONFIG_I40E_DCB
15700 int status;
15701 #endif /* CONFIG_I40E_DCB */
15702 int err;
15703 u32 val;
15704 u32 i;
15705
15706 err = pci_enable_device_mem(pdev);
15707 if (err)
15708 return err;
15709
15710 /* set up for high or low dma */
15711 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15712 if (err) {
15713 dev_err(&pdev->dev,
15714 "DMA configuration failed: 0x%x\n", err);
15715 goto err_dma;
15716 }
15717
15718 /* set up pci connections */
15719 err = pci_request_mem_regions(pdev, i40e_driver_name);
15720 if (err) {
15721 dev_info(&pdev->dev,
15722 "pci_request_selected_regions failed %d\n", err);
15723 goto err_pci_reg;
15724 }
15725
15726 pci_set_master(pdev);
15727
15728 /* Now that we have a PCI connection, we need to do the
15729 * low level device setup. This is primarily setting up
15730 * the Admin Queue structures and then querying for the
15731 * device's current profile information.
15732 */
15733 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
15734 if (!pf) {
15735 err = -ENOMEM;
15736 goto err_pf_alloc;
15737 }
15738 pf->next_vsi = 0;
15739 pf->pdev = pdev;
15740 set_bit(__I40E_DOWN, pf->state);
15741
15742 hw = &pf->hw;
15743
15744 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15745 I40E_MAX_CSR_SPACE);
15746 /* We believe that the highest register to read is
15747 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15748 * is not less than that before mapping to prevent a
15749 * kernel panic.
15750 */
15751 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15752 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15753 pf->ioremap_len);
15754 err = -ENOMEM;
15755 goto err_ioremap;
15756 }
15757 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15758 if (!hw->hw_addr) {
15759 err = -EIO;
15760 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15761 (unsigned int)pci_resource_start(pdev, 0),
15762 pf->ioremap_len, err);
15763 goto err_ioremap;
15764 }
15765 hw->vendor_id = pdev->vendor;
15766 hw->device_id = pdev->device;
15767 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15768 hw->subsystem_vendor_id = pdev->subsystem_vendor;
15769 i40e_set_subsystem_device_id(hw);
15770 hw->bus.device = PCI_SLOT(pdev->devfn);
15771 hw->bus.func = PCI_FUNC(pdev->devfn);
15772 hw->bus.bus_id = pdev->bus->number;
15773 pf->instance = pfs_found;
15774
15775 /* Select something other than the 802.1ad ethertype for the
15776 * switch to use internally and drop on ingress.
15777 */
15778 hw->switch_tag = 0xffff;
15779 hw->first_tag = ETH_P_8021AD;
15780 hw->second_tag = ETH_P_8021Q;
15781
15782 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15783 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15784 INIT_LIST_HEAD(&pf->ddp_old_prof);
15785
15786 /* set up the locks for the AQ, do this only once in probe
15787 * and destroy them only once in remove
15788 */
15789 mutex_init(&hw->aq.asq_mutex);
15790 mutex_init(&hw->aq.arq_mutex);
15791
15792 pf->msg_enable = netif_msg_init(debug,
15793 NETIF_MSG_DRV |
15794 NETIF_MSG_PROBE |
15795 NETIF_MSG_LINK);
15796 if (debug < -1)
15797 pf->hw.debug_mask = debug;
15798
15799 /* do a special CORER for clearing PXE mode once at init */
15800 if (hw->revision_id == 0 &&
15801 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15802 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15803 i40e_flush(hw);
15804 msleep(200);
15805 pf->corer_count++;
15806
15807 i40e_clear_pxe_mode(hw);
15808 }
15809
15810 /* Reset here to make sure all is clean and to define PF 'n' */
15811 i40e_clear_hw(hw);
15812
15813 err = i40e_set_mac_type(hw);
15814 if (err) {
15815 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15816 err);
15817 goto err_pf_reset;
15818 }
15819
15820 err = i40e_handle_resets(pf);
15821 if (err)
15822 goto err_pf_reset;
15823
15824 i40e_check_recovery_mode(pf);
15825
15826 if (is_kdump_kernel()) {
15827 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15828 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15829 } else {
15830 hw->aq.num_arq_entries = I40E_AQ_LEN;
15831 hw->aq.num_asq_entries = I40E_AQ_LEN;
15832 }
15833 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15834 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15835 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15836
15837 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15838 "%s-%s:misc",
15839 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15840
15841 err = i40e_init_shared_code(hw);
15842 if (err) {
15843 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15844 err);
15845 goto err_pf_reset;
15846 }
15847
15848 /* set up a default setting for link flow control */
15849 pf->hw.fc.requested_mode = I40E_FC_NONE;
15850
15851 err = i40e_init_adminq(hw);
15852 if (err) {
15853 if (err == -EIO)
15854 dev_info(&pdev->dev,
15855 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15856 hw->aq.api_maj_ver,
15857 hw->aq.api_min_ver,
15858 I40E_FW_API_VERSION_MAJOR,
15859 I40E_FW_MINOR_VERSION(hw));
15860 else
15861 dev_info(&pdev->dev,
15862 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15863
15864 goto err_pf_reset;
15865 }
15866 i40e_get_oem_version(hw);
15867
15868 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15869 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15870 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15871 hw->aq.api_maj_ver, hw->aq.api_min_ver,
15872 i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
15873 hw->subsystem_vendor_id, hw->subsystem_device_id);
15874
15875 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15876 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15877 dev_dbg(&pdev->dev,
15878 "The driver for the device detected a newer version of the NVM image v%u.%u than v%u.%u.\n",
15879 hw->aq.api_maj_ver,
15880 hw->aq.api_min_ver,
15881 I40E_FW_API_VERSION_MAJOR,
15882 I40E_FW_MINOR_VERSION(hw));
15883 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15884 dev_info(&pdev->dev,
15885 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15886 hw->aq.api_maj_ver,
15887 hw->aq.api_min_ver,
15888 I40E_FW_API_VERSION_MAJOR,
15889 I40E_FW_MINOR_VERSION(hw));
15890
15891 i40e_verify_eeprom(pf);
15892
15893 /* Rev 0 hardware was never productized */
15894 if (hw->revision_id < 1)
15895 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15896
15897 i40e_clear_pxe_mode(hw);
15898
15899 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15900 if (err)
15901 goto err_adminq_setup;
15902
15903 err = i40e_sw_init(pf);
15904 if (err) {
15905 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15906 goto err_sw_init;
15907 }
15908
15909 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15910 return i40e_init_recovery_mode(pf, hw);
15911
15912 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15913 hw->func_caps.num_rx_qp, 0, 0);
15914 if (err) {
15915 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15916 goto err_init_lan_hmc;
15917 }
15918
15919 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15920 if (err) {
15921 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15922 err = -ENOENT;
15923 goto err_configure_lan_hmc;
15924 }
15925
15926 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15927 * Ignore error return codes because if it was already disabled via
15928 * hardware settings this will fail
15929 */
15930 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15931 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15932 i40e_aq_stop_lldp(hw, true, false, NULL);
15933 }
15934
15935 /* allow a platform config to override the HW addr */
15936 i40e_get_platform_mac_addr(pdev, pf);
15937
15938 if (!is_valid_ether_addr(hw->mac.addr)) {
15939 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15940 err = -EIO;
15941 goto err_mac_addr;
15942 }
15943 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15944 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15945 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15946 if (is_valid_ether_addr(hw->mac.port_addr))
15947 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15948
15949 i40e_ptp_alloc_pins(pf);
15950 pci_set_drvdata(pdev, pf);
15951 pci_save_state(pdev);
15952
15953 #ifdef CONFIG_I40E_DCB
15954 status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15955 (!status &&
15956 lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15957 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15958 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15959 dev_info(&pdev->dev,
15960 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15961 "FW LLDP is disabled\n" :
15962 "FW LLDP is enabled\n");
15963
15964 /* Enable FW to write default DCB config on link-up */
15965 i40e_aq_set_dcb_parameters(hw, true, NULL);
15966
15967 err = i40e_init_pf_dcb(pf);
15968 if (err) {
15969 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15970 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15971 /* Continue without DCB enabled */
15972 }
15973 #endif /* CONFIG_I40E_DCB */
15974
15975 /* set up periodic task facility */
15976 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15977 pf->service_timer_period = HZ;
15978
15979 INIT_WORK(&pf->service_task, i40e_service_task);
15980 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15981
15982 /* NVM bit on means WoL disabled for the port */
15983 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15984 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15985 pf->wol_en = false;
15986 else
15987 pf->wol_en = true;
15988 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15989
15990 /* set up the main switch operations */
15991 i40e_determine_queue_usage(pf);
15992 err = i40e_init_interrupt_scheme(pf);
15993 if (err)
15994 goto err_switch_setup;
15995
15996 /* Reduce Tx and Rx pairs for kdump
15997 * When MSI-X is enabled, it's not allowed to use more TC queue
15998 * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15999 * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
16000 */
16001 if (is_kdump_kernel())
16002 pf->num_lan_msix = 1;
16003
16004 pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
16005 pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
16006 pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
16007 pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
16008 pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
16009 pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
16010 UDP_TUNNEL_TYPE_GENEVE;
16011
16012 /* The number of VSIs reported by the FW is the minimum guaranteed
16013 * to us; HW supports far more and we share the remaining pool with
16014 * the other PFs. We allocate space for more than the guarantee with
16015 * the understanding that we might not get them all later.
16016 */
16017 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
16018 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
16019 else
16020 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
16021 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
16022 dev_warn(&pf->pdev->dev,
16023 "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
16024 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
16025 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
16026 }
16027
16028 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
16029 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
16030 GFP_KERNEL);
16031 if (!pf->vsi) {
16032 err = -ENOMEM;
16033 goto err_switch_setup;
16034 }
16035
16036 #ifdef CONFIG_PCI_IOV
16037 /* prep for VF support */
16038 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
16039 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
16040 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
16041 if (pci_num_vf(pdev))
16042 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
16043 }
16044 #endif
16045 err = i40e_setup_pf_switch(pf, false, false);
16046 if (err) {
16047 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
16048 goto err_vsis;
16049 }
16050 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
16051
16052 /* if FDIR VSI was set up, start it now */
16053 for (i = 0; i < pf->num_alloc_vsi; i++) {
16054 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
16055 i40e_vsi_open(pf->vsi[i]);
16056 break;
16057 }
16058 }
16059
16060 /* The driver only wants link up/down and module qualification
16061 * reports from firmware. Note the negative logic.
16062 */
16063 err = i40e_aq_set_phy_int_mask(&pf->hw,
16064 ~(I40E_AQ_EVENT_LINK_UPDOWN |
16065 I40E_AQ_EVENT_MEDIA_NA |
16066 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
16067 if (err)
16068 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
16069 ERR_PTR(err),
16070 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16071
16072 /* Reconfigure hardware for allowing smaller MSS in the case
16073 * of TSO, so that we avoid the MDD being fired and causing
16074 * a reset in the case of small MSS+TSO.
16075 */
16076 val = rd32(hw, I40E_REG_MSS);
16077 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
16078 val &= ~I40E_REG_MSS_MIN_MASK;
16079 val |= I40E_64BYTE_MSS;
16080 wr32(hw, I40E_REG_MSS, val);
16081 }
16082
16083 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
16084 msleep(75);
16085 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
16086 if (err)
16087 dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
16088 ERR_PTR(err),
16089 i40e_aq_str(&pf->hw,
16090 pf->hw.aq.asq_last_status));
16091 }
16092 /* The main driver is (mostly) up and happy. We need to set this state
16093 * before setting up the misc vector or we get a race and the vector
16094 * ends up disabled forever.
16095 */
16096 clear_bit(__I40E_DOWN, pf->state);
16097
16098 /* In case of MSIX we are going to setup the misc vector right here
16099 * to handle admin queue events etc. In case of legacy and MSI
16100 * the misc functionality and queue processing is combined in
16101 * the same vector and that gets setup at open.
16102 */
16103 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
16104 err = i40e_setup_misc_vector(pf);
16105 if (err) {
16106 dev_info(&pdev->dev,
16107 "setup of misc vector failed: %d\n", err);
16108 i40e_cloud_filter_exit(pf);
16109 i40e_fdir_teardown(pf);
16110 goto err_vsis;
16111 }
16112 }
16113
16114 #ifdef CONFIG_PCI_IOV
16115 /* prep for VF support */
16116 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
16117 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
16118 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
16119 /* disable link interrupts for VFs */
16120 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
16121 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
16122 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
16123 i40e_flush(hw);
16124
16125 if (pci_num_vf(pdev)) {
16126 dev_info(&pdev->dev,
16127 "Active VFs found, allocating resources.\n");
16128 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
16129 if (err)
16130 dev_info(&pdev->dev,
16131 "Error %d allocating resources for existing VFs\n",
16132 err);
16133 }
16134 }
16135 #endif /* CONFIG_PCI_IOV */
16136
16137 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16138 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
16139 pf->num_iwarp_msix,
16140 I40E_IWARP_IRQ_PILE_ID);
16141 if (pf->iwarp_base_vector < 0) {
16142 dev_info(&pdev->dev,
16143 "failed to get tracking for %d vectors for IWARP err=%d\n",
16144 pf->num_iwarp_msix, pf->iwarp_base_vector);
16145 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
16146 }
16147 }
16148
16149 i40e_dbg_pf_init(pf);
16150
16151 /* tell the firmware that we're starting */
16152 i40e_send_version(pf);
16153
16154 /* since everything's happy, start the service_task timer */
16155 mod_timer(&pf->service_timer,
16156 round_jiffies(jiffies + pf->service_timer_period));
16157
16158 /* add this PF to client device list and launch a client service task */
16159 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16160 err = i40e_lan_add_device(pf);
16161 if (err)
16162 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
16163 err);
16164 }
16165
16166 #define PCI_SPEED_SIZE 8
16167 #define PCI_WIDTH_SIZE 8
16168 /* Devices on the IOSF bus do not have this information
16169 * and will report PCI Gen 1 x 1 by default so don't bother
16170 * checking them.
16171 */
16172 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
16173 char speed[PCI_SPEED_SIZE] = "Unknown";
16174 char width[PCI_WIDTH_SIZE] = "Unknown";
16175
16176 /* Get the negotiated link width and speed from PCI config
16177 * space
16178 */
16179 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
16180 &link_status);
16181
16182 i40e_set_pci_config_data(hw, link_status);
16183
16184 switch (hw->bus.speed) {
16185 case i40e_bus_speed_8000:
16186 strscpy(speed, "8.0", PCI_SPEED_SIZE); break;
16187 case i40e_bus_speed_5000:
16188 strscpy(speed, "5.0", PCI_SPEED_SIZE); break;
16189 case i40e_bus_speed_2500:
16190 strscpy(speed, "2.5", PCI_SPEED_SIZE); break;
16191 default:
16192 break;
16193 }
16194 switch (hw->bus.width) {
16195 case i40e_bus_width_pcie_x8:
16196 strscpy(width, "8", PCI_WIDTH_SIZE); break;
16197 case i40e_bus_width_pcie_x4:
16198 strscpy(width, "4", PCI_WIDTH_SIZE); break;
16199 case i40e_bus_width_pcie_x2:
16200 strscpy(width, "2", PCI_WIDTH_SIZE); break;
16201 case i40e_bus_width_pcie_x1:
16202 strscpy(width, "1", PCI_WIDTH_SIZE); break;
16203 default:
16204 break;
16205 }
16206
16207 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
16208 speed, width);
16209
16210 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
16211 hw->bus.speed < i40e_bus_speed_8000) {
16212 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
16213 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
16214 }
16215 }
16216
16217 /* get the requested speeds from the fw */
16218 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
16219 if (err)
16220 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %pe last_status = %s\n",
16221 ERR_PTR(err),
16222 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16223 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
16224
16225 /* set the FEC config due to the board capabilities */
16226 i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
16227
16228 /* get the supported phy types from the fw */
16229 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
16230 if (err)
16231 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %pe last_status = %s\n",
16232 ERR_PTR(err),
16233 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16234
16235 /* make sure the MFS hasn't been set lower than the default */
16236 #define MAX_FRAME_SIZE_DEFAULT 0x2600
16237 val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
16238 I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
16239 if (val < MAX_FRAME_SIZE_DEFAULT)
16240 dev_warn(&pdev->dev, "MFS for port %x (%d) has been set below the default (%d)\n",
16241 pf->hw.port, val, MAX_FRAME_SIZE_DEFAULT);
16242
16243 /* Add a filter to drop all Flow control frames from any VSI from being
16244 * transmitted. By doing so we stop a malicious VF from sending out
16245 * PAUSE or PFC frames and potentially controlling traffic for other
16246 * PF/VF VSIs.
16247 * The FW can still send Flow control frames if enabled.
16248 */
16249 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
16250 pf->main_vsi_seid);
16251
16252 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
16253 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
16254 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
16255 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
16256 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
16257 /* print a string summarizing features */
16258 i40e_print_features(pf);
16259
16260 return 0;
16261
16262 /* Unwind what we've done if something failed in the setup */
16263 err_vsis:
16264 set_bit(__I40E_DOWN, pf->state);
16265 i40e_clear_interrupt_scheme(pf);
16266 kfree(pf->vsi);
16267 err_switch_setup:
16268 i40e_reset_interrupt_capability(pf);
16269 timer_shutdown_sync(&pf->service_timer);
16270 err_mac_addr:
16271 err_configure_lan_hmc:
16272 (void)i40e_shutdown_lan_hmc(hw);
16273 err_init_lan_hmc:
16274 kfree(pf->qp_pile);
16275 err_sw_init:
16276 err_adminq_setup:
16277 err_pf_reset:
16278 iounmap(hw->hw_addr);
16279 err_ioremap:
16280 kfree(pf);
16281 err_pf_alloc:
16282 pci_release_mem_regions(pdev);
16283 err_pci_reg:
16284 err_dma:
16285 pci_disable_device(pdev);
16286 return err;
16287 }
16288
16289 /**
16290 * i40e_remove - Device removal routine
16291 * @pdev: PCI device information struct
16292 *
16293 * i40e_remove is called by the PCI subsystem to alert the driver
16294 * that is should release a PCI device. This could be caused by a
16295 * Hot-Plug event, or because the driver is going to be removed from
16296 * memory.
16297 **/
i40e_remove(struct pci_dev * pdev)16298 static void i40e_remove(struct pci_dev *pdev)
16299 {
16300 struct i40e_pf *pf = pci_get_drvdata(pdev);
16301 struct i40e_hw *hw = &pf->hw;
16302 int ret_code;
16303 int i;
16304
16305 i40e_dbg_pf_exit(pf);
16306
16307 i40e_ptp_stop(pf);
16308
16309 /* Disable RSS in hw */
16310 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
16311 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
16312
16313 /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
16314 * flags, once they are set, i40e_rebuild should not be called as
16315 * i40e_prep_for_reset always returns early.
16316 */
16317 while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
16318 usleep_range(1000, 2000);
16319 set_bit(__I40E_IN_REMOVE, pf->state);
16320
16321 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
16322 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
16323 i40e_free_vfs(pf);
16324 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
16325 }
16326 /* no more scheduling of any task */
16327 set_bit(__I40E_SUSPENDED, pf->state);
16328 set_bit(__I40E_DOWN, pf->state);
16329 if (pf->service_timer.function)
16330 timer_shutdown_sync(&pf->service_timer);
16331 if (pf->service_task.func)
16332 cancel_work_sync(&pf->service_task);
16333
16334 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16335 struct i40e_vsi *vsi = pf->vsi[0];
16336
16337 /* We know that we have allocated only one vsi for this PF,
16338 * it was just for registering netdevice, so the interface
16339 * could be visible in the 'ifconfig' output
16340 */
16341 unregister_netdev(vsi->netdev);
16342 free_netdev(vsi->netdev);
16343
16344 goto unmap;
16345 }
16346
16347 /* Client close must be called explicitly here because the timer
16348 * has been stopped.
16349 */
16350 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16351
16352 i40e_fdir_teardown(pf);
16353
16354 /* If there is a switch structure or any orphans, remove them.
16355 * This will leave only the PF's VSI remaining.
16356 */
16357 for (i = 0; i < I40E_MAX_VEB; i++) {
16358 if (!pf->veb[i])
16359 continue;
16360
16361 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
16362 pf->veb[i]->uplink_seid == 0)
16363 i40e_switch_branch_release(pf->veb[i]);
16364 }
16365
16366 /* Now we can shutdown the PF's VSIs, just before we kill
16367 * adminq and hmc.
16368 */
16369 for (i = pf->num_alloc_vsi; i--;)
16370 if (pf->vsi[i]) {
16371 i40e_vsi_close(pf->vsi[i]);
16372 i40e_vsi_release(pf->vsi[i]);
16373 pf->vsi[i] = NULL;
16374 }
16375
16376 i40e_cloud_filter_exit(pf);
16377
16378 /* remove attached clients */
16379 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16380 ret_code = i40e_lan_del_device(pf);
16381 if (ret_code)
16382 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
16383 ret_code);
16384 }
16385
16386 /* shutdown and destroy the HMC */
16387 if (hw->hmc.hmc_obj) {
16388 ret_code = i40e_shutdown_lan_hmc(hw);
16389 if (ret_code)
16390 dev_warn(&pdev->dev,
16391 "Failed to destroy the HMC resources: %d\n",
16392 ret_code);
16393 }
16394
16395 unmap:
16396 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16397 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16398 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16399 free_irq(pf->pdev->irq, pf);
16400
16401 /* shutdown the adminq */
16402 i40e_shutdown_adminq(hw);
16403
16404 /* destroy the locks only once, here */
16405 mutex_destroy(&hw->aq.arq_mutex);
16406 mutex_destroy(&hw->aq.asq_mutex);
16407
16408 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
16409 rtnl_lock();
16410 i40e_clear_interrupt_scheme(pf);
16411 for (i = 0; i < pf->num_alloc_vsi; i++) {
16412 if (pf->vsi[i]) {
16413 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16414 i40e_vsi_clear_rings(pf->vsi[i]);
16415 i40e_vsi_clear(pf->vsi[i]);
16416 pf->vsi[i] = NULL;
16417 }
16418 }
16419 rtnl_unlock();
16420
16421 for (i = 0; i < I40E_MAX_VEB; i++) {
16422 kfree(pf->veb[i]);
16423 pf->veb[i] = NULL;
16424 }
16425
16426 kfree(pf->qp_pile);
16427 kfree(pf->vsi);
16428
16429 iounmap(hw->hw_addr);
16430 kfree(pf);
16431 pci_release_mem_regions(pdev);
16432
16433 pci_disable_device(pdev);
16434 }
16435
16436 /**
16437 * i40e_pci_error_detected - warning that something funky happened in PCI land
16438 * @pdev: PCI device information struct
16439 * @error: the type of PCI error
16440 *
16441 * Called to warn that something happened and the error handling steps
16442 * are in progress. Allows the driver to quiesce things, be ready for
16443 * remediation.
16444 **/
i40e_pci_error_detected(struct pci_dev * pdev,pci_channel_state_t error)16445 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
16446 pci_channel_state_t error)
16447 {
16448 struct i40e_pf *pf = pci_get_drvdata(pdev);
16449
16450 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
16451
16452 if (!pf) {
16453 dev_info(&pdev->dev,
16454 "Cannot recover - error happened during device probe\n");
16455 return PCI_ERS_RESULT_DISCONNECT;
16456 }
16457
16458 /* shutdown all operations */
16459 if (!test_bit(__I40E_SUSPENDED, pf->state))
16460 i40e_prep_for_reset(pf);
16461
16462 /* Request a slot reset */
16463 return PCI_ERS_RESULT_NEED_RESET;
16464 }
16465
16466 /**
16467 * i40e_pci_error_slot_reset - a PCI slot reset just happened
16468 * @pdev: PCI device information struct
16469 *
16470 * Called to find if the driver can work with the device now that
16471 * the pci slot has been reset. If a basic connection seems good
16472 * (registers are readable and have sane content) then return a
16473 * happy little PCI_ERS_RESULT_xxx.
16474 **/
i40e_pci_error_slot_reset(struct pci_dev * pdev)16475 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
16476 {
16477 struct i40e_pf *pf = pci_get_drvdata(pdev);
16478 pci_ers_result_t result;
16479 u32 reg;
16480
16481 dev_dbg(&pdev->dev, "%s\n", __func__);
16482 if (pci_enable_device_mem(pdev)) {
16483 dev_info(&pdev->dev,
16484 "Cannot re-enable PCI device after reset.\n");
16485 result = PCI_ERS_RESULT_DISCONNECT;
16486 } else {
16487 pci_set_master(pdev);
16488 pci_restore_state(pdev);
16489 pci_save_state(pdev);
16490 pci_wake_from_d3(pdev, false);
16491
16492 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16493 if (reg == 0)
16494 result = PCI_ERS_RESULT_RECOVERED;
16495 else
16496 result = PCI_ERS_RESULT_DISCONNECT;
16497 }
16498
16499 return result;
16500 }
16501
16502 /**
16503 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16504 * @pdev: PCI device information struct
16505 */
i40e_pci_error_reset_prepare(struct pci_dev * pdev)16506 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16507 {
16508 struct i40e_pf *pf = pci_get_drvdata(pdev);
16509
16510 i40e_prep_for_reset(pf);
16511 }
16512
16513 /**
16514 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16515 * @pdev: PCI device information struct
16516 */
i40e_pci_error_reset_done(struct pci_dev * pdev)16517 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16518 {
16519 struct i40e_pf *pf = pci_get_drvdata(pdev);
16520
16521 if (test_bit(__I40E_IN_REMOVE, pf->state))
16522 return;
16523
16524 i40e_reset_and_rebuild(pf, false, false);
16525 #ifdef CONFIG_PCI_IOV
16526 i40e_restore_all_vfs_msi_state(pdev);
16527 #endif /* CONFIG_PCI_IOV */
16528 }
16529
16530 /**
16531 * i40e_pci_error_resume - restart operations after PCI error recovery
16532 * @pdev: PCI device information struct
16533 *
16534 * Called to allow the driver to bring things back up after PCI error
16535 * and/or reset recovery has finished.
16536 **/
i40e_pci_error_resume(struct pci_dev * pdev)16537 static void i40e_pci_error_resume(struct pci_dev *pdev)
16538 {
16539 struct i40e_pf *pf = pci_get_drvdata(pdev);
16540
16541 dev_dbg(&pdev->dev, "%s\n", __func__);
16542 if (test_bit(__I40E_SUSPENDED, pf->state))
16543 return;
16544
16545 i40e_handle_reset_warning(pf, false);
16546 }
16547
16548 /**
16549 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16550 * using the mac_address_write admin q function
16551 * @pf: pointer to i40e_pf struct
16552 **/
i40e_enable_mc_magic_wake(struct i40e_pf * pf)16553 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16554 {
16555 struct i40e_hw *hw = &pf->hw;
16556 u8 mac_addr[6];
16557 u16 flags = 0;
16558 int ret;
16559
16560 /* Get current MAC address in case it's an LAA */
16561 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16562 ether_addr_copy(mac_addr,
16563 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16564 } else {
16565 dev_err(&pf->pdev->dev,
16566 "Failed to retrieve MAC address; using default\n");
16567 ether_addr_copy(mac_addr, hw->mac.addr);
16568 }
16569
16570 /* The FW expects the mac address write cmd to first be called with
16571 * one of these flags before calling it again with the multicast
16572 * enable flags.
16573 */
16574 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16575
16576 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16577 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16578
16579 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16580 if (ret) {
16581 dev_err(&pf->pdev->dev,
16582 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16583 return;
16584 }
16585
16586 flags = I40E_AQC_MC_MAG_EN
16587 | I40E_AQC_WOL_PRESERVE_ON_PFR
16588 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16589 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16590 if (ret)
16591 dev_err(&pf->pdev->dev,
16592 "Failed to enable Multicast Magic Packet wake up\n");
16593 }
16594
16595 /**
16596 * i40e_shutdown - PCI callback for shutting down
16597 * @pdev: PCI device information struct
16598 **/
i40e_shutdown(struct pci_dev * pdev)16599 static void i40e_shutdown(struct pci_dev *pdev)
16600 {
16601 struct i40e_pf *pf = pci_get_drvdata(pdev);
16602 struct i40e_hw *hw = &pf->hw;
16603
16604 set_bit(__I40E_SUSPENDED, pf->state);
16605 set_bit(__I40E_DOWN, pf->state);
16606
16607 del_timer_sync(&pf->service_timer);
16608 cancel_work_sync(&pf->service_task);
16609 i40e_cloud_filter_exit(pf);
16610 i40e_fdir_teardown(pf);
16611
16612 /* Client close must be called explicitly here because the timer
16613 * has been stopped.
16614 */
16615 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16616
16617 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16618 i40e_enable_mc_magic_wake(pf);
16619
16620 i40e_prep_for_reset(pf);
16621
16622 wr32(hw, I40E_PFPM_APM,
16623 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16624 wr32(hw, I40E_PFPM_WUFC,
16625 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16626
16627 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16628 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16629 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16630 free_irq(pf->pdev->irq, pf);
16631
16632 /* Since we're going to destroy queues during the
16633 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16634 * whole section
16635 */
16636 rtnl_lock();
16637 i40e_clear_interrupt_scheme(pf);
16638 rtnl_unlock();
16639
16640 if (system_state == SYSTEM_POWER_OFF) {
16641 pci_wake_from_d3(pdev, pf->wol_en);
16642 pci_set_power_state(pdev, PCI_D3hot);
16643 }
16644 }
16645
16646 /**
16647 * i40e_suspend - PM callback for moving to D3
16648 * @dev: generic device information structure
16649 **/
i40e_suspend(struct device * dev)16650 static int __maybe_unused i40e_suspend(struct device *dev)
16651 {
16652 struct i40e_pf *pf = dev_get_drvdata(dev);
16653 struct i40e_hw *hw = &pf->hw;
16654
16655 /* If we're already suspended, then there is nothing to do */
16656 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16657 return 0;
16658
16659 set_bit(__I40E_DOWN, pf->state);
16660
16661 /* Ensure service task will not be running */
16662 del_timer_sync(&pf->service_timer);
16663 cancel_work_sync(&pf->service_task);
16664
16665 /* Client close must be called explicitly here because the timer
16666 * has been stopped.
16667 */
16668 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16669
16670 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16671 i40e_enable_mc_magic_wake(pf);
16672
16673 /* Since we're going to destroy queues during the
16674 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16675 * whole section
16676 */
16677 rtnl_lock();
16678
16679 i40e_prep_for_reset(pf);
16680
16681 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16682 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16683
16684 /* Clear the interrupt scheme and release our IRQs so that the system
16685 * can safely hibernate even when there are a large number of CPUs.
16686 * Otherwise hibernation might fail when mapping all the vectors back
16687 * to CPU0.
16688 */
16689 i40e_clear_interrupt_scheme(pf);
16690
16691 rtnl_unlock();
16692
16693 return 0;
16694 }
16695
16696 /**
16697 * i40e_resume - PM callback for waking up from D3
16698 * @dev: generic device information structure
16699 **/
i40e_resume(struct device * dev)16700 static int __maybe_unused i40e_resume(struct device *dev)
16701 {
16702 struct i40e_pf *pf = dev_get_drvdata(dev);
16703 int err;
16704
16705 /* If we're not suspended, then there is nothing to do */
16706 if (!test_bit(__I40E_SUSPENDED, pf->state))
16707 return 0;
16708
16709 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16710 * since we're going to be restoring queues
16711 */
16712 rtnl_lock();
16713
16714 /* We cleared the interrupt scheme when we suspended, so we need to
16715 * restore it now to resume device functionality.
16716 */
16717 err = i40e_restore_interrupt_scheme(pf);
16718 if (err) {
16719 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16720 err);
16721 }
16722
16723 clear_bit(__I40E_DOWN, pf->state);
16724 i40e_reset_and_rebuild(pf, false, true);
16725
16726 rtnl_unlock();
16727
16728 /* Clear suspended state last after everything is recovered */
16729 clear_bit(__I40E_SUSPENDED, pf->state);
16730
16731 /* Restart the service task */
16732 mod_timer(&pf->service_timer,
16733 round_jiffies(jiffies + pf->service_timer_period));
16734
16735 return 0;
16736 }
16737
16738 static const struct pci_error_handlers i40e_err_handler = {
16739 .error_detected = i40e_pci_error_detected,
16740 .slot_reset = i40e_pci_error_slot_reset,
16741 .reset_prepare = i40e_pci_error_reset_prepare,
16742 .reset_done = i40e_pci_error_reset_done,
16743 .resume = i40e_pci_error_resume,
16744 };
16745
16746 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16747
16748 static struct pci_driver i40e_driver = {
16749 .name = i40e_driver_name,
16750 .id_table = i40e_pci_tbl,
16751 .probe = i40e_probe,
16752 .remove = i40e_remove,
16753 .driver = {
16754 .pm = &i40e_pm_ops,
16755 },
16756 .shutdown = i40e_shutdown,
16757 .err_handler = &i40e_err_handler,
16758 .sriov_configure = i40e_pci_sriov_configure,
16759 };
16760
16761 /**
16762 * i40e_init_module - Driver registration routine
16763 *
16764 * i40e_init_module is the first routine called when the driver is
16765 * loaded. All it does is register with the PCI subsystem.
16766 **/
i40e_init_module(void)16767 static int __init i40e_init_module(void)
16768 {
16769 int err;
16770
16771 pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16772 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16773
16774 /* There is no need to throttle the number of active tasks because
16775 * each device limits its own task using a state bit for scheduling
16776 * the service task, and the device tasks do not interfere with each
16777 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16778 * since we need to be able to guarantee forward progress even under
16779 * memory pressure.
16780 */
16781 i40e_wq = alloc_workqueue("%s", 0, 0, i40e_driver_name);
16782 if (!i40e_wq) {
16783 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16784 return -ENOMEM;
16785 }
16786
16787 i40e_dbg_init();
16788 err = pci_register_driver(&i40e_driver);
16789 if (err) {
16790 destroy_workqueue(i40e_wq);
16791 i40e_dbg_exit();
16792 return err;
16793 }
16794
16795 return 0;
16796 }
16797 module_init(i40e_init_module);
16798
16799 /**
16800 * i40e_exit_module - Driver exit cleanup routine
16801 *
16802 * i40e_exit_module is called just before the driver is removed
16803 * from memory.
16804 **/
i40e_exit_module(void)16805 static void __exit i40e_exit_module(void)
16806 {
16807 pci_unregister_driver(&i40e_driver);
16808 destroy_workqueue(i40e_wq);
16809 ida_destroy(&i40e_client_ida);
16810 i40e_dbg_exit();
16811 }
16812 module_exit(i40e_exit_module);
16813