1&l4_wkup {						/* 0x44c00000 */
2	compatible = "ti,am4-l4-wkup", "simple-pm-bus";
3	power-domains = <&prm_wkup>;
4	clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
5	clock-names = "fck";
6	reg = <0x44c00000 0x800>,
7	      <0x44c00800 0x800>,
8	      <0x44c01000 0x400>,
9	      <0x44c01400 0x400>;
10	reg-names = "ap", "la", "ia0", "ia1";
11	#address-cells = <1>;
12	#size-cells = <1>;
13	ranges = <0x00000000 0x44c00000 0x100000>,	/* segment 0 */
14		 <0x00100000 0x44d00000 0x100000>,	/* segment 1 */
15		 <0x00200000 0x44e00000 0x100000>;	/* segment 2 */
16
17	segment@0 {					/* 0x44c00000 */
18		compatible = "simple-pm-bus";
19		#address-cells = <1>;
20		#size-cells = <1>;
21		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
22			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
23			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
24			 <0x00001400 0x00001400 0x000400>;	/* ap 3 */
25	};
26
27	segment@100000 {					/* 0x44d00000 */
28		compatible = "simple-pm-bus";
29		#address-cells = <1>;
30		#size-cells = <1>;
31		ranges = <0x00000000 0x00100000 0x004000>,	/* ap 4 */
32			 <0x00004000 0x00104000 0x001000>,	/* ap 5 */
33			 <0x00080000 0x00180000 0x002000>,	/* ap 6 */
34			 <0x00082000 0x00182000 0x001000>,	/* ap 7 */
35			 <0x000f0000 0x001f0000 0x010000>;	/* ap 8 */
36
37		target-module@0 {			/* 0x44d00000, ap 4 28.0 */
38			compatible = "ti,sysc-omap4", "ti,sysc";
39			reg = <0x0 0x4>;
40			reg-names = "rev";
41			clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>;
42			clock-names = "fck";
43			#address-cells = <1>;
44			#size-cells = <1>;
45			ranges = <0x00000000 0x00000000 0x4000>,
46				 <0x00080000 0x00080000 0x2000>;
47
48			wkup_m3: cpu@0 {
49				compatible = "ti,am4372-wkup-m3";
50				reg = <0x00000000 0x4000>,
51				      <0x00080000 0x2000>;
52				reg-names = "umem", "dmem";
53				resets = <&prm_wkup 3>;
54				reset-names = "rstctrl";
55				ti,pm-firmware = "am335x-pm-firmware.elf";
56			};
57		};
58
59		target-module@f0000 {			/* 0x44df0000, ap 8 58.0 */
60			compatible = "ti,sysc-omap4", "ti,sysc";
61			reg = <0xf0000 0x4>;
62			reg-names = "rev";
63			#address-cells = <1>;
64			#size-cells = <1>;
65			ranges = <0x0 0xf0000 0x10000>;
66
67			prcm: prcm@0 {
68				compatible = "ti,am4-prcm", "simple-bus";
69				reg = <0x0 0x11000>;
70				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
71				#address-cells = <1>;
72				#size-cells = <1>;
73				ranges = <0 0 0x11000>;
74
75				prcm_clocks: clocks {
76					#address-cells = <1>;
77					#size-cells = <0>;
78				};
79
80				prcm_clockdomains: clockdomains {
81				};
82			};
83		};
84	};
85
86	segment@200000 {					/* 0x44e00000 */
87		compatible = "simple-pm-bus";
88		#address-cells = <1>;
89		#size-cells = <1>;
90		ranges = <0x00000000 0x00200000 0x001000>,	/* ap 9 */
91			 <0x00003000 0x00203000 0x001000>,	/* ap 10 */
92			 <0x00004000 0x00204000 0x001000>,	/* ap 11 */
93			 <0x00005000 0x00205000 0x001000>,	/* ap 12 */
94			 <0x00006000 0x00206000 0x001000>,	/* ap 13 */
95			 <0x00007000 0x00207000 0x001000>,	/* ap 14 */
96			 <0x00008000 0x00208000 0x001000>,	/* ap 15 */
97			 <0x00009000 0x00209000 0x001000>,	/* ap 16 */
98			 <0x0000a000 0x0020a000 0x001000>,	/* ap 17 */
99			 <0x0000b000 0x0020b000 0x001000>,	/* ap 18 */
100			 <0x0000c000 0x0020c000 0x001000>,	/* ap 19 */
101			 <0x0000d000 0x0020d000 0x001000>,	/* ap 20 */
102			 <0x0000f000 0x0020f000 0x001000>,	/* ap 21 */
103			 <0x00010000 0x00210000 0x010000>,	/* ap 22 */
104			 <0x00030000 0x00230000 0x001000>,	/* ap 23 */
105			 <0x00031000 0x00231000 0x001000>,	/* ap 24 */
106			 <0x00032000 0x00232000 0x001000>,	/* ap 25 */
107			 <0x00033000 0x00233000 0x001000>,	/* ap 26 */
108			 <0x00034000 0x00234000 0x001000>,	/* ap 27 */
109			 <0x00035000 0x00235000 0x001000>,	/* ap 28 */
110			 <0x00036000 0x00236000 0x001000>,	/* ap 29 */
111			 <0x00037000 0x00237000 0x001000>,	/* ap 30 */
112			 <0x00038000 0x00238000 0x001000>,	/* ap 31 */
113			 <0x00039000 0x00239000 0x001000>,	/* ap 32 */
114			 <0x0003a000 0x0023a000 0x001000>,	/* ap 33 */
115			 <0x0003e000 0x0023e000 0x001000>,	/* ap 34 */
116			 <0x0003f000 0x0023f000 0x001000>,	/* ap 35 */
117			 <0x00040000 0x00240000 0x040000>,	/* ap 36 */
118			 <0x00080000 0x00280000 0x001000>,	/* ap 37 */
119			 <0x00088000 0x00288000 0x008000>,	/* ap 38 */
120			 <0x00092000 0x00292000 0x001000>,	/* ap 39 */
121			 <0x00086000 0x00286000 0x001000>,	/* ap 40 */
122			 <0x00087000 0x00287000 0x001000>,	/* ap 41 */
123			 <0x00090000 0x00290000 0x001000>,	/* ap 42 */
124			 <0x00091000 0x00291000 0x001000>;	/* ap 43 */
125
126		target-module@3000 {			/* 0x44e03000, ap 10 0a.0 */
127			compatible = "ti,sysc";
128			status = "disabled";
129			#address-cells = <1>;
130			#size-cells = <1>;
131			ranges = <0x0 0x3000 0x1000>;
132		};
133
134		target-module@5000 {			/* 0x44e05000, ap 12 30.0 */
135			compatible = "ti,sysc";
136			status = "disabled";
137			#address-cells = <1>;
138			#size-cells = <1>;
139			ranges = <0x0 0x5000 0x1000>;
140		};
141
142		target-module@7000 {			/* 0x44e07000, ap 14 20.0 */
143			compatible = "ti,sysc-omap2", "ti,sysc";
144			reg = <0x7000 0x4>,
145			      <0x7010 0x4>,
146			      <0x7114 0x4>;
147			reg-names = "rev", "sysc", "syss";
148			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
149					 SYSC_OMAP2_SOFTRESET |
150					 SYSC_OMAP2_AUTOIDLE)>;
151			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
152					<SYSC_IDLE_NO>,
153					<SYSC_IDLE_SMART>,
154					<SYSC_IDLE_SMART_WKUP>;
155			ti,syss-mask = <1>;
156			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
157			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>,
158				 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>;
159			clock-names = "fck", "dbclk";
160			#address-cells = <1>;
161			#size-cells = <1>;
162			ranges = <0x0 0x7000 0x1000>;
163
164			gpio0: gpio@0 {
165				compatible = "ti,am4372-gpio","ti,omap4-gpio";
166				reg = <0x0 0x1000>;
167				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
168				gpio-controller;
169				#gpio-cells = <2>;
170				interrupt-controller;
171				#interrupt-cells = <2>;
172				status = "disabled";
173			};
174		};
175
176		target-module@9000 {			/* 0x44e09000, ap 16 04.0 */
177			compatible = "ti,sysc-omap2", "ti,sysc";
178			reg = <0x9050 0x4>,
179			      <0x9054 0x4>,
180			      <0x9058 0x4>;
181			reg-names = "rev", "sysc", "syss";
182			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
183					 SYSC_OMAP2_SOFTRESET |
184					 SYSC_OMAP2_AUTOIDLE)>;
185			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
186					<SYSC_IDLE_NO>,
187					<SYSC_IDLE_SMART>,
188					<SYSC_IDLE_SMART_WKUP>;
189			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
190			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>;
191			clock-names = "fck";
192			#address-cells = <1>;
193			#size-cells = <1>;
194			ranges = <0x0 0x9000 0x1000>;
195
196			uart0: serial@0 {
197				compatible = "ti,am4372-uart";
198				reg = <0x0 0x2000>;
199				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
200			};
201		};
202
203		target-module@b000 {			/* 0x44e0b000, ap 18 48.0 */
204			compatible = "ti,sysc-omap2", "ti,sysc";
205			reg = <0xb000 0x8>,
206			      <0xb010 0x8>,
207			      <0xb090 0x8>;
208			reg-names = "rev", "sysc", "syss";
209			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
210					 SYSC_OMAP2_ENAWAKEUP |
211					 SYSC_OMAP2_SOFTRESET |
212					 SYSC_OMAP2_AUTOIDLE)>;
213			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
214					<SYSC_IDLE_NO>,
215					<SYSC_IDLE_SMART>,
216					<SYSC_IDLE_SMART_WKUP>;
217			ti,syss-mask = <1>;
218			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
219			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>;
220			clock-names = "fck";
221			#address-cells = <1>;
222			#size-cells = <1>;
223			ranges = <0x0 0xb000 0x1000>;
224
225			i2c0: i2c@0 {
226				compatible = "ti,am4372-i2c","ti,omap4-i2c";
227				reg = <0x0 0x1000>;
228				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
229				#address-cells = <1>;
230				#size-cells = <0>;
231				status = "disabled";
232			};
233		};
234
235		target-module@d000 {			/* 0x44e0d000, ap 20 38.0 */
236			compatible = "ti,sysc-omap4", "ti,sysc";
237			reg = <0xd000 0x4>,
238			      <0xd010 0x4>;
239			reg-names = "rev", "sysc";
240			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
241					<SYSC_IDLE_NO>,
242					<SYSC_IDLE_SMART>,
243					<SYSC_IDLE_SMART_WKUP>;
244			/* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */
245			clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>;
246			clock-names = "fck";
247			#address-cells = <1>;
248			#size-cells = <1>;
249			ranges = <0x0 0xd000 0x1000>;
250
251			tscadc: tscadc@0 {
252				compatible = "ti,am3359-tscadc";
253				reg = <0x0 0x1000>;
254				interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
255				clocks = <&adc_tsc_fck>;
256				clock-names = "fck";
257				status = "disabled";
258				dmas = <&edma 53 0>, <&edma 57 0>;
259				dma-names = "fifo0", "fifo1";
260
261				tsc {
262					compatible = "ti,am3359-tsc";
263				};
264
265				adc {
266					#io-channel-cells = <1>;
267					compatible = "ti,am3359-adc";
268				};
269
270			};
271		};
272
273		target-module@10000 {			/* 0x44e10000, ap 22 0c.0 */
274			compatible = "ti,sysc-omap4", "ti,sysc";
275			reg = <0x10000 0x4>;
276			reg-names = "rev";
277			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_CONTROL_CLKCTRL 0>;
278			clock-names = "fck";
279			ti,no-idle;
280			#address-cells = <1>;
281			#size-cells = <1>;
282			ranges = <0x0 0x10000 0x10000>;
283
284			scm: scm@0 {
285				compatible = "ti,am4-scm", "simple-bus";
286				reg = <0x0 0x4000>;
287				#address-cells = <1>;
288				#size-cells = <1>;
289				ranges = <0 0 0x4000>;
290
291				am43xx_pinmux: pinmux@800 {
292					compatible = "ti,am437-padconf",
293						     "pinctrl-single";
294					reg = <0x800 0x31c>;
295					#address-cells = <1>;
296					#size-cells = <0>;
297					#pinctrl-cells = <1>;
298					#interrupt-cells = <1>;
299					interrupt-controller;
300					pinctrl-single,register-width = <32>;
301					pinctrl-single,function-mask = <0xffffffff>;
302				};
303
304				scm_conf: scm_conf@0 {
305					compatible = "syscon", "simple-bus";
306					reg = <0x0 0x800>;
307					#address-cells = <1>;
308					#size-cells = <1>;
309
310					phy_gmii_sel: phy-gmii-sel {
311						compatible = "ti,am43xx-phy-gmii-sel";
312						reg = <0x650 0x4>;
313						#phy-cells = <2>;
314					};
315
316					scm_clocks: clocks {
317						#address-cells = <1>;
318						#size-cells = <0>;
319					};
320				};
321
322				wkup_m3_ipc: wkup_m3_ipc@1324 {
323					compatible = "ti,am4372-wkup-m3-ipc";
324					reg = <0x1324 0x44>;
325					interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
326					ti,rproc = <&wkup_m3>;
327					mboxes = <&mailbox &mbox_wkupm3>;
328				};
329
330				edma_xbar: dma-router@f90 {
331					compatible = "ti,am335x-edma-crossbar";
332					reg = <0xf90 0x40>;
333					#dma-cells = <3>;
334					dma-requests = <64>;
335					dma-masters = <&edma>;
336				};
337
338				scm_clockdomains: clockdomains {
339				};
340			};
341		};
342
343		timer1_target: target-module@31000 {	/* 0x44e31000, ap 24 40.0 */
344			compatible = "ti,sysc-omap2-timer", "ti,sysc";
345			reg = <0x31000 0x4>,
346			      <0x31010 0x4>,
347			      <0x31014 0x4>;
348			reg-names = "rev", "sysc", "syss";
349			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
350					 SYSC_OMAP2_SOFTRESET |
351					 SYSC_OMAP2_AUTOIDLE)>;
352			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
353					<SYSC_IDLE_NO>,
354					<SYSC_IDLE_SMART>;
355			ti,syss-mask = <1>;
356			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
357			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>;
358			clock-names = "fck";
359			#address-cells = <1>;
360			#size-cells = <1>;
361			ranges = <0x0 0x31000 0x1000>;
362
363			timer1: timer@0 {
364				compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
365				reg = <0x0 0x400>;
366				interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
367				ti,timer-alwon;
368				clocks = <&timer1_fck>;
369				clock-names = "fck";
370			};
371		};
372
373		target-module@33000 {			/* 0x44e33000, ap 26 18.0 */
374			compatible = "ti,sysc";
375			status = "disabled";
376			#address-cells = <1>;
377			#size-cells = <1>;
378			ranges = <0x0 0x33000 0x1000>;
379		};
380
381		target-module@35000 {			/* 0x44e35000, ap 28 50.0 */
382			compatible = "ti,sysc-omap2", "ti,sysc";
383			reg = <0x35000 0x4>,
384			      <0x35010 0x4>,
385			      <0x35014 0x4>;
386			reg-names = "rev", "sysc", "syss";
387			ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
388					 SYSC_OMAP2_SOFTRESET)>;
389			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
390					<SYSC_IDLE_NO>,
391					<SYSC_IDLE_SMART>,
392					<SYSC_IDLE_SMART_WKUP>;
393			ti,syss-mask = <1>;
394			/* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
395			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
396			clock-names = "fck";
397			#address-cells = <1>;
398			#size-cells = <1>;
399			ranges = <0x0 0x35000 0x1000>;
400
401			wdt: wdt@0 {
402				compatible = "ti,am4372-wdt","ti,omap3-wdt";
403				reg = <0x0 0x1000>;
404				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
405			};
406		};
407
408		target-module@37000 {			/* 0x44e37000, ap 30 08.0 */
409			compatible = "ti,sysc";
410			status = "disabled";
411			#address-cells = <1>;
412			#size-cells = <1>;
413			ranges = <0x0 0x37000 0x1000>;
414		};
415
416		target-module@39000 {			/* 0x44e39000, ap 32 02.0 */
417			compatible = "ti,sysc";
418			status = "disabled";
419			#address-cells = <1>;
420			#size-cells = <1>;
421			ranges = <0x0 0x39000 0x1000>;
422		};
423
424		rtc_target: target-module@3e000 {	/* 0x44e3e000, ap 34 60.0 */
425			compatible = "ti,sysc-omap4-simple", "ti,sysc";
426			reg = <0x3e074 0x4>,
427			      <0x3e078 0x4>;
428			reg-names = "rev", "sysc";
429			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
430					<SYSC_IDLE_NO>,
431					<SYSC_IDLE_SMART>,
432					<SYSC_IDLE_SMART_WKUP>;
433			/* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
434			power-domains = <&prm_rtc>;
435			clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
436			clock-names = "fck";
437			#address-cells = <1>;
438			#size-cells = <1>;
439			ranges = <0x0 0x3e000 0x1000>;
440
441			rtc: rtc@0 {
442				compatible = "ti,am4372-rtc", "ti,am3352-rtc",
443					     "ti,da830-rtc";
444				reg = <0x0 0x1000>;
445				interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
446					     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
447				clocks = <&clk_32768_ck>;
448				clock-names = "int-clk";
449				system-power-controller;
450				status = "disabled";
451			};
452		};
453
454		target-module@40000 {			/* 0x44e40000, ap 36 68.0 */
455			compatible = "ti,sysc";
456			status = "disabled";
457			#address-cells = <1>;
458			#size-cells = <1>;
459			ranges = <0x0 0x40000 0x40000>;
460		};
461
462		target-module@86000 {			/* 0x44e86000, ap 40 70.0 */
463			compatible = "ti,sysc-omap2", "ti,sysc";
464			reg = <0x86000 0x4>,
465			      <0x86004 0x4>;
466			reg-names = "rev", "sysc";
467			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
468					<SYSC_IDLE_NO>;
469			/* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */
470			clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>;
471			clock-names = "fck";
472			#address-cells = <1>;
473			#size-cells = <1>;
474			ranges = <0x0 0x86000 0x1000>;
475
476			counter32k: counter@0 {
477				compatible = "ti,am4372-counter32k","ti,omap-counter32k";
478				reg = <0x0 0x40>;
479			};
480		};
481
482		target-module@88000 {			/* 0x44e88000, ap 38 12.0 */
483			compatible = "ti,sysc";
484			status = "disabled";
485			#address-cells = <1>;
486			#size-cells = <1>;
487			ranges = <0x00000000 0x00088000 0x00008000>,
488				 <0x00008000 0x00090000 0x00001000>,
489				 <0x00009000 0x00091000 0x00001000>;
490		};
491	};
492};
493
494&l4_fast {					/* 0x4a000000 */
495	compatible = "ti,am4-l4-fast", "simple-pm-bus";
496	power-domains = <&prm_per>;
497	clocks = <&l3_clkctrl AM4_L3_L4_HS_CLKCTRL 0>;
498	clock-names = "fck";
499	reg = <0x4a000000 0x800>,
500	      <0x4a000800 0x800>,
501	      <0x4a001000 0x400>;
502	reg-names = "ap", "la", "ia0";
503	#address-cells = <1>;
504	#size-cells = <1>;
505	ranges = <0x00000000 0x4a000000 0x1000000>;	/* segment 0 */
506
507	segment@0 {					/* 0x4a000000 */
508		compatible = "simple-pm-bus";
509		#address-cells = <1>;
510		#size-cells = <1>;
511		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
512			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
513			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
514			 <0x00100000 0x00100000 0x008000>,	/* ap 3 */
515			 <0x00108000 0x00108000 0x001000>,	/* ap 4 */
516			 <0x00400000 0x00400000 0x002000>,	/* ap 5 */
517			 <0x00402000 0x00402000 0x001000>,	/* ap 6 */
518			 <0x00200000 0x00200000 0x080000>,	/* ap 7 */
519			 <0x00280000 0x00280000 0x001000>;	/* ap 8 */
520
521		target-module@100000 {			/* 0x4a100000, ap 3 04.0 */
522			compatible = "ti,sysc-omap4-simple", "ti,sysc";
523			reg = <0x101200 0x4>,
524			      <0x101208 0x4>,
525			      <0x101204 0x4>;
526			reg-names = "rev", "sysc", "syss";
527			ti,sysc-mask = <0>;
528			ti,sysc-midle = <SYSC_IDLE_FORCE>,
529					<SYSC_IDLE_NO>;
530			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
531					<SYSC_IDLE_NO>;
532			ti,syss-mask = <1>;
533			clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
534			clock-names = "fck";
535			#address-cells = <1>;
536			#size-cells = <1>;
537			ranges = <0x0 0x100000 0x8000>;
538
539			mac_sw: switch@0 {
540				compatible = "ti,am4372-cpsw-switch", "ti,cpsw-switch";
541				reg = <0x0 0x4000>;
542				ranges = <0 0 0x4000>;
543				clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>;
544				clock-names = "fck", "50mclk";
545				assigned-clocks = <&dpll_clksel_mac_clk>;
546				assigned-clock-rates = <50000000>;
547				#address-cells = <1>;
548				#size-cells = <1>;
549				syscon = <&scm_conf>;
550				status = "disabled";
551
552				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
553					     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
554					     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
555					     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
556				interrupt-names = "rx_thresh", "rx", "tx", "misc";
557
558				ethernet-ports {
559					#address-cells = <1>;
560					#size-cells = <0>;
561
562					cpsw_port1: port@1 {
563						reg = <1>;
564						label = "port1";
565						mac-address = [ 00 00 00 00 00 00 ];
566						phys = <&phy_gmii_sel 1 0>;
567					};
568
569					cpsw_port2: port@2 {
570						reg = <2>;
571						label = "port2";
572						mac-address = [ 00 00 00 00 00 00 ];
573						phys = <&phy_gmii_sel 2 0>;
574					};
575				};
576
577				davinci_mdio_sw: mdio@1000 {
578					compatible = "ti,am4372-mdio", "ti,cpsw-mdio","ti,davinci_mdio";
579					clocks = <&cpsw_125mhz_gclk>;
580					clock-names = "fck";
581					#address-cells = <1>;
582					#size-cells = <0>;
583					bus_freq = <1000000>;
584					reg = <0x1000 0x100>;
585				};
586
587				cpts {
588					clocks = <&cpsw_cpts_rft_clk>;
589					clock-names = "cpts";
590				};
591			};
592		};
593
594		target-module@200000 {			/* 0x4a200000, ap 7 02.0 */
595			compatible = "ti,sysc";
596			status = "disabled";
597			#address-cells = <1>;
598			#size-cells = <1>;
599			ranges = <0x0 0x200000 0x80000>;
600		};
601
602		target-module@400000 {			/* 0x4a400000, ap 5 08.0 */
603			compatible = "ti,sysc";
604			status = "disabled";
605			#address-cells = <1>;
606			#size-cells = <1>;
607			ranges = <0x0 0x400000 0x2000>;
608		};
609	};
610};
611
612&l4_per {					/* 0x48000000 */
613	compatible = "ti,am4-l4-per", "simple-pm-bus";
614	power-domains = <&prm_per>;
615	clocks = <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>;
616	clock-names = "fck";
617	reg = <0x48000000 0x800>,
618	      <0x48000800 0x800>,
619	      <0x48001000 0x400>,
620	      <0x48001400 0x400>,
621	      <0x48001800 0x400>,
622	      <0x48001c00 0x400>;
623	reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
624	#address-cells = <1>;
625	#size-cells = <1>;
626	ranges = <0x00000000 0x48000000 0x100000>,	/* segment 0 */
627		 <0x00100000 0x48100000 0x100000>,	/* segment 1 */
628		 <0x00200000 0x48200000 0x100000>,	/* segment 2 */
629		 <0x00300000 0x48300000 0x100000>,	/* segment 3 */
630		 <0x46000000 0x46000000 0x400000>,	/* l3 data port */
631		 <0x46400000 0x46400000 0x400000>;	/* l3 data port */
632
633	segment@0 {					/* 0x48000000 */
634		compatible = "simple-pm-bus";
635		#address-cells = <1>;
636		#size-cells = <1>;
637		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
638			 <0x00000800 0x00000800 0x000800>,	/* ap 1 */
639			 <0x00001000 0x00001000 0x000400>,	/* ap 2 */
640			 <0x00001400 0x00001400 0x000400>,	/* ap 3 */
641			 <0x00001800 0x00001800 0x000400>,	/* ap 4 */
642			 <0x00001c00 0x00001c00 0x000400>,	/* ap 5 */
643			 <0x00008000 0x00008000 0x001000>,	/* ap 6 */
644			 <0x00009000 0x00009000 0x001000>,	/* ap 7 */
645			 <0x00022000 0x00022000 0x001000>,	/* ap 8 */
646			 <0x00023000 0x00023000 0x001000>,	/* ap 9 */
647			 <0x00024000 0x00024000 0x001000>,	/* ap 10 */
648			 <0x00025000 0x00025000 0x001000>,	/* ap 11 */
649			 <0x0002a000 0x0002a000 0x001000>,	/* ap 12 */
650			 <0x0002b000 0x0002b000 0x001000>,	/* ap 13 */
651			 <0x00038000 0x00038000 0x002000>,	/* ap 14 */
652			 <0x0003a000 0x0003a000 0x001000>,	/* ap 15 */
653			 <0x0003c000 0x0003c000 0x002000>,	/* ap 16 */
654			 <0x0003e000 0x0003e000 0x001000>,	/* ap 17 */
655			 <0x00040000 0x00040000 0x001000>,	/* ap 18 */
656			 <0x00041000 0x00041000 0x001000>,	/* ap 19 */
657			 <0x00042000 0x00042000 0x001000>,	/* ap 20 */
658			 <0x00043000 0x00043000 0x001000>,	/* ap 21 */
659			 <0x00044000 0x00044000 0x001000>,	/* ap 22 */
660			 <0x00045000 0x00045000 0x001000>,	/* ap 23 */
661			 <0x00046000 0x00046000 0x001000>,	/* ap 24 */
662			 <0x00047000 0x00047000 0x001000>,	/* ap 25 */
663			 <0x00048000 0x00048000 0x001000>,	/* ap 26 */
664			 <0x00049000 0x00049000 0x001000>,	/* ap 27 */
665			 <0x0004c000 0x0004c000 0x001000>,	/* ap 28 */
666			 <0x0004d000 0x0004d000 0x001000>,	/* ap 29 */
667			 <0x00060000 0x00060000 0x001000>,	/* ap 30 */
668			 <0x00061000 0x00061000 0x001000>,	/* ap 31 */
669			 <0x00080000 0x00080000 0x010000>,	/* ap 32 */
670			 <0x00090000 0x00090000 0x001000>,	/* ap 33 */
671			 <0x00030000 0x00030000 0x001000>,	/* ap 65 */
672			 <0x00031000 0x00031000 0x001000>,	/* ap 66 */
673			 <0x0004a000 0x0004a000 0x001000>,	/* ap 71 */
674			 <0x0004b000 0x0004b000 0x001000>,	/* ap 72 */
675			 <0x000c8000 0x000c8000 0x001000>,	/* ap 73 */
676			 <0x000c9000 0x000c9000 0x001000>,	/* ap 74 */
677			 <0x000ca000 0x000ca000 0x001000>,	/* ap 77 */
678			 <0x000cb000 0x000cb000 0x001000>,	/* ap 78 */
679			 <0x00034000 0x00034000 0x001000>,	/* ap 80 */
680			 <0x00035000 0x00035000 0x001000>,	/* ap 81 */
681			 <0x00036000 0x00036000 0x001000>,	/* ap 84 */
682			 <0x00037000 0x00037000 0x001000>,	/* ap 85 */
683			 <0x46000000 0x46000000 0x400000>,	/* l3 data port */
684			 <0x46400000 0x46400000 0x400000>;	/* l3 data port */
685
686		target-module@8000 {			/* 0x48008000, ap 6 10.0 */
687			compatible = "ti,sysc";
688			status = "disabled";
689			#address-cells = <1>;
690			#size-cells = <1>;
691			ranges = <0x0 0x8000 0x1000>;
692		};
693
694		target-module@22000 {			/* 0x48022000, ap 8 0a.0 */
695			compatible = "ti,sysc-omap2", "ti,sysc";
696			reg = <0x22050 0x4>,
697			      <0x22054 0x4>,
698			      <0x22058 0x4>;
699			reg-names = "rev", "sysc", "syss";
700			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
701					 SYSC_OMAP2_SOFTRESET |
702					 SYSC_OMAP2_AUTOIDLE)>;
703			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
704					<SYSC_IDLE_NO>,
705					<SYSC_IDLE_SMART>,
706					<SYSC_IDLE_SMART_WKUP>;
707			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
708			clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>;
709			clock-names = "fck";
710			#address-cells = <1>;
711			#size-cells = <1>;
712			ranges = <0x0 0x22000 0x1000>;
713
714			uart1: serial@0 {
715				compatible = "ti,am4372-uart";
716				reg = <0x0 0x2000>;
717				interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
718				status = "disabled";
719			};
720		};
721
722		target-module@24000 {			/* 0x48024000, ap 10 1c.0 */
723			compatible = "ti,sysc-omap2", "ti,sysc";
724			reg = <0x24050 0x4>,
725			      <0x24054 0x4>,
726			      <0x24058 0x4>;
727			reg-names = "rev", "sysc", "syss";
728			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
729					 SYSC_OMAP2_SOFTRESET |
730					 SYSC_OMAP2_AUTOIDLE)>;
731			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
732					<SYSC_IDLE_NO>,
733					<SYSC_IDLE_SMART>,
734					<SYSC_IDLE_SMART_WKUP>;
735			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
736			clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>;
737			clock-names = "fck";
738			#address-cells = <1>;
739			#size-cells = <1>;
740			ranges = <0x0 0x24000 0x1000>;
741
742			uart2: serial@0 {
743				compatible = "ti,am4372-uart";
744				reg = <0x0 0x2000>;
745				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
746				status = "disabled";
747			};
748		};
749
750		target-module@2a000 {			/* 0x4802a000, ap 12 22.0 */
751			compatible = "ti,sysc-omap2", "ti,sysc";
752			reg = <0x2a000 0x8>,
753			      <0x2a010 0x8>,
754			      <0x2a090 0x8>;
755			reg-names = "rev", "sysc", "syss";
756			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
757					 SYSC_OMAP2_ENAWAKEUP |
758					 SYSC_OMAP2_SOFTRESET |
759					 SYSC_OMAP2_AUTOIDLE)>;
760			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
761					<SYSC_IDLE_NO>,
762					<SYSC_IDLE_SMART>,
763					<SYSC_IDLE_SMART_WKUP>;
764			ti,syss-mask = <1>;
765			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
766			clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>;
767			clock-names = "fck";
768			#address-cells = <1>;
769			#size-cells = <1>;
770			ranges = <0x0 0x2a000 0x1000>;
771
772			i2c1: i2c@0 {
773				compatible = "ti,am4372-i2c","ti,omap4-i2c";
774				reg = <0x0 0x1000>;
775				interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
776				#address-cells = <1>;
777				#size-cells = <0>;
778				status = "disabled";
779			};
780		};
781
782		target-module@30000 {			/* 0x48030000, ap 65 08.0 */
783			compatible = "ti,sysc-omap2", "ti,sysc";
784			reg = <0x30000 0x4>,
785			      <0x30110 0x4>,
786			      <0x30114 0x4>;
787			reg-names = "rev", "sysc", "syss";
788			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
789					 SYSC_OMAP2_SOFTRESET |
790					 SYSC_OMAP2_AUTOIDLE)>;
791			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
792					<SYSC_IDLE_NO>,
793					<SYSC_IDLE_SMART>;
794			ti,syss-mask = <1>;
795			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
796			clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>;
797			clock-names = "fck";
798			#address-cells = <1>;
799			#size-cells = <1>;
800			ranges = <0x0 0x30000 0x1000>;
801
802			spi0: spi@0 {
803				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
804				reg = <0x0 0x400>;
805				interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
806				#address-cells = <1>;
807				#size-cells = <0>;
808				status = "disabled";
809			};
810		};
811
812		target-module@34000 {			/* 0x48034000, ap 80 56.0 */
813			compatible = "ti,sysc";
814			status = "disabled";
815			#address-cells = <1>;
816			#size-cells = <1>;
817			ranges = <0x0 0x34000 0x1000>;
818		};
819
820		target-module@36000 {			/* 0x48036000, ap 84 3e.0 */
821			compatible = "ti,sysc";
822			status = "disabled";
823			#address-cells = <1>;
824			#size-cells = <1>;
825			ranges = <0x0 0x36000 0x1000>;
826		};
827
828		target-module@38000 {			/* 0x48038000, ap 14 04.0 */
829			compatible = "ti,sysc-omap4-simple", "ti,sysc";
830			reg = <0x38000 0x4>,
831			      <0x38004 0x4>;
832			reg-names = "rev", "sysc";
833			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
834					<SYSC_IDLE_NO>,
835					<SYSC_IDLE_SMART>;
836			/* Domains (P, C): per_pwrdm, l3s_clkdm */
837			clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>;
838			clock-names = "fck";
839			#address-cells = <1>;
840			#size-cells = <1>;
841			ranges = <0x0 0x38000 0x2000>,
842				 <0x46000000 0x46000000 0x400000>;
843
844			mcasp0: mcasp@0 {
845				compatible = "ti,am33xx-mcasp-audio";
846				reg = <0x0 0x2000>,
847				      <0x46000000 0x400000>;
848				reg-names = "mpu", "dat";
849				interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
850					     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
851				interrupt-names = "tx", "rx";
852				status = "disabled";
853				dmas = <&edma 8 2>,
854				       <&edma 9 2>;
855				dma-names = "tx", "rx";
856			};
857		};
858
859		target-module@3c000 {			/* 0x4803c000, ap 16 2a.0 */
860			compatible = "ti,sysc-omap4-simple", "ti,sysc";
861			reg = <0x3c000 0x4>,
862			      <0x3c004 0x4>;
863			reg-names = "rev", "sysc";
864			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
865					<SYSC_IDLE_NO>,
866					<SYSC_IDLE_SMART>;
867			/* Domains (P, C): per_pwrdm, l3s_clkdm */
868			clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>;
869			clock-names = "fck";
870			#address-cells = <1>;
871			#size-cells = <1>;
872			ranges = <0x0 0x3c000 0x2000>,
873				 <0x46400000 0x46400000 0x400000>;
874
875			mcasp1: mcasp@0 {
876				compatible = "ti,am33xx-mcasp-audio";
877				reg = <0x0 0x2000>,
878				      <0x46400000 0x400000>;
879				reg-names = "mpu", "dat";
880				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
881					     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
882				interrupt-names = "tx", "rx";
883				status = "disabled";
884				dmas = <&edma 10 2>,
885				       <&edma 11 2>;
886				dma-names = "tx", "rx";
887			};
888		};
889
890		timer2_target: target-module@40000 {	/* 0x48040000, ap 18 1e.0 */
891			compatible = "ti,sysc-omap4-timer", "ti,sysc";
892			reg = <0x40000 0x4>,
893			      <0x40010 0x4>,
894			      <0x40014 0x4>;
895			reg-names = "rev", "sysc", "syss";
896			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
897			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
898					<SYSC_IDLE_NO>,
899					<SYSC_IDLE_SMART>,
900					<SYSC_IDLE_SMART_WKUP>;
901			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
902			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>;
903			clock-names = "fck";
904			#address-cells = <1>;
905			#size-cells = <1>;
906			ranges = <0x0 0x40000 0x1000>;
907
908			timer2: timer@0  {
909				compatible = "ti,am4372-timer","ti,am335x-timer";
910				reg = <0x0 0x400>;
911				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
912				clocks = <&timer2_fck>;
913				clock-names = "fck";
914			};
915		};
916
917		target-module@42000 {			/* 0x48042000, ap 20 24.0 */
918			compatible = "ti,sysc-omap4-timer", "ti,sysc";
919			reg = <0x42000 0x4>,
920			      <0x42010 0x4>,
921			      <0x42014 0x4>;
922			reg-names = "rev", "sysc", "syss";
923			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
924			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
925					<SYSC_IDLE_NO>,
926					<SYSC_IDLE_SMART>,
927					<SYSC_IDLE_SMART_WKUP>;
928			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
929			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>;
930			clock-names = "fck";
931			#address-cells = <1>;
932			#size-cells = <1>;
933			ranges = <0x0 0x42000 0x1000>;
934
935			timer3: timer@0 {
936				compatible = "ti,am4372-timer","ti,am335x-timer";
937				reg = <0x0 0x400>;
938				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
939				status = "disabled";
940			};
941		};
942
943		target-module@44000 {			/* 0x48044000, ap 22 26.0 */
944			compatible = "ti,sysc-omap4-timer", "ti,sysc";
945			reg = <0x44000 0x4>,
946			      <0x44010 0x4>,
947			      <0x44014 0x4>;
948			reg-names = "rev", "sysc", "syss";
949			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
950			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
951					<SYSC_IDLE_NO>,
952					<SYSC_IDLE_SMART>,
953					<SYSC_IDLE_SMART_WKUP>;
954			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
955			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>;
956			clock-names = "fck";
957			#address-cells = <1>;
958			#size-cells = <1>;
959			ranges = <0x0 0x44000 0x1000>;
960
961			timer4: timer@0 {
962				compatible = "ti,am4372-timer","ti,am335x-timer";
963				reg = <0x0 0x400>;
964				interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
965				ti,timer-pwm;
966				status = "disabled";
967			};
968		};
969
970		target-module@46000 {			/* 0x48046000, ap 24 28.0 */
971			compatible = "ti,sysc-omap4-timer", "ti,sysc";
972			reg = <0x46000 0x4>,
973			      <0x46010 0x4>,
974			      <0x46014 0x4>;
975			reg-names = "rev", "sysc", "syss";
976			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
977			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
978					<SYSC_IDLE_NO>,
979					<SYSC_IDLE_SMART>,
980					<SYSC_IDLE_SMART_WKUP>;
981			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
982			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>;
983			clock-names = "fck";
984			#address-cells = <1>;
985			#size-cells = <1>;
986			ranges = <0x0 0x46000 0x1000>;
987
988			timer5: timer@0 {
989				compatible = "ti,am4372-timer","ti,am335x-timer";
990				reg = <0x0 0x400>;
991				interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
992				ti,timer-pwm;
993				status = "disabled";
994			};
995		};
996
997		target-module@48000 {			/* 0x48048000, ap 26 1a.0 */
998			compatible = "ti,sysc-omap4-timer", "ti,sysc";
999			reg = <0x48000 0x4>,
1000			      <0x48010 0x4>,
1001			      <0x48014 0x4>;
1002			reg-names = "rev", "sysc", "syss";
1003			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1004			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1005					<SYSC_IDLE_NO>,
1006					<SYSC_IDLE_SMART>,
1007					<SYSC_IDLE_SMART_WKUP>;
1008			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1009			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>;
1010			clock-names = "fck";
1011			#address-cells = <1>;
1012			#size-cells = <1>;
1013			ranges = <0x0 0x48000 0x1000>;
1014
1015			timer6: timer@0 {
1016				compatible = "ti,am4372-timer","ti,am335x-timer";
1017				reg = <0x0 0x400>;
1018				interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1019				ti,timer-pwm;
1020				status = "disabled";
1021			};
1022		};
1023
1024		target-module@4a000 {			/* 0x4804a000, ap 71 48.0 */
1025			compatible = "ti,sysc-omap4-timer", "ti,sysc";
1026			reg = <0x4a000 0x4>,
1027			      <0x4a010 0x4>,
1028			      <0x4a014 0x4>;
1029			reg-names = "rev", "sysc", "syss";
1030			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1031			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1032					<SYSC_IDLE_NO>,
1033					<SYSC_IDLE_SMART>,
1034					<SYSC_IDLE_SMART_WKUP>;
1035			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1036			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>;
1037			clock-names = "fck";
1038			#address-cells = <1>;
1039			#size-cells = <1>;
1040			ranges = <0x0 0x4a000 0x1000>;
1041
1042			timer7: timer@0 {
1043				compatible = "ti,am4372-timer","ti,am335x-timer";
1044				reg = <0x0 0x400>;
1045				interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1046				ti,timer-pwm;
1047				status = "disabled";
1048			};
1049		};
1050
1051		target-module@4c000 {			/* 0x4804c000, ap 28 36.0 */
1052			compatible = "ti,sysc-omap2", "ti,sysc";
1053			reg = <0x4c000 0x4>,
1054			      <0x4c010 0x4>,
1055			      <0x4c114 0x4>;
1056			reg-names = "rev", "sysc", "syss";
1057			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1058					 SYSC_OMAP2_SOFTRESET |
1059					 SYSC_OMAP2_AUTOIDLE)>;
1060			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1061					<SYSC_IDLE_NO>,
1062					<SYSC_IDLE_SMART>,
1063					<SYSC_IDLE_SMART_WKUP>;
1064			ti,syss-mask = <1>;
1065			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1066			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>,
1067				 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>;
1068			clock-names = "fck", "dbclk";
1069			#address-cells = <1>;
1070			#size-cells = <1>;
1071			ranges = <0x0 0x4c000 0x1000>;
1072
1073			gpio1: gpio@0 {
1074				compatible = "ti,am4372-gpio","ti,omap4-gpio";
1075				reg = <0x0 0x1000>;
1076				interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1077				gpio-controller;
1078				#gpio-cells = <2>;
1079				interrupt-controller;
1080				#interrupt-cells = <2>;
1081				status = "disabled";
1082			};
1083		};
1084
1085		target-module@60000 {			/* 0x48060000, ap 30 14.0 */
1086			compatible = "ti,sysc-omap2", "ti,sysc";
1087			reg = <0x602fc 0x4>,
1088			      <0x60110 0x4>,
1089			      <0x60114 0x4>;
1090			reg-names = "rev", "sysc", "syss";
1091			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1092					 SYSC_OMAP2_ENAWAKEUP |
1093					 SYSC_OMAP2_SOFTRESET |
1094					 SYSC_OMAP2_AUTOIDLE)>;
1095			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1096					<SYSC_IDLE_NO>,
1097					<SYSC_IDLE_SMART>;
1098			ti,syss-mask = <1>;
1099			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1100			clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>;
1101			clock-names = "fck";
1102			#address-cells = <1>;
1103			#size-cells = <1>;
1104			ranges = <0x0 0x60000 0x1000>;
1105
1106			mmc1: mmc@0 {
1107				compatible = "ti,am437-sdhci";
1108				reg = <0x0 0x1000>;
1109				ti,needs-special-reset;
1110				dmas = <&edma 24 0>,
1111					<&edma 25 0>;
1112				dma-names = "tx", "rx";
1113				interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1114				status = "disabled";
1115			};
1116		};
1117
1118		target-module@80000 {			/* 0x48080000, ap 32 18.0 */
1119			compatible = "ti,sysc-omap2", "ti,sysc";
1120			reg = <0x80000 0x4>,
1121			      <0x80010 0x4>,
1122			      <0x80014 0x4>;
1123			reg-names = "rev", "sysc", "syss";
1124			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1125					 SYSC_OMAP2_SOFTRESET |
1126					 SYSC_OMAP2_AUTOIDLE)>;
1127			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1128					<SYSC_IDLE_NO>,
1129					<SYSC_IDLE_SMART>;
1130			ti,syss-mask = <1>;
1131			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1132			clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>;
1133			clock-names = "fck";
1134			#address-cells = <1>;
1135			#size-cells = <1>;
1136			ranges = <0x0 0x80000 0x10000>;
1137
1138			elm: elm@0 {
1139				compatible = "ti,am3352-elm";
1140				reg = <0x0 0x2000>;
1141				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1142				clocks = <&l4ls_gclk>;
1143				clock-names = "fck";
1144				status = "disabled";
1145			};
1146		};
1147
1148		target-module@c8000 {			/* 0x480c8000, ap 73 06.0 */
1149			compatible = "ti,sysc-omap4", "ti,sysc";
1150			reg = <0xc8000 0x4>,
1151			      <0xc8010 0x4>;
1152			reg-names = "rev", "sysc";
1153			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1154			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1155					<SYSC_IDLE_NO>,
1156					<SYSC_IDLE_SMART>;
1157			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1158			clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>;
1159			clock-names = "fck";
1160			#address-cells = <1>;
1161			#size-cells = <1>;
1162			ranges = <0x0 0xc8000 0x1000>;
1163
1164			mailbox: mailbox@0 {
1165				compatible = "ti,omap4-mailbox";
1166				reg = <0x0 0x200>;
1167				interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1168				#mbox-cells = <1>;
1169				ti,mbox-num-users = <4>;
1170				ti,mbox-num-fifos = <8>;
1171				mbox_wkupm3: mbox-wkup-m3 {
1172					ti,mbox-send-noirq;
1173					ti,mbox-tx = <0 0 0>;
1174					ti,mbox-rx = <0 0 3>;
1175				};
1176			};
1177		};
1178
1179		target-module@ca000 {			/* 0x480ca000, ap 77 38.0 */
1180			compatible = "ti,sysc-omap2", "ti,sysc";
1181			reg = <0xca000 0x4>,
1182			      <0xca010 0x4>,
1183			      <0xca014 0x4>;
1184			reg-names = "rev", "sysc", "syss";
1185			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1186					 SYSC_OMAP2_ENAWAKEUP |
1187					 SYSC_OMAP2_SOFTRESET |
1188					 SYSC_OMAP2_AUTOIDLE)>;
1189			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1190					<SYSC_IDLE_NO>,
1191					<SYSC_IDLE_SMART>;
1192			ti,syss-mask = <1>;
1193			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1194			clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>;
1195			clock-names = "fck";
1196			#address-cells = <1>;
1197			#size-cells = <1>;
1198			ranges = <0x0 0xca000 0x1000>;
1199
1200			hwspinlock: spinlock@0 {
1201				compatible = "ti,omap4-hwspinlock";
1202				reg = <0x0 0x1000>;
1203				#hwlock-cells = <1>;
1204			};
1205		};
1206	};
1207
1208	segment@100000 {					/* 0x48100000 */
1209		compatible = "simple-pm-bus";
1210		#address-cells = <1>;
1211		#size-cells = <1>;
1212		ranges = <0x0008c000 0x0018c000 0x001000>,	/* ap 34 */
1213			 <0x0008d000 0x0018d000 0x001000>,	/* ap 35 */
1214			 <0x0008e000 0x0018e000 0x001000>,	/* ap 36 */
1215			 <0x0008f000 0x0018f000 0x001000>,	/* ap 37 */
1216			 <0x0009c000 0x0019c000 0x001000>,	/* ap 38 */
1217			 <0x0009d000 0x0019d000 0x001000>,	/* ap 39 */
1218			 <0x000a6000 0x001a6000 0x001000>,	/* ap 40 */
1219			 <0x000a7000 0x001a7000 0x001000>,	/* ap 41 */
1220			 <0x000a8000 0x001a8000 0x001000>,	/* ap 42 */
1221			 <0x000a9000 0x001a9000 0x001000>,	/* ap 43 */
1222			 <0x000aa000 0x001aa000 0x001000>,	/* ap 44 */
1223			 <0x000ab000 0x001ab000 0x001000>,	/* ap 45 */
1224			 <0x000ac000 0x001ac000 0x001000>,	/* ap 46 */
1225			 <0x000ad000 0x001ad000 0x001000>,	/* ap 47 */
1226			 <0x000ae000 0x001ae000 0x001000>,	/* ap 48 */
1227			 <0x000af000 0x001af000 0x001000>,	/* ap 49 */
1228			 <0x000cc000 0x001cc000 0x002000>,	/* ap 50 */
1229			 <0x000ce000 0x001ce000 0x002000>,	/* ap 51 */
1230			 <0x000d0000 0x001d0000 0x002000>,	/* ap 52 */
1231			 <0x000d2000 0x001d2000 0x002000>,	/* ap 53 */
1232			 <0x000d8000 0x001d8000 0x001000>,	/* ap 54 */
1233			 <0x000d9000 0x001d9000 0x001000>,	/* ap 55 */
1234			 <0x000a0000 0x001a0000 0x001000>,	/* ap 67 */
1235			 <0x000a1000 0x001a1000 0x001000>,	/* ap 68 */
1236			 <0x000a2000 0x001a2000 0x001000>,	/* ap 69 */
1237			 <0x000a3000 0x001a3000 0x001000>,	/* ap 70 */
1238			 <0x000a4000 0x001a4000 0x001000>,	/* ap 92 */
1239			 <0x000a5000 0x001a5000 0x001000>,	/* ap 93 */
1240			 <0x000c1000 0x001c1000 0x001000>,	/* ap 94 */
1241			 <0x000c2000 0x001c2000 0x001000>;	/* ap 95 */
1242
1243		target-module@8c000 {			/* 0x4818c000, ap 34 0c.0 */
1244			compatible = "ti,sysc";
1245			status = "disabled";
1246			#address-cells = <1>;
1247			#size-cells = <1>;
1248			ranges = <0x0 0x8c000 0x1000>;
1249		};
1250
1251		target-module@8e000 {			/* 0x4818e000, ap 36 02.0 */
1252			compatible = "ti,sysc";
1253			status = "disabled";
1254			#address-cells = <1>;
1255			#size-cells = <1>;
1256			ranges = <0x0 0x8e000 0x1000>;
1257		};
1258
1259		target-module@9c000 {			/* 0x4819c000, ap 38 52.0 */
1260			compatible = "ti,sysc-omap2", "ti,sysc";
1261			reg = <0x9c000 0x8>,
1262			      <0x9c010 0x8>,
1263			      <0x9c090 0x8>;
1264			reg-names = "rev", "sysc", "syss";
1265			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1266					 SYSC_OMAP2_ENAWAKEUP |
1267					 SYSC_OMAP2_SOFTRESET |
1268					 SYSC_OMAP2_AUTOIDLE)>;
1269			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1270					<SYSC_IDLE_NO>,
1271					<SYSC_IDLE_SMART>,
1272					<SYSC_IDLE_SMART_WKUP>;
1273			ti,syss-mask = <1>;
1274			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1275			clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>;
1276			clock-names = "fck";
1277			#address-cells = <1>;
1278			#size-cells = <1>;
1279			ranges = <0x0 0x9c000 0x1000>;
1280
1281			i2c2: i2c@0 {
1282				compatible = "ti,am4372-i2c","ti,omap4-i2c";
1283				reg = <0x0 0x1000>;
1284				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1285				#address-cells = <1>;
1286				#size-cells = <0>;
1287				status = "disabled";
1288			};
1289		};
1290
1291		target-module@a0000 {			/* 0x481a0000, ap 67 2c.0 */
1292			compatible = "ti,sysc-omap2", "ti,sysc";
1293			reg = <0xa0000 0x4>,
1294			      <0xa0110 0x4>,
1295			      <0xa0114 0x4>;
1296			reg-names = "rev", "sysc", "syss";
1297			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1298					 SYSC_OMAP2_SOFTRESET |
1299					 SYSC_OMAP2_AUTOIDLE)>;
1300			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1301					<SYSC_IDLE_NO>,
1302					<SYSC_IDLE_SMART>;
1303			ti,syss-mask = <1>;
1304			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1305			clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>;
1306			clock-names = "fck";
1307			#address-cells = <1>;
1308			#size-cells = <1>;
1309			ranges = <0x0 0xa0000 0x1000>;
1310
1311			spi1: spi@0 {
1312				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1313				reg = <0x0 0x400>;
1314				interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1315				#address-cells = <1>;
1316				#size-cells = <0>;
1317				status = "disabled";
1318			};
1319		};
1320
1321		target-module@a2000 {			/* 0x481a2000, ap 69 2e.0 */
1322			compatible = "ti,sysc-omap2", "ti,sysc";
1323			reg = <0xa2000 0x4>,
1324			      <0xa2110 0x4>,
1325			      <0xa2114 0x4>;
1326			reg-names = "rev", "sysc", "syss";
1327			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1328					 SYSC_OMAP2_SOFTRESET |
1329					 SYSC_OMAP2_AUTOIDLE)>;
1330			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1331					<SYSC_IDLE_NO>,
1332					<SYSC_IDLE_SMART>;
1333			ti,syss-mask = <1>;
1334			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1335			clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>;
1336			clock-names = "fck";
1337			#address-cells = <1>;
1338			#size-cells = <1>;
1339			ranges = <0x0 0xa2000 0x1000>;
1340
1341			spi2: spi@0 {
1342				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1343				reg = <0x0 0x400>;
1344				interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1345				#address-cells = <1>;
1346				#size-cells = <0>;
1347				status = "disabled";
1348			};
1349		};
1350
1351		target-module@a4000 {			/* 0x481a4000, ap 92 62.0 */
1352			compatible = "ti,sysc-omap2", "ti,sysc";
1353			reg = <0xa4000 0x4>,
1354			      <0xa4110 0x4>,
1355			      <0xa4114 0x4>;
1356			reg-names = "rev", "sysc", "syss";
1357			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1358					 SYSC_OMAP2_SOFTRESET |
1359					 SYSC_OMAP2_AUTOIDLE)>;
1360			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1361					<SYSC_IDLE_NO>,
1362					<SYSC_IDLE_SMART>;
1363			ti,syss-mask = <1>;
1364			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1365			clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>;
1366			clock-names = "fck";
1367			#address-cells = <1>;
1368			#size-cells = <1>;
1369			ranges = <0x0 0xa4000 0x1000>;
1370
1371			spi3: spi@0 {
1372				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1373				reg = <0x0 0x400>;
1374				interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1375				#address-cells = <1>;
1376				#size-cells = <0>;
1377				status = "disabled";
1378			};
1379		};
1380
1381		target-module@a6000 {			/* 0x481a6000, ap 40 16.0 */
1382			compatible = "ti,sysc-omap2", "ti,sysc";
1383			reg = <0xa6050 0x4>,
1384			      <0xa6054 0x4>,
1385			      <0xa6058 0x4>;
1386			reg-names = "rev", "sysc", "syss";
1387			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1388					 SYSC_OMAP2_SOFTRESET |
1389					 SYSC_OMAP2_AUTOIDLE)>;
1390			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1391					<SYSC_IDLE_NO>,
1392					<SYSC_IDLE_SMART>,
1393					<SYSC_IDLE_SMART_WKUP>;
1394			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1395			clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>;
1396			clock-names = "fck";
1397			#address-cells = <1>;
1398			#size-cells = <1>;
1399			ranges = <0x0 0xa6000 0x1000>;
1400
1401			uart3: serial@0 {
1402				compatible = "ti,am4372-uart";
1403				reg = <0x0 0x2000>;
1404				interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1405				status = "disabled";
1406			};
1407		};
1408
1409		target-module@a8000 {			/* 0x481a8000, ap 42 20.0 */
1410			compatible = "ti,sysc-omap2", "ti,sysc";
1411			reg = <0xa8050 0x4>,
1412			      <0xa8054 0x4>,
1413			      <0xa8058 0x4>;
1414			reg-names = "rev", "sysc", "syss";
1415			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1416					 SYSC_OMAP2_SOFTRESET |
1417					 SYSC_OMAP2_AUTOIDLE)>;
1418			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1419					<SYSC_IDLE_NO>,
1420					<SYSC_IDLE_SMART>,
1421					<SYSC_IDLE_SMART_WKUP>;
1422			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1423			clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>;
1424			clock-names = "fck";
1425			#address-cells = <1>;
1426			#size-cells = <1>;
1427			ranges = <0x0 0xa8000 0x1000>;
1428
1429			uart4: serial@0 {
1430				compatible = "ti,am4372-uart";
1431				reg = <0x0 0x2000>;
1432				interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1433				status = "disabled";
1434			};
1435		};
1436
1437		target-module@aa000 {			/* 0x481aa000, ap 44 12.0 */
1438			compatible = "ti,sysc-omap2", "ti,sysc";
1439			reg = <0xaa050 0x4>,
1440			      <0xaa054 0x4>,
1441			      <0xaa058 0x4>;
1442			reg-names = "rev", "sysc", "syss";
1443			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1444					 SYSC_OMAP2_SOFTRESET |
1445					 SYSC_OMAP2_AUTOIDLE)>;
1446			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1447					<SYSC_IDLE_NO>,
1448					<SYSC_IDLE_SMART>,
1449					<SYSC_IDLE_SMART_WKUP>;
1450			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1451			clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>;
1452			clock-names = "fck";
1453			#address-cells = <1>;
1454			#size-cells = <1>;
1455			ranges = <0x0 0xaa000 0x1000>;
1456
1457			uart5: serial@0 {
1458				compatible = "ti,am4372-uart";
1459				reg = <0x0 0x2000>;
1460				interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1461				status = "disabled";
1462			};
1463		};
1464
1465		target-module@ac000 {			/* 0x481ac000, ap 46 30.0 */
1466			compatible = "ti,sysc-omap2", "ti,sysc";
1467			reg = <0xac000 0x4>,
1468			      <0xac010 0x4>,
1469			      <0xac114 0x4>;
1470			reg-names = "rev", "sysc", "syss";
1471			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1472					 SYSC_OMAP2_SOFTRESET |
1473					 SYSC_OMAP2_AUTOIDLE)>;
1474			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1475					<SYSC_IDLE_NO>,
1476					<SYSC_IDLE_SMART>,
1477					<SYSC_IDLE_SMART_WKUP>;
1478			ti,syss-mask = <1>;
1479			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1480			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>,
1481				 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>;
1482			clock-names = "fck", "dbclk";
1483			#address-cells = <1>;
1484			#size-cells = <1>;
1485			ranges = <0x0 0xac000 0x1000>;
1486
1487			gpio2: gpio@0 {
1488				compatible = "ti,am4372-gpio","ti,omap4-gpio";
1489				reg = <0x0 0x1000>;
1490				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1491				gpio-controller;
1492				#gpio-cells = <2>;
1493				interrupt-controller;
1494				#interrupt-cells = <2>;
1495				status = "disabled";
1496			};
1497		};
1498
1499		target-module@ae000 {			/* 0x481ae000, ap 48 32.0 */
1500			compatible = "ti,sysc-omap2", "ti,sysc";
1501			reg = <0xae000 0x4>,
1502			      <0xae010 0x4>,
1503			      <0xae114 0x4>;
1504			reg-names = "rev", "sysc", "syss";
1505			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1506					 SYSC_OMAP2_SOFTRESET |
1507					 SYSC_OMAP2_AUTOIDLE)>;
1508			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1509					<SYSC_IDLE_NO>,
1510					<SYSC_IDLE_SMART>,
1511					<SYSC_IDLE_SMART_WKUP>;
1512			ti,syss-mask = <1>;
1513			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1514			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>,
1515				 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>;
1516			clock-names = "fck", "dbclk";
1517			#address-cells = <1>;
1518			#size-cells = <1>;
1519			ranges = <0x0 0xae000 0x1000>;
1520
1521			gpio3: gpio@0 {
1522				compatible = "ti,am4372-gpio","ti,omap4-gpio";
1523				reg = <0x0 0x1000>;
1524				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1525				gpio-controller;
1526				#gpio-cells = <2>;
1527				interrupt-controller;
1528				#interrupt-cells = <2>;
1529				status = "disabled";
1530			};
1531		};
1532
1533		target-module@c1000 {			/* 0x481c1000, ap 94 68.0 */
1534			compatible = "ti,sysc-omap4-timer", "ti,sysc";
1535			reg = <0xc1000 0x4>,
1536			      <0xc1010 0x4>,
1537			      <0xc1014 0x4>;
1538			reg-names = "rev", "sysc", "syss";
1539			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1540			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1541					<SYSC_IDLE_NO>,
1542					<SYSC_IDLE_SMART>,
1543					<SYSC_IDLE_SMART_WKUP>;
1544			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1545			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>;
1546			clock-names = "fck";
1547			#address-cells = <1>;
1548			#size-cells = <1>;
1549			ranges = <0x0 0xc1000 0x1000>;
1550
1551			timer8: timer@0 {
1552				compatible = "ti,am4372-timer","ti,am335x-timer";
1553				reg = <0x0 0x400>;
1554				interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
1555				status = "disabled";
1556			};
1557		};
1558
1559		target-module@cc000 {			/* 0x481cc000, ap 50 46.0 */
1560			compatible = "ti,sysc-omap4", "ti,sysc";
1561			reg = <0xcc020 0x4>;
1562			reg-names = "rev";
1563			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1564			clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>,
1565			<&dcan0_fck>;
1566			clock-names = "fck", "osc";
1567			#address-cells = <1>;
1568			#size-cells = <1>;
1569			ranges = <0x0 0xcc000 0x2000>;
1570
1571			dcan0: can@0 {
1572				compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1573				reg = <0x0 0x2000>;
1574				clocks = <&dcan0_fck>;
1575				clock-names = "fck";
1576				syscon-raminit = <&scm_conf 0x644 0>;
1577				interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1578				status = "disabled";
1579			};
1580		};
1581
1582		target-module@d0000 {			/* 0x481d0000, ap 52 3a.0 */
1583			compatible = "ti,sysc-omap4", "ti,sysc";
1584			reg = <0xd0020 0x4>;
1585			reg-names = "rev";
1586			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1587			clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>,
1588			<&dcan1_fck>;
1589			clock-names = "fck", "osc";
1590			#address-cells = <1>;
1591			#size-cells = <1>;
1592			ranges = <0x0 0xd0000 0x2000>;
1593
1594			dcan1: can@0 {
1595				compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1596				reg = <0x0 0x2000>;
1597				clocks = <&dcan1_fck>;
1598				clock-names = "fck";
1599				syscon-raminit = <&scm_conf 0x644 1>;
1600				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1601				status = "disabled";
1602			};
1603		};
1604
1605		target-module@d8000 {			/* 0x481d8000, ap 54 5e.0 */
1606			compatible = "ti,sysc-omap2", "ti,sysc";
1607			reg = <0xd82fc 0x4>,
1608			      <0xd8110 0x4>,
1609			      <0xd8114 0x4>;
1610			reg-names = "rev", "sysc", "syss";
1611			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1612					 SYSC_OMAP2_ENAWAKEUP |
1613					 SYSC_OMAP2_SOFTRESET |
1614					 SYSC_OMAP2_AUTOIDLE)>;
1615			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1616					<SYSC_IDLE_NO>,
1617					<SYSC_IDLE_SMART>;
1618			ti,syss-mask = <1>;
1619			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1620			clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>;
1621			clock-names = "fck";
1622			#address-cells = <1>;
1623			#size-cells = <1>;
1624			ranges = <0x0 0xd8000 0x1000>;
1625
1626			mmc2: mmc@0 {
1627				compatible = "ti,am437-sdhci";
1628				reg = <0x0 0x1000>;
1629				ti,needs-special-reset;
1630				dmas = <&edma 2 0>,
1631					<&edma 3 0>;
1632				dma-names = "tx", "rx";
1633				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1634				status = "disabled";
1635			};
1636		};
1637	};
1638
1639	segment@200000 {					/* 0x48200000 */
1640		compatible = "simple-pm-bus";
1641		#address-cells = <1>;
1642		#size-cells = <1>;
1643		ranges = <0x00000000 0x00200000 0x010000>;
1644
1645		target-module@0 {
1646			compatible = "ti,sysc-omap4-simple", "ti,sysc";
1647			power-domains = <&prm_mpu>;
1648			clocks = <&mpu_clkctrl AM4_MPU_MPU_CLKCTRL 0>;
1649			clock-names = "fck";
1650			ti,no-idle;
1651			#address-cells = <1>;
1652			#size-cells = <1>;
1653			ranges = <0 0 0x10000>;
1654
1655			mpu@0 {
1656				compatible = "ti,omap4-mpu";
1657				pm-sram = <&pm_sram_code
1658					   &pm_sram_data>;
1659			};
1660		};
1661	};
1662
1663	segment@300000 {					/* 0x48300000 */
1664		compatible = "simple-pm-bus";
1665		#address-cells = <1>;
1666		#size-cells = <1>;
1667		ranges = <0x00000000 0x00300000 0x001000>,	/* ap 56 */
1668			 <0x00001000 0x00301000 0x001000>,	/* ap 57 */
1669			 <0x00002000 0x00302000 0x001000>,	/* ap 58 */
1670			 <0x00003000 0x00303000 0x001000>,	/* ap 59 */
1671			 <0x00004000 0x00304000 0x001000>,	/* ap 60 */
1672			 <0x00005000 0x00305000 0x001000>,	/* ap 61 */
1673			 <0x00018000 0x00318000 0x004000>,	/* ap 62 */
1674			 <0x0001c000 0x0031c000 0x001000>,	/* ap 63 */
1675			 <0x00010000 0x00310000 0x002000>,	/* ap 64 */
1676			 <0x00028000 0x00328000 0x001000>,	/* ap 75 */
1677			 <0x00029000 0x00329000 0x001000>,	/* ap 76 */
1678			 <0x00012000 0x00312000 0x001000>,	/* ap 79 */
1679			 <0x00020000 0x00320000 0x001000>,	/* ap 82 */
1680			 <0x00021000 0x00321000 0x001000>,	/* ap 83 */
1681			 <0x00026000 0x00326000 0x001000>,	/* ap 86 */
1682			 <0x00027000 0x00327000 0x001000>,	/* ap 87 */
1683			 <0x0002a000 0x0032a000 0x000400>,	/* ap 88 */
1684			 <0x0002c000 0x0032c000 0x001000>,	/* ap 89 */
1685			 <0x00013000 0x00313000 0x001000>,	/* ap 90 */
1686			 <0x00014000 0x00314000 0x001000>,	/* ap 91 */
1687			 <0x00006000 0x00306000 0x001000>,	/* ap 96 */
1688			 <0x00007000 0x00307000 0x001000>,	/* ap 97 */
1689			 <0x00008000 0x00308000 0x001000>,	/* ap 98 */
1690			 <0x00009000 0x00309000 0x001000>,	/* ap 99 */
1691			 <0x0000a000 0x0030a000 0x001000>,	/* ap 100 */
1692			 <0x0000b000 0x0030b000 0x001000>,	/* ap 101 */
1693			 <0x0003d000 0x0033d000 0x001000>,	/* ap 102 */
1694			 <0x0003e000 0x0033e000 0x001000>,	/* ap 103 */
1695			 <0x0003f000 0x0033f000 0x001000>,	/* ap 104 */
1696			 <0x00040000 0x00340000 0x001000>,	/* ap 105 */
1697			 <0x00041000 0x00341000 0x001000>,	/* ap 106 */
1698			 <0x00042000 0x00342000 0x001000>,	/* ap 107 */
1699			 <0x00045000 0x00345000 0x001000>,	/* ap 108 */
1700			 <0x00046000 0x00346000 0x001000>,	/* ap 109 */
1701			 <0x00047000 0x00347000 0x001000>,	/* ap 110 */
1702			 <0x00048000 0x00348000 0x001000>,	/* ap 111 */
1703			 <0x000f2000 0x003f2000 0x002000>,	/* ap 112 */
1704			 <0x000f4000 0x003f4000 0x001000>,	/* ap 113 */
1705			 <0x0004c000 0x0034c000 0x002000>,	/* ap 114 */
1706			 <0x0004e000 0x0034e000 0x001000>,	/* ap 115 */
1707			 <0x00022000 0x00322000 0x001000>,	/* ap 116 */
1708			 <0x00023000 0x00323000 0x001000>,	/* ap 117 */
1709			 <0x000f0000 0x003f0000 0x001000>,	/* ap 118 */
1710			 <0x0002a400 0x0032a400 0x000400>,	/* ap 119 */
1711			 <0x0002a800 0x0032a800 0x000400>,	/* ap 120 */
1712			 <0x0002ac00 0x0032ac00 0x000400>,	/* ap 121 */
1713			 <0x0002b000 0x0032b000 0x001000>,	/* ap 122 */
1714			 <0x00080000 0x00380000 0x020000>,	/* ap 123 */
1715			 <0x000a0000 0x003a0000 0x001000>,	/* ap 124 */
1716			 <0x000a8000 0x003a8000 0x008000>,	/* ap 125 */
1717			 <0x000b0000 0x003b0000 0x001000>,	/* ap 126 */
1718			 <0x000c0000 0x003c0000 0x020000>,	/* ap 127 */
1719			 <0x000e0000 0x003e0000 0x001000>,	/* ap 128 */
1720			 <0x000e8000 0x003e8000 0x008000>;	/* ap 129 */
1721
1722		target-module@0 {			/* 0x48300000, ap 56 40.0 */
1723			compatible = "ti,sysc-omap4", "ti,sysc";
1724			reg = <0x0 0x4>,
1725			      <0x4 0x4>;
1726			reg-names = "rev", "sysc";
1727			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1728					<SYSC_IDLE_NO>,
1729					<SYSC_IDLE_SMART>,
1730					<SYSC_IDLE_SMART_WKUP>;
1731			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1732					<SYSC_IDLE_NO>,
1733					<SYSC_IDLE_SMART>,
1734					<SYSC_IDLE_SMART_WKUP>;
1735			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1736			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>;
1737			clock-names = "fck";
1738			#address-cells = <1>;
1739			#size-cells = <1>;
1740			ranges = <0x0 0x0 0x1000>;
1741
1742			epwmss0: epwmss@0 {
1743				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1744				reg = <0x0 0x10>;
1745				#address-cells = <1>;
1746				#size-cells = <1>;
1747				ranges = <0 0 0x1000>;
1748				status = "disabled";
1749
1750				ecap0: pwm@100 {
1751					compatible = "ti,am4372-ecap",
1752						     "ti,am3352-ecap";
1753					#pwm-cells = <3>;
1754					reg = <0x100 0x80>;
1755					clocks = <&l4ls_gclk>;
1756					clock-names = "fck";
1757					status = "disabled";
1758				};
1759
1760				ehrpwm0: pwm@200 {
1761					compatible = "ti,am4372-ehrpwm",
1762						     "ti,am3352-ehrpwm";
1763					#pwm-cells = <3>;
1764					reg = <0x200 0x80>;
1765					clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1766					clock-names = "tbclk", "fck";
1767					status = "disabled";
1768				};
1769			};
1770		};
1771
1772		target-module@2000 {			/* 0x48302000, ap 58 4a.0 */
1773			compatible = "ti,sysc-omap4", "ti,sysc";
1774			reg = <0x2000 0x4>,
1775			      <0x2004 0x4>;
1776			reg-names = "rev", "sysc";
1777			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1778					<SYSC_IDLE_NO>,
1779					<SYSC_IDLE_SMART>,
1780					<SYSC_IDLE_SMART_WKUP>;
1781			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1782					<SYSC_IDLE_NO>,
1783					<SYSC_IDLE_SMART>,
1784					<SYSC_IDLE_SMART_WKUP>;
1785			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1786			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>;
1787			clock-names = "fck";
1788			#address-cells = <1>;
1789			#size-cells = <1>;
1790			ranges = <0x0 0x2000 0x1000>;
1791
1792			epwmss1: epwmss@0 {
1793				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1794				reg = <0x0 0x10>;
1795				#address-cells = <1>;
1796				#size-cells = <1>;
1797				ranges = <0 0 0x1000>;
1798				status = "disabled";
1799
1800				ecap1: pwm@100 {
1801					compatible = "ti,am4372-ecap",
1802						     "ti,am3352-ecap";
1803					#pwm-cells = <3>;
1804					reg = <0x100 0x80>;
1805					clocks = <&l4ls_gclk>;
1806					clock-names = "fck";
1807					status = "disabled";
1808				};
1809
1810				ehrpwm1: pwm@200 {
1811					compatible = "ti,am4372-ehrpwm",
1812						     "ti,am3352-ehrpwm";
1813					#pwm-cells = <3>;
1814					reg = <0x200 0x80>;
1815					clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1816					clock-names = "tbclk", "fck";
1817					status = "disabled";
1818				};
1819			};
1820		};
1821
1822		target-module@4000 {			/* 0x48304000, ap 60 44.0 */
1823			compatible = "ti,sysc-omap4", "ti,sysc";
1824			reg = <0x4000 0x4>,
1825			      <0x4004 0x4>;
1826			reg-names = "rev", "sysc";
1827			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1828					<SYSC_IDLE_NO>,
1829					<SYSC_IDLE_SMART>,
1830					<SYSC_IDLE_SMART_WKUP>;
1831			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1832					<SYSC_IDLE_NO>,
1833					<SYSC_IDLE_SMART>,
1834					<SYSC_IDLE_SMART_WKUP>;
1835			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1836			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>;
1837			clock-names = "fck";
1838			#address-cells = <1>;
1839			#size-cells = <1>;
1840			ranges = <0x0 0x4000 0x1000>;
1841
1842			epwmss2: epwmss@0 {
1843				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1844				reg = <0x0 0x10>;
1845				#address-cells = <1>;
1846				#size-cells = <1>;
1847				ranges = <0 0 0x1000>;
1848				status = "disabled";
1849
1850				ecap2: pwm@100 {
1851					compatible = "ti,am4372-ecap",
1852						     "ti,am3352-ecap";
1853					#pwm-cells = <3>;
1854					reg = <0x100 0x80>;
1855					clocks = <&l4ls_gclk>;
1856					clock-names = "fck";
1857					status = "disabled";
1858				};
1859
1860				ehrpwm2: pwm@200 {
1861					compatible = "ti,am4372-ehrpwm",
1862						     "ti,am3352-ehrpwm";
1863					#pwm-cells = <3>;
1864					reg = <0x200 0x80>;
1865					clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
1866					clock-names = "tbclk", "fck";
1867					status = "disabled";
1868				};
1869			};
1870		};
1871
1872		target-module@6000 {			/* 0x48306000, ap 96 58.0 */
1873			compatible = "ti,sysc-omap4", "ti,sysc";
1874			reg = <0x6000 0x4>,
1875			      <0x6004 0x4>;
1876			reg-names = "rev", "sysc";
1877			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1878					<SYSC_IDLE_NO>,
1879					<SYSC_IDLE_SMART>,
1880					<SYSC_IDLE_SMART_WKUP>;
1881			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1882					<SYSC_IDLE_NO>,
1883					<SYSC_IDLE_SMART>,
1884					<SYSC_IDLE_SMART_WKUP>;
1885			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1886			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>;
1887			clock-names = "fck";
1888			#address-cells = <1>;
1889			#size-cells = <1>;
1890			ranges = <0x0 0x6000 0x1000>;
1891
1892			epwmss3: epwmss@0 {
1893				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1894				reg = <0x0 0x10>;
1895				#address-cells = <1>;
1896				#size-cells = <1>;
1897				ranges = <0 0 0x1000>;
1898				status = "disabled";
1899
1900				ehrpwm3: pwm@200 {
1901					compatible = "ti,am4372-ehrpwm",
1902						     "ti,am3352-ehrpwm";
1903					#pwm-cells = <3>;
1904					reg = <0x200 0x80>;
1905					clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
1906					clock-names = "tbclk", "fck";
1907					status = "disabled";
1908				};
1909			};
1910		};
1911
1912		target-module@8000 {			/* 0x48308000, ap 98 54.0 */
1913			compatible = "ti,sysc-omap4", "ti,sysc";
1914			reg = <0x8000 0x4>,
1915			      <0x8004 0x4>;
1916			reg-names = "rev", "sysc";
1917			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1918					<SYSC_IDLE_NO>,
1919					<SYSC_IDLE_SMART>,
1920					<SYSC_IDLE_SMART_WKUP>;
1921			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1922					<SYSC_IDLE_NO>,
1923					<SYSC_IDLE_SMART>,
1924					<SYSC_IDLE_SMART_WKUP>;
1925			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1926			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>;
1927			clock-names = "fck";
1928			#address-cells = <1>;
1929			#size-cells = <1>;
1930			ranges = <0x0 0x8000 0x1000>;
1931
1932			epwmss4: epwmss@0 {
1933				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1934				reg = <0x0 0x10>;
1935				#address-cells = <1>;
1936				#size-cells = <1>;
1937				ranges = <0 0 0x1000>;
1938				status = "disabled";
1939
1940				ehrpwm4: pwm@48308200 {
1941					compatible = "ti,am4372-ehrpwm",
1942						     "ti,am3352-ehrpwm";
1943					#pwm-cells = <3>;
1944					reg = <0x200 0x80>;
1945					clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
1946					clock-names = "tbclk", "fck";
1947					status = "disabled";
1948				};
1949			};
1950		};
1951
1952		target-module@a000 {			/* 0x4830a000, ap 100 60.0 */
1953			compatible = "ti,sysc-omap4", "ti,sysc";
1954			reg = <0xa000 0x4>,
1955			      <0xa004 0x4>;
1956			reg-names = "rev", "sysc";
1957			ti,sysc-midle = <SYSC_IDLE_FORCE>,
1958					<SYSC_IDLE_NO>,
1959					<SYSC_IDLE_SMART>,
1960					<SYSC_IDLE_SMART_WKUP>;
1961			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1962					<SYSC_IDLE_NO>,
1963					<SYSC_IDLE_SMART>,
1964					<SYSC_IDLE_SMART_WKUP>;
1965			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
1966			clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>;
1967			clock-names = "fck";
1968			#address-cells = <1>;
1969			#size-cells = <1>;
1970			ranges = <0x0 0xa000 0x1000>;
1971
1972			epwmss5: epwmss@0 {
1973				compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1974				reg = <0x0 0x10>;
1975				#address-cells = <1>;
1976				#size-cells = <1>;
1977				ranges = <0 0 0x1000>;
1978				status = "disabled";
1979
1980				ehrpwm5: pwm@200 {
1981					compatible = "ti,am4372-ehrpwm",
1982						     "ti,am3352-ehrpwm";
1983					#pwm-cells = <3>;
1984					reg = <0x200 0x80>;
1985					clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
1986					clock-names = "tbclk", "fck";
1987					status = "disabled";
1988				};
1989			};
1990		};
1991
1992		target-module@10000 {			/* 0x48310000, ap 64 4e.1 */
1993			compatible = "ti,sysc-omap2", "ti,sysc";
1994			reg = <0x11fe0 0x4>,
1995			      <0x11fe4 0x4>;
1996			reg-names = "rev", "sysc";
1997			ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
1998			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1999					<SYSC_IDLE_NO>;
2000			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2001			clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>;
2002			clock-names = "fck";
2003			#address-cells = <1>;
2004			#size-cells = <1>;
2005			ranges = <0x0 0x10000 0x2000>;
2006
2007			rng: rng@0 {
2008				compatible = "ti,omap4-rng";
2009				reg = <0x0 0x2000>;
2010				interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
2011			};
2012		};
2013
2014		target-module@13000 {			/* 0x48313000, ap 90 50.0 */
2015			compatible = "ti,sysc";
2016			status = "disabled";
2017			#address-cells = <1>;
2018			#size-cells = <1>;
2019			ranges = <0x0 0x13000 0x1000>;
2020		};
2021
2022		target-module@18000 {			/* 0x48318000, ap 62 4c.0 */
2023			compatible = "ti,sysc";
2024			status = "disabled";
2025			#address-cells = <1>;
2026			#size-cells = <1>;
2027			ranges = <0x0 0x18000 0x4000>;
2028		};
2029
2030		target-module@20000 {			/* 0x48320000, ap 82 34.0 */
2031			compatible = "ti,sysc-omap2", "ti,sysc";
2032			reg = <0x20000 0x4>,
2033			      <0x20010 0x4>,
2034			      <0x20114 0x4>;
2035			reg-names = "rev", "sysc", "syss";
2036			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2037					 SYSC_OMAP2_SOFTRESET |
2038					 SYSC_OMAP2_AUTOIDLE)>;
2039			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2040					<SYSC_IDLE_NO>,
2041					<SYSC_IDLE_SMART>,
2042					<SYSC_IDLE_SMART_WKUP>;
2043			ti,syss-mask = <1>;
2044			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2045			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>,
2046				 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>;
2047			clock-names = "fck", "dbclk";
2048			#address-cells = <1>;
2049			#size-cells = <1>;
2050			ranges = <0x0 0x20000 0x1000>;
2051
2052			gpio4: gpio@0 {
2053				compatible = "ti,am4372-gpio","ti,omap4-gpio";
2054				reg = <0x0 0x1000>;
2055				interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
2056				gpio-controller;
2057				#gpio-cells = <2>;
2058				interrupt-controller;
2059				#interrupt-cells = <2>;
2060				status = "disabled";
2061			};
2062		};
2063
2064		gpio5_target: target-module@22000 {		/* 0x48322000, ap 116 64.0 */
2065			compatible = "ti,sysc-omap2", "ti,sysc";
2066			reg = <0x22000 0x4>,
2067			      <0x22010 0x4>,
2068			      <0x22114 0x4>;
2069			reg-names = "rev", "sysc", "syss";
2070			ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2071					 SYSC_OMAP2_SOFTRESET |
2072					 SYSC_OMAP2_AUTOIDLE)>;
2073			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2074					<SYSC_IDLE_NO>,
2075					<SYSC_IDLE_SMART>,
2076					<SYSC_IDLE_SMART_WKUP>;
2077			ti,syss-mask = <1>;
2078			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2079			clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>,
2080				 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>;
2081			clock-names = "fck", "dbclk";
2082			#address-cells = <1>;
2083			#size-cells = <1>;
2084			ranges = <0x0 0x22000 0x1000>;
2085
2086			gpio5: gpio@0 {
2087				compatible = "ti,am4372-gpio","ti,omap4-gpio";
2088				reg = <0x0 0x1000>;
2089				interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2090				gpio-controller;
2091				#gpio-cells = <2>;
2092				interrupt-controller;
2093				#interrupt-cells = <2>;
2094				status = "disabled";
2095			};
2096		};
2097
2098		target-module@26000 {			/* 0x48326000, ap 86 66.0 */
2099			compatible = "ti,sysc-omap4", "ti,sysc";
2100			reg = <0x26000 0x4>,
2101			      <0x26104 0x4>;
2102			reg-names = "rev", "sysc";
2103			ti,sysc-midle = <SYSC_IDLE_FORCE>,
2104					<SYSC_IDLE_NO>,
2105					<SYSC_IDLE_SMART>;
2106			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2107					<SYSC_IDLE_NO>,
2108					<SYSC_IDLE_SMART>;
2109			/* Domains (P, C): per_pwrdm, l3s_clkdm */
2110			clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>;
2111			clock-names = "fck";
2112			#address-cells = <1>;
2113			#size-cells = <1>;
2114			ranges = <0x0 0x26000 0x1000>;
2115
2116			vpfe0: vpfe@0 {
2117				compatible = "ti,am437x-vpfe";
2118				reg = <0x0 0x2000>;
2119				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2120				status = "disabled";
2121			};
2122		};
2123
2124		target-module@28000 {			/* 0x48328000, ap 75 0e.0 */
2125			compatible = "ti,sysc-omap4", "ti,sysc";
2126			reg = <0x28000 0x4>,
2127			      <0x28104 0x4>;
2128			reg-names = "rev", "sysc";
2129			ti,sysc-midle = <SYSC_IDLE_FORCE>,
2130					<SYSC_IDLE_NO>,
2131					<SYSC_IDLE_SMART>;
2132			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2133					<SYSC_IDLE_NO>,
2134					<SYSC_IDLE_SMART>;
2135			/* Domains (P, C): per_pwrdm, l3s_clkdm */
2136			clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>;
2137			clock-names = "fck";
2138			#address-cells = <1>;
2139			#size-cells = <1>;
2140			ranges = <0x0 0x28000 0x1000>;
2141
2142			vpfe1: vpfe@0 {
2143				compatible = "ti,am437x-vpfe";
2144				reg = <0x0 0x2000>;
2145				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
2146				status = "disabled";
2147			};
2148		};
2149
2150		target-module@2a000 {			/* 0x4832a000, ap 88 3c.0 */
2151			compatible = "ti,sysc-omap2", "ti,sysc";
2152			reg = <0x2a000 0x4>,
2153			      <0x2a010 0x4>,
2154			      <0x2a014 0x4>;
2155			reg-names = "rev", "sysc", "syss";
2156			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2157					 SYSC_OMAP2_AUTOIDLE)>;
2158			ti,syss-mask = <1>;
2159			/* Domains (P, C): per_pwrdm, dss_clkdm */
2160			clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2161			clock-names = "fck";
2162			#address-cells = <1>;
2163			#size-cells = <1>;
2164			ranges = <0x00000000 0x0002a000 0x00000400>,
2165				 <0x00000400 0x0002a400 0x00000400>,
2166				 <0x00000800 0x0002a800 0x00000400>,
2167				 <0x00000c00 0x0002ac00 0x00000400>,
2168				 <0x00001000 0x0002b000 0x00001000>;
2169
2170			dss: dss@0 {
2171				compatible = "ti,omap3-dss";
2172				reg = <0 0x200>;
2173				status = "disabled";
2174				clocks = <&disp_clk>;
2175				clock-names = "fck";
2176				#address-cells = <1>;
2177				#size-cells = <1>;
2178				ranges = <0x00000000 0x00000000 0x00000400>,
2179					 <0x00000400 0x00000400 0x00000400>,
2180					 <0x00000800 0x00000800 0x00000400>,
2181					 <0x00000c00 0x00000c00 0x00000400>,
2182					 <0x00001000 0x00001000 0x00001000>;
2183
2184				target-module@400 {
2185					compatible = "ti,sysc-omap2", "ti,sysc";
2186					reg = <0x400 0x4>,
2187					      <0x410 0x4>,
2188					      <0x414 0x4>;
2189					reg-names = "rev", "sysc", "syss";
2190					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2191							<SYSC_IDLE_NO>,
2192							<SYSC_IDLE_SMART>;
2193					ti,sysc-midle = <SYSC_IDLE_FORCE>,
2194							<SYSC_IDLE_NO>,
2195							<SYSC_IDLE_SMART>;
2196					ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2197							 SYSC_OMAP2_ENAWAKEUP |
2198							 SYSC_OMAP2_SOFTRESET |
2199							 SYSC_OMAP2_AUTOIDLE)>;
2200					ti,syss-mask = <1>;
2201					clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2202					clock-names = "fck";
2203					#address-cells = <1>;
2204					#size-cells = <1>;
2205					ranges = <0 0x400 0x400>;
2206
2207					dispc: dispc@0 {
2208						compatible = "ti,omap3-dispc";
2209						reg = <0 0x400>;
2210						interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
2211						clocks = <&disp_clk>;
2212						clock-names = "fck";
2213
2214						max-memory-bandwidth = <230000000>;
2215					};
2216				};
2217
2218				target-module@800 {
2219					compatible = "ti,sysc-omap2", "ti,sysc";
2220					reg = <0x800 0x4>,
2221					      <0x810 0x4>,
2222					      <0x814 0x4>;
2223					reg-names = "rev", "sysc", "syss";
2224					ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2225							<SYSC_IDLE_NO>,
2226							<SYSC_IDLE_SMART>;
2227					ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2228							 SYSC_OMAP2_AUTOIDLE)>;
2229					ti,syss-mask = <1>;
2230					clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2231					clock-names = "fck";
2232					#address-cells = <1>;
2233					#size-cells = <1>;
2234					ranges = <0 0x800 0x400>;
2235
2236					rfbi: rfbi@0 {
2237						compatible = "ti,omap3-rfbi";
2238						reg = <0 0x100>;
2239						clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2240						clock-names = "fck";
2241						status = "disabled";
2242					};
2243				};
2244			};
2245		};
2246
2247		target-module@3d000 {			/* 0x4833d000, ap 102 6e.0 */
2248			compatible = "ti,sysc-omap4-timer", "ti,sysc";
2249			reg = <0x3d000 0x4>,
2250			      <0x3d010 0x4>,
2251			      <0x3d014 0x4>;
2252			reg-names = "rev", "sysc", "syss";
2253			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2254			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2255					<SYSC_IDLE_NO>,
2256					<SYSC_IDLE_SMART>,
2257					<SYSC_IDLE_SMART_WKUP>;
2258			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2259			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>;
2260			clock-names = "fck";
2261			#address-cells = <1>;
2262			#size-cells = <1>;
2263			ranges = <0x0 0x3d000 0x1000>;
2264
2265			timer9: timer@0 {
2266				compatible = "ti,am4372-timer","ti,am335x-timer";
2267				reg = <0x0 0x400>;
2268				interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
2269				status = "disabled";
2270			};
2271		};
2272
2273		target-module@3f000 {			/* 0x4833f000, ap 104 5c.0 */
2274			compatible = "ti,sysc-omap4-timer", "ti,sysc";
2275			reg = <0x3f000 0x4>,
2276			      <0x3f010 0x4>,
2277			      <0x3f014 0x4>;
2278			reg-names = "rev", "sysc", "syss";
2279			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2280			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2281					<SYSC_IDLE_NO>,
2282					<SYSC_IDLE_SMART>,
2283					<SYSC_IDLE_SMART_WKUP>;
2284			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2285			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>;
2286			clock-names = "fck";
2287			#address-cells = <1>;
2288			#size-cells = <1>;
2289			ranges = <0x0 0x3f000 0x1000>;
2290
2291			timer10: timer@0 {
2292				compatible = "ti,am4372-timer","ti,am335x-timer";
2293				reg = <0x0 0x400>;
2294				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
2295				status = "disabled";
2296			};
2297		};
2298
2299		target-module@41000 {			/* 0x48341000, ap 106 76.0 */
2300			compatible = "ti,sysc-omap4-timer", "ti,sysc";
2301			reg = <0x41000 0x4>,
2302			      <0x41010 0x4>,
2303			      <0x41014 0x4>;
2304			reg-names = "rev", "sysc", "syss";
2305			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2306			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2307					<SYSC_IDLE_NO>,
2308					<SYSC_IDLE_SMART>,
2309					<SYSC_IDLE_SMART_WKUP>;
2310			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2311			clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>;
2312			clock-names = "fck";
2313			#address-cells = <1>;
2314			#size-cells = <1>;
2315			ranges = <0x0 0x41000 0x1000>;
2316
2317			timer11: timer@0 {
2318				compatible = "ti,am4372-timer","ti,am335x-timer";
2319				reg = <0x0 0x400>;
2320				interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
2321				status = "disabled";
2322			};
2323		};
2324
2325		target-module@45000 {			/* 0x48345000, ap 108 6a.0 */
2326			compatible = "ti,sysc-omap2", "ti,sysc";
2327			reg = <0x45000 0x4>,
2328			      <0x45110 0x4>,
2329			      <0x45114 0x4>;
2330			reg-names = "rev", "sysc", "syss";
2331			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2332					 SYSC_OMAP2_SOFTRESET |
2333					 SYSC_OMAP2_AUTOIDLE)>;
2334			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2335					<SYSC_IDLE_NO>,
2336					<SYSC_IDLE_SMART>;
2337			ti,syss-mask = <1>;
2338			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2339			clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>;
2340			clock-names = "fck";
2341			#address-cells = <1>;
2342			#size-cells = <1>;
2343			ranges = <0x0 0x45000 0x1000>;
2344
2345			spi4: spi@0 {
2346				compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
2347				reg = <0x0 0x400>;
2348				interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
2349				#address-cells = <1>;
2350				#size-cells = <0>;
2351				status = "disabled";
2352			};
2353		};
2354
2355		target-module@47000 {			/* 0x48347000, ap 110 70.0 */
2356			compatible = "ti,sysc-omap2", "ti,sysc";
2357			reg = <0x47000 0x4>,
2358			      <0x47014 0x4>,
2359			      <0x47018 0x4>;
2360			reg-names = "rev", "sysc", "syss";
2361			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2362					 SYSC_OMAP2_AUTOIDLE)>;
2363			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2364			clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>;
2365			clock-names = "fck";
2366			#address-cells = <1>;
2367			#size-cells = <1>;
2368			ranges = <0x0 0x47000 0x1000>;
2369
2370			hdq: hdq@0 {
2371				compatible = "ti,am4372-hdq";
2372				reg = <0x0 0x1000>;
2373				interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
2374				clocks = <&func_12m_clk>;
2375				clock-names = "fck";
2376				status = "disabled";
2377			};
2378		};
2379
2380		target-module@4c000 {			/* 0x4834c000, ap 114 72.0 */
2381			compatible = "ti,sysc-omap4", "ti,sysc";
2382			reg = <0x4c000 0x4>,
2383			      <0x4c010 0x4>;
2384			reg-names = "rev", "sysc";
2385			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2386					<SYSC_IDLE_NO>,
2387					<SYSC_IDLE_SMART>;
2388			clocks = <&l3s_clkctrl AM4_L3S_ADC1_CLKCTRL 0>;
2389			clock-names = "fck";
2390			#address-cells = <1>;
2391			#size-cells = <1>;
2392			ranges = <0x0 0x4c000 0x2000>;
2393
2394			magadc: magadc@0 {
2395				compatible = "ti,am4372-magadc";
2396				reg = <0x0 0x2000>;
2397				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
2398				clocks = <&adc_mag_fck>;
2399				clock-names = "fck";
2400				dmas = <&edma 54 0>, <&edma 55 0>;
2401				dma-names = "fifo0", "fifo1";
2402				status = "disabled";
2403
2404				mag {
2405					compatible = "ti,am4372-mag";
2406				};
2407
2408				adc {
2409					#io-channel-cells = <1>;
2410					compatible = "ti,am4372-adc";
2411				};
2412			};
2413		};
2414
2415		target-module@80000 {			/* 0x48380000, ap 123 42.0 */
2416			compatible = "ti,sysc-omap4", "ti,sysc";
2417			reg = <0x80000 0x4>,
2418			      <0x80010 0x4>;
2419			reg-names = "rev", "sysc";
2420			ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2421			ti,sysc-midle = <SYSC_IDLE_FORCE>,
2422					<SYSC_IDLE_NO>,
2423					<SYSC_IDLE_SMART>,
2424					<SYSC_IDLE_SMART_WKUP>;
2425			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2426					<SYSC_IDLE_NO>,
2427					<SYSC_IDLE_SMART>,
2428					<SYSC_IDLE_SMART_WKUP>;
2429			/* Domains (P, C): per_pwrdm, l3s_clkdm */
2430			clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>;
2431			clock-names = "fck";
2432			#address-cells = <1>;
2433			#size-cells = <1>;
2434			ranges = <0x0 0x80000 0x20000>;
2435
2436			dwc3_1: omap_dwc3@0 {
2437				compatible = "ti,am437x-dwc3";
2438				reg = <0x0 0x10000>;
2439				interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2440				#address-cells = <1>;
2441				#size-cells = <1>;
2442				utmi-mode = <1>;
2443				ranges = <0 0 0x20000>;
2444
2445				usb1: usb@10000 {
2446					compatible = "snps,dwc3";
2447					reg = <0x10000 0x10000>;
2448					interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2449						     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2450						     <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2451					interrupt-names = "peripheral",
2452							  "host",
2453							  "otg";
2454					phys = <&usb2_phy1>;
2455					phy-names = "usb2-phy";
2456					maximum-speed = "high-speed";
2457					dr_mode = "otg";
2458					status = "disabled";
2459					snps,dis_u3_susphy_quirk;
2460					snps,dis_u2_susphy_quirk;
2461				};
2462			};
2463		};
2464
2465		target-module@a8000 {			/* 0x483a8000, ap 125 6c.0 */
2466			compatible = "ti,sysc-omap4", "ti,sysc";
2467			reg = <0xa8000 0x4>;
2468			reg-names = "rev";
2469			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2470			clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>;
2471			clock-names = "fck";
2472			#address-cells = <1>;
2473			#size-cells = <1>;
2474			ranges = <0x0 0xa8000 0x8000>;
2475
2476			ocp2scp0: ocp2scp@0 {
2477				compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2478				#address-cells = <1>;
2479				#size-cells = <1>;
2480				ranges = <0 0 0x8000>;
2481
2482				usb2_phy1: phy@8000 {
2483					compatible = "ti,am437x-usb2";
2484					reg = <0x0 0x8000>;
2485					syscon-phy-power = <&scm_conf 0x620>;
2486					clocks = <&usb_phy0_always_on_clk32k>,
2487						 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>;
2488					clock-names = "wkupclk", "refclk";
2489					#phy-cells = <0>;
2490					status = "disabled";
2491				};
2492			};
2493		};
2494
2495		target-module@c0000 {			/* 0x483c0000, ap 127 7a.0 */
2496			compatible = "ti,sysc-omap4", "ti,sysc";
2497			reg = <0xc0000 0x4>,
2498			      <0xc0010 0x4>;
2499			reg-names = "rev", "sysc";
2500			ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2501			ti,sysc-midle = <SYSC_IDLE_FORCE>,
2502					<SYSC_IDLE_NO>,
2503					<SYSC_IDLE_SMART>,
2504					<SYSC_IDLE_SMART_WKUP>;
2505			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2506					<SYSC_IDLE_NO>,
2507					<SYSC_IDLE_SMART>,
2508					<SYSC_IDLE_SMART_WKUP>;
2509			/* Domains (P, C): per_pwrdm, l3s_clkdm */
2510			clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>;
2511			clock-names = "fck";
2512			#address-cells = <1>;
2513			#size-cells = <1>;
2514			ranges = <0x0 0xc0000 0x20000>;
2515
2516			dwc3_2: omap_dwc3@0 {
2517				compatible = "ti,am437x-dwc3";
2518				reg = <0x0 0x10000>;
2519				interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2520				#address-cells = <1>;
2521				#size-cells = <1>;
2522				utmi-mode = <1>;
2523				ranges = <0 0 0x20000>;
2524
2525				usb2: usb@10000 {
2526					compatible = "snps,dwc3";
2527					reg = <0x10000 0x10000>;
2528					interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2529						     <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2530						     <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2531					interrupt-names = "peripheral",
2532							  "host",
2533							  "otg";
2534					phys = <&usb2_phy2>;
2535					phy-names = "usb2-phy";
2536					maximum-speed = "high-speed";
2537					dr_mode = "otg";
2538					status = "disabled";
2539					snps,dis_u3_susphy_quirk;
2540					snps,dis_u2_susphy_quirk;
2541				};
2542			};
2543		};
2544
2545		target-module@e8000 {			/* 0x483e8000, ap 129 78.0 */
2546			compatible = "ti,sysc-omap4", "ti,sysc";
2547			reg = <0xe8000 0x4>;
2548			reg-names = "rev";
2549			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
2550			clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>;
2551			clock-names = "fck";
2552			#address-cells = <1>;
2553			#size-cells = <1>;
2554			ranges = <0x0 0xe8000 0x8000>;
2555
2556			ocp2scp1: ocp2scp@0 {
2557				compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2558				#address-cells = <1>;
2559				#size-cells = <1>;
2560				ranges = <0 0 0x8000>;
2561
2562				usb2_phy2: phy@8000 {
2563					compatible = "ti,am437x-usb2";
2564					reg = <0x0 0x8000>;
2565					syscon-phy-power = <&scm_conf 0x628>;
2566					clocks = <&usb_phy1_always_on_clk32k>,
2567						 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>;
2568					clock-names = "wkupclk", "refclk";
2569					#phy-cells = <0>;
2570					status = "disabled";
2571				};
2572			};
2573		};
2574
2575		target-module@f2000 {			/* 0x483f2000, ap 112 5a.0 */
2576			compatible = "ti,sysc";
2577			status = "disabled";
2578			#address-cells = <1>;
2579			#size-cells = <1>;
2580			ranges = <0x0 0xf2000 0x2000>;
2581		};
2582	};
2583};
2584
2585