1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Rockchip ISP1 Driver - CSI-2 Receiver
4 *
5 * Copyright (C) 2019 Collabora, Ltd.
6 * Copyright (C) 2022 Ideas on Board
7 *
8 * Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd.
9 * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
10 */
11
12 #include <linux/delay.h>
13 #include <linux/device.h>
14 #include <linux/lockdep.h>
15 #include <linux/phy/phy.h>
16 #include <linux/phy/phy-mipi-dphy.h>
17
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-fwnode.h>
20
21 #include "rkisp1-common.h"
22 #include "rkisp1-csi.h"
23
24 #define RKISP1_CSI_DEV_NAME RKISP1_DRIVER_NAME "_csi"
25
26 #define RKISP1_CSI_DEF_FMT MEDIA_BUS_FMT_SRGGB10_1X10
27
to_rkisp1_csi(struct v4l2_subdev * sd)28 static inline struct rkisp1_csi *to_rkisp1_csi(struct v4l2_subdev *sd)
29 {
30 return container_of(sd, struct rkisp1_csi, sd);
31 }
32
33 static struct v4l2_mbus_framefmt *
rkisp1_csi_get_pad_fmt(struct rkisp1_csi * csi,struct v4l2_subdev_state * sd_state,unsigned int pad,u32 which)34 rkisp1_csi_get_pad_fmt(struct rkisp1_csi *csi,
35 struct v4l2_subdev_state *sd_state,
36 unsigned int pad, u32 which)
37 {
38 struct v4l2_subdev_state state = {
39 .pads = csi->pad_cfg
40 };
41
42 lockdep_assert_held(&csi->lock);
43
44 if (which == V4L2_SUBDEV_FORMAT_TRY)
45 return v4l2_subdev_get_try_format(&csi->sd, sd_state, pad);
46 else
47 return v4l2_subdev_get_try_format(&csi->sd, &state, pad);
48 }
49
rkisp1_csi_link_sensor(struct rkisp1_device * rkisp1,struct v4l2_subdev * sd,struct rkisp1_sensor_async * s_asd,unsigned int source_pad)50 int rkisp1_csi_link_sensor(struct rkisp1_device *rkisp1, struct v4l2_subdev *sd,
51 struct rkisp1_sensor_async *s_asd,
52 unsigned int source_pad)
53 {
54 struct rkisp1_csi *csi = &rkisp1->csi;
55 int ret;
56
57 s_asd->pixel_rate_ctrl = v4l2_ctrl_find(sd->ctrl_handler,
58 V4L2_CID_PIXEL_RATE);
59 if (!s_asd->pixel_rate_ctrl) {
60 dev_err(rkisp1->dev, "No pixel rate control in subdev %s\n",
61 sd->name);
62 return -EINVAL;
63 }
64
65 /* Create the link from the sensor to the CSI receiver. */
66 ret = media_create_pad_link(&sd->entity, source_pad,
67 &csi->sd.entity, RKISP1_CSI_PAD_SINK,
68 !s_asd->index ? MEDIA_LNK_FL_ENABLED : 0);
69 if (ret) {
70 dev_err(csi->rkisp1->dev, "failed to link src pad of %s\n",
71 sd->name);
72 return ret;
73 }
74
75 return 0;
76 }
77
rkisp1_csi_config(struct rkisp1_csi * csi,const struct rkisp1_sensor_async * sensor)78 static int rkisp1_csi_config(struct rkisp1_csi *csi,
79 const struct rkisp1_sensor_async *sensor)
80 {
81 struct rkisp1_device *rkisp1 = csi->rkisp1;
82 unsigned int lanes = sensor->lanes;
83 u32 mipi_ctrl;
84
85 if (lanes < 1 || lanes > 4)
86 return -EINVAL;
87
88 mipi_ctrl = RKISP1_CIF_MIPI_CTRL_NUM_LANES(lanes - 1) |
89 RKISP1_CIF_MIPI_CTRL_SHUTDOWNLANES(0xf) |
90 RKISP1_CIF_MIPI_CTRL_ERR_SOT_SYNC_HS_SKIP |
91 RKISP1_CIF_MIPI_CTRL_CLOCKLANE_ENA;
92
93 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_CTRL, mipi_ctrl);
94
95 /* V12 could also use a newer csi2-host, but we don't want that yet */
96 if (rkisp1->info->isp_ver == RKISP1_V12)
97 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CSI0_CTRL0, 0);
98
99 /* Configure Data Type and Virtual Channel */
100 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_IMG_DATA_SEL,
101 RKISP1_CIF_MIPI_DATA_SEL_DT(csi->sink_fmt->mipi_dt) |
102 RKISP1_CIF_MIPI_DATA_SEL_VC(0));
103
104 /* Clear MIPI interrupts */
105 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_ICR, ~0);
106
107 /*
108 * Disable RKISP1_CIF_MIPI_ERR_DPHY interrupt here temporary for
109 * isp bus may be dead when switch isp.
110 */
111 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_IMSC,
112 RKISP1_CIF_MIPI_FRAME_END | RKISP1_CIF_MIPI_ERR_CSI |
113 RKISP1_CIF_MIPI_ERR_DPHY |
114 RKISP1_CIF_MIPI_SYNC_FIFO_OVFLW(0x03) |
115 RKISP1_CIF_MIPI_ADD_DATA_OVFLW);
116
117 dev_dbg(rkisp1->dev, "\n MIPI_CTRL 0x%08x\n"
118 " MIPI_IMG_DATA_SEL 0x%08x\n"
119 " MIPI_STATUS 0x%08x\n"
120 " MIPI_IMSC 0x%08x\n",
121 rkisp1_read(rkisp1, RKISP1_CIF_MIPI_CTRL),
122 rkisp1_read(rkisp1, RKISP1_CIF_MIPI_IMG_DATA_SEL),
123 rkisp1_read(rkisp1, RKISP1_CIF_MIPI_STATUS),
124 rkisp1_read(rkisp1, RKISP1_CIF_MIPI_IMSC));
125
126 return 0;
127 }
128
rkisp1_csi_enable(struct rkisp1_csi * csi)129 static void rkisp1_csi_enable(struct rkisp1_csi *csi)
130 {
131 struct rkisp1_device *rkisp1 = csi->rkisp1;
132 u32 val;
133
134 val = rkisp1_read(rkisp1, RKISP1_CIF_MIPI_CTRL);
135 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_CTRL,
136 val | RKISP1_CIF_MIPI_CTRL_OUTPUT_ENA);
137 }
138
rkisp1_csi_disable(struct rkisp1_csi * csi)139 static void rkisp1_csi_disable(struct rkisp1_csi *csi)
140 {
141 struct rkisp1_device *rkisp1 = csi->rkisp1;
142 u32 val;
143
144 /* Mask MIPI interrupts. */
145 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_IMSC, 0);
146
147 /* Flush posted writes */
148 rkisp1_read(rkisp1, RKISP1_CIF_MIPI_IMSC);
149
150 /*
151 * Wait until the IRQ handler has ended. The IRQ handler may get called
152 * even after this, but it will return immediately as the MIPI
153 * interrupts have been masked.
154 */
155 synchronize_irq(rkisp1->irqs[RKISP1_IRQ_MIPI]);
156
157 /* Clear MIPI interrupt status */
158 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_ICR, ~0);
159
160 val = rkisp1_read(rkisp1, RKISP1_CIF_MIPI_CTRL);
161 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_CTRL,
162 val & (~RKISP1_CIF_MIPI_CTRL_OUTPUT_ENA));
163 }
164
rkisp1_csi_start(struct rkisp1_csi * csi,const struct rkisp1_sensor_async * sensor)165 static int rkisp1_csi_start(struct rkisp1_csi *csi,
166 const struct rkisp1_sensor_async *sensor)
167 {
168 struct rkisp1_device *rkisp1 = csi->rkisp1;
169 union phy_configure_opts opts;
170 struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy;
171 s64 pixel_clock;
172 int ret;
173
174 ret = rkisp1_csi_config(csi, sensor);
175 if (ret)
176 return ret;
177
178 pixel_clock = v4l2_ctrl_g_ctrl_int64(sensor->pixel_rate_ctrl);
179 if (!pixel_clock) {
180 dev_err(rkisp1->dev, "Invalid pixel rate value\n");
181 return -EINVAL;
182 }
183
184 phy_mipi_dphy_get_default_config(pixel_clock, csi->sink_fmt->bus_width,
185 sensor->lanes, cfg);
186 phy_set_mode(csi->dphy, PHY_MODE_MIPI_DPHY);
187 phy_configure(csi->dphy, &opts);
188 phy_power_on(csi->dphy);
189
190 rkisp1_csi_enable(csi);
191
192 /*
193 * CIF spec says to wait for sufficient time after enabling
194 * the MIPI interface and before starting the sensor output.
195 */
196 usleep_range(1000, 1200);
197
198 return 0;
199 }
200
rkisp1_csi_stop(struct rkisp1_csi * csi)201 static void rkisp1_csi_stop(struct rkisp1_csi *csi)
202 {
203 rkisp1_csi_disable(csi);
204
205 phy_power_off(csi->dphy);
206 }
207
rkisp1_csi_isr(int irq,void * ctx)208 irqreturn_t rkisp1_csi_isr(int irq, void *ctx)
209 {
210 struct device *dev = ctx;
211 struct rkisp1_device *rkisp1 = dev_get_drvdata(dev);
212 u32 val, status;
213
214 if (!rkisp1->irqs_enabled)
215 return IRQ_NONE;
216
217 status = rkisp1_read(rkisp1, RKISP1_CIF_MIPI_MIS);
218 if (!status)
219 return IRQ_NONE;
220
221 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_ICR, status);
222
223 /*
224 * Disable DPHY errctrl interrupt, because this dphy
225 * erctrl signal is asserted until the next changes
226 * of line state. This time is may be too long and cpu
227 * is hold in this interrupt.
228 */
229 if (status & RKISP1_CIF_MIPI_ERR_CTRL(0x0f)) {
230 val = rkisp1_read(rkisp1, RKISP1_CIF_MIPI_IMSC);
231 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_IMSC,
232 val & ~RKISP1_CIF_MIPI_ERR_CTRL(0x0f));
233 rkisp1->csi.is_dphy_errctrl_disabled = true;
234 }
235
236 /*
237 * Enable DPHY errctrl interrupt again, if mipi have receive
238 * the whole frame without any error.
239 */
240 if (status == RKISP1_CIF_MIPI_FRAME_END) {
241 /*
242 * Enable DPHY errctrl interrupt again, if mipi have receive
243 * the whole frame without any error.
244 */
245 if (rkisp1->csi.is_dphy_errctrl_disabled) {
246 val = rkisp1_read(rkisp1, RKISP1_CIF_MIPI_IMSC);
247 val |= RKISP1_CIF_MIPI_ERR_CTRL(0x0f);
248 rkisp1_write(rkisp1, RKISP1_CIF_MIPI_IMSC, val);
249 rkisp1->csi.is_dphy_errctrl_disabled = false;
250 }
251 } else {
252 rkisp1->debug.mipi_error++;
253 }
254
255 return IRQ_HANDLED;
256 }
257
258 /* ----------------------------------------------------------------------------
259 * Subdev pad operations
260 */
261
rkisp1_csi_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)262 static int rkisp1_csi_enum_mbus_code(struct v4l2_subdev *sd,
263 struct v4l2_subdev_state *sd_state,
264 struct v4l2_subdev_mbus_code_enum *code)
265 {
266 struct rkisp1_csi *csi = to_rkisp1_csi(sd);
267 unsigned int i;
268 int pos = 0;
269
270 if (code->pad == RKISP1_CSI_PAD_SRC) {
271 const struct v4l2_mbus_framefmt *sink_fmt;
272
273 if (code->index)
274 return -EINVAL;
275
276 mutex_lock(&csi->lock);
277
278 sink_fmt = rkisp1_csi_get_pad_fmt(csi, sd_state,
279 RKISP1_CSI_PAD_SINK,
280 code->which);
281 code->code = sink_fmt->code;
282
283 mutex_unlock(&csi->lock);
284
285 return 0;
286 }
287
288 for (i = 0; ; i++) {
289 const struct rkisp1_mbus_info *fmt =
290 rkisp1_mbus_info_get_by_index(i);
291
292 if (!fmt)
293 return -EINVAL;
294
295 if (!(fmt->direction & RKISP1_ISP_SD_SINK))
296 continue;
297
298 if (code->index == pos) {
299 code->code = fmt->mbus_code;
300 return 0;
301 }
302
303 pos++;
304 }
305
306 return -EINVAL;
307 }
308
rkisp1_csi_init_config(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state)309 static int rkisp1_csi_init_config(struct v4l2_subdev *sd,
310 struct v4l2_subdev_state *sd_state)
311 {
312 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt;
313
314 sink_fmt = v4l2_subdev_get_try_format(sd, sd_state,
315 RKISP1_CSI_PAD_SINK);
316 src_fmt = v4l2_subdev_get_try_format(sd, sd_state,
317 RKISP1_CSI_PAD_SRC);
318
319 sink_fmt->width = RKISP1_DEFAULT_WIDTH;
320 sink_fmt->height = RKISP1_DEFAULT_HEIGHT;
321 sink_fmt->field = V4L2_FIELD_NONE;
322 sink_fmt->code = RKISP1_CSI_DEF_FMT;
323
324 *src_fmt = *sink_fmt;
325
326 return 0;
327 }
328
rkisp1_csi_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)329 static int rkisp1_csi_get_fmt(struct v4l2_subdev *sd,
330 struct v4l2_subdev_state *sd_state,
331 struct v4l2_subdev_format *fmt)
332 {
333 struct rkisp1_csi *csi = to_rkisp1_csi(sd);
334
335 mutex_lock(&csi->lock);
336 fmt->format = *rkisp1_csi_get_pad_fmt(csi, sd_state, fmt->pad,
337 fmt->which);
338 mutex_unlock(&csi->lock);
339
340 return 0;
341 }
342
rkisp1_csi_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)343 static int rkisp1_csi_set_fmt(struct v4l2_subdev *sd,
344 struct v4l2_subdev_state *sd_state,
345 struct v4l2_subdev_format *fmt)
346 {
347 struct rkisp1_csi *csi = to_rkisp1_csi(sd);
348 const struct rkisp1_mbus_info *mbus_info;
349 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt;
350
351 /* The format on the source pad always matches the sink pad. */
352 if (fmt->pad == RKISP1_CSI_PAD_SRC)
353 return rkisp1_csi_get_fmt(sd, sd_state, fmt);
354
355 mutex_lock(&csi->lock);
356
357 sink_fmt = rkisp1_csi_get_pad_fmt(csi, sd_state, RKISP1_CSI_PAD_SINK,
358 fmt->which);
359
360 sink_fmt->code = fmt->format.code;
361
362 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
363 if (!mbus_info || !(mbus_info->direction & RKISP1_ISP_SD_SINK)) {
364 sink_fmt->code = RKISP1_CSI_DEF_FMT;
365 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
366 }
367
368 sink_fmt->width = clamp_t(u32, fmt->format.width,
369 RKISP1_ISP_MIN_WIDTH,
370 RKISP1_ISP_MAX_WIDTH);
371 sink_fmt->height = clamp_t(u32, fmt->format.height,
372 RKISP1_ISP_MIN_HEIGHT,
373 RKISP1_ISP_MAX_HEIGHT);
374
375 fmt->format = *sink_fmt;
376
377 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE)
378 csi->sink_fmt = mbus_info;
379
380 /* Propagate the format to the source pad. */
381 src_fmt = rkisp1_csi_get_pad_fmt(csi, sd_state, RKISP1_CSI_PAD_SRC,
382 fmt->which);
383 *src_fmt = *sink_fmt;
384
385 mutex_unlock(&csi->lock);
386
387 return 0;
388 }
389
390 /* ----------------------------------------------------------------------------
391 * Subdev video operations
392 */
393
rkisp1_csi_s_stream(struct v4l2_subdev * sd,int enable)394 static int rkisp1_csi_s_stream(struct v4l2_subdev *sd, int enable)
395 {
396 struct rkisp1_csi *csi = to_rkisp1_csi(sd);
397 struct rkisp1_device *rkisp1 = csi->rkisp1;
398 struct rkisp1_sensor_async *source_asd;
399 struct v4l2_async_connection *asc;
400 struct media_pad *source_pad;
401 struct v4l2_subdev *source;
402 int ret;
403
404 if (!enable) {
405 v4l2_subdev_call(csi->source, video, s_stream, false);
406
407 rkisp1_csi_stop(csi);
408
409 return 0;
410 }
411
412 source_pad = media_entity_remote_source_pad_unique(&sd->entity);
413 if (IS_ERR(source_pad)) {
414 dev_dbg(rkisp1->dev, "Failed to get source for CSI: %ld\n",
415 PTR_ERR(source_pad));
416 return -EPIPE;
417 }
418
419 source = media_entity_to_v4l2_subdev(source_pad->entity);
420 if (!source) {
421 /* This should really not happen, so is not worth a message. */
422 return -EPIPE;
423 }
424
425 asc = v4l2_async_connection_unique(source);
426 if (!asc)
427 return -EPIPE;
428
429 source_asd = container_of(asc, struct rkisp1_sensor_async, asd);
430 if (source_asd->mbus_type != V4L2_MBUS_CSI2_DPHY)
431 return -EINVAL;
432
433 mutex_lock(&csi->lock);
434 ret = rkisp1_csi_start(csi, source_asd);
435 mutex_unlock(&csi->lock);
436 if (ret)
437 return ret;
438
439 ret = v4l2_subdev_call(source, video, s_stream, true);
440 if (ret) {
441 rkisp1_csi_stop(csi);
442 return ret;
443 }
444
445 csi->source = source;
446
447 return 0;
448 }
449
450 /* ----------------------------------------------------------------------------
451 * Registration
452 */
453
454 static const struct media_entity_operations rkisp1_csi_media_ops = {
455 .link_validate = v4l2_subdev_link_validate,
456 };
457
458 static const struct v4l2_subdev_video_ops rkisp1_csi_video_ops = {
459 .s_stream = rkisp1_csi_s_stream,
460 };
461
462 static const struct v4l2_subdev_pad_ops rkisp1_csi_pad_ops = {
463 .enum_mbus_code = rkisp1_csi_enum_mbus_code,
464 .init_cfg = rkisp1_csi_init_config,
465 .get_fmt = rkisp1_csi_get_fmt,
466 .set_fmt = rkisp1_csi_set_fmt,
467 };
468
469 static const struct v4l2_subdev_ops rkisp1_csi_ops = {
470 .video = &rkisp1_csi_video_ops,
471 .pad = &rkisp1_csi_pad_ops,
472 };
473
rkisp1_csi_register(struct rkisp1_device * rkisp1)474 int rkisp1_csi_register(struct rkisp1_device *rkisp1)
475 {
476 struct rkisp1_csi *csi = &rkisp1->csi;
477 struct v4l2_subdev_state state = {};
478 struct media_pad *pads;
479 struct v4l2_subdev *sd;
480 int ret;
481
482 csi->rkisp1 = rkisp1;
483 mutex_init(&csi->lock);
484
485 sd = &csi->sd;
486 v4l2_subdev_init(sd, &rkisp1_csi_ops);
487 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
488 sd->entity.ops = &rkisp1_csi_media_ops;
489 sd->entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
490 sd->owner = THIS_MODULE;
491 strscpy(sd->name, RKISP1_CSI_DEV_NAME, sizeof(sd->name));
492
493 pads = csi->pads;
494 pads[RKISP1_CSI_PAD_SINK].flags = MEDIA_PAD_FL_SINK |
495 MEDIA_PAD_FL_MUST_CONNECT;
496 pads[RKISP1_CSI_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE |
497 MEDIA_PAD_FL_MUST_CONNECT;
498
499 csi->sink_fmt = rkisp1_mbus_info_get_by_code(RKISP1_CSI_DEF_FMT);
500
501 ret = media_entity_pads_init(&sd->entity, RKISP1_CSI_PAD_NUM, pads);
502 if (ret)
503 goto error;
504
505 state.pads = csi->pad_cfg;
506 rkisp1_csi_init_config(sd, &state);
507
508 ret = v4l2_device_register_subdev(&csi->rkisp1->v4l2_dev, sd);
509 if (ret) {
510 dev_err(sd->dev, "Failed to register csi receiver subdev\n");
511 goto error;
512 }
513
514 return 0;
515
516 error:
517 media_entity_cleanup(&sd->entity);
518 mutex_destroy(&csi->lock);
519 csi->rkisp1 = NULL;
520 return ret;
521 }
522
rkisp1_csi_unregister(struct rkisp1_device * rkisp1)523 void rkisp1_csi_unregister(struct rkisp1_device *rkisp1)
524 {
525 struct rkisp1_csi *csi = &rkisp1->csi;
526
527 if (!csi->rkisp1)
528 return;
529
530 v4l2_device_unregister_subdev(&csi->sd);
531 media_entity_cleanup(&csi->sd.entity);
532 mutex_destroy(&csi->lock);
533 }
534
rkisp1_csi_init(struct rkisp1_device * rkisp1)535 int rkisp1_csi_init(struct rkisp1_device *rkisp1)
536 {
537 struct rkisp1_csi *csi = &rkisp1->csi;
538
539 csi->rkisp1 = rkisp1;
540
541 csi->dphy = devm_phy_get(rkisp1->dev, "dphy");
542 if (IS_ERR(csi->dphy))
543 return dev_err_probe(rkisp1->dev, PTR_ERR(csi->dphy),
544 "Couldn't get the MIPI D-PHY\n");
545
546 phy_init(csi->dphy);
547
548 return 0;
549 }
550
rkisp1_csi_cleanup(struct rkisp1_device * rkisp1)551 void rkisp1_csi_cleanup(struct rkisp1_device *rkisp1)
552 {
553 struct rkisp1_csi *csi = &rkisp1->csi;
554
555 phy_exit(csi->dphy);
556 }
557