1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4  */
5 
6 #include <common.h>
7 #include <dm.h>
8 #include <dm/pinctrl.h>
9 #include <regmap.h>
10 #include <syscon.h>
11 
12 #include "pinctrl-rockchip.h"
13 
14 #define RK3188_PULL_OFFSET		0x164
15 #define RK3188_PULL_PMU_OFFSET		0x64
16 
rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank * bank,int pin_num,struct regmap ** regmap,int * reg,u8 * bit)17 static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
18 					 int pin_num, struct regmap **regmap,
19 					 int *reg, u8 *bit)
20 {
21 	struct rockchip_pinctrl_priv *priv = bank->priv;
22 
23 	/* The first 12 pins of the first bank are located elsewhere */
24 	if (bank->bank_num == 0 && pin_num < 12) {
25 		*regmap = priv->regmap_pmu;
26 		*reg = RK3188_PULL_PMU_OFFSET;
27 
28 		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
29 		*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
30 		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
31 	} else {
32 		*regmap = priv->regmap_base;
33 		*reg = RK3188_PULL_OFFSET;
34 
35 		/* correct the offset, as it is the 2nd pull register */
36 		*reg -= 4;
37 		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
38 		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
39 
40 		/*
41 		 * The bits in these registers have an inverse ordering
42 		 * with the lowest pin being in bits 15:14 and the highest
43 		 * pin in bits 1:0
44 		 */
45 		*bit = 7 - (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
46 		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
47 	}
48 }
49 
50 static struct rockchip_pin_bank rk3188_pin_banks[] = {
51 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0),
52 	PIN_BANK(1, 32, "gpio1"),
53 	PIN_BANK(2, 32, "gpio2"),
54 	PIN_BANK(3, 32, "gpio3"),
55 };
56 
57 static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
58 		.pin_banks		= rk3188_pin_banks,
59 		.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
60 		.label			= "RK3188-GPIO",
61 		.type			= RK3188,
62 		.grf_mux_offset		= 0x60,
63 		.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
64 };
65 
66 static const struct udevice_id rk3188_pinctrl_ids[] = {
67 	{ .compatible = "rockchip,rk3188-pinctrl",
68 		.data = (ulong)&rk3188_pin_ctrl },
69 	{ }
70 };
71 
72 U_BOOT_DRIVER(pinctrl_rk3188) = {
73 	.name		= "rockchip_rk3188_pinctrl",
74 	.id		= UCLASS_PINCTRL,
75 	.of_match	= rk3188_pinctrl_ids,
76 	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
77 	.ops		= &rockchip_pinctrl_ops,
78 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
79 	.bind		= dm_scan_fdt_dev,
80 #endif
81 	.probe		= rockchip_pinctrl_probe,
82 };
83