1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu
4 *
5 * u-boot/board/r7780mp/lowlevel_init.S
6 */
7
8#include <config.h>
9#include <asm/processor.h>
10#include <asm/macro.h>
11
12/*
13 * Board specific low level init code, called _very_ early in the
14 * startup sequence. Relocation to SDRAM has not happened yet, no
15 * stack is available, bss section has not been initialised, etc.
16 *
17 * (Note: As no stack is available, no subroutines can be called...).
18 */
19
20	.global	lowlevel_init
21
22	.text
23	.align	2
24
25lowlevel_init:
26
27	write32	CCR_A, CCR_D		/* Address of Cache Control Register */
28					/* Instruction Cache Invalidate */
29
30	write32	FRQCR_A, FRQCR_D	/* Frequency control register */
31
32	/* pin_multi_setting */
33	write32	BBG_PMMR_A, BBG_PMMR_D_PMSR1
34
35	write32	BBG_PMSR1_A, BBG_PMSR1_D
36
37	write32	BBG_PMMR_A, BBG_PMMR_D_PMSR2
38
39	write32	BBG_PMSR2_A, BBG_PMSR2_D
40
41	write32	BBG_PMMR_A, BBG_PMMR_D_PMSR3
42
43	write32	BBG_PMSR3_A, BBG_PMSR3_D
44
45	write32	BBG_PMMR_A, BBG_PMMR_D_PMSR4
46
47	write32	BBG_PMSR4_A, BBG_PMSR4_D
48
49	write32	BBG_PMMR_A, BBG_PMMR_D_PMSRG
50
51	write32	BBG_PMSRG_A, BBG_PMSRG_D
52
53	/* cpg_setting */
54	write32	FRQCR_A, FRQCR_D
55
56	write32	DLLCSR_A, DLLCSR_D
57
58	nop
59	nop
60	nop
61	nop
62	nop
63	nop
64	nop
65	nop
66	nop
67	nop
68
69	/* wait 200us */
70	mov.l	REPEAT0_R3, r3
71	mov	#0, r2
72repeat0:
73	add	#1, r2
74	cmp/hs	r3, r2
75	bf	repeat0
76	nop
77
78	/* bsc_setting */
79	write32	MMSELR_A, MMSELR_D
80
81	write32	BCR_A, BCR_D
82
83	write32	CS0BCR_A, CS0BCR_D
84
85	write32	CS1BCR_A, CS1BCR_D
86
87	write32	CS2BCR_A, CS2BCR_D
88
89	write32	CS4BCR_A, CS4BCR_D
90
91	write32	CS5BCR_A, CS5BCR_D
92
93	write32	CS6BCR_A, CS6BCR_D
94
95	write32	CS0WCR_A, CS0WCR_D
96
97	write32	CS1WCR_A, CS1WCR_D
98
99	write32	CS2WCR_A, CS2WCR_D
100
101	write32	CS4WCR_A, CS4WCR_D
102
103	write32	CS5WCR_A, CS5WCR_D
104
105	write32	CS6WCR_A, CS6WCR_D
106
107	write32	CS5PCR_A, CS5PCR_D
108
109	write32	CS6PCR_A, CS6PCR_D
110
111	/* ddr_setting */
112	/* wait 200us */
113	mov.l	REPEAT0_R3, r3
114	mov	#0, r2
115repeat1:
116	add	#1, r2
117	cmp/hs	r3, r2
118	bf	repeat1
119	nop
120
121	mov.l	MIM_U_A, r0
122	mov.l	MIM_U_D, r1
123	synco
124	mov.l	r1, @r0
125	synco
126
127	mov.l	MIM_L_A, r0
128	mov.l	MIM_L_D0, r1
129	synco
130	mov.l	r1, @r0
131	synco
132
133	mov.l	STR_L_A, r0
134	mov.l	STR_L_D, r1
135	synco
136	mov.l	r1, @r0
137	synco
138
139	mov.l	SDR_L_A, r0
140	mov.l	SDR_L_D, r1
141	synco
142	mov.l	r1, @r0
143	synco
144
145	nop
146	nop
147	nop
148	nop
149
150	mov.l	SCR_L_A, r0
151	mov.l	SCR_L_D0, r1
152	synco
153	mov.l	r1, @r0
154	synco
155
156	mov.l	SCR_L_A, r0
157	mov.l	SCR_L_D1, r1
158	synco
159	mov.l	r1, @r0
160	synco
161
162	nop
163	nop
164	nop
165
166	mov.l	EMRS_A, r0
167	mov.l	EMRS_D, r1
168	synco
169	mov.l	r1, @r0
170	synco
171
172	nop
173	nop
174	nop
175
176	mov.l	MRS1_A, r0
177	mov.l	MRS1_D, r1
178	synco
179	mov.l	r1, @r0
180	synco
181
182	nop
183	nop
184	nop
185
186	mov.l	SCR_L_A, r0
187	mov.l	SCR_L_D2, r1
188	synco
189	mov.l	r1, @r0
190	synco
191
192	nop
193	nop
194	nop
195
196	mov.l	SCR_L_A, r0
197	mov.l	SCR_L_D3, r1
198	synco
199	mov.l	r1, @r0
200	synco
201
202	nop
203	nop
204	nop
205
206	mov.l	SCR_L_A, r0
207	mov.l	SCR_L_D4, r1
208	synco
209	mov.l	r1, @r0
210	synco
211
212	nop
213	nop
214	nop
215
216	mov.l	MRS2_A, r0
217	mov.l	MRS2_D, r1
218	synco
219	mov.l	r1, @r0
220	synco
221
222	nop
223	nop
224	nop
225
226	mov.l	SCR_L_A, r0
227	mov.l	SCR_L_D5, r1
228	synco
229	mov.l	r1, @r0
230	synco
231
232	/* wait 200us */
233	mov.l	REPEAT0_R1, r3
234	mov	#0, r2
235repeat2:
236	add	#1, r2
237	cmp/hs	r3, r2
238	bf	repeat2
239
240	synco
241
242	mov.l	MIM_L_A, r0
243	mov.l	MIM_L_D1, r1
244	synco
245	mov.l	r1, @r0
246	synco
247
248	rts
249	nop
250	.align	4
251
252RWTCSR_D_1:		.word	0xA507
253RWTCSR_D_2:		.word	0xA507
254RWTCNT_D:		.word	0x5A00
255	.align	2
256
257BBG_PMMR_A:		.long	0xFF800010
258BBG_PMSR1_A:		.long	0xFF800014
259BBG_PMSR2_A:		.long	0xFF800018
260BBG_PMSR3_A:		.long	0xFF80001C
261BBG_PMSR4_A:		.long	0xFF800020
262BBG_PMSRG_A:		.long	0xFF800024
263
264BBG_PMMR_D_PMSR1:	.long	0xffffbffd
265BBG_PMSR1_D:		.long	0x00004002
266BBG_PMMR_D_PMSR2:	.long	0xfc21a7ff
267BBG_PMSR2_D:		.long	0x03de5800
268BBG_PMMR_D_PMSR3:	.long	0xfffffff8
269BBG_PMSR3_D:		.long	0x00000007
270BBG_PMMR_D_PMSR4:	.long	0xdffdfff9
271BBG_PMSR4_D:		.long	0x20020006
272BBG_PMMR_D_PMSRG:	.long	0xffffffff
273BBG_PMSRG_D:		.long	0x00000000
274
275FRQCR_A:		.long	FRQCR
276DLLCSR_A:		.long	0xffc40010
277FRQCR_D:		.long	0x40233035
278DLLCSR_D:		.long	0x00000000
279
280/* for DDR-SDRAM */
281MIM_U_A:		.long	MIM_1
282MIM_L_A:		.long	MIM_2
283SCR_U_A:		.long	SCR_1
284SCR_L_A:		.long	SCR_2
285STR_U_A:		.long	STR_1
286STR_L_A:		.long	STR_2
287SDR_U_A:		.long	SDR_1
288SDR_L_A:		.long	SDR_2
289
290EMRS_A:			.long	0xFEC02000
291MRS1_A:			.long	0xFEC00B08
292MRS2_A:			.long	0xFEC00308
293
294MIM_U_D:		.long	0x00004000
295MIM_L_D0:		.long	0x03e80009
296MIM_L_D1:		.long	0x03e80209
297SCR_L_D0:		.long	0x3
298SCR_L_D1:		.long	0x2
299SCR_L_D2:		.long	0x2
300SCR_L_D3:		.long	0x4
301SCR_L_D4:		.long	0x4
302SCR_L_D5:		.long	0x0
303STR_L_D:		.long	0x000f0000
304SDR_L_D:		.long	0x00000400
305EMRS_D:			.long	0x0
306MRS1_D:			.long	0x0
307MRS2_D:			.long	0x0
308
309/* Cache Controller */
310CCR_A:			.long	CCR
311MMUCR_A:		.long	MMUCR
312RWTCNT_A:		.long	WTCNT
313
314CCR_D:			.long	0x0000090b
315CCR_D_2:		.long	0x00000103
316MMUCR_D:		.long	0x00000004
317MSTPCR0_D:		.long	0x00001001
318MSTPCR2_D:		.long	0xffffffff
319
320/* local Bus State Controller */
321MMSELR_A:		.long	MMSELR
322BCR_A:			.long	BCR
323CS0BCR_A:		.long	CS0BCR
324CS1BCR_A:		.long	CS1BCR
325CS2BCR_A:		.long	CS2BCR
326CS4BCR_A:		.long	CS4BCR
327CS5BCR_A:		.long	CS5BCR
328CS6BCR_A:		.long	CS6BCR
329CS0WCR_A:		.long	CS0WCR
330CS1WCR_A:		.long	CS1WCR
331CS2WCR_A:		.long	CS2WCR
332CS4WCR_A:		.long	CS4WCR
333CS5WCR_A:		.long	CS5WCR
334CS6WCR_A:		.long	CS6WCR
335CS5PCR_A:		.long	CS5PCR
336CS6PCR_A:		.long	CS6PCR
337
338MMSELR_D:		.long	0xA5A50003
339BCR_D:			.long	0x00000000
340CS0BCR_D:		.long	0x77777770
341CS1BCR_D:		.long	0x77777670
342CS2BCR_D:		.long	0x77777770
343CS4BCR_D:		.long	0x77777770
344CS5BCR_D:		.long	0x77777670
345CS6BCR_D:		.long	0x77777770
346CS0WCR_D:		.long	0x00020006
347CS1WCR_D:		.long	0x00232304
348CS2WCR_D:		.long	0x7777770F
349CS4WCR_D:		.long	0x7777770F
350CS5WCR_D:		.long	0x00101006
351CS6WCR_D:		.long	0x77777703
352CS5PCR_D:		.long	0x77000000
353CS6PCR_D:		.long	0x77000000
354
355REPEAT0_R3:		.long	0x00002000
356REPEAT0_R1:		.long	0x0000200
357