xref: /openbmc/qemu/hw/pcmcia/pxa2xx.c (revision cbf08c18)
1 /*
2  * Intel XScale PXA255/270 PC Card and CompactFlash Interface.
3  *
4  * Copyright (c) 2006 Openedhand Ltd.
5  * Written by Andrzej Zaborowski <balrog@zabor.org>
6  *
7  * This code is licensed under the GPLv2.
8  *
9  * Contributions after 2012-01-13 are licensed under the terms of the
10  * GNU GPL, version 2 or (at your option) any later version.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "hw/irq.h"
15 #include "hw/sysbus.h"
16 #include "qapi/error.h"
17 #include "qemu/module.h"
18 #include "hw/pcmcia.h"
19 #include "hw/arm/pxa.h"
20 
21 struct PXA2xxPCMCIAState {
22     SysBusDevice parent_obj;
23 
24     PCMCIASocket slot;
25     MemoryRegion container_mem;
26     MemoryRegion common_iomem;
27     MemoryRegion attr_iomem;
28     MemoryRegion iomem;
29 
30     qemu_irq irq;
31     qemu_irq cd_irq;
32 
33     PCMCIACardState *card;
34 };
35 
pxa2xx_pcmcia_common_read(void * opaque,hwaddr offset,unsigned size)36 static uint64_t pxa2xx_pcmcia_common_read(void *opaque,
37                 hwaddr offset, unsigned size)
38 {
39     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
40     PCMCIACardClass *pcc;
41 
42     if (s->slot.attached) {
43         pcc = PCMCIA_CARD_GET_CLASS(s->card);
44         return pcc->common_read(s->card, offset);
45     }
46 
47     return 0;
48 }
49 
pxa2xx_pcmcia_common_write(void * opaque,hwaddr offset,uint64_t value,unsigned size)50 static void pxa2xx_pcmcia_common_write(void *opaque, hwaddr offset,
51                                        uint64_t value, unsigned size)
52 {
53     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
54     PCMCIACardClass *pcc;
55 
56     if (s->slot.attached) {
57         pcc = PCMCIA_CARD_GET_CLASS(s->card);
58         pcc->common_write(s->card, offset, value);
59     }
60 }
61 
pxa2xx_pcmcia_attr_read(void * opaque,hwaddr offset,unsigned size)62 static uint64_t pxa2xx_pcmcia_attr_read(void *opaque,
63                 hwaddr offset, unsigned size)
64 {
65     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
66     PCMCIACardClass *pcc;
67 
68     if (s->slot.attached) {
69         pcc = PCMCIA_CARD_GET_CLASS(s->card);
70         return pcc->attr_read(s->card, offset);
71     }
72 
73     return 0;
74 }
75 
pxa2xx_pcmcia_attr_write(void * opaque,hwaddr offset,uint64_t value,unsigned size)76 static void pxa2xx_pcmcia_attr_write(void *opaque, hwaddr offset,
77                                      uint64_t value, unsigned size)
78 {
79     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
80     PCMCIACardClass *pcc;
81 
82     if (s->slot.attached) {
83         pcc = PCMCIA_CARD_GET_CLASS(s->card);
84         pcc->attr_write(s->card, offset, value);
85     }
86 }
87 
pxa2xx_pcmcia_io_read(void * opaque,hwaddr offset,unsigned size)88 static uint64_t pxa2xx_pcmcia_io_read(void *opaque,
89                 hwaddr offset, unsigned size)
90 {
91     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
92     PCMCIACardClass *pcc;
93 
94     if (s->slot.attached) {
95         pcc = PCMCIA_CARD_GET_CLASS(s->card);
96         return pcc->io_read(s->card, offset);
97     }
98 
99     return 0;
100 }
101 
pxa2xx_pcmcia_io_write(void * opaque,hwaddr offset,uint64_t value,unsigned size)102 static void pxa2xx_pcmcia_io_write(void *opaque, hwaddr offset,
103                                    uint64_t value, unsigned size)
104 {
105     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
106     PCMCIACardClass *pcc;
107 
108     if (s->slot.attached) {
109         pcc = PCMCIA_CARD_GET_CLASS(s->card);
110         pcc->io_write(s->card, offset, value);
111     }
112 }
113 
114 static const MemoryRegionOps pxa2xx_pcmcia_common_ops = {
115     .read = pxa2xx_pcmcia_common_read,
116     .write = pxa2xx_pcmcia_common_write,
117     .endianness = DEVICE_NATIVE_ENDIAN
118 };
119 
120 static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = {
121     .read = pxa2xx_pcmcia_attr_read,
122     .write = pxa2xx_pcmcia_attr_write,
123     .endianness = DEVICE_NATIVE_ENDIAN
124 };
125 
126 static const MemoryRegionOps pxa2xx_pcmcia_io_ops = {
127     .read = pxa2xx_pcmcia_io_read,
128     .write = pxa2xx_pcmcia_io_write,
129     .endianness = DEVICE_NATIVE_ENDIAN
130 };
131 
pxa2xx_pcmcia_set_irq(void * opaque,int line,int level)132 static void pxa2xx_pcmcia_set_irq(void *opaque, int line, int level)
133 {
134     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
135     if (!s->irq)
136         return;
137 
138     qemu_set_irq(s->irq, level);
139 }
140 
pxa2xx_pcmcia_initfn(Object * obj)141 static void pxa2xx_pcmcia_initfn(Object *obj)
142 {
143     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
144     PXA2xxPCMCIAState *s = PXA2XX_PCMCIA(obj);
145 
146     memory_region_init(&s->container_mem, obj, "container", 0x10000000);
147     sysbus_init_mmio(sbd, &s->container_mem);
148 
149     /* Socket I/O Memory Space */
150     memory_region_init_io(&s->iomem, obj, &pxa2xx_pcmcia_io_ops, s,
151                           "pxa2xx-pcmcia-io", 0x04000000);
152     memory_region_add_subregion(&s->container_mem, 0x00000000,
153                                 &s->iomem);
154 
155     /* Then next 64 MB is reserved */
156 
157     /* Socket Attribute Memory Space */
158     memory_region_init_io(&s->attr_iomem, obj, &pxa2xx_pcmcia_attr_ops, s,
159                           "pxa2xx-pcmcia-attribute", 0x04000000);
160     memory_region_add_subregion(&s->container_mem, 0x08000000,
161                                 &s->attr_iomem);
162 
163     /* Socket Common Memory Space */
164     memory_region_init_io(&s->common_iomem, obj, &pxa2xx_pcmcia_common_ops, s,
165                           "pxa2xx-pcmcia-common", 0x04000000);
166     memory_region_add_subregion(&s->container_mem, 0x0c000000,
167                                 &s->common_iomem);
168 
169     s->slot.irq = qemu_allocate_irq(pxa2xx_pcmcia_set_irq, s, 0);
170 
171     object_property_add_link(obj, "card", TYPE_PCMCIA_CARD,
172                              (Object **)&s->card,
173                              NULL, /* read-only property */
174                              0);
175 }
176 
177 /* Insert a new card into a slot */
pxa2xx_pcmcia_attach(void * opaque,PCMCIACardState * card)178 int pxa2xx_pcmcia_attach(void *opaque, PCMCIACardState *card)
179 {
180     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
181     PCMCIACardClass *pcc;
182 
183     if (s->slot.attached) {
184         return -EEXIST;
185     }
186 
187     if (s->cd_irq) {
188         qemu_irq_raise(s->cd_irq);
189     }
190 
191     s->card = card;
192     pcc = PCMCIA_CARD_GET_CLASS(s->card);
193 
194     s->slot.attached = true;
195     s->card->slot = &s->slot;
196     pcc->attach(s->card);
197 
198     return 0;
199 }
200 
201 /* Eject card from the slot */
pxa2xx_pcmcia_detach(void * opaque)202 int pxa2xx_pcmcia_detach(void *opaque)
203 {
204     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
205     PCMCIACardClass *pcc;
206 
207     if (!s->slot.attached) {
208         return -ENOENT;
209     }
210 
211     pcc = PCMCIA_CARD_GET_CLASS(s->card);
212     pcc->detach(s->card);
213     s->card->slot = NULL;
214     s->card = NULL;
215 
216     s->slot.attached = false;
217 
218     if (s->irq) {
219         qemu_irq_lower(s->irq);
220     }
221     if (s->cd_irq) {
222         qemu_irq_lower(s->cd_irq);
223     }
224 
225     return 0;
226 }
227 
228 /* Who to notify on card events */
pxa2xx_pcmcia_set_irq_cb(void * opaque,qemu_irq irq,qemu_irq cd_irq)229 void pxa2xx_pcmcia_set_irq_cb(void *opaque, qemu_irq irq, qemu_irq cd_irq)
230 {
231     PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque;
232     s->irq = irq;
233     s->cd_irq = cd_irq;
234 }
235 
236 static const TypeInfo pxa2xx_pcmcia_type_info = {
237     .name = TYPE_PXA2XX_PCMCIA,
238     .parent = TYPE_SYS_BUS_DEVICE,
239     .instance_size = sizeof(PXA2xxPCMCIAState),
240     .instance_init = pxa2xx_pcmcia_initfn,
241 };
242 
pxa2xx_pcmcia_register_types(void)243 static void pxa2xx_pcmcia_register_types(void)
244 {
245     type_register_static(&pxa2xx_pcmcia_type_info);
246 }
247 
248 type_init(pxa2xx_pcmcia_register_types)
249