xref: /openbmc/linux/drivers/pwm/pwm-atmel-hlcdc.c (revision dae1b816)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2014 Free Electrons
4  * Copyright (C) 2014 Atmel
5  *
6  * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
7  */
8 
9 #include <linux/clk.h>
10 #include <linux/delay.h>
11 #include <linux/mfd/atmel-hlcdc.h>
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/platform_device.h>
15 #include <linux/pwm.h>
16 #include <linux/regmap.h>
17 
18 #define ATMEL_HLCDC_PWMCVAL_MASK	GENMASK(15, 8)
19 #define ATMEL_HLCDC_PWMCVAL(x)		(((x) << 8) & ATMEL_HLCDC_PWMCVAL_MASK)
20 #define ATMEL_HLCDC_PWMPOL		BIT(4)
21 #define ATMEL_HLCDC_PWMPS_MASK		GENMASK(2, 0)
22 #define ATMEL_HLCDC_PWMPS_MAX		0x6
23 #define ATMEL_HLCDC_PWMPS(x)		((x) & ATMEL_HLCDC_PWMPS_MASK)
24 
25 struct atmel_hlcdc_pwm_errata {
26 	bool slow_clk_erratum;
27 	bool div1_clk_erratum;
28 };
29 
30 struct atmel_hlcdc_pwm {
31 	struct pwm_chip chip;
32 	struct atmel_hlcdc *hlcdc;
33 	struct clk *cur_clk;
34 	const struct atmel_hlcdc_pwm_errata *errata;
35 };
36 
to_atmel_hlcdc_pwm(struct pwm_chip * chip)37 static inline struct atmel_hlcdc_pwm *to_atmel_hlcdc_pwm(struct pwm_chip *chip)
38 {
39 	return container_of(chip, struct atmel_hlcdc_pwm, chip);
40 }
41 
atmel_hlcdc_pwm_apply(struct pwm_chip * chip,struct pwm_device * pwm,const struct pwm_state * state)42 static int atmel_hlcdc_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
43 				 const struct pwm_state *state)
44 {
45 	struct atmel_hlcdc_pwm *atmel = to_atmel_hlcdc_pwm(chip);
46 	struct atmel_hlcdc *hlcdc = atmel->hlcdc;
47 	unsigned int status;
48 	int ret;
49 
50 	if (state->enabled) {
51 		struct clk *new_clk = hlcdc->slow_clk;
52 		u64 pwmcval = state->duty_cycle * 256;
53 		unsigned long clk_freq;
54 		u64 clk_period_ns;
55 		u32 pwmcfg;
56 		int pres;
57 
58 		if (!atmel->errata || !atmel->errata->slow_clk_erratum) {
59 			clk_freq = clk_get_rate(new_clk);
60 			if (!clk_freq)
61 				return -EINVAL;
62 
63 			clk_period_ns = (u64)NSEC_PER_SEC * 256;
64 			do_div(clk_period_ns, clk_freq);
65 		}
66 
67 		/* Errata: cannot use slow clk on some IP revisions */
68 		if ((atmel->errata && atmel->errata->slow_clk_erratum) ||
69 		    clk_period_ns > state->period) {
70 			new_clk = hlcdc->sys_clk;
71 			clk_freq = clk_get_rate(new_clk);
72 			if (!clk_freq)
73 				return -EINVAL;
74 
75 			clk_period_ns = (u64)NSEC_PER_SEC * 256;
76 			do_div(clk_period_ns, clk_freq);
77 		}
78 
79 		for (pres = 0; pres <= ATMEL_HLCDC_PWMPS_MAX; pres++) {
80 		/* Errata: cannot divide by 1 on some IP revisions */
81 			if (!pres && atmel->errata &&
82 			    atmel->errata->div1_clk_erratum)
83 				continue;
84 
85 			if ((clk_period_ns << pres) >= state->period)
86 				break;
87 		}
88 
89 		if (pres > ATMEL_HLCDC_PWMPS_MAX)
90 			return -EINVAL;
91 
92 		pwmcfg = ATMEL_HLCDC_PWMPS(pres);
93 
94 		if (new_clk != atmel->cur_clk) {
95 			u32 gencfg = 0;
96 			int ret;
97 
98 			ret = clk_prepare_enable(new_clk);
99 			if (ret)
100 				return ret;
101 
102 			clk_disable_unprepare(atmel->cur_clk);
103 			atmel->cur_clk = new_clk;
104 
105 			if (new_clk == hlcdc->sys_clk)
106 				gencfg = ATMEL_HLCDC_CLKPWMSEL;
107 
108 			ret = regmap_update_bits(hlcdc->regmap,
109 						 ATMEL_HLCDC_CFG(0),
110 						 ATMEL_HLCDC_CLKPWMSEL,
111 						 gencfg);
112 			if (ret)
113 				return ret;
114 		}
115 
116 		do_div(pwmcval, state->period);
117 
118 		/*
119 		 * The PWM duty cycle is configurable from 0/256 to 255/256 of
120 		 * the period cycle. Hence we can't set a duty cycle occupying
121 		 * the whole period cycle if we're asked to.
122 		 * Set it to 255 if pwmcval is greater than 256.
123 		 */
124 		if (pwmcval > 255)
125 			pwmcval = 255;
126 
127 		pwmcfg |= ATMEL_HLCDC_PWMCVAL(pwmcval);
128 
129 		if (state->polarity == PWM_POLARITY_NORMAL)
130 			pwmcfg |= ATMEL_HLCDC_PWMPOL;
131 
132 		ret = regmap_update_bits(hlcdc->regmap, ATMEL_HLCDC_CFG(6),
133 					 ATMEL_HLCDC_PWMCVAL_MASK |
134 					 ATMEL_HLCDC_PWMPS_MASK |
135 					 ATMEL_HLCDC_PWMPOL,
136 					 pwmcfg);
137 		if (ret)
138 			return ret;
139 
140 		ret = regmap_write(hlcdc->regmap, ATMEL_HLCDC_EN,
141 				   ATMEL_HLCDC_PWM);
142 		if (ret)
143 			return ret;
144 
145 		ret = regmap_read_poll_timeout(hlcdc->regmap, ATMEL_HLCDC_SR,
146 					       status,
147 					       status & ATMEL_HLCDC_PWM,
148 					       10, 0);
149 		if (ret)
150 			return ret;
151 	} else {
152 		ret = regmap_write(hlcdc->regmap, ATMEL_HLCDC_DIS,
153 				   ATMEL_HLCDC_PWM);
154 		if (ret)
155 			return ret;
156 
157 		ret = regmap_read_poll_timeout(hlcdc->regmap, ATMEL_HLCDC_SR,
158 					       status,
159 					       !(status & ATMEL_HLCDC_PWM),
160 					       10, 0);
161 		if (ret)
162 			return ret;
163 
164 		clk_disable_unprepare(atmel->cur_clk);
165 		atmel->cur_clk = NULL;
166 	}
167 
168 	return 0;
169 }
170 
171 static const struct pwm_ops atmel_hlcdc_pwm_ops = {
172 	.apply = atmel_hlcdc_pwm_apply,
173 	.owner = THIS_MODULE,
174 };
175 
176 static const struct atmel_hlcdc_pwm_errata atmel_hlcdc_pwm_at91sam9x5_errata = {
177 	.slow_clk_erratum = true,
178 };
179 
180 static const struct atmel_hlcdc_pwm_errata atmel_hlcdc_pwm_sama5d3_errata = {
181 	.div1_clk_erratum = true,
182 };
183 
184 #ifdef CONFIG_PM_SLEEP
atmel_hlcdc_pwm_suspend(struct device * dev)185 static int atmel_hlcdc_pwm_suspend(struct device *dev)
186 {
187 	struct atmel_hlcdc_pwm *atmel = dev_get_drvdata(dev);
188 
189 	/* Keep the periph clock enabled if the PWM is still running. */
190 	if (!pwm_is_enabled(&atmel->chip.pwms[0]))
191 		clk_disable_unprepare(atmel->hlcdc->periph_clk);
192 
193 	return 0;
194 }
195 
atmel_hlcdc_pwm_resume(struct device * dev)196 static int atmel_hlcdc_pwm_resume(struct device *dev)
197 {
198 	struct atmel_hlcdc_pwm *atmel = dev_get_drvdata(dev);
199 	struct pwm_state state;
200 	int ret;
201 
202 	pwm_get_state(&atmel->chip.pwms[0], &state);
203 
204 	/* Re-enable the periph clock it was stopped during suspend. */
205 	if (!state.enabled) {
206 		ret = clk_prepare_enable(atmel->hlcdc->periph_clk);
207 		if (ret)
208 			return ret;
209 	}
210 
211 	return atmel_hlcdc_pwm_apply(&atmel->chip, &atmel->chip.pwms[0],
212 				     &state);
213 }
214 #endif
215 
216 static SIMPLE_DEV_PM_OPS(atmel_hlcdc_pwm_pm_ops,
217 			 atmel_hlcdc_pwm_suspend, atmel_hlcdc_pwm_resume);
218 
219 static const struct of_device_id atmel_hlcdc_dt_ids[] = {
220 	{
221 		.compatible = "atmel,at91sam9n12-hlcdc",
222 		/* 9n12 has same errata as 9x5 HLCDC PWM */
223 		.data = &atmel_hlcdc_pwm_at91sam9x5_errata,
224 	},
225 	{
226 		.compatible = "atmel,at91sam9x5-hlcdc",
227 		.data = &atmel_hlcdc_pwm_at91sam9x5_errata,
228 	},
229 	{
230 		.compatible = "atmel,sama5d2-hlcdc",
231 	},
232 	{
233 		.compatible = "atmel,sama5d3-hlcdc",
234 		.data = &atmel_hlcdc_pwm_sama5d3_errata,
235 	},
236 	{
237 		.compatible = "atmel,sama5d4-hlcdc",
238 		.data = &atmel_hlcdc_pwm_sama5d3_errata,
239 	},
240 	{	.compatible = "microchip,sam9x60-hlcdc", },
241 	{ /* sentinel */ },
242 };
243 MODULE_DEVICE_TABLE(of, atmel_hlcdc_dt_ids);
244 
atmel_hlcdc_pwm_probe(struct platform_device * pdev)245 static int atmel_hlcdc_pwm_probe(struct platform_device *pdev)
246 {
247 	const struct of_device_id *match;
248 	struct device *dev = &pdev->dev;
249 	struct atmel_hlcdc_pwm *atmel;
250 	struct atmel_hlcdc *hlcdc;
251 	int ret;
252 
253 	hlcdc = dev_get_drvdata(dev->parent);
254 
255 	atmel = devm_kzalloc(dev, sizeof(*atmel), GFP_KERNEL);
256 	if (!atmel)
257 		return -ENOMEM;
258 
259 	ret = clk_prepare_enable(hlcdc->periph_clk);
260 	if (ret)
261 		return ret;
262 
263 	match = of_match_node(atmel_hlcdc_dt_ids, dev->parent->of_node);
264 	if (match)
265 		atmel->errata = match->data;
266 
267 	atmel->hlcdc = hlcdc;
268 	atmel->chip.ops = &atmel_hlcdc_pwm_ops;
269 	atmel->chip.dev = dev;
270 	atmel->chip.npwm = 1;
271 
272 	ret = pwmchip_add(&atmel->chip);
273 	if (ret) {
274 		clk_disable_unprepare(hlcdc->periph_clk);
275 		return ret;
276 	}
277 
278 	platform_set_drvdata(pdev, atmel);
279 
280 	return 0;
281 }
282 
atmel_hlcdc_pwm_remove(struct platform_device * pdev)283 static void atmel_hlcdc_pwm_remove(struct platform_device *pdev)
284 {
285 	struct atmel_hlcdc_pwm *atmel = platform_get_drvdata(pdev);
286 
287 	pwmchip_remove(&atmel->chip);
288 
289 	clk_disable_unprepare(atmel->hlcdc->periph_clk);
290 }
291 
292 static const struct of_device_id atmel_hlcdc_pwm_dt_ids[] = {
293 	{ .compatible = "atmel,hlcdc-pwm" },
294 	{ /* sentinel */ },
295 };
296 
297 static struct platform_driver atmel_hlcdc_pwm_driver = {
298 	.driver = {
299 		.name = "atmel-hlcdc-pwm",
300 		.of_match_table = atmel_hlcdc_pwm_dt_ids,
301 		.pm = &atmel_hlcdc_pwm_pm_ops,
302 	},
303 	.probe = atmel_hlcdc_pwm_probe,
304 	.remove_new = atmel_hlcdc_pwm_remove,
305 };
306 module_platform_driver(atmel_hlcdc_pwm_driver);
307 
308 MODULE_ALIAS("platform:atmel-hlcdc-pwm");
309 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
310 MODULE_DESCRIPTION("Atmel HLCDC PWM driver");
311 MODULE_LICENSE("GPL v2");
312