1 /*
2 * linux/drivers/video/sa1100fb.c
3 *
4 * Copyright (C) 1999 Eric A. Thomas
5 * Based on acornfb.c Copyright (C) Russell King.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 *
11 * StrongARM 1100 LCD Controller Frame Buffer Driver
12 *
13 * Please direct your questions and comments on this driver to the following
14 * email address:
15 *
16 * linux-arm-kernel@lists.arm.linux.org.uk
17 *
18 * Clean patches should be sent to the ARM Linux Patch System. Please see the
19 * following web page for more information:
20 *
21 * https://www.arm.linux.org.uk/developer/patches/info.shtml
22 *
23 * Thank you.
24 *
25 * Known problems:
26 * - With the Neponset plugged into an Assabet, LCD powerdown
27 * doesn't work (LCD stays powered up). Therefore we shouldn't
28 * blank the screen.
29 * - We don't limit the CPU clock rate nor the mode selection
30 * according to the available SDRAM bandwidth.
31 *
32 * Other notes:
33 * - Linear grayscale palettes and the kernel.
34 * Such code does not belong in the kernel. The kernel frame buffer
35 * drivers do not expect a linear colourmap, but a colourmap based on
36 * the VT100 standard mapping.
37 *
38 * If your _userspace_ requires a linear colourmap, then the setup of
39 * such a colourmap belongs _in userspace_, not in the kernel. Code
40 * to set the colourmap correctly from user space has been sent to
41 * David Neuer. It's around 8 lines of C code, plus another 4 to
42 * detect if we are using grayscale.
43 *
44 * - The following must never be specified in a panel definition:
45 * LCCR0_LtlEnd, LCCR3_PixClkDiv, LCCR3_VrtSnchL, LCCR3_HorSnchL
46 *
47 * - The following should be specified:
48 * either LCCR0_Color or LCCR0_Mono
49 * either LCCR0_Sngl or LCCR0_Dual
50 * either LCCR0_Act or LCCR0_Pas
51 * either LCCR3_OutEnH or LCCD3_OutEnL
52 * either LCCR3_PixRsEdg or LCCR3_PixFlEdg
53 * either LCCR3_ACBsDiv or LCCR3_ACBsCntOff
54 *
55 * Code Status:
56 * 1999/04/01:
57 * - Driver appears to be working for Brutus 320x200x8bpp mode. Other
58 * resolutions are working, but only the 8bpp mode is supported.
59 * Changes need to be made to the palette encode and decode routines
60 * to support 4 and 16 bpp modes.
61 * Driver is not designed to be a module. The FrameBuffer is statically
62 * allocated since dynamic allocation of a 300k buffer cannot be
63 * guaranteed.
64 *
65 * 1999/06/17:
66 * - FrameBuffer memory is now allocated at run-time when the
67 * driver is initialized.
68 *
69 * 2000/04/10: Nicolas Pitre <nico@fluxnic.net>
70 * - Big cleanup for dynamic selection of machine type at run time.
71 *
72 * 2000/07/19: Jamey Hicks <jamey@crl.dec.com>
73 * - Support for Bitsy aka Compaq iPAQ H3600 added.
74 *
75 * 2000/08/07: Tak-Shing Chan <tchan.rd@idthk.com>
76 * Jeff Sutherland <jsutherland@accelent.com>
77 * - Resolved an issue caused by a change made to the Assabet's PLD
78 * earlier this year which broke the framebuffer driver for newer
79 * Phase 4 Assabets. Some other parameters were changed to optimize
80 * for the Sharp display.
81 *
82 * 2000/08/09: Kunihiko IMAI <imai@vasara.co.jp>
83 * - XP860 support added
84 *
85 * 2000/08/19: Mark Huang <mhuang@livetoy.com>
86 * - Allows standard options to be passed on the kernel command line
87 * for most common passive displays.
88 *
89 * 2000/08/29:
90 * - s/save_flags_cli/local_irq_save/
91 * - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller
92 *
93 * 2000/10/10: Erik Mouw <J.A.K.Mouw@its.tudelft.nl>
94 * - Updated LART stuff. Fixed some minor bugs.
95 *
96 * 2000/10/30: Murphy Chen <murphy@mail.dialogue.com.tw>
97 * - Pangolin support added
98 *
99 * 2000/10/31: Roman Jordan <jor@hoeft-wessel.de>
100 * - Huw Webpanel support added
101 *
102 * 2000/11/23: Eric Peng <ericpeng@coventive.com>
103 * - Freebird add
104 *
105 * 2001/02/07: Jamey Hicks <jamey.hicks@compaq.com>
106 * Cliff Brake <cbrake@accelent.com>
107 * - Added PM callback
108 *
109 * 2001/05/26: <rmk@arm.linux.org.uk>
110 * - Fix 16bpp so that (a) we use the right colours rather than some
111 * totally random colour depending on what was in page 0, and (b)
112 * we don't de-reference a NULL pointer.
113 * - remove duplicated implementation of consistent_alloc()
114 * - convert dma address types to dma_addr_t
115 * - remove unused 'montype' stuff
116 * - remove redundant zero inits of init_var after the initial
117 * memset.
118 * - remove allow_modeset (acornfb idea does not belong here)
119 *
120 * 2001/05/28: <rmk@arm.linux.org.uk>
121 * - massive cleanup - move machine dependent data into structures
122 * - I've left various #warnings in - if you see one, and know
123 * the hardware concerned, please get in contact with me.
124 *
125 * 2001/05/31: <rmk@arm.linux.org.uk>
126 * - Fix LCCR1 HSW value, fix all machine type specifications to
127 * keep values in line. (Please check your machine type specs)
128 *
129 * 2001/06/10: <rmk@arm.linux.org.uk>
130 * - Fiddle with the LCD controller from task context only; mainly
131 * so that we can run with interrupts on, and sleep.
132 * - Convert #warnings into #errors. No pain, no gain. ;)
133 *
134 * 2001/06/14: <rmk@arm.linux.org.uk>
135 * - Make the palette BPS value for 12bpp come out correctly.
136 * - Take notice of "greyscale" on any colour depth.
137 * - Make truecolor visuals use the RGB channel encoding information.
138 *
139 * 2001/07/02: <rmk@arm.linux.org.uk>
140 * - Fix colourmap problems.
141 *
142 * 2001/07/13: <abraham@2d3d.co.za>
143 * - Added support for the ICP LCD-Kit01 on LART. This LCD is
144 * manufactured by Prime View, model no V16C6448AB
145 *
146 * 2001/07/23: <rmk@arm.linux.org.uk>
147 * - Hand merge version from handhelds.org CVS tree. See patch
148 * notes for 595/1 for more information.
149 * - Drop 12bpp (it's 16bpp with different colour register mappings).
150 * - This hardware can not do direct colour. Therefore we don't
151 * support it.
152 *
153 * 2001/07/27: <rmk@arm.linux.org.uk>
154 * - Halve YRES on dual scan LCDs.
155 *
156 * 2001/08/22: <rmk@arm.linux.org.uk>
157 * - Add b/w iPAQ pixclock value.
158 *
159 * 2001/10/12: <rmk@arm.linux.org.uk>
160 * - Add patch 681/1 and clean up stork definitions.
161 */
162
163 #include <linux/module.h>
164 #include <linux/kernel.h>
165 #include <linux/sched.h>
166 #include <linux/errno.h>
167 #include <linux/string.h>
168 #include <linux/interrupt.h>
169 #include <linux/slab.h>
170 #include <linux/mm.h>
171 #include <linux/fb.h>
172 #include <linux/delay.h>
173 #include <linux/init.h>
174 #include <linux/ioport.h>
175 #include <linux/cpufreq.h>
176 #include <linux/gpio/consumer.h>
177 #include <linux/platform_device.h>
178 #include <linux/dma-mapping.h>
179 #include <linux/mutex.h>
180 #include <linux/io.h>
181 #include <linux/clk.h>
182
183 #include <video/sa1100fb.h>
184
185 #include <mach/hardware.h>
186 #include <asm/mach-types.h>
187
188 /*
189 * Complain if VAR is out of range.
190 */
191 #define DEBUG_VAR 1
192
193 #include "sa1100fb.h"
194
195 static const struct sa1100fb_rgb rgb_4 = {
196 .red = { .offset = 0, .length = 4, },
197 .green = { .offset = 0, .length = 4, },
198 .blue = { .offset = 0, .length = 4, },
199 .transp = { .offset = 0, .length = 0, },
200 };
201
202 static const struct sa1100fb_rgb rgb_8 = {
203 .red = { .offset = 0, .length = 8, },
204 .green = { .offset = 0, .length = 8, },
205 .blue = { .offset = 0, .length = 8, },
206 .transp = { .offset = 0, .length = 0, },
207 };
208
209 static const struct sa1100fb_rgb def_rgb_16 = {
210 .red = { .offset = 11, .length = 5, },
211 .green = { .offset = 5, .length = 6, },
212 .blue = { .offset = 0, .length = 5, },
213 .transp = { .offset = 0, .length = 0, },
214 };
215
216
217
218 static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *);
219 static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state);
220
sa1100fb_schedule_work(struct sa1100fb_info * fbi,u_int state)221 static inline void sa1100fb_schedule_work(struct sa1100fb_info *fbi, u_int state)
222 {
223 unsigned long flags;
224
225 local_irq_save(flags);
226 /*
227 * We need to handle two requests being made at the same time.
228 * There are two important cases:
229 * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE)
230 * We must perform the unblanking, which will do our REENABLE for us.
231 * 2. When we are blanking, but immediately unblank before we have
232 * blanked. We do the "REENABLE" thing here as well, just to be sure.
233 */
234 if (fbi->task_state == C_ENABLE && state == C_REENABLE)
235 state = (u_int) -1;
236 if (fbi->task_state == C_DISABLE && state == C_ENABLE)
237 state = C_REENABLE;
238
239 if (state != (u_int)-1) {
240 fbi->task_state = state;
241 schedule_work(&fbi->task);
242 }
243 local_irq_restore(flags);
244 }
245
chan_to_field(u_int chan,struct fb_bitfield * bf)246 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
247 {
248 chan &= 0xffff;
249 chan >>= 16 - bf->length;
250 return chan << bf->offset;
251 }
252
253 /*
254 * Convert bits-per-pixel to a hardware palette PBS value.
255 */
palette_pbs(struct fb_var_screeninfo * var)256 static inline u_int palette_pbs(struct fb_var_screeninfo *var)
257 {
258 int ret = 0;
259 switch (var->bits_per_pixel) {
260 case 4: ret = 0 << 12; break;
261 case 8: ret = 1 << 12; break;
262 case 16: ret = 2 << 12; break;
263 }
264 return ret;
265 }
266
267 static int
sa1100fb_setpalettereg(u_int regno,u_int red,u_int green,u_int blue,u_int trans,struct fb_info * info)268 sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
269 u_int trans, struct fb_info *info)
270 {
271 struct sa1100fb_info *fbi =
272 container_of(info, struct sa1100fb_info, fb);
273 u_int val, ret = 1;
274
275 if (regno < fbi->palette_size) {
276 val = ((red >> 4) & 0xf00);
277 val |= ((green >> 8) & 0x0f0);
278 val |= ((blue >> 12) & 0x00f);
279
280 if (regno == 0)
281 val |= palette_pbs(&fbi->fb.var);
282
283 fbi->palette_cpu[regno] = val;
284 ret = 0;
285 }
286 return ret;
287 }
288
289 static int
sa1100fb_setcolreg(u_int regno,u_int red,u_int green,u_int blue,u_int trans,struct fb_info * info)290 sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
291 u_int trans, struct fb_info *info)
292 {
293 struct sa1100fb_info *fbi =
294 container_of(info, struct sa1100fb_info, fb);
295 unsigned int val;
296 int ret = 1;
297
298 /*
299 * If inverse mode was selected, invert all the colours
300 * rather than the register number. The register number
301 * is what you poke into the framebuffer to produce the
302 * colour you requested.
303 */
304 if (fbi->inf->cmap_inverse) {
305 red = 0xffff - red;
306 green = 0xffff - green;
307 blue = 0xffff - blue;
308 }
309
310 /*
311 * If greyscale is true, then we convert the RGB value
312 * to greyscale no mater what visual we are using.
313 */
314 if (fbi->fb.var.grayscale)
315 red = green = blue = (19595 * red + 38470 * green +
316 7471 * blue) >> 16;
317
318 switch (fbi->fb.fix.visual) {
319 case FB_VISUAL_TRUECOLOR:
320 /*
321 * 12 or 16-bit True Colour. We encode the RGB value
322 * according to the RGB bitfield information.
323 */
324 if (regno < 16) {
325 val = chan_to_field(red, &fbi->fb.var.red);
326 val |= chan_to_field(green, &fbi->fb.var.green);
327 val |= chan_to_field(blue, &fbi->fb.var.blue);
328
329 fbi->pseudo_palette[regno] = val;
330 ret = 0;
331 }
332 break;
333
334 case FB_VISUAL_STATIC_PSEUDOCOLOR:
335 case FB_VISUAL_PSEUDOCOLOR:
336 ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info);
337 break;
338 }
339
340 return ret;
341 }
342
343 #ifdef CONFIG_CPU_FREQ
344 /*
345 * sa1100fb_display_dma_period()
346 * Calculate the minimum period (in picoseconds) between two DMA
347 * requests for the LCD controller. If we hit this, it means we're
348 * doing nothing but LCD DMA.
349 */
sa1100fb_display_dma_period(struct fb_var_screeninfo * var)350 static inline unsigned int sa1100fb_display_dma_period(struct fb_var_screeninfo *var)
351 {
352 /*
353 * Period = pixclock * bits_per_byte * bytes_per_transfer
354 * / memory_bits_per_pixel;
355 */
356 return var->pixclock * 8 * 16 / var->bits_per_pixel;
357 }
358 #endif
359
360 /*
361 * sa1100fb_check_var():
362 * Round up in the following order: bits_per_pixel, xres,
363 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
364 * bitfields, horizontal timing, vertical timing.
365 */
366 static int
sa1100fb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)367 sa1100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
368 {
369 struct sa1100fb_info *fbi =
370 container_of(info, struct sa1100fb_info, fb);
371 int rgbidx;
372
373 if (var->xres < MIN_XRES)
374 var->xres = MIN_XRES;
375 if (var->yres < MIN_YRES)
376 var->yres = MIN_YRES;
377 if (var->xres > fbi->inf->xres)
378 var->xres = fbi->inf->xres;
379 if (var->yres > fbi->inf->yres)
380 var->yres = fbi->inf->yres;
381 var->xres_virtual = max(var->xres_virtual, var->xres);
382 var->yres_virtual = max(var->yres_virtual, var->yres);
383
384 dev_dbg(fbi->dev, "var->bits_per_pixel=%d\n", var->bits_per_pixel);
385 switch (var->bits_per_pixel) {
386 case 4:
387 rgbidx = RGB_4;
388 break;
389 case 8:
390 rgbidx = RGB_8;
391 break;
392 case 16:
393 rgbidx = RGB_16;
394 break;
395 default:
396 return -EINVAL;
397 }
398
399 /*
400 * Copy the RGB parameters for this display
401 * from the machine specific parameters.
402 */
403 var->red = fbi->rgb[rgbidx]->red;
404 var->green = fbi->rgb[rgbidx]->green;
405 var->blue = fbi->rgb[rgbidx]->blue;
406 var->transp = fbi->rgb[rgbidx]->transp;
407
408 dev_dbg(fbi->dev, "RGBT length = %d:%d:%d:%d\n",
409 var->red.length, var->green.length, var->blue.length,
410 var->transp.length);
411
412 dev_dbg(fbi->dev, "RGBT offset = %d:%d:%d:%d\n",
413 var->red.offset, var->green.offset, var->blue.offset,
414 var->transp.offset);
415
416 #ifdef CONFIG_CPU_FREQ
417 dev_dbg(fbi->dev, "dma period = %d ps, clock = %ld kHz\n",
418 sa1100fb_display_dma_period(var),
419 clk_get_rate(fbi->clk) / 1000);
420 #endif
421
422 return 0;
423 }
424
sa1100fb_set_visual(struct sa1100fb_info * fbi,u32 visual)425 static void sa1100fb_set_visual(struct sa1100fb_info *fbi, u32 visual)
426 {
427 if (fbi->inf->set_visual)
428 fbi->inf->set_visual(visual);
429 }
430
431 /*
432 * sa1100fb_set_par():
433 * Set the user defined part of the display for the specified console
434 */
sa1100fb_set_par(struct fb_info * info)435 static int sa1100fb_set_par(struct fb_info *info)
436 {
437 struct sa1100fb_info *fbi =
438 container_of(info, struct sa1100fb_info, fb);
439 struct fb_var_screeninfo *var = &info->var;
440 unsigned long palette_mem_size;
441
442 dev_dbg(fbi->dev, "set_par\n");
443
444 if (var->bits_per_pixel == 16)
445 fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
446 else if (!fbi->inf->cmap_static)
447 fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
448 else {
449 /*
450 * Some people have weird ideas about wanting static
451 * pseudocolor maps. I suspect their user space
452 * applications are broken.
453 */
454 fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
455 }
456
457 fbi->fb.fix.line_length = var->xres_virtual *
458 var->bits_per_pixel / 8;
459 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
460
461 palette_mem_size = fbi->palette_size * sizeof(u16);
462
463 dev_dbg(fbi->dev, "palette_mem_size = 0x%08lx\n", palette_mem_size);
464
465 fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
466 fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
467
468 /*
469 * Set (any) board control register to handle new color depth
470 */
471 sa1100fb_set_visual(fbi, fbi->fb.fix.visual);
472 sa1100fb_activate_var(var, fbi);
473
474 return 0;
475 }
476
477 #if 0
478 static int
479 sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
480 struct fb_info *info)
481 {
482 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
483
484 /*
485 * Make sure the user isn't doing something stupid.
486 */
487 if (!kspc && (fbi->fb.var.bits_per_pixel == 16 || fbi->inf->cmap_static))
488 return -EINVAL;
489
490 return gen_set_cmap(cmap, kspc, con, info);
491 }
492 #endif
493
494 /*
495 * Formal definition of the VESA spec:
496 * On
497 * This refers to the state of the display when it is in full operation
498 * Stand-By
499 * This defines an optional operating state of minimal power reduction with
500 * the shortest recovery time
501 * Suspend
502 * This refers to a level of power management in which substantial power
503 * reduction is achieved by the display. The display can have a longer
504 * recovery time from this state than from the Stand-by state
505 * Off
506 * This indicates that the display is consuming the lowest level of power
507 * and is non-operational. Recovery from this state may optionally require
508 * the user to manually power on the monitor
509 *
510 * Now, the fbdev driver adds an additional state, (blank), where they
511 * turn off the video (maybe by colormap tricks), but don't mess with the
512 * video itself: think of it semantically between on and Stand-By.
513 *
514 * So here's what we should do in our fbdev blank routine:
515 *
516 * VESA_NO_BLANKING (mode 0) Video on, front/back light on
517 * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off
518 * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off
519 * VESA_POWERDOWN (mode 3) Video off, front/back light off
520 *
521 * This will match the matrox implementation.
522 */
523 /*
524 * sa1100fb_blank():
525 * Blank the display by setting all palette values to zero. Note, the
526 * 12 and 16 bpp modes don't really use the palette, so this will not
527 * blank the display in all modes.
528 */
sa1100fb_blank(int blank,struct fb_info * info)529 static int sa1100fb_blank(int blank, struct fb_info *info)
530 {
531 struct sa1100fb_info *fbi =
532 container_of(info, struct sa1100fb_info, fb);
533 int i;
534
535 dev_dbg(fbi->dev, "sa1100fb_blank: blank=%d\n", blank);
536
537 switch (blank) {
538 case FB_BLANK_POWERDOWN:
539 case FB_BLANK_VSYNC_SUSPEND:
540 case FB_BLANK_HSYNC_SUSPEND:
541 case FB_BLANK_NORMAL:
542 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
543 fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
544 for (i = 0; i < fbi->palette_size; i++)
545 sa1100fb_setpalettereg(i, 0, 0, 0, 0, info);
546 sa1100fb_schedule_work(fbi, C_DISABLE);
547 break;
548
549 case FB_BLANK_UNBLANK:
550 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
551 fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
552 fb_set_cmap(&fbi->fb.cmap, info);
553 sa1100fb_schedule_work(fbi, C_ENABLE);
554 }
555 return 0;
556 }
557
sa1100fb_mmap(struct fb_info * info,struct vm_area_struct * vma)558 static int sa1100fb_mmap(struct fb_info *info,
559 struct vm_area_struct *vma)
560 {
561 struct sa1100fb_info *fbi =
562 container_of(info, struct sa1100fb_info, fb);
563 unsigned long off = vma->vm_pgoff << PAGE_SHIFT;
564
565 if (off < info->fix.smem_len) {
566 vma->vm_pgoff += 1; /* skip over the palette */
567 return dma_mmap_wc(fbi->dev, vma, fbi->map_cpu, fbi->map_dma,
568 fbi->map_size);
569 }
570
571 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
572
573 return vm_iomap_memory(vma, info->fix.mmio_start, info->fix.mmio_len);
574 }
575
576 static const struct fb_ops sa1100fb_ops = {
577 .owner = THIS_MODULE,
578 .fb_check_var = sa1100fb_check_var,
579 .fb_set_par = sa1100fb_set_par,
580 // .fb_set_cmap = sa1100fb_set_cmap,
581 .fb_setcolreg = sa1100fb_setcolreg,
582 .fb_fillrect = cfb_fillrect,
583 .fb_copyarea = cfb_copyarea,
584 .fb_imageblit = cfb_imageblit,
585 .fb_blank = sa1100fb_blank,
586 .fb_mmap = sa1100fb_mmap,
587 };
588
589 /*
590 * Calculate the PCD value from the clock rate (in picoseconds).
591 * We take account of the PPCR clock setting.
592 */
get_pcd(struct sa1100fb_info * fbi,unsigned int pixclock)593 static inline unsigned int get_pcd(struct sa1100fb_info *fbi,
594 unsigned int pixclock)
595 {
596 unsigned int pcd = clk_get_rate(fbi->clk) / 100 / 1000;
597
598 pcd *= pixclock;
599 pcd /= 10000000;
600
601 return pcd + 1; /* make up for integer math truncations */
602 }
603
604 /*
605 * sa1100fb_activate_var():
606 * Configures LCD Controller based on entries in var parameter. Settings are
607 * only written to the controller if changes were made.
608 */
sa1100fb_activate_var(struct fb_var_screeninfo * var,struct sa1100fb_info * fbi)609 static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi)
610 {
611 struct sa1100fb_lcd_reg new_regs;
612 u_int half_screen_size, yres, pcd;
613 u_long flags;
614
615 dev_dbg(fbi->dev, "Configuring SA1100 LCD\n");
616
617 dev_dbg(fbi->dev, "var: xres=%d hslen=%d lm=%d rm=%d\n",
618 var->xres, var->hsync_len,
619 var->left_margin, var->right_margin);
620 dev_dbg(fbi->dev, "var: yres=%d vslen=%d um=%d bm=%d\n",
621 var->yres, var->vsync_len,
622 var->upper_margin, var->lower_margin);
623
624 #if DEBUG_VAR
625 if (var->xres < 16 || var->xres > 1024)
626 dev_err(fbi->dev, "%s: invalid xres %d\n",
627 fbi->fb.fix.id, var->xres);
628 if (var->hsync_len < 1 || var->hsync_len > 64)
629 dev_err(fbi->dev, "%s: invalid hsync_len %d\n",
630 fbi->fb.fix.id, var->hsync_len);
631 if (var->left_margin < 1 || var->left_margin > 255)
632 dev_err(fbi->dev, "%s: invalid left_margin %d\n",
633 fbi->fb.fix.id, var->left_margin);
634 if (var->right_margin < 1 || var->right_margin > 255)
635 dev_err(fbi->dev, "%s: invalid right_margin %d\n",
636 fbi->fb.fix.id, var->right_margin);
637 if (var->yres < 1 || var->yres > 1024)
638 dev_err(fbi->dev, "%s: invalid yres %d\n",
639 fbi->fb.fix.id, var->yres);
640 if (var->vsync_len < 1 || var->vsync_len > 64)
641 dev_err(fbi->dev, "%s: invalid vsync_len %d\n",
642 fbi->fb.fix.id, var->vsync_len);
643 if (var->upper_margin < 0 || var->upper_margin > 255)
644 dev_err(fbi->dev, "%s: invalid upper_margin %d\n",
645 fbi->fb.fix.id, var->upper_margin);
646 if (var->lower_margin < 0 || var->lower_margin > 255)
647 dev_err(fbi->dev, "%s: invalid lower_margin %d\n",
648 fbi->fb.fix.id, var->lower_margin);
649 #endif
650
651 new_regs.lccr0 = fbi->inf->lccr0 |
652 LCCR0_LEN | LCCR0_LDM | LCCR0_BAM |
653 LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0);
654
655 new_regs.lccr1 =
656 LCCR1_DisWdth(var->xres) +
657 LCCR1_HorSnchWdth(var->hsync_len) +
658 LCCR1_BegLnDel(var->left_margin) +
659 LCCR1_EndLnDel(var->right_margin);
660
661 /*
662 * If we have a dual scan LCD, then we need to halve
663 * the YRES parameter.
664 */
665 yres = var->yres;
666 if (fbi->inf->lccr0 & LCCR0_Dual)
667 yres /= 2;
668
669 new_regs.lccr2 =
670 LCCR2_DisHght(yres) +
671 LCCR2_VrtSnchWdth(var->vsync_len) +
672 LCCR2_BegFrmDel(var->upper_margin) +
673 LCCR2_EndFrmDel(var->lower_margin);
674
675 pcd = get_pcd(fbi, var->pixclock);
676 new_regs.lccr3 = LCCR3_PixClkDiv(pcd) | fbi->inf->lccr3 |
677 (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) |
678 (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL);
679
680 dev_dbg(fbi->dev, "nlccr0 = 0x%08lx\n", new_regs.lccr0);
681 dev_dbg(fbi->dev, "nlccr1 = 0x%08lx\n", new_regs.lccr1);
682 dev_dbg(fbi->dev, "nlccr2 = 0x%08lx\n", new_regs.lccr2);
683 dev_dbg(fbi->dev, "nlccr3 = 0x%08lx\n", new_regs.lccr3);
684
685 half_screen_size = var->bits_per_pixel;
686 half_screen_size = half_screen_size * var->xres * var->yres / 16;
687
688 /* Update shadow copy atomically */
689 local_irq_save(flags);
690 fbi->dbar1 = fbi->palette_dma;
691 fbi->dbar2 = fbi->screen_dma + half_screen_size;
692
693 fbi->reg_lccr0 = new_regs.lccr0;
694 fbi->reg_lccr1 = new_regs.lccr1;
695 fbi->reg_lccr2 = new_regs.lccr2;
696 fbi->reg_lccr3 = new_regs.lccr3;
697 local_irq_restore(flags);
698
699 /*
700 * Only update the registers if the controller is enabled
701 * and something has changed.
702 */
703 if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 ||
704 readl_relaxed(fbi->base + LCCR1) != fbi->reg_lccr1 ||
705 readl_relaxed(fbi->base + LCCR2) != fbi->reg_lccr2 ||
706 readl_relaxed(fbi->base + LCCR3) != fbi->reg_lccr3 ||
707 readl_relaxed(fbi->base + DBAR1) != fbi->dbar1 ||
708 readl_relaxed(fbi->base + DBAR2) != fbi->dbar2)
709 sa1100fb_schedule_work(fbi, C_REENABLE);
710
711 return 0;
712 }
713
714 /*
715 * NOTE! The following functions are purely helpers for set_ctrlr_state.
716 * Do not call them directly; set_ctrlr_state does the correct serialisation
717 * to ensure that things happen in the right way 100% of time time.
718 * -- rmk
719 */
__sa1100fb_backlight_power(struct sa1100fb_info * fbi,int on)720 static inline void __sa1100fb_backlight_power(struct sa1100fb_info *fbi, int on)
721 {
722 dev_dbg(fbi->dev, "backlight o%s\n", on ? "n" : "ff");
723
724 if (fbi->inf->backlight_power)
725 fbi->inf->backlight_power(on);
726 }
727
__sa1100fb_lcd_power(struct sa1100fb_info * fbi,int on)728 static inline void __sa1100fb_lcd_power(struct sa1100fb_info *fbi, int on)
729 {
730 dev_dbg(fbi->dev, "LCD power o%s\n", on ? "n" : "ff");
731
732 if (fbi->inf->lcd_power)
733 fbi->inf->lcd_power(on);
734 }
735
sa1100fb_setup_gpio(struct sa1100fb_info * fbi)736 static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi)
737 {
738 u_int mask = 0;
739
740 /*
741 * Enable GPIO<9:2> for LCD use if:
742 * 1. Active display, or
743 * 2. Color Dual Passive display
744 *
745 * see table 11.8 on page 11-27 in the SA1100 manual
746 * -- Erik.
747 *
748 * SA1110 spec update nr. 25 says we can and should
749 * clear LDD15 to 12 for 4 or 8bpp modes with active
750 * panels.
751 */
752 if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color &&
753 (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) {
754 mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
755
756 if (fbi->fb.var.bits_per_pixel > 8 ||
757 (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual)
758 mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12;
759
760 }
761
762 if (mask) {
763 unsigned long flags;
764
765 /*
766 * SA-1100 requires the GPIO direction register set
767 * appropriately for the alternate function. Hence
768 * we set it here via bitmask rather than excessive
769 * fiddling via the GPIO subsystem - and even then
770 * we'll still have to deal with GAFR.
771 */
772 local_irq_save(flags);
773 GPDR |= mask;
774 GAFR |= mask;
775 local_irq_restore(flags);
776 }
777 }
778
sa1100fb_enable_controller(struct sa1100fb_info * fbi)779 static void sa1100fb_enable_controller(struct sa1100fb_info *fbi)
780 {
781 dev_dbg(fbi->dev, "Enabling LCD controller\n");
782
783 /*
784 * Make sure the mode bits are present in the first palette entry
785 */
786 fbi->palette_cpu[0] &= 0xcfff;
787 fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var);
788
789 /* enable LCD controller clock */
790 clk_prepare_enable(fbi->clk);
791
792 /* Sequence from 11.7.10 */
793 writel_relaxed(fbi->reg_lccr3, fbi->base + LCCR3);
794 writel_relaxed(fbi->reg_lccr2, fbi->base + LCCR2);
795 writel_relaxed(fbi->reg_lccr1, fbi->base + LCCR1);
796 writel_relaxed(fbi->reg_lccr0 & ~LCCR0_LEN, fbi->base + LCCR0);
797 writel_relaxed(fbi->dbar1, fbi->base + DBAR1);
798 writel_relaxed(fbi->dbar2, fbi->base + DBAR2);
799 writel_relaxed(fbi->reg_lccr0 | LCCR0_LEN, fbi->base + LCCR0);
800
801 if (fbi->shannon_lcden)
802 gpiod_set_value(fbi->shannon_lcden, 1);
803
804 dev_dbg(fbi->dev, "DBAR1: 0x%08x\n", readl_relaxed(fbi->base + DBAR1));
805 dev_dbg(fbi->dev, "DBAR2: 0x%08x\n", readl_relaxed(fbi->base + DBAR2));
806 dev_dbg(fbi->dev, "LCCR0: 0x%08x\n", readl_relaxed(fbi->base + LCCR0));
807 dev_dbg(fbi->dev, "LCCR1: 0x%08x\n", readl_relaxed(fbi->base + LCCR1));
808 dev_dbg(fbi->dev, "LCCR2: 0x%08x\n", readl_relaxed(fbi->base + LCCR2));
809 dev_dbg(fbi->dev, "LCCR3: 0x%08x\n", readl_relaxed(fbi->base + LCCR3));
810 }
811
sa1100fb_disable_controller(struct sa1100fb_info * fbi)812 static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
813 {
814 DECLARE_WAITQUEUE(wait, current);
815 u32 lccr0;
816
817 dev_dbg(fbi->dev, "Disabling LCD controller\n");
818
819 if (fbi->shannon_lcden)
820 gpiod_set_value(fbi->shannon_lcden, 0);
821
822 set_current_state(TASK_UNINTERRUPTIBLE);
823 add_wait_queue(&fbi->ctrlr_wait, &wait);
824
825 /* Clear LCD Status Register */
826 writel_relaxed(~0, fbi->base + LCSR);
827
828 lccr0 = readl_relaxed(fbi->base + LCCR0);
829 lccr0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
830 writel_relaxed(lccr0, fbi->base + LCCR0);
831 lccr0 &= ~LCCR0_LEN; /* Disable LCD Controller */
832 writel_relaxed(lccr0, fbi->base + LCCR0);
833
834 schedule_timeout(20 * HZ / 1000);
835 remove_wait_queue(&fbi->ctrlr_wait, &wait);
836
837 /* disable LCD controller clock */
838 clk_disable_unprepare(fbi->clk);
839 }
840
841 /*
842 * sa1100fb_handle_irq: Handle 'LCD DONE' interrupts.
843 */
sa1100fb_handle_irq(int irq,void * dev_id)844 static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id)
845 {
846 struct sa1100fb_info *fbi = dev_id;
847 unsigned int lcsr = readl_relaxed(fbi->base + LCSR);
848
849 if (lcsr & LCSR_LDD) {
850 u32 lccr0 = readl_relaxed(fbi->base + LCCR0) | LCCR0_LDM;
851 writel_relaxed(lccr0, fbi->base + LCCR0);
852 wake_up(&fbi->ctrlr_wait);
853 }
854
855 writel_relaxed(lcsr, fbi->base + LCSR);
856 return IRQ_HANDLED;
857 }
858
859 /*
860 * This function must be called from task context only, since it will
861 * sleep when disabling the LCD controller, or if we get two contending
862 * processes trying to alter state.
863 */
set_ctrlr_state(struct sa1100fb_info * fbi,u_int state)864 static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state)
865 {
866 u_int old_state;
867
868 mutex_lock(&fbi->ctrlr_lock);
869
870 old_state = fbi->state;
871
872 /*
873 * Hack around fbcon initialisation.
874 */
875 if (old_state == C_STARTUP && state == C_REENABLE)
876 state = C_ENABLE;
877
878 switch (state) {
879 case C_DISABLE_CLKCHANGE:
880 /*
881 * Disable controller for clock change. If the
882 * controller is already disabled, then do nothing.
883 */
884 if (old_state != C_DISABLE && old_state != C_DISABLE_PM) {
885 fbi->state = state;
886 sa1100fb_disable_controller(fbi);
887 }
888 break;
889
890 case C_DISABLE_PM:
891 case C_DISABLE:
892 /*
893 * Disable controller
894 */
895 if (old_state != C_DISABLE) {
896 fbi->state = state;
897
898 __sa1100fb_backlight_power(fbi, 0);
899 if (old_state != C_DISABLE_CLKCHANGE)
900 sa1100fb_disable_controller(fbi);
901 __sa1100fb_lcd_power(fbi, 0);
902 }
903 break;
904
905 case C_ENABLE_CLKCHANGE:
906 /*
907 * Enable the controller after clock change. Only
908 * do this if we were disabled for the clock change.
909 */
910 if (old_state == C_DISABLE_CLKCHANGE) {
911 fbi->state = C_ENABLE;
912 sa1100fb_enable_controller(fbi);
913 }
914 break;
915
916 case C_REENABLE:
917 /*
918 * Re-enable the controller only if it was already
919 * enabled. This is so we reprogram the control
920 * registers.
921 */
922 if (old_state == C_ENABLE) {
923 sa1100fb_disable_controller(fbi);
924 sa1100fb_setup_gpio(fbi);
925 sa1100fb_enable_controller(fbi);
926 }
927 break;
928
929 case C_ENABLE_PM:
930 /*
931 * Re-enable the controller after PM. This is not
932 * perfect - think about the case where we were doing
933 * a clock change, and we suspended half-way through.
934 */
935 if (old_state != C_DISABLE_PM)
936 break;
937 fallthrough;
938
939 case C_ENABLE:
940 /*
941 * Power up the LCD screen, enable controller, and
942 * turn on the backlight.
943 */
944 if (old_state != C_ENABLE) {
945 fbi->state = C_ENABLE;
946 sa1100fb_setup_gpio(fbi);
947 __sa1100fb_lcd_power(fbi, 1);
948 sa1100fb_enable_controller(fbi);
949 __sa1100fb_backlight_power(fbi, 1);
950 }
951 break;
952 }
953 mutex_unlock(&fbi->ctrlr_lock);
954 }
955
956 /*
957 * Our LCD controller task (which is called when we blank or unblank)
958 * via keventd.
959 */
sa1100fb_task(struct work_struct * w)960 static void sa1100fb_task(struct work_struct *w)
961 {
962 struct sa1100fb_info *fbi = container_of(w, struct sa1100fb_info, task);
963 u_int state = xchg(&fbi->task_state, -1);
964
965 set_ctrlr_state(fbi, state);
966 }
967
968 #ifdef CONFIG_CPU_FREQ
969 /*
970 * CPU clock speed change handler. We need to adjust the LCD timing
971 * parameters when the CPU clock is adjusted by the power management
972 * subsystem.
973 */
974 static int
sa1100fb_freq_transition(struct notifier_block * nb,unsigned long val,void * data)975 sa1100fb_freq_transition(struct notifier_block *nb, unsigned long val,
976 void *data)
977 {
978 struct sa1100fb_info *fbi = TO_INF(nb, freq_transition);
979 u_int pcd;
980
981 switch (val) {
982 case CPUFREQ_PRECHANGE:
983 set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE);
984 break;
985
986 case CPUFREQ_POSTCHANGE:
987 pcd = get_pcd(fbi, fbi->fb.var.pixclock);
988 fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
989 set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
990 break;
991 }
992 return 0;
993 }
994 #endif
995
996 #ifdef CONFIG_PM
997 /*
998 * Power management hooks. Note that we won't be called from IRQ context,
999 * unlike the blank functions above, so we may sleep.
1000 */
sa1100fb_suspend(struct platform_device * dev,pm_message_t state)1001 static int sa1100fb_suspend(struct platform_device *dev, pm_message_t state)
1002 {
1003 struct sa1100fb_info *fbi = platform_get_drvdata(dev);
1004
1005 set_ctrlr_state(fbi, C_DISABLE_PM);
1006 return 0;
1007 }
1008
sa1100fb_resume(struct platform_device * dev)1009 static int sa1100fb_resume(struct platform_device *dev)
1010 {
1011 struct sa1100fb_info *fbi = platform_get_drvdata(dev);
1012
1013 set_ctrlr_state(fbi, C_ENABLE_PM);
1014 return 0;
1015 }
1016 #else
1017 #define sa1100fb_suspend NULL
1018 #define sa1100fb_resume NULL
1019 #endif
1020
1021 /*
1022 * sa1100fb_map_video_memory():
1023 * Allocates the DRAM memory for the frame buffer. This buffer is
1024 * remapped into a non-cached, non-buffered, memory region to
1025 * allow palette and pixel writes to occur without flushing the
1026 * cache. Once this area is remapped, all virtual memory
1027 * access to the video memory should occur at the new region.
1028 */
sa1100fb_map_video_memory(struct sa1100fb_info * fbi)1029 static int sa1100fb_map_video_memory(struct sa1100fb_info *fbi)
1030 {
1031 /*
1032 * We reserve one page for the palette, plus the size
1033 * of the framebuffer.
1034 */
1035 fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE);
1036 fbi->map_cpu = dma_alloc_wc(fbi->dev, fbi->map_size, &fbi->map_dma,
1037 GFP_KERNEL);
1038
1039 if (fbi->map_cpu) {
1040 fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE;
1041 fbi->screen_dma = fbi->map_dma + PAGE_SIZE;
1042 /*
1043 * FIXME: this is actually the wrong thing to place in
1044 * smem_start. But fbdev suffers from the problem that
1045 * it needs an API which doesn't exist (in this case,
1046 * dma_writecombine_mmap)
1047 */
1048 fbi->fb.fix.smem_start = fbi->screen_dma;
1049 }
1050
1051 return fbi->map_cpu ? 0 : -ENOMEM;
1052 }
1053
1054 /* Fake monspecs to fill in fbinfo structure */
1055 static const struct fb_monspecs monspecs = {
1056 .hfmin = 30000,
1057 .hfmax = 70000,
1058 .vfmin = 50,
1059 .vfmax = 65,
1060 };
1061
1062
sa1100fb_init_fbinfo(struct device * dev)1063 static struct sa1100fb_info *sa1100fb_init_fbinfo(struct device *dev)
1064 {
1065 struct sa1100fb_mach_info *inf = dev_get_platdata(dev);
1066 struct sa1100fb_info *fbi;
1067 unsigned i;
1068
1069 fbi = devm_kzalloc(dev, sizeof(struct sa1100fb_info), GFP_KERNEL);
1070 if (!fbi)
1071 return NULL;
1072
1073 fbi->dev = dev;
1074
1075 strcpy(fbi->fb.fix.id, SA1100_NAME);
1076
1077 fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
1078 fbi->fb.fix.type_aux = 0;
1079 fbi->fb.fix.xpanstep = 0;
1080 fbi->fb.fix.ypanstep = 0;
1081 fbi->fb.fix.ywrapstep = 0;
1082 fbi->fb.fix.accel = FB_ACCEL_NONE;
1083
1084 fbi->fb.var.nonstd = 0;
1085 fbi->fb.var.activate = FB_ACTIVATE_NOW;
1086 fbi->fb.var.height = -1;
1087 fbi->fb.var.width = -1;
1088 fbi->fb.var.accel_flags = 0;
1089 fbi->fb.var.vmode = FB_VMODE_NONINTERLACED;
1090
1091 fbi->fb.fbops = &sa1100fb_ops;
1092 fbi->fb.monspecs = monspecs;
1093 fbi->fb.pseudo_palette = fbi->pseudo_palette;
1094
1095 fbi->rgb[RGB_4] = &rgb_4;
1096 fbi->rgb[RGB_8] = &rgb_8;
1097 fbi->rgb[RGB_16] = &def_rgb_16;
1098
1099 /*
1100 * People just don't seem to get this. We don't support
1101 * anything but correct entries now, so panic if someone
1102 * does something stupid.
1103 */
1104 if (inf->lccr3 & (LCCR3_VrtSnchL|LCCR3_HorSnchL|0xff) ||
1105 inf->pixclock == 0)
1106 panic("sa1100fb error: invalid LCCR3 fields set or zero "
1107 "pixclock.");
1108
1109 fbi->fb.var.xres = inf->xres;
1110 fbi->fb.var.xres_virtual = inf->xres;
1111 fbi->fb.var.yres = inf->yres;
1112 fbi->fb.var.yres_virtual = inf->yres;
1113 fbi->fb.var.bits_per_pixel = inf->bpp;
1114 fbi->fb.var.pixclock = inf->pixclock;
1115 fbi->fb.var.hsync_len = inf->hsync_len;
1116 fbi->fb.var.left_margin = inf->left_margin;
1117 fbi->fb.var.right_margin = inf->right_margin;
1118 fbi->fb.var.vsync_len = inf->vsync_len;
1119 fbi->fb.var.upper_margin = inf->upper_margin;
1120 fbi->fb.var.lower_margin = inf->lower_margin;
1121 fbi->fb.var.sync = inf->sync;
1122 fbi->fb.var.grayscale = inf->cmap_greyscale;
1123 fbi->state = C_STARTUP;
1124 fbi->task_state = (u_char)-1;
1125 fbi->fb.fix.smem_len = inf->xres * inf->yres *
1126 inf->bpp / 8;
1127 fbi->inf = inf;
1128
1129 /* Copy the RGB bitfield overrides */
1130 for (i = 0; i < NR_RGB; i++)
1131 if (inf->rgb[i])
1132 fbi->rgb[i] = inf->rgb[i];
1133
1134 init_waitqueue_head(&fbi->ctrlr_wait);
1135 INIT_WORK(&fbi->task, sa1100fb_task);
1136 mutex_init(&fbi->ctrlr_lock);
1137
1138 return fbi;
1139 }
1140
sa1100fb_probe(struct platform_device * pdev)1141 static int sa1100fb_probe(struct platform_device *pdev)
1142 {
1143 struct sa1100fb_info *fbi;
1144 int ret, irq;
1145
1146 if (!dev_get_platdata(&pdev->dev)) {
1147 dev_err(&pdev->dev, "no platform LCD data\n");
1148 return -EINVAL;
1149 }
1150
1151 irq = platform_get_irq(pdev, 0);
1152 if (irq < 0)
1153 return -EINVAL;
1154
1155 fbi = sa1100fb_init_fbinfo(&pdev->dev);
1156 if (!fbi)
1157 return -ENOMEM;
1158
1159 fbi->base = devm_platform_ioremap_resource(pdev, 0);
1160 if (IS_ERR(fbi->base))
1161 return PTR_ERR(fbi->base);
1162
1163 fbi->clk = devm_clk_get(&pdev->dev, NULL);
1164 if (IS_ERR(fbi->clk))
1165 return PTR_ERR(fbi->clk);
1166
1167 ret = devm_request_irq(&pdev->dev, irq, sa1100fb_handle_irq, 0,
1168 "LCD", fbi);
1169 if (ret) {
1170 dev_err(&pdev->dev, "request_irq failed: %d\n", ret);
1171 return ret;
1172 }
1173
1174 fbi->shannon_lcden = gpiod_get_optional(&pdev->dev, "shannon-lcden",
1175 GPIOD_OUT_LOW);
1176 if (IS_ERR(fbi->shannon_lcden))
1177 return PTR_ERR(fbi->shannon_lcden);
1178
1179 /* Initialize video memory */
1180 ret = sa1100fb_map_video_memory(fbi);
1181 if (ret)
1182 return ret;
1183
1184 /*
1185 * This makes sure that our colour bitfield
1186 * descriptors are correctly initialised.
1187 */
1188 sa1100fb_check_var(&fbi->fb.var, &fbi->fb);
1189
1190 platform_set_drvdata(pdev, fbi);
1191
1192 ret = register_framebuffer(&fbi->fb);
1193 if (ret < 0) {
1194 dma_free_wc(fbi->dev, fbi->map_size, fbi->map_cpu,
1195 fbi->map_dma);
1196 return ret;
1197 }
1198
1199 #ifdef CONFIG_CPU_FREQ
1200 fbi->freq_transition.notifier_call = sa1100fb_freq_transition;
1201 cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
1202 #endif
1203
1204 /* This driver cannot be unloaded at the moment */
1205 return 0;
1206 }
1207
1208 static struct platform_driver sa1100fb_driver = {
1209 .probe = sa1100fb_probe,
1210 .suspend = sa1100fb_suspend,
1211 .resume = sa1100fb_resume,
1212 .driver = {
1213 .name = "sa11x0-fb",
1214 },
1215 };
1216
sa1100fb_init(void)1217 static int __init sa1100fb_init(void)
1218 {
1219 if (fb_get_options("sa1100fb", NULL))
1220 return -ENODEV;
1221
1222 return platform_driver_register(&sa1100fb_driver);
1223 }
1224
1225 module_init(sa1100fb_init);
1226 MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver");
1227 MODULE_LICENSE("GPL");
1228