1// SPDX-License-Identifier: GPL-2.0+ 2// Copyright 2024 IBM Corp. 3/dts-v1/; 4#include <dt-bindings/gpio/aspeed-gpio.h> 5#include <dt-bindings/input/input.h> 6#include <dt-bindings/interrupt-controller/irq.h> 7#include <dt-bindings/leds/common.h> 8#include <dt-bindings/i2c/i2c.h> 9#include "aspeed-g6.dtsi" 10 11/ { 12 model = "IBM SBP1"; 13 compatible = "ibm,sbp1-bmc", "aspeed,ast2600"; 14 15 chosen { 16 stdout-path = &uart1; 17 }; 18 19 memory@80000000 { 20 reg = <0x80000000 0x20000000>; 21 device_type = "memory"; 22 }; 23 24 reserved-memory { 25 #address-cells = <1>; 26 #size-cells = <1>; 27 ranges; 28 29 gfx_memory: framebuffer { 30 size = <0x01000000>; 31 alignment = <0x01000000>; 32 compatible = "shared-dma-pool"; 33 reusable; 34 }; 35 }; 36 37 leds { 38 compatible = "gpio-leds"; 39 40 led-power { 41 label = "LED_BMC_READY"; 42 gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>; 43 color = <LED_COLOR_ID_GREEN>; 44 default-state = "off"; 45 retain-state-suspended; 46 panic-indicator; 47 }; 48 49 led-id-tpm { 50 label = "LED_ID_TPM"; 51 gpios = <&smb_pex_vr_ctrl 12 GPIO_ACTIVE_LOW>; 52 color = <LED_COLOR_ID_YELLOW>; 53 }; 54 55 led-id-bat { 56 label = "LED_ID_BAT"; 57 gpios = <&smb_pex_vr_ctrl 16 GPIO_ACTIVE_LOW>; 58 color = <LED_COLOR_ID_YELLOW>; 59 }; 60 61 led-id-mgmt-port2 { 62 label = "LED_ID_MGMT_PORT2"; 63 gpios = <&smb_pex_vr_ctrl 17 GPIO_ACTIVE_LOW>; 64 color = <LED_COLOR_ID_YELLOW>; 65 }; 66 67 led-id-mgmt-port1 { 68 label = "LED_ID_MGMT_PORT1"; 69 gpios = <&smb_pex_vr_ctrl 18 GPIO_ACTIVE_LOW>; 70 color = <LED_COLOR_ID_YELLOW>; 71 }; 72 73 led-id-nic1-port1 { 74 label = "LED_ID_NIC1_PORT1"; 75 gpios = <&smb_pex_vr_ctrl 22 GPIO_ACTIVE_LOW>; 76 color = <LED_COLOR_ID_YELLOW>; 77 }; 78 79 led-id-nic1-port2 { 80 label = "LED_ID_NIC1_PORT2"; 81 gpios = <&smb_pex_vr_ctrl 23 GPIO_ACTIVE_LOW>; 82 color = <LED_COLOR_ID_YELLOW>; 83 }; 84 85 led-id-nic2-port1 { 86 label = "LED_ID_NIC2_PORT1"; 87 gpios = <&smb_pex_vr_ctrl 24 GPIO_ACTIVE_LOW>; 88 color = <LED_COLOR_ID_YELLOW>; 89 }; 90 91 led-id-nic2-port2 { 92 label = "LED_ID_NIC2_PORT2"; 93 gpios = <&smb_pex_vr_ctrl 25 GPIO_ACTIVE_LOW>; 94 color = <LED_COLOR_ID_YELLOW>; 95 }; 96 97 led-id-m2-ssd2 { 98 label = "LED_ID_M2_SSD2"; 99 gpios = <&smb_pex_vr_ctrl 36 GPIO_ACTIVE_LOW>; 100 color = <LED_COLOR_ID_YELLOW>; 101 }; 102 103 led-id-m2-ssd1 { 104 label = "LED_ID_M2_SSD1"; 105 gpios = <&smb_pex_vr_ctrl 37 GPIO_ACTIVE_LOW>; 106 color = <LED_COLOR_ID_YELLOW>; 107 }; 108 109 led-id-dwr-frnt-p { 110 label = "LED_ID_DWR_FRNT_P"; 111 gpios = <&smb_svc_pex_cpu3_led 37 GPIO_ACTIVE_HIGH>; 112 color = <LED_COLOR_ID_BLUE>; 113 114 default-state = "on"; 115 retain-state-suspended; 116 retain-state-shutdown; 117 }; 118 119 led-pwr-dwr-frnt { 120 label = "LED_PWR_DWR_FRNT"; 121 gpios = <&smb_svc_pex_cpu3_led 36 GPIO_ACTIVE_LOW>; 122 color = <LED_COLOR_ID_GREEN>; 123 124 retain-state-suspended; 125 retain-state-shutdown; 126 }; 127 128 led-pwr-dwr-back { 129 label = "LED_PWR_DWR_BACK"; 130 gpios = <&smb_pex_vr_ctrl 34 GPIO_ACTIVE_LOW>; 131 color = <LED_COLOR_ID_GREEN>; 132 133 retain-state-suspended; 134 retain-state-shutdown; 135 }; 136 137 led-id-dwr-back-p { 138 label = "LED_ID_DWR_BACK_P"; 139 gpios = <&smb_pex_vr_ctrl 35 GPIO_ACTIVE_HIGH>; 140 color = <LED_COLOR_ID_BLUE>; 141 142 default-state = "on"; 143 retain-state-suspended; 144 retain-state-shutdown; 145 }; 146 147 led-id-cpu0 { 148 label = "LED_ID_CPU0"; 149 gpios = <&smb_svc_pex_cpu0_led 39 GPIO_ACTIVE_LOW>; 150 color = <LED_COLOR_ID_YELLOW>; 151 }; 152 153 led-id-cpu1 { 154 label = "LED_ID_CPU1"; 155 gpios = <&smb_svc_pex_cpu1_led 39 GPIO_ACTIVE_LOW>; 156 color = <LED_COLOR_ID_YELLOW>; 157 }; 158 159 led-id-cpu2 { 160 label = "LED_ID_CPU2"; 161 gpios = <&smb_svc_pex_cpu2_led 39 GPIO_ACTIVE_LOW>; 162 color = <LED_COLOR_ID_YELLOW>; 163 }; 164 165 led-id-cpu3 { 166 label = "LED_ID_CPU3"; 167 gpios = <&smb_svc_pex_cpu3_led 39 GPIO_ACTIVE_LOW>; 168 color = <LED_COLOR_ID_YELLOW>; 169 }; 170 171 led-id-dimm-c0e2 { 172 label = "LED_ID_DIMM_C0E2"; 173 gpios = <&smb_svc_pex_cpu0_led 20 GPIO_ACTIVE_LOW>; 174 color = <LED_COLOR_ID_YELLOW>; 175 }; 176 177 led-id-dimm-c0e1 { 178 label = "LED_ID_DIMM_C0E1"; 179 gpios = <&smb_svc_pex_cpu0_led 21 GPIO_ACTIVE_LOW>; 180 color = <LED_COLOR_ID_YELLOW>; 181 }; 182 183 led-id-dimm-c0f2 { 184 label = "LED_ID_DIMM_C0F2"; 185 gpios = <&smb_svc_pex_cpu0_led 22 GPIO_ACTIVE_LOW>; 186 color = <LED_COLOR_ID_YELLOW>; 187 }; 188 189 led-id-dimm-c0f1 { 190 label = "LED_ID_DIMM_C0F1"; 191 gpios = <&smb_svc_pex_cpu0_led 23 GPIO_ACTIVE_LOW>; 192 color = <LED_COLOR_ID_YELLOW>; 193 }; 194 195 led-id-dimm-c0g2 { 196 label = "LED_ID_DIMM_C0G2"; 197 gpios = <&smb_svc_pex_cpu0_led 24 GPIO_ACTIVE_LOW>; 198 color = <LED_COLOR_ID_YELLOW>; 199 }; 200 201 led-id-dimm-c0g1 { 202 label = "LED_ID_DIMM_C0G1"; 203 gpios = <&smb_svc_pex_cpu0_led 25 GPIO_ACTIVE_LOW>; 204 color = <LED_COLOR_ID_YELLOW>; 205 }; 206 207 led-id-dimm-c0h2 { 208 label = "LED_ID_DIMM_C0H2"; 209 gpios = <&smb_svc_pex_cpu0_led 26 GPIO_ACTIVE_LOW>; 210 color = <LED_COLOR_ID_YELLOW>; 211 }; 212 213 led-id-dimm-c0h1 { 214 label = "LED_ID_DIMM_C0H1"; 215 gpios = <&smb_svc_pex_cpu0_led 27 GPIO_ACTIVE_LOW>; 216 color = <LED_COLOR_ID_YELLOW>; 217 }; 218 219 led-id-dimm-c0a2 { 220 label = "LED_ID_DIMM_C0A2"; 221 gpios = <&smb_svc_pex_cpu0_led 28 GPIO_ACTIVE_LOW>; 222 color = <LED_COLOR_ID_YELLOW>; 223 }; 224 225 led-id-dimm-c0a1 { 226 label = "LED_ID_DIMM_C0A1"; 227 gpios = <&smb_svc_pex_cpu0_led 29 GPIO_ACTIVE_LOW>; 228 color = <LED_COLOR_ID_YELLOW>; 229 }; 230 231 led-id-dimm-c0b2 { 232 label = "LED_ID_DIMM_C0B2"; 233 gpios = <&smb_svc_pex_cpu0_led 30 GPIO_ACTIVE_LOW>; 234 color = <LED_COLOR_ID_YELLOW>; 235 }; 236 237 led-id-dimm-c0b1 { 238 label = "LED_ID_DIMM_C0B1"; 239 gpios = <&smb_svc_pex_cpu0_led 31 GPIO_ACTIVE_LOW>; 240 color = <LED_COLOR_ID_YELLOW>; 241 }; 242 243 led-id-dimm-c0c2 { 244 label = "LED_ID_DIMM_C0C2"; 245 gpios = <&smb_svc_pex_cpu0_led 32 GPIO_ACTIVE_LOW>; 246 color = <LED_COLOR_ID_YELLOW>; 247 }; 248 249 led-id-dimm-c0c1 { 250 label = "LED_ID_DIMM_C0C1"; 251 gpios = <&smb_svc_pex_cpu0_led 33 GPIO_ACTIVE_LOW>; 252 color = <LED_COLOR_ID_YELLOW>; 253 }; 254 255 led-id-dimm-c0d2 { 256 label = "LED_ID_DIMM_C0D2"; 257 gpios = <&smb_svc_pex_cpu0_led 34 GPIO_ACTIVE_LOW>; 258 color = <LED_COLOR_ID_YELLOW>; 259 }; 260 261 led-id-dimm-c0d1 { 262 label = "LED_ID_DIMM_C0D1"; 263 gpios = <&smb_svc_pex_cpu0_led 35 GPIO_ACTIVE_LOW>; 264 color = <LED_COLOR_ID_YELLOW>; 265 }; 266 267 led-id-dimm-c1e2 { 268 label = "LED_ID_DIMM_C1E2"; 269 gpios = <&smb_svc_pex_cpu1_led 20 GPIO_ACTIVE_LOW>; 270 color = <LED_COLOR_ID_YELLOW>; 271 }; 272 273 led-id-dimm-c1e1 { 274 label = "LED_ID_DIMM_C1E1"; 275 gpios = <&smb_svc_pex_cpu1_led 21 GPIO_ACTIVE_LOW>; 276 color = <LED_COLOR_ID_YELLOW>; 277 }; 278 279 led-id-dimm-c1f2 { 280 label = "LED_ID_DIMM_C1F2"; 281 gpios = <&smb_svc_pex_cpu1_led 22 GPIO_ACTIVE_LOW>; 282 color = <LED_COLOR_ID_YELLOW>; 283 }; 284 285 led-id-dimm-c1f1 { 286 label = "LED_ID_DIMM_C1F1"; 287 gpios = <&smb_svc_pex_cpu1_led 23 GPIO_ACTIVE_LOW>; 288 color = <LED_COLOR_ID_YELLOW>; 289 }; 290 291 led-id-dimm-c1g2 { 292 label = "LED_ID_DIMM_C1G2"; 293 gpios = <&smb_svc_pex_cpu1_led 24 GPIO_ACTIVE_LOW>; 294 color = <LED_COLOR_ID_YELLOW>; 295 }; 296 297 led-id-dimm-c1g1 { 298 label = "LED_ID_DIMM_C1G1"; 299 gpios = <&smb_svc_pex_cpu1_led 25 GPIO_ACTIVE_LOW>; 300 color = <LED_COLOR_ID_YELLOW>; 301 }; 302 303 led-id-dimm-c1h2 { 304 label = "LED_ID_DIMM_C1H2"; 305 gpios = <&smb_svc_pex_cpu1_led 26 GPIO_ACTIVE_LOW>; 306 color = <LED_COLOR_ID_YELLOW>; 307 }; 308 309 led-id-dimm-c1h1 { 310 label = "LED_ID_DIMM_C1H1"; 311 gpios = <&smb_svc_pex_cpu1_led 27 GPIO_ACTIVE_LOW>; 312 color = <LED_COLOR_ID_YELLOW>; 313 }; 314 315 led-id-dimm-c1a2 { 316 label = "LED_ID_DIMM_C1A2"; 317 gpios = <&smb_svc_pex_cpu1_led 28 GPIO_ACTIVE_LOW>; 318 color = <LED_COLOR_ID_YELLOW>; 319 }; 320 321 led-id-dimm-c1a1 { 322 label = "LED_ID_DIMM_C1A1"; 323 gpios = <&smb_svc_pex_cpu1_led 29 GPIO_ACTIVE_LOW>; 324 color = <LED_COLOR_ID_YELLOW>; 325 }; 326 327 led-id-dimm-c1b2 { 328 label = "LED_ID_DIMM_C1B2"; 329 gpios = <&smb_svc_pex_cpu1_led 30 GPIO_ACTIVE_LOW>; 330 color = <LED_COLOR_ID_YELLOW>; 331 }; 332 333 led-id-dimm-c1b1 { 334 label = "LED_ID_DIMM_C1B1"; 335 gpios = <&smb_svc_pex_cpu1_led 31 GPIO_ACTIVE_LOW>; 336 color = <LED_COLOR_ID_YELLOW>; 337 }; 338 339 led-id-dimm-c1c2 { 340 label = "LED_ID_DIMM_C1C2"; 341 gpios = <&smb_svc_pex_cpu1_led 32 GPIO_ACTIVE_LOW>; 342 color = <LED_COLOR_ID_YELLOW>; 343 }; 344 345 led-id-dimm-c1c1 { 346 label = "LED_ID_DIMM_C1C1"; 347 gpios = <&smb_svc_pex_cpu1_led 33 GPIO_ACTIVE_LOW>; 348 color = <LED_COLOR_ID_YELLOW>; 349 }; 350 351 led-id-dimm-c1d2 { 352 label = "LED_ID_DIMM_C1D2"; 353 gpios = <&smb_svc_pex_cpu1_led 34 GPIO_ACTIVE_LOW>; 354 color = <LED_COLOR_ID_YELLOW>; 355 }; 356 357 led-id-dimm-c1d1 { 358 label = "LED_ID_DIMM_C1D1"; 359 gpios = <&smb_svc_pex_cpu1_led 35 GPIO_ACTIVE_LOW>; 360 color = <LED_COLOR_ID_YELLOW>; 361 }; 362 363 led-id-dimm-c2e2 { 364 label = "LED_ID_DIMM_C2E2"; 365 gpios = <&smb_svc_pex_cpu2_led 20 GPIO_ACTIVE_LOW>; 366 color = <LED_COLOR_ID_YELLOW>; 367 }; 368 369 led-id-dimm-c2e1 { 370 label = "LED_ID_DIMM_C2E1"; 371 gpios = <&smb_svc_pex_cpu2_led 21 GPIO_ACTIVE_LOW>; 372 color = <LED_COLOR_ID_YELLOW>; 373 }; 374 375 led-id-dimm-c2f2 { 376 label = "LED_ID_DIMM_C2F2"; 377 gpios = <&smb_svc_pex_cpu2_led 22 GPIO_ACTIVE_LOW>; 378 color = <LED_COLOR_ID_YELLOW>; 379 }; 380 381 led-id-dimm-c2f1 { 382 label = "LED_ID_DIMM_C2F1"; 383 gpios = <&smb_svc_pex_cpu2_led 23 GPIO_ACTIVE_LOW>; 384 color = <LED_COLOR_ID_YELLOW>; 385 }; 386 387 led-id-dimm-c2g2 { 388 label = "LED_ID_DIMM_C2G2"; 389 gpios = <&smb_svc_pex_cpu2_led 24 GPIO_ACTIVE_LOW>; 390 color = <LED_COLOR_ID_YELLOW>; 391 }; 392 393 led-id-dimm-c2g1 { 394 label = "LED_ID_DIMM_C2G1"; 395 gpios = <&smb_svc_pex_cpu2_led 25 GPIO_ACTIVE_LOW>; 396 color = <LED_COLOR_ID_YELLOW>; 397 }; 398 399 led-id-dimm-c2h2 { 400 label = "LED_ID_DIMM_C2H2"; 401 gpios = <&smb_svc_pex_cpu2_led 26 GPIO_ACTIVE_LOW>; 402 color = <LED_COLOR_ID_YELLOW>; 403 }; 404 405 led-id-dimm-c2h1 { 406 label = "LED_ID_DIMM_C2H1"; 407 gpios = <&smb_svc_pex_cpu2_led 27 GPIO_ACTIVE_LOW>; 408 color = <LED_COLOR_ID_YELLOW>; 409 }; 410 411 led-id-dimm-c2a2 { 412 label = "LED_ID_DIMM_C2A2"; 413 gpios = <&smb_svc_pex_cpu2_led 28 GPIO_ACTIVE_LOW>; 414 color = <LED_COLOR_ID_YELLOW>; 415 }; 416 417 led-id-dimm-c2a1 { 418 label = "LED_ID_DIMM_C2A1"; 419 gpios = <&smb_svc_pex_cpu2_led 29 GPIO_ACTIVE_LOW>; 420 color = <LED_COLOR_ID_YELLOW>; 421 }; 422 423 led-id-dimm-c2b2 { 424 label = "LED_ID_DIMM_C2B2"; 425 gpios = <&smb_svc_pex_cpu2_led 30 GPIO_ACTIVE_LOW>; 426 color = <LED_COLOR_ID_YELLOW>; 427 }; 428 429 led-id-dimm-c2b1 { 430 label = "LED_ID_DIMM_C2B1"; 431 gpios = <&smb_svc_pex_cpu2_led 31 GPIO_ACTIVE_LOW>; 432 color = <LED_COLOR_ID_YELLOW>; 433 }; 434 435 led-id-dimm-c2c2 { 436 label = "LED_ID_DIMM_C2C2"; 437 gpios = <&smb_svc_pex_cpu2_led 32 GPIO_ACTIVE_LOW>; 438 color = <LED_COLOR_ID_YELLOW>; 439 }; 440 441 led-id-dimm-c2c1 { 442 label = "LED_ID_DIMM_C2C1"; 443 gpios = <&smb_svc_pex_cpu2_led 33 GPIO_ACTIVE_LOW>; 444 color = <LED_COLOR_ID_YELLOW>; 445 }; 446 447 led-id-dimm-c2d2 { 448 label = "LED_ID_DIMM_C2D2"; 449 gpios = <&smb_svc_pex_cpu2_led 34 GPIO_ACTIVE_LOW>; 450 color = <LED_COLOR_ID_YELLOW>; 451 }; 452 453 led-id-dimm-c2d1 { 454 label = "LED_ID_DIMM_C2D1"; 455 gpios = <&smb_svc_pex_cpu2_led 35 GPIO_ACTIVE_LOW>; 456 color = <LED_COLOR_ID_YELLOW>; 457 }; 458 459 led-id-dimm-c3e2 { 460 label = "LED_ID_DIMM_C3E2"; 461 gpios = <&smb_svc_pex_cpu3_led 20 GPIO_ACTIVE_LOW>; 462 color = <LED_COLOR_ID_YELLOW>; 463 }; 464 465 led-id-dimm-c3e1 { 466 label = "LED_ID_DIMM_C3E1"; 467 gpios = <&smb_svc_pex_cpu3_led 21 GPIO_ACTIVE_LOW>; 468 color = <LED_COLOR_ID_YELLOW>; 469 }; 470 471 led-id-dimm-c3f2 { 472 label = "LED_ID_DIMM_C3F2"; 473 gpios = <&smb_svc_pex_cpu3_led 22 GPIO_ACTIVE_LOW>; 474 color = <LED_COLOR_ID_YELLOW>; 475 }; 476 477 led-id-dimm-c3f1 { 478 label = "LED_ID_DIMM_C3F1"; 479 gpios = <&smb_svc_pex_cpu3_led 23 GPIO_ACTIVE_LOW>; 480 color = <LED_COLOR_ID_YELLOW>; 481 }; 482 483 led-id-dimm-c3g2 { 484 label = "LED_ID_DIMM_C3G2"; 485 gpios = <&smb_svc_pex_cpu3_led 24 GPIO_ACTIVE_LOW>; 486 color = <LED_COLOR_ID_YELLOW>; 487 }; 488 489 led-id-dimm-c3g1 { 490 label = "LED_ID_DIMM_C3G1"; 491 gpios = <&smb_svc_pex_cpu3_led 25 GPIO_ACTIVE_LOW>; 492 color = <LED_COLOR_ID_YELLOW>; 493 }; 494 495 led-id-dimm-c3h2 { 496 label = "LED_ID_DIMM_C3H2"; 497 gpios = <&smb_svc_pex_cpu3_led 26 GPIO_ACTIVE_LOW>; 498 color = <LED_COLOR_ID_YELLOW>; 499 }; 500 501 led-id-dimm-c3h1 { 502 label = "LED_ID_DIMM_C3H1"; 503 gpios = <&smb_svc_pex_cpu3_led 27 GPIO_ACTIVE_LOW>; 504 color = <LED_COLOR_ID_YELLOW>; 505 }; 506 507 led-id-dimm-c3a2 { 508 label = "LED_ID_DIMM_C3A2"; 509 gpios = <&smb_svc_pex_cpu3_led 28 GPIO_ACTIVE_LOW>; 510 color = <LED_COLOR_ID_YELLOW>; 511 }; 512 513 led-id-dimm-c3a1 { 514 label = "LED_ID_DIMM_C3A1"; 515 gpios = <&smb_svc_pex_cpu3_led 29 GPIO_ACTIVE_LOW>; 516 color = <LED_COLOR_ID_YELLOW>; 517 }; 518 519 led-id-dimm-c3b2 { 520 label = "LED_ID_DIMM_C3B2"; 521 gpios = <&smb_svc_pex_cpu3_led 30 GPIO_ACTIVE_LOW>; 522 color = <LED_COLOR_ID_YELLOW>; 523 }; 524 525 led-id-dimm-c3b1 { 526 label = "LED_ID_DIMM_C3B1"; 527 gpios = <&smb_svc_pex_cpu3_led 31 GPIO_ACTIVE_LOW>; 528 color = <LED_COLOR_ID_YELLOW>; 529 }; 530 531 led-id-dimm-c3c2 { 532 label = "LED_ID_DIMM_C3C2"; 533 gpios = <&smb_svc_pex_cpu3_led 32 GPIO_ACTIVE_LOW>; 534 color = <LED_COLOR_ID_YELLOW>; 535 }; 536 537 led-id-dimm-c3c1 { 538 label = "LED_ID_DIMM_C3C1"; 539 gpios = <&smb_svc_pex_cpu3_led 33 GPIO_ACTIVE_LOW>; 540 color = <LED_COLOR_ID_YELLOW>; 541 }; 542 543 led-id-dimm-c3d2 { 544 label = "LED_ID_DIMM_C3D2"; 545 gpios = <&smb_svc_pex_cpu3_led 34 GPIO_ACTIVE_LOW>; 546 color = <LED_COLOR_ID_YELLOW>; 547 }; 548 549 led-id-dimm-c3d1 { 550 label = "LED_ID_DIMM_C3D1"; 551 gpios = <&smb_svc_pex_cpu3_led 35 GPIO_ACTIVE_LOW>; 552 color = <LED_COLOR_ID_YELLOW>; 553 }; 554 555 led-id-dimm-rssd01 { 556 label = "LED_ID_RSSD01"; 557 gpios = <&smb_svc_pex_rssd01_16 0 GPIO_ACTIVE_LOW>; 558 color = <LED_COLOR_ID_YELLOW>; 559 }; 560 561 led-id-dimm-rssd02 { 562 label = "LED_ID_RSSD02"; 563 gpios = <&smb_svc_pex_rssd01_16 1 GPIO_ACTIVE_LOW>; 564 color = <LED_COLOR_ID_YELLOW>; 565 }; 566 567 led-id-dimm-rssd03 { 568 label = "LED_ID_RSSD03"; 569 gpios = <&smb_svc_pex_rssd01_16 2 GPIO_ACTIVE_LOW>; 570 color = <LED_COLOR_ID_YELLOW>; 571 }; 572 573 led-id-dimm-rssd04 { 574 label = "LED_ID_RSSD04"; 575 gpios = <&smb_svc_pex_rssd01_16 3 GPIO_ACTIVE_LOW>; 576 color = <LED_COLOR_ID_YELLOW>; 577 }; 578 579 led-id-dimm-rssd05 { 580 label = "LED_ID_RSSD05"; 581 gpios = <&smb_svc_pex_rssd01_16 4 GPIO_ACTIVE_LOW>; 582 color = <LED_COLOR_ID_YELLOW>; 583 }; 584 585 led-id-dimm-rssd06 { 586 label = "LED_ID_RSSD06"; 587 gpios = <&smb_svc_pex_rssd01_16 5 GPIO_ACTIVE_LOW>; 588 color = <LED_COLOR_ID_YELLOW>; 589 }; 590 591 led-id-dimm-rssd07 { 592 label = "LED_ID_RSSD07"; 593 gpios = <&smb_svc_pex_rssd01_16 6 GPIO_ACTIVE_LOW>; 594 color = <LED_COLOR_ID_YELLOW>; 595 }; 596 597 led-id-dimm-rssd08 { 598 label = "LED_ID_RSSD08"; 599 gpios = <&smb_svc_pex_rssd01_16 7 GPIO_ACTIVE_LOW>; 600 color = <LED_COLOR_ID_YELLOW>; 601 }; 602 603 led-id-dimm-rssd09 { 604 label = "LED_ID_RSSD09"; 605 gpios = <&smb_svc_pex_rssd01_16 8 GPIO_ACTIVE_LOW>; 606 color = <LED_COLOR_ID_YELLOW>; 607 }; 608 609 led-id-dimm-rssd10 { 610 label = "LED_ID_RSSD10"; 611 gpios = <&smb_svc_pex_rssd01_16 9 GPIO_ACTIVE_LOW>; 612 color = <LED_COLOR_ID_YELLOW>; 613 }; 614 615 led-id-dimm-rssd11 { 616 label = "LED_ID_RSSD11"; 617 gpios = <&smb_svc_pex_rssd01_16 10 GPIO_ACTIVE_LOW>; 618 color = <LED_COLOR_ID_YELLOW>; 619 }; 620 621 led-id-dimm-rssd12 { 622 label = "LED_ID_RSSD12"; 623 gpios = <&smb_svc_pex_rssd01_16 11 GPIO_ACTIVE_LOW>; 624 color = <LED_COLOR_ID_YELLOW>; 625 }; 626 627 led-id-dimm-rssd13 { 628 label = "LED_ID_RSSD13"; 629 gpios = <&smb_svc_pex_rssd01_16 12 GPIO_ACTIVE_LOW>; 630 color = <LED_COLOR_ID_YELLOW>; 631 }; 632 633 led-id-dimm-rssd14 { 634 label = "LED_ID_RSSD14"; 635 gpios = <&smb_svc_pex_rssd01_16 13 GPIO_ACTIVE_LOW>; 636 color = <LED_COLOR_ID_YELLOW>; 637 }; 638 639 led-id-dimm-rssd15 { 640 label = "LED_ID_RSSD15"; 641 gpios = <&smb_svc_pex_rssd01_16 14 GPIO_ACTIVE_LOW>; 642 color = <LED_COLOR_ID_YELLOW>; 643 }; 644 645 led-id-dimm-rssd16 { 646 label = "LED_ID_RSSD16"; 647 gpios = <&smb_svc_pex_rssd01_16 15 GPIO_ACTIVE_LOW>; 648 color = <LED_COLOR_ID_YELLOW>; 649 }; 650 651 led-id-dimm-rssd17 { 652 label = "LED_ID_RSSD17"; 653 gpios = <&smb_svc_pex_rssd17_32 0 GPIO_ACTIVE_LOW>; 654 color = <LED_COLOR_ID_YELLOW>; 655 }; 656 657 led-id-dimm-rssd18 { 658 label = "LED_ID_RSSD18"; 659 gpios = <&smb_svc_pex_rssd17_32 1 GPIO_ACTIVE_LOW>; 660 color = <LED_COLOR_ID_YELLOW>; 661 }; 662 663 led-id-dimm-rssd19 { 664 label = "LED_ID_RSSD19"; 665 gpios = <&smb_svc_pex_rssd17_32 2 GPIO_ACTIVE_LOW>; 666 color = <LED_COLOR_ID_YELLOW>; 667 }; 668 669 led-id-dimm-rssd20 { 670 label = "LED_ID_RSSD20"; 671 gpios = <&smb_svc_pex_rssd17_32 3 GPIO_ACTIVE_LOW>; 672 color = <LED_COLOR_ID_YELLOW>; 673 }; 674 675 led-id-dimm-rssd21 { 676 label = "LED_ID_RSSD21"; 677 gpios = <&smb_svc_pex_rssd17_32 4 GPIO_ACTIVE_LOW>; 678 color = <LED_COLOR_ID_YELLOW>; 679 }; 680 681 led-id-dimm-rssd22 { 682 label = "LED_ID_RSSD22"; 683 gpios = <&smb_svc_pex_rssd17_32 5 GPIO_ACTIVE_LOW>; 684 color = <LED_COLOR_ID_YELLOW>; 685 }; 686 687 led-id-dimm-rssd23 { 688 label = "LED_ID_RSSD23"; 689 gpios = <&smb_svc_pex_rssd17_32 6 GPIO_ACTIVE_LOW>; 690 color = <LED_COLOR_ID_YELLOW>; 691 }; 692 693 led-id-dimm-rssd24 { 694 label = "LED_ID_RSSD24"; 695 gpios = <&smb_svc_pex_rssd17_32 7 GPIO_ACTIVE_LOW>; 696 color = <LED_COLOR_ID_YELLOW>; 697 }; 698 699 led-id-dimm-rssd25 { 700 label = "LED_ID_RSSD25"; 701 gpios = <&smb_svc_pex_rssd17_32 8 GPIO_ACTIVE_LOW>; 702 color = <LED_COLOR_ID_YELLOW>; 703 }; 704 705 led-id-dimm-rssd26 { 706 label = "LED_ID_RSSD26"; 707 gpios = <&smb_svc_pex_rssd17_32 9 GPIO_ACTIVE_LOW>; 708 color = <LED_COLOR_ID_YELLOW>; 709 }; 710 711 led-id-dimm-rssd27 { 712 label = "LED_ID_RSSD27"; 713 gpios = <&smb_svc_pex_rssd17_32 10 GPIO_ACTIVE_LOW>; 714 color = <LED_COLOR_ID_YELLOW>; 715 }; 716 717 led-id-dimm-rssd28 { 718 label = "LED_ID_RSSD28"; 719 gpios = <&smb_svc_pex_rssd17_32 11 GPIO_ACTIVE_LOW>; 720 color = <LED_COLOR_ID_YELLOW>; 721 }; 722 723 led-id-dimm-rssd29 { 724 label = "LED_ID_RSSD29"; 725 gpios = <&smb_svc_pex_rssd17_32 12 GPIO_ACTIVE_LOW>; 726 color = <LED_COLOR_ID_YELLOW>; 727 }; 728 729 led-id-dimm-rssd30 { 730 label = "LED_ID_RSSD30"; 731 gpios = <&smb_svc_pex_rssd17_32 13 GPIO_ACTIVE_LOW>; 732 color = <LED_COLOR_ID_YELLOW>; 733 }; 734 735 led-id-dimm-rssd31 { 736 label = "LED_ID_RSSD31"; 737 gpios = <&smb_svc_pex_rssd17_32 14 GPIO_ACTIVE_LOW>; 738 color = <LED_COLOR_ID_YELLOW>; 739 }; 740 741 led-id-dimm-rssd32 { 742 label = "LED_ID_RSSD32"; 743 gpios = <&smb_svc_pex_rssd17_32 15 GPIO_ACTIVE_LOW>; 744 color = <LED_COLOR_ID_YELLOW>; 745 }; 746 747 led-id-fan-asm01 { 748 label = "LED_ID_FAN_ASM01"; 749 gpios = <&smb_svc_pex_rssd01_16 32 GPIO_ACTIVE_LOW>; 750 color = <LED_COLOR_ID_YELLOW>; 751 }; 752 753 led-id-fan-asm02 { 754 label = "LED_ID_FAN_ASM02"; 755 gpios = <&smb_svc_pex_rssd01_16 33 GPIO_ACTIVE_LOW>; 756 color = <LED_COLOR_ID_YELLOW>; 757 }; 758 759 led-id-fan-asm03 { 760 label = "LED_ID_FAN_ASM03"; 761 gpios = <&smb_svc_pex_rssd01_16 34 GPIO_ACTIVE_LOW>; 762 color = <LED_COLOR_ID_YELLOW>; 763 }; 764 765 led-id-fan-asm04 { 766 label = "LED_ID_FAN_ASM04"; 767 gpios = <&smb_svc_pex_rssd01_16 35 GPIO_ACTIVE_LOW>; 768 color = <LED_COLOR_ID_YELLOW>; 769 }; 770 771 led-id-fan-asm05 { 772 label = "LED_ID_FAN_ASM05"; 773 gpios = <&smb_svc_pex_rssd01_16 36 GPIO_ACTIVE_LOW>; 774 color = <LED_COLOR_ID_YELLOW>; 775 }; 776 777 led-id-fan-asm06 { 778 label = "LED_ID_FAN_ASM06"; 779 gpios = <&smb_svc_pex_rssd01_16 37 GPIO_ACTIVE_LOW>; 780 color = <LED_COLOR_ID_YELLOW>; 781 }; 782 783 led-id-fan-asm07 { 784 label = "LED_ID_FAN_ASM07"; 785 gpios = <&smb_svc_pex_rssd17_32 32 GPIO_ACTIVE_LOW>; 786 color = <LED_COLOR_ID_YELLOW>; 787 }; 788 789 led-id-fan-asm08 { 790 label = "LED_ID_FAN_ASM08"; 791 gpios = <&smb_svc_pex_rssd17_32 33 GPIO_ACTIVE_LOW>; 792 color = <LED_COLOR_ID_YELLOW>; 793 }; 794 795 led-id-fan-asm09 { 796 label = "LED_ID_FAN_ASM09"; 797 gpios = <&smb_svc_pex_rssd17_32 34 GPIO_ACTIVE_LOW>; 798 color = <LED_COLOR_ID_YELLOW>; 799 }; 800 801 led-id-fan-asm10 { 802 label = "LED_ID_FAN_ASM10"; 803 gpios = <&smb_svc_pex_rssd17_32 35 GPIO_ACTIVE_LOW>; 804 color = <LED_COLOR_ID_YELLOW>; 805 }; 806 807 led-id-fan-asm11 { 808 label = "LED_ID_FAN_ASM11"; 809 gpios = <&smb_svc_pex_rssd17_32 36 GPIO_ACTIVE_LOW>; 810 color = <LED_COLOR_ID_YELLOW>; 811 }; 812 813 led-id-fan-asm12 { 814 label = "LED_ID_FAN_ASM12"; 815 gpios = <&smb_svc_pex_rssd17_32 37 GPIO_ACTIVE_LOW>; 816 color = <LED_COLOR_ID_YELLOW>; 817 }; 818 }; 819 820 iio-hwmon { 821 compatible = "iio-hwmon"; 822 io-channels = <&p12v_vd 0>, <&p5v_aux_vd 0>, <&p5v_bmc_aux_vd 0>, <&p3v3_aux_vd 0>, 823 <&p3v3_bmc_aux_vd 0>, <&p1v8_bmc_aux_vd 0>, <&adc1 4>, <&adc0 2>, <&adc1 0>, 824 <&p2V5_aux_vd 0>, <&p3v3_rtc_vd 0>; 825 }; 826 827 p12v_vd: voltage-divider1 { 828 compatible = "voltage-divider"; 829 io-channels = <&adc1 3>; 830 #io-channel-cells = <1>; 831 832 /* 833 * Scale the system voltage by 1127/127 to fit the ADC range. 834 * Use small nominator to prevent integer overflow. 835 */ 836 output-ohms = <15>; 837 full-ohms = <133>; 838 }; 839 840 p5v_aux_vd: voltage-divider2 { 841 compatible = "voltage-divider"; 842 io-channels = <&adc1 5>; 843 #io-channel-cells = <1>; 844 845 /* 846 * Scale the system voltage by 1365/365 to fit the ADC range. 847 * Use small nominator to prevent integer overflow. 848 */ 849 output-ohms = <50>; 850 full-ohms = <187>; 851 }; 852 853 p5v_bmc_aux_vd: voltage-divider3 { 854 compatible = "voltage-divider"; 855 io-channels = <&adc0 3>; 856 #io-channel-cells = <1>; 857 858 /* 859 * Scale the system voltage by 1365/365 to fit the ADC range. 860 * Use small nominator to prevent integer overflow. 861 */ 862 output-ohms = <50>; 863 full-ohms = <187>; 864 }; 865 866 p3v3_aux_vd: voltage-divider4 { 867 compatible = "voltage-divider"; 868 io-channels = <&adc1 2>; 869 #io-channel-cells = <1>; 870 871 /* 872 * Scale the system voltage by 1698/698 to fit the ADC range. 873 * Use small nominator to prevent integer overflow. 874 */ 875 output-ohms = <14>; 876 full-ohms = <34>; 877 }; 878 879 p3v3_bmc_aux_vd: voltage-divider5 { 880 compatible = "voltage-divider"; 881 io-channels = <&adc0 7>; 882 #io-channel-cells = <1>; 883 884 /* 885 * Scale the system voltage by 1698/698 to fit the ADC range. 886 * Use small nominator to prevent integer overflow. 887 */ 888 output-ohms = <14>; 889 full-ohms = <34>; 890 }; 891 892 p1v8_bmc_aux_vd: voltage-divider6 { 893 compatible = "voltage-divider"; 894 io-channels = <&adc0 6>; 895 #io-channel-cells = <1>; 896 897 /* 898 * Scale the system voltage by 4000/3000 to fit the ADC range. 899 * Use small nominator to prevent integer overflow. 900 */ 901 output-ohms = <3>; 902 full-ohms = <4>; 903 }; 904 905 p2V5_aux_vd: voltage-divider7 { 906 compatible = "voltage-divider"; 907 io-channels = <&adc1 1>; 908 #io-channel-cells = <1>; 909 910 /* 911 * Scale the system voltage by 2100/1100 to fit the ADC range. 912 * Use small nominator to prevent integer overflow. 913 */ 914 output-ohms = <11>; 915 full-ohms = <21>; 916 }; 917 918 p3v3_rtc_vd: voltage-divider8 { 919 compatible = "voltage-divider"; 920 io-channels = <&adc1 7>; 921 #io-channel-cells = <1>; 922 923 /* 924 * Scale the system voltage by 231000/100000 to fit the ADC range. 925 * Use small nominator to prevent integer overflow. 926 */ 927 output-ohms = <100>; 928 full-ohms = <231>; 929 }; 930 931 thermistor0: thermistor-0 { 932 compatible = "epcos,b57891s0103"; 933 pullup-uv = <3300000>; 934 pullup-ohm = <10000>; 935 pulldown-ohm = <0>; 936 io-channels = <&adc0 0>; 937 #thermal-sensor-cells = <0>; 938 }; 939 940 thermistor1: thermistor-1 { 941 compatible = "epcos,b57891s0103"; 942 pullup-uv = <3300000>; 943 pullup-ohm = <10000>; 944 pulldown-ohm = <0>; 945 io-channels = <&adc0 1>; 946 #thermal-sensor-cells = <0>; 947 }; 948 949 thermistor2: thermistor-2 { 950 compatible = "epcos,b57891s0103"; 951 pullup-uv = <3300000>; 952 pullup-ohm = <10000>; 953 pulldown-ohm = <0>; 954 io-channels = <&adc0 4>; 955 #thermal-sensor-cells = <0>; 956 }; 957 958 thermistor3: thermistor-3 { 959 compatible = "epcos,b57891s0103"; 960 pullup-uv = <3300000>; 961 pullup-ohm = <10000>; 962 pulldown-ohm = <0>; 963 io-channels = <&adc0 5>; 964 #thermal-sensor-cells = <0>; 965 }; 966 967 p12v: fixedregulator-p12v { 968 compatible = "regulator-fixed"; 969 regulator-name = "p12v"; 970 regulator-min-microvolt = <12000000>; 971 regulator-max-microvolt = <12000000>; 972 regulator-always-on; 973 regulator-boot-on; 974 }; 975 976 p3v3_bmc_aux: fixedregulator-p3v3-bmc-aux { 977 compatible = "regulator-fixed"; 978 regulator-name = "p3v3_bmc_aux"; 979 regulator-min-microvolt = <3300000>; 980 regulator-max-microvolt = <3300000>; 981 regulator-always-on; 982 regulator-boot-on; 983 }; 984 985 p1v8_bmc_aux: fixedregulator-p1v8-bmc-aux { 986 compatible = "regulator-fixed"; 987 regulator-name = "p1v8_bmc_aux"; 988 regulator-min-microvolt = <1800000>; 989 regulator-max-microvolt = <1800000>; 990 regulator-always-on; 991 }; 992 993 p1v2_bmc_aux: fixedregulator-p1v2-bmc-aux { 994 compatible = "regulator-fixed"; 995 regulator-name = "p1v2_bmc_aux"; 996 regulator-min-microvolt = <1200000>; 997 regulator-max-microvolt = <1200000>; 998 regulator-always-on; 999 regulator-boot-on; 1000 }; 1001 1002 p12v-a-consumer { 1003 compatible = "regulator-output"; 1004 vout-supply = <&p12v_a>; 1005 }; 1006 1007 p12v-b-consumer { 1008 compatible = "regulator-output"; 1009 vout-supply = <&p12v_b>; 1010 }; 1011 1012 p12v-c-consumer { 1013 compatible = "regulator-output"; 1014 vout-supply = <&p12v_c>; 1015 }; 1016 1017 p12v-d-consumer { 1018 compatible = "regulator-output"; 1019 vout-supply = <&p12v_d>; 1020 }; 1021 1022 pvccinfaon-cpu0-consumer { 1023 compatible = "regulator-output"; 1024 vout-supply = <&pvccinfaon_cpu0>; 1025 }; 1026 1027 pvccfa-ehv-cpu0-consumer { 1028 compatible = "regulator-output"; 1029 vout-supply = <&pvccfa_ehv_cpu0>; 1030 }; 1031 1032 pvnn-main-cpu0-consumer { 1033 compatible = "regulator-output"; 1034 vout-supply = <&pvnn_main_cpu0>; 1035 }; 1036 1037 pvccin-cpu0-consumer { 1038 compatible = "regulator-output"; 1039 vout-supply = <&pvccin_cpu0>; 1040 }; 1041 1042 pvccfa-ehv-fivra-cpu0-consumer { 1043 compatible = "regulator-output"; 1044 vout-supply = <&pvccfa_ehv_fivra_cpu0>; 1045 }; 1046 1047 pvccd-hv-cpu0-consumer { 1048 compatible = "regulator-output"; 1049 vout-supply = <&pvccd_hv_cpu0>; 1050 }; 1051 1052 pvpp-hbm-cpu0-consumer { 1053 compatible = "regulator-output"; 1054 vout-supply = <&pvpp_hbm_cpu0>; 1055 }; 1056 1057 pvccinfaon-cpu1-consumer { 1058 compatible = "regulator-output"; 1059 vout-supply = <&pvccinfaon_cpu1>; 1060 }; 1061 1062 pvccfa-ehv-cpu1-consumer { 1063 compatible = "regulator-output"; 1064 vout-supply = <&pvccfa_ehv_cpu1>; 1065 }; 1066 1067 pvnn-main-cpu1-consumer { 1068 compatible = "regulator-output"; 1069 vout-supply = <&pvnn_main_cpu1>; 1070 }; 1071 1072 pvccin-cpu1-consumer { 1073 compatible = "regulator-output"; 1074 vout-supply = <&pvccin_cpu1>; 1075 }; 1076 1077 pvccfa-ehv-fivra-cpu1-consumer { 1078 compatible = "regulator-output"; 1079 vout-supply = <&pvccfa_ehv_fivra_cpu1>; 1080 }; 1081 1082 pvccd-hv-cpu1-consumer { 1083 compatible = "regulator-output"; 1084 vout-supply = <&pvccd_hv_cpu1>; 1085 }; 1086 1087 pvpp-hbm-cpu1-consumer { 1088 compatible = "regulator-output"; 1089 vout-supply = <&pvpp_hbm_cpu1>; 1090 }; 1091 1092 pvccinfaon-cpu2-consumer { 1093 compatible = "regulator-output"; 1094 vout-supply = <&pvccinfaon_cpu2>; 1095 }; 1096 1097 pvccfa-ehv-cpu2-consumer { 1098 compatible = "regulator-output"; 1099 vout-supply = <&pvccfa_ehv_cpu2>; 1100 }; 1101 1102 pvnn-main-cpu2-consumer { 1103 compatible = "regulator-output"; 1104 vout-supply = <&pvnn_main_cpu2>; 1105 }; 1106 1107 pvccin-cpu2-consumer { 1108 compatible = "regulator-output"; 1109 vout-supply = <&pvccin_cpu2>; 1110 }; 1111 1112 pvccfa-ehv-fivra-cpu2-consumer { 1113 compatible = "regulator-output"; 1114 vout-supply = <&pvccfa_ehv_fivra_cpu2>; 1115 }; 1116 1117 pvccd-hv-cpu2-consumer { 1118 compatible = "regulator-output"; 1119 vout-supply = <&pvccd_hv_cpu2>; 1120 }; 1121 1122 pvpp-hbm-cpu2-consumer { 1123 compatible = "regulator-output"; 1124 vout-supply = <&pvpp_hbm_cpu2>; 1125 }; 1126 1127 pvccinfaon-cpu3-consumer { 1128 compatible = "regulator-output"; 1129 vout-supply = <&pvccinfaon_cpu3>; 1130 }; 1131 1132 pvccfa-ehv-cpu3-consumer { 1133 compatible = "regulator-output"; 1134 vout-supply = <&pvccfa_ehv_cpu3>; 1135 }; 1136 1137 pvnn-main-cpu3-consumer { 1138 compatible = "regulator-output"; 1139 vout-supply = <&pvnn_main_cpu3>; 1140 }; 1141 1142 pvccin-cpu3-consumer { 1143 compatible = "regulator-output"; 1144 vout-supply = <&pvccin_cpu3>; 1145 }; 1146 1147 pvccfa-ehv-fivra-cpu3-consumer { 1148 compatible = "regulator-output"; 1149 vout-supply = <&pvccfa_ehv_fivra_cpu3>; 1150 }; 1151 1152 pvccd-hv-cpu3-consumer { 1153 compatible = "regulator-output"; 1154 vout-supply = <&pvccd_hv_cpu3>; 1155 }; 1156 1157 pvpp-hbm-cpu3-consumer { 1158 compatible = "regulator-output"; 1159 vout-supply = <&pvpp_hbm_cpu3>; 1160 }; 1161 1162 p1v05-pch-aux-consumer { 1163 compatible = "regulator-output"; 1164 vout-supply = <&p1v05_pch_aux>; 1165 }; 1166 1167 p1v8-pch-aux-consumer { 1168 compatible = "regulator-output"; 1169 vout-supply = <&p1v8_pch_aux>; 1170 }; 1171 1172 p3v3-pch-consumer { 1173 compatible = "regulator-output"; 1174 vout-supply = <&p3v3_pch>; 1175 }; 1176 1177 p5v-consumer { 1178 compatible = "regulator-output"; 1179 vout-supply = <&p5v>; 1180 }; 1181 1182 smb-m2-ssb-ssd2 { 1183 compatible = "regulator-output"; 1184 vout-supply = <&sw0_smb_m2_ssb_ssd2>; 1185 }; 1186 1187 smb-m2-ssb-ssd1 { 1188 compatible = "regulator-output"; 1189 vout-supply = <&sw0_smb_m2_ssb_ssd1>; 1190 }; 1191 1192 ssb-rssd01-sw0 { 1193 compatible = "regulator-output"; 1194 vout-supply = <&sw0_ssb_rssd01>; 1195 }; 1196 1197 ssb-rssd01-sw1 { 1198 compatible = "regulator-output"; 1199 vout-supply = <&sw1_ssb_rssd01>; 1200 }; 1201 1202 ssb-rssd02-sw0 { 1203 compatible = "regulator-output"; 1204 vout-supply = <&sw0_ssb_rssd02>; 1205 }; 1206 1207 ssb-rssd02-sw1 { 1208 compatible = "regulator-output"; 1209 vout-supply = <&sw1_ssb_rssd02>; 1210 }; 1211 1212 ssb-rssd03-sw0 { 1213 compatible = "regulator-output"; 1214 vout-supply = <&sw0_ssb_rssd03>; 1215 }; 1216 1217 ssb-rssd03-sw1 { 1218 compatible = "regulator-output"; 1219 vout-supply = <&sw1_ssb_rssd03>; 1220 }; 1221 1222 ssb-rssd04-sw0 { 1223 compatible = "regulator-output"; 1224 vout-supply = <&sw0_ssb_rssd04>; 1225 }; 1226 1227 ssb-rssd04-sw1 { 1228 compatible = "regulator-output"; 1229 vout-supply = <&sw1_ssb_rssd04>; 1230 }; 1231 1232 ssb-rssd05-sw0 { 1233 compatible = "regulator-output"; 1234 vout-supply = <&sw0_ssb_rssd05>; 1235 }; 1236 1237 ssb-rssd05-sw1 { 1238 compatible = "regulator-output"; 1239 vout-supply = <&sw1_ssb_rssd05>; 1240 }; 1241 1242 ssb-rssd06-sw0 { 1243 compatible = "regulator-output"; 1244 vout-supply = <&sw0_ssb_rssd06>; 1245 }; 1246 1247 ssb-rssd06-sw1 { 1248 compatible = "regulator-output"; 1249 vout-supply = <&sw1_ssb_rssd06>; 1250 }; 1251 1252 ssb-rssd07-sw0 { 1253 compatible = "regulator-output"; 1254 vout-supply = <&sw0_ssb_rssd07>; 1255 }; 1256 1257 ssb-rssd07-sw1 { 1258 compatible = "regulator-output"; 1259 vout-supply = <&sw1_ssb_rssd07>; 1260 }; 1261 1262 ssb-rssd08-sw0 { 1263 compatible = "regulator-output"; 1264 vout-supply = <&sw0_ssb_rssd08>; 1265 }; 1266 1267 ssb-rssd08-sw1 { 1268 compatible = "regulator-output"; 1269 vout-supply = <&sw1_ssb_rssd08>; 1270 }; 1271 1272 ssb-rssd09-sw0 { 1273 compatible = "regulator-output"; 1274 vout-supply = <&sw0_ssb_rssd09>; 1275 }; 1276 1277 ssb-rssd09-sw1 { 1278 compatible = "regulator-output"; 1279 vout-supply = <&sw1_ssb_rssd09>; 1280 }; 1281 1282 ssb-rssd10-sw0 { 1283 compatible = "regulator-output"; 1284 vout-supply = <&sw0_ssb_rssd10>; 1285 }; 1286 1287 ssb-rssd10-sw1 { 1288 compatible = "regulator-output"; 1289 vout-supply = <&sw1_ssb_rssd10>; 1290 }; 1291 1292 ssb-rssd11-sw0 { 1293 compatible = "regulator-output"; 1294 vout-supply = <&sw0_ssb_rssd11>; 1295 }; 1296 1297 ssb-rssd11-sw1 { 1298 compatible = "regulator-output"; 1299 vout-supply = <&sw1_ssb_rssd11>; 1300 }; 1301 1302 ssb-rssd12-sw0 { 1303 compatible = "regulator-output"; 1304 vout-supply = <&sw0_ssb_rssd12>; 1305 }; 1306 1307 ssb-rssd12-sw1 { 1308 compatible = "regulator-output"; 1309 vout-supply = <&sw1_ssb_rssd12>; 1310 }; 1311 1312 ssb-rssd13-sw0 { 1313 compatible = "regulator-output"; 1314 vout-supply = <&sw0_ssb_rssd13>; 1315 }; 1316 1317 ssb-rssd13-sw1 { 1318 compatible = "regulator-output"; 1319 vout-supply = <&sw1_ssb_rssd13>; 1320 }; 1321 1322 ssb-rssd14-sw0 { 1323 compatible = "regulator-output"; 1324 vout-supply = <&sw0_ssb_rssd14>; 1325 }; 1326 1327 ssb-rssd14-sw1 { 1328 compatible = "regulator-output"; 1329 vout-supply = <&sw1_ssb_rssd14>; 1330 }; 1331 1332 ssb-rssd15-sw0 { 1333 compatible = "regulator-output"; 1334 vout-supply = <&sw0_ssb_rssd15>; 1335 }; 1336 1337 ssb-rssd15-sw1 { 1338 compatible = "regulator-output"; 1339 vout-supply = <&sw1_ssb_rssd15>; 1340 }; 1341 1342 ssb-rssd16-sw0 { 1343 compatible = "regulator-output"; 1344 vout-supply = <&sw0_ssb_rssd16>; 1345 }; 1346 1347 ssb-rssd16-sw1 { 1348 compatible = "regulator-output"; 1349 vout-supply = <&sw1_ssb_rssd16>; 1350 }; 1351 1352 ssb-rssd17-sw0 { 1353 compatible = "regulator-output"; 1354 vout-supply = <&sw0_ssb_rssd17>; 1355 }; 1356 1357 ssb-rssd17-sw1 { 1358 compatible = "regulator-output"; 1359 vout-supply = <&sw1_ssb_rssd17>; 1360 }; 1361 1362 ssb-rssd18-sw0 { 1363 compatible = "regulator-output"; 1364 vout-supply = <&sw0_ssb_rssd18>; 1365 }; 1366 1367 ssb-rssd18-sw1 { 1368 compatible = "regulator-output"; 1369 vout-supply = <&sw1_ssb_rssd18>; 1370 }; 1371 1372 ssb-rssd19-sw0 { 1373 compatible = "regulator-output"; 1374 vout-supply = <&sw0_ssb_rssd19>; 1375 }; 1376 1377 ssb-rssd19-sw1 { 1378 compatible = "regulator-output"; 1379 vout-supply = <&sw1_ssb_rssd19>; 1380 }; 1381 1382 ssb-rssd20-sw0 { 1383 compatible = "regulator-output"; 1384 vout-supply = <&sw0_ssb_rssd20>; 1385 }; 1386 1387 ssb-rssd20-sw1 { 1388 compatible = "regulator-output"; 1389 vout-supply = <&sw1_ssb_rssd20>; 1390 }; 1391 1392 ssb-rssd21-sw0 { 1393 compatible = "regulator-output"; 1394 vout-supply = <&sw0_ssb_rssd21>; 1395 }; 1396 1397 ssb-rssd21-sw1 { 1398 compatible = "regulator-output"; 1399 vout-supply = <&sw1_ssb_rssd21>; 1400 }; 1401 1402 ssb-rssd22-sw0 { 1403 compatible = "regulator-output"; 1404 vout-supply = <&sw0_ssb_rssd22>; 1405 }; 1406 1407 ssb-rssd22-sw1 { 1408 compatible = "regulator-output"; 1409 vout-supply = <&sw1_ssb_rssd22>; 1410 }; 1411 1412 ssb-rssd23-sw0 { 1413 compatible = "regulator-output"; 1414 vout-supply = <&sw0_ssb_rssd23>; 1415 }; 1416 1417 ssb-rssd23-sw1 { 1418 compatible = "regulator-output"; 1419 vout-supply = <&sw1_ssb_rssd23>; 1420 }; 1421 1422 ssb-rssd24-sw0 { 1423 compatible = "regulator-output"; 1424 vout-supply = <&sw0_ssb_rssd24>; 1425 }; 1426 1427 ssb-rssd24-sw1 { 1428 compatible = "regulator-output"; 1429 vout-supply = <&sw1_ssb_rssd24>; 1430 }; 1431 1432 ssb-rssd25-sw0 { 1433 compatible = "regulator-output"; 1434 vout-supply = <&sw0_ssb_rssd25>; 1435 }; 1436 1437 ssb-rssd25-sw1 { 1438 compatible = "regulator-output"; 1439 vout-supply = <&sw1_ssb_rssd25>; 1440 }; 1441 1442 ssb-rssd26-sw0 { 1443 compatible = "regulator-output"; 1444 vout-supply = <&sw0_ssb_rssd26>; 1445 }; 1446 1447 ssb-rssd26-sw1 { 1448 compatible = "regulator-output"; 1449 vout-supply = <&sw1_ssb_rssd26>; 1450 }; 1451 1452 ssb-rssd27-sw0 { 1453 compatible = "regulator-output"; 1454 vout-supply = <&sw0_ssb_rssd27>; 1455 }; 1456 1457 ssb-rssd27-sw1 { 1458 compatible = "regulator-output"; 1459 vout-supply = <&sw1_ssb_rssd27>; 1460 }; 1461 1462 ssb-rssd28-sw0 { 1463 compatible = "regulator-output"; 1464 vout-supply = <&sw0_ssb_rssd28>; 1465 }; 1466 1467 ssb-rssd28-sw1 { 1468 compatible = "regulator-output"; 1469 vout-supply = <&sw1_ssb_rssd28>; 1470 }; 1471 1472 ssb-rssd29-sw0 { 1473 compatible = "regulator-output"; 1474 vout-supply = <&sw0_ssb_rssd29>; 1475 }; 1476 1477 ssb-rssd29-sw1 { 1478 compatible = "regulator-output"; 1479 vout-supply = <&sw1_ssb_rssd29>; 1480 }; 1481 1482 ssb-rssd30-sw0 { 1483 compatible = "regulator-output"; 1484 vout-supply = <&sw0_ssb_rssd30>; 1485 }; 1486 1487 ssb-rssd30-sw1 { 1488 compatible = "regulator-output"; 1489 vout-supply = <&sw1_ssb_rssd30>; 1490 }; 1491 1492 ssb-rssd31-sw0 { 1493 compatible = "regulator-output"; 1494 vout-supply = <&sw0_ssb_rssd31>; 1495 }; 1496 1497 ssb-rssd31-sw1 { 1498 compatible = "regulator-output"; 1499 vout-supply = <&sw1_ssb_rssd31>; 1500 }; 1501 1502 ssb-rssd32-sw0 { 1503 compatible = "regulator-output"; 1504 vout-supply = <&sw0_ssb_rssd32>; 1505 }; 1506 1507 ssb-rssd32-sw1 { 1508 compatible = "regulator-output"; 1509 vout-supply = <&sw1_ssb_rssd32>; 1510 }; 1511 1512 p3v3-nic-consumer { 1513 compatible = "regulator-output"; 1514 vout-supply = <&p3v3_nic>; 1515 }; 1516 1517 p1v8-nic-consumer { 1518 compatible = "regulator-output"; 1519 vout-supply = <&p1v8_nic>; 1520 }; 1521 1522 p1v2-nic-consumer { 1523 compatible = "regulator-output"; 1524 vout-supply = <&p1v2_nic>; 1525 }; 1526 1527 pvcore-nic1-consumer { 1528 compatible = "regulator-output"; 1529 vout-supply = <&pvcore_nic1>; 1530 }; 1531 1532 pvcore-nic2-consumer { 1533 compatible = "regulator-output"; 1534 vout-supply = <&pvcore_nic2>; 1535 }; 1536}; 1537 1538&peci0 { 1539 status = "okay"; 1540}; 1541 1542&vuart1 { 1543 status = "okay"; 1544}; 1545 1546&lpc_snoop { 1547 status = "okay"; 1548 snoop-ports = <0x80>, <0x81>; 1549}; 1550 1551&fmc { 1552 status = "okay"; 1553 flash@0 { 1554 status = "okay"; 1555 m25p,fast-read; 1556 label = "bmc"; 1557 spi-tx-bus-width = <1>; 1558 spi-rx-bus-width = <4>; 1559#include "openbmc-flash-layout-64.dtsi" 1560 }; 1561 1562 flash@1 { 1563 status = "okay"; 1564 m25p,fast-read; 1565 label = "alt-bmc"; 1566 spi-tx-bus-width = <1>; 1567 spi-rx-bus-width = <4>; 1568#include "openbmc-flash-layout-64-alt.dtsi" 1569 }; 1570}; 1571 1572&uart1 { 1573 status = "okay"; 1574 pinctrl-names = "default"; 1575 pinctrl-0 = <&pinctrl_txd1_default 1576 &pinctrl_rxd1_default 1577 &pinctrl_nrts1_default 1578 &pinctrl_ndtr1_default 1579 &pinctrl_ndsr1_default 1580 &pinctrl_ncts1_default 1581 &pinctrl_ndcd1_default 1582 &pinctrl_nri1_default>; 1583}; 1584 1585&uart5 { 1586 status = "disabled"; 1587}; 1588 1589&gpio1 { 1590 status = "disabled"; 1591}; 1592 1593&video { 1594 status = "okay"; 1595}; 1596 1597&vhub { 1598 status = "okay"; 1599}; 1600 1601&pinctrl { 1602 pinctrl-names = "default"; 1603 pinctrl-0 = <&pinctrl_vgahs_default &pinctrl_vgavs_default>; 1604}; 1605 1606&mdio2 { 1607 status = "okay"; 1608 1609 ethphy2: ethernet-phy@0 { 1610 compatible = "ethernet-phy-ieee802.3-c22"; 1611 reg = <0>; 1612 reset-gpios = <&gpio0 ASPEED_GPIO(V, 7) GPIO_ACTIVE_LOW>; 1613 reset-assert-us = <10000>; 1614 reset-deassert-us = <300>; 1615 }; 1616}; 1617 1618&mdio3 { 1619 status = "okay"; 1620 1621 ethphy3: ethernet-phy@0 { 1622 compatible = "ethernet-phy-ieee802.3-c22"; 1623 reg = <0>; 1624 reset-gpios = <&gpio0 ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>; 1625 reset-assert-us = <10000>; 1626 reset-deassert-us = <300>; 1627 }; 1628}; 1629 1630&mac2 { 1631 status = "okay"; 1632 1633 phy-mode = "rgmii"; 1634 phy-handle = <ðphy2>; 1635 1636 pinctrl-names = "default"; 1637 pinctrl-0 = <&pinctrl_rgmii3_default>; 1638}; 1639 1640&mac3 { 1641 status = "okay"; 1642 1643 phy-mode = "rgmii"; 1644 phy-handle = <ðphy3>; 1645 1646 pinctrl-names = "default"; 1647 pinctrl-0 = <&pinctrl_rgmii4_default>; 1648}; 1649 1650&adc0 { 1651 status = "okay"; 1652 vref-supply = <&p1v8_bmc_aux>; 1653 1654 pinctrl-names = "default"; 1655 pinctrl-0 = <&pinctrl_adc0_default 1656 &pinctrl_adc1_default 1657 &pinctrl_adc2_default 1658 &pinctrl_adc3_default 1659 &pinctrl_adc4_default 1660 &pinctrl_adc5_default 1661 &pinctrl_adc6_default 1662 &pinctrl_adc7_default>; 1663}; 1664 1665&adc1 { 1666 status = "okay"; 1667 vref-supply = <&p1v8_bmc_aux>; 1668 aspeed,battery-sensing; 1669 1670 pinctrl-names = "default"; 1671 pinctrl-0 = <&pinctrl_adc8_default 1672 &pinctrl_adc9_default 1673 &pinctrl_adc10_default 1674 &pinctrl_adc11_default 1675 &pinctrl_adc12_default 1676 &pinctrl_adc13_default 1677 &pinctrl_adc15_default>; 1678}; 1679 1680&kcs3 { 1681 status = "okay"; 1682 aspeed,lpc-io-reg = <0xca2>; 1683}; 1684 1685&gpio0 { 1686 status = "okay"; 1687 gpio-line-names = 1688 /* A0 - A7 */ 1689 "", "", "", "", "", "", "", "", 1690 /* B0 - B7 */ 1691 "", "", "FM_ADR_TRIGGER_R_N", "RST_PLTRST_BUF_N", "BMC_TPM_RESET_N", "BMC_TPM_IRQ_N", 1692 "PCH_TPM_RESET_N", "PCH_TPM_IRQ_N", 1693 /* C0 - C7 */ 1694 "", "", "", "", "", "", "", "", 1695 /* D0 - D7 */ 1696 "", "", "", "", "", "", "", "", 1697 /* E0 - E7 */ 1698 "", "", "", "", "", "", "", "", 1699 /* F0 - F7 */ 1700 "", "", "", "BMC_MUX_CPU1_RST_INT_N", "BMC_MUX_CPU2_RST_INT_N", "", "", "", 1701 /* G0 - G7 */ 1702 "FM_SSD_CLK_DRVR1_EN", "FM_CK440Q_DEV_EN", "BMC_MAC1_RESET_N", "FM_DB2000_DEV_EN", 1703 "FM_CPU_RMCA_LVT3_N", "FM_CPU_CATERR_LVT3_N", "FM_DBP_PRESENT_N", "", 1704 /* H0 - H7 */ 1705 "SMB_SVC_PEX_RSSD17_32_INT", "LED_BMC_RDY", "RST_DBP_N", "", "", "", "", "", 1706 /* I0 - I7 */ 1707 "JTAG_MUX_MODE_SEL", "JTAG_MUX_TRANS_ENBL", "JTAG_MUX_LSP_SEL5", "JTAG_MUX_MSTR_SEL", 1708 "JTAG_MUX_LSP_SEL3", "", "JTAG_MUX_ENBL_N", "JTAG_MUX_RST_N", 1709 /* J0 - J7 */ 1710 "", "", "", "", "", "", "", "", 1711 /* K0 - K7 */ 1712 "", "", "", "", "", "", "", "", 1713 /* L0 - L7 */ 1714 "", "", "", "", "RST_RTCRST_N", "RST_SRTCRST_N", "", "", 1715 /* M0 - M7 */ 1716 "BMC_UART1_CTS_N", "BMC_UART1_DCD_N", "BMC_UART1_DSR_N", "BMC_UART1_RI_N", 1717 "BMC_UART1_DTR_N", "BMC_UART1_RTS_N", "", "", 1718 /* N0 - N7 */ 1719 "IRQ_BMC_PCH_NMI", "", "FM_PCH_BMC_THERMTRIP_N", "FM_BIOS_POST_CMPLT_N", "RST_PLTRST_N", 1720 "FM_FLASH_SEC_OVRD", "FM_SMI_ACTIVE_N", "PWRGD_DBP", 1721 /* O0 - O7 */ 1722 "CATERR_CPU2_EN", "H_LVT1_THERMTRIP_N", "CATERR_CPU3_EN", "SMB_SVC_PEX_CPU0_LED_INT", 1723 "H_LVT1_MEMTRIP_N", "", "CATERR_CPU1_EN", "FM_PCH_ADR_COMPLETE_N", 1724 /* P0 - P7 */ 1725 "PWRGD_SYS_PWROK", "PWRGD_PCH_PWROK", "BMC_MUX_CPU3_RST_INT_N", "BMC_MUX_SVC_RSSD_INT", 1726 "FM_SLPS4_N", "IRQ_SML0_ALERT_N", "FM_SLPS3_N", "LED_BMC_HB", 1727 /* Q0 - Q7 */ 1728 "", "PEX_BMC_RST", "PEX_VR_CTRL_RST", "PEX_NIC_RST", "PEX_CPU0_LED_RST", "PEX_CPU1_LED_RST", 1729 "PEX_CPU2_LED_RST", "PEX_CPU3_LED_RST", 1730 /* R0 - R7 */ 1731 "BMC_MUX_FANSSB_RSSD17_32_RST_INT_N", "BMC_MUX_FANPWM_RSSD01_16_RST_INT_N", 1732 "BMC_MUX_SVC_VR_RST_INT_N", "BMC_MUX_NIC_RST_INT_N", "BMC_MUX_SVC_EXP_RST_INT_N", 1733 "FM_CPU_ERR2_LVT3_N", "BMC_MUX_CPU0_RST_INT_N", "BMC_MUX_M2_RST_INT_N", 1734 /* S0 - S7 */ 1735 "SMB_SVC_PEX_RSSD01_16_INT", "RST_PCH_RSMRST_R_N", "", "", "BMC_ROT_FPGA_RESET_N", 1736 "FM_SSD_CLK_DRVR0_EN", "", "", 1737 /* T0 - T7 */ 1738 "", "", "", "", "", "", "", "", 1739 /* U0 - U7 */ 1740 "", "", "", "", "", "", "", "", 1741 /* V0 - V7 */ 1742 "BMC_PEX_IRQ_INT", "RTC_BATT_TEST", "SMB_PEX_VR_CTRL_INT", "SMB_SVC_PEX_CPU3_LED_INT", 1743 "PWRGD_CPUPWRGD", "SMB_SVC_PEX_CPU2_LED_INT", "SMB_SVC_PEX_CPU1_LED_INT", 1744 "BMC_MAC0_RESET_N", 1745 /* W0 - W7 */ 1746 "", "", "", "", "", "", "", "", 1747 /* X0 - X7 */ 1748 "", "", "", "", "", "", "", "", 1749 /* Y0 - Y7 */ 1750 "FM_THROTTLE_N", "FM_PASSWORD_CLEAR_N", "H_LVT3_CATERR_DLY_N", "FM_CPU_OL_INT_R_N", "", "", 1751 "", "", 1752 /* Z0 - Z7 */ 1753 "FM_CPU_ERR0_LVT3_N", "FM_CPU_ERR1_LVT3_N", "BMC_MUX_VR_PCH_CPU_RST_INT_N", 1754 "JTAG_MUX_LSP_SEL1", "", "JTAG_MUX_LSP_SEL4", "JTAG_MUX_LSP_SEL2", ""; 1755 1756 pinctrl-names = "default"; 1757 pinctrl-0 = <&pinctrl_gpio0_unbiased_default>; 1758}; 1759 1760&pinctrl { 1761 pinctrl_gpio0_unbiased_default: gpio_default { 1762 pins = "AB15", "AD14", "R23", "A18", "AD24", "AD15", "AE14", "AC15", "U25", "AA24", 1763 "V24", "W26", "AA23", "V26", "U24", "V25", "AE15", "C15", "F15"; 1764 bias-disable; 1765 }; 1766}; 1767 1768&i2c1 { 1769 status = "okay"; 1770 1771 bmc_mux_nic: mux@77 { 1772 compatible = "maxim,max7357"; 1773 reg = <0x77>; 1774 #address-cells = <1>; 1775 #size-cells = <0>; 1776 reset-gpios = <&gpio0 ASPEED_GPIO(R, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 1777 vdd-supply = <&p3v3_aux>; 1778 1779 i2c@0 { 1780 reg = <0>; 1781 #address-cells = <1>; 1782 #size-cells = <0>; 1783 1784 smb_pex_nic: pinctrl@20 { 1785 compatible = "cypress,cy8c9540"; 1786 reg = <0x20>; 1787 gpio-controller; 1788 #gpio-cells = <2>; 1789 1790 interrupt-parent = <&smb_pex_vr_ctrl>; 1791 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 1792 interrupt-controller; 1793 #interrupt-cells = <2>; 1794 1795 vdd-supply = <&p3v3_aux>; 1796 reset-gpios = <&gpio0 ASPEED_GPIO(Q, 3) GPIO_ACTIVE_HIGH>; 1797 1798 gpio-reserved-ranges = <19 1>, <22 6>, <30 6>, <38 2>; 1799 1800 gpio-line-names = 1801 /* GPORT0 */ 1802 "IRQ_NIC2_OVT_WRNG", "FM_NIC2_ALLSTANDBY_N", "IRQ_NIC2_OVT_SHTDN", 1803 "SMB_VR_PVCORE_NIC2_ALERT_N", "FM_NIC2_PERST1_N", 1804 "SMB_NIC2_ALERT_N", "FM_NIC2_PERST3_N", "FM_NIC2_PERST2_N", 1805 /* GPORT1 */ 1806 "FM_NIC1_RST_N", "FM_NIC1_PERST0_N", "FM_NIC1_PERST2_N", 1807 "FM_NIC1_PERST3_N", "SMB_NIC1_ALERT_N", "FM_NIC1_PERST1_N", 1808 "SMB_VR_PVCORE_NIC1_ALERT_N", "IRQ_NIC1_OVT_SHTDN", 1809 /* GPORT2 */ 1810 "SMB_VR_P3V3_NIC_ALERT_N", "FM_NIC2_FLASH_PRSNT", 1811 "FM_NIC1_FLASH_PRSNT", "", 1812 /* GPORT3 */ 1813 "FM_NIC2_PERST0_N", "FM_NIC2_RST_N", "", "", "", "", "", "", 1814 /* GPORT4 */ 1815 "FM_NIC1_ALLSTANDBY_N", "IRQ_NIC1_OVT_WRNG", "", "", "", "", "", "", 1816 /* GPORT5 */ 1817 "SMB_VR_P1V8_NIC_ALERT_N", "SMB_VR_P1V2_NIC_ALERT_N", "", ""; 1818 1819 pinctrl-0 = <&U62160_pins>; 1820 pinctrl-names = "default"; 1821 U62160_pins: cfg-pins { 1822 pins = "gp03", "gp16", "gp20", "gp50", "gp51"; 1823 function = "gpio"; 1824 input-enable; 1825 bias-pull-up; 1826 }; 1827 }; 1828 }; 1829 1830 i2c@1 { 1831 reg = <1>; 1832 #address-cells = <1>; 1833 #size-cells = <0>; 1834 }; 1835 1836 i2c@2 { 1837 reg = <2>; 1838 #address-cells = <1>; 1839 #size-cells = <0>; 1840 1841 pvcore_nic2: ir38263-pvcore-nic2@40 { 1842 compatible = "infineon,ir38263"; 1843 reg = <0x40>; 1844 1845 regulator-name = "pvcore_nic2"; 1846 regulator-enable-ramp-delay = <2000>; 1847 vin-supply = <&p12v>; 1848 }; 1849 }; 1850 1851 i2c@3 { 1852 reg = <3>; 1853 #address-cells = <1>; 1854 #size-cells = <0>; 1855 1856 pvcore_nic1: ir38263-pvcore-nic1@40 { 1857 compatible = "infineon,ir38263"; 1858 reg = <0x40>; 1859 1860 regulator-name = "pvcore_nic1"; 1861 regulator-enable-ramp-delay = <2000>; 1862 vin-supply = <&p12v>; 1863 }; 1864 }; 1865 1866 i2c@4 { 1867 reg = <4>; 1868 #address-cells = <1>; 1869 #size-cells = <0>; 1870 }; 1871 1872 i2c@5 { 1873 reg = <5>; 1874 #address-cells = <1>; 1875 #size-cells = <0>; 1876 1877 p3v3_nic: ir38263-p3v3-nic@40 { 1878 compatible = "infineon,ir38263"; 1879 reg = <0x40>; 1880 1881 regulator-name = "p3v3_nic"; 1882 regulator-enable-ramp-delay = <2000>; 1883 vin-supply = <&p12v>; 1884 }; 1885 }; 1886 1887 i2c@6 { 1888 reg = <6>; 1889 #address-cells = <1>; 1890 #size-cells = <0>; 1891 1892 p1v2_nic: ir38263-p1v2-nic@40 { 1893 compatible = "infineon,ir38263"; 1894 reg = <0x40>; 1895 1896 regulator-name = "p1v2_nic"; 1897 regulator-enable-ramp-delay = <2000>; 1898 vin-supply = <&p12v>; 1899 }; 1900 }; 1901 1902 i2c@7 { 1903 reg = <7>; 1904 #address-cells = <1>; 1905 #size-cells = <0>; 1906 1907 p1v8_nic: ir38263-p1v8-nic@40 { 1908 compatible = "infineon,ir38263"; 1909 reg = <0x40>; 1910 1911 regulator-name = "p1v8_nic"; 1912 regulator-enable-ramp-delay = <2000>; 1913 vin-supply = <&p12v>; 1914 }; 1915 }; 1916 }; 1917}; 1918 1919&i2c2 { 1920 status = "okay"; 1921}; 1922 1923&i2c3 { 1924 status = "okay"; 1925 1926 i2cmux1: mux@77 { 1927 compatible = "maxim,max7357"; 1928 reg = <0x77>; 1929 #address-cells = <1>; 1930 #size-cells = <0>; 1931 1932 reset-gpios = <&gpio0 ASPEED_GPIO(R, 7) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 1933 vdd-supply = <&p3v3_aux>; 1934 1935 i2c@0 { 1936 reg = <0>; 1937 #address-cells = <1>; 1938 #size-cells = <0>; 1939 }; 1940 1941 i2c@1 { 1942 reg = <1>; 1943 #address-cells = <1>; 1944 #size-cells = <0>; 1945 }; 1946 1947 i2c@2 { 1948 reg = <2>; 1949 #address-cells = <1>; 1950 #size-cells = <0>; 1951 }; 1952 1953 i2c@3 { 1954 reg = <3>; 1955 #address-cells = <1>; 1956 #size-cells = <0>; 1957 1958 smb_m2_ssb_ssd1: regulator@3a { 1959 compatible = "maxim,max5978"; 1960 reg = <0x3a>; 1961 vss1-supply = <&p3v3_aux>; 1962 1963 interrupt-parent = <&smb_pex_vr_ctrl>; 1964 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 1965 leds { 1966 #address-cells = <1>; 1967 #size-cells = <0>; 1968 1969 led@0 { 1970 reg = <0>; 1971 label = "m2_ssb_ssd1:green:power"; 1972 default-state = "off"; 1973 }; 1974 }; 1975 1976 regulators { 1977 sw0_smb_m2_ssb_ssd1: sw0 { 1978 shunt-resistor-micro-ohms = <12000>; 1979 regulator-over-current-protection; 1980 regulator-oc-protection-microamp = <2800000>; 1981 regulator-name = "p3v3_m2_ssd1"; 1982 regulator-enable-ramp-delay = <10000>; 1983 }; 1984 }; 1985 }; 1986 }; 1987 1988 i2c@4 { 1989 reg = <4>; 1990 #address-cells = <1>; 1991 #size-cells = <0>; 1992 }; 1993 1994 i2c@5 { 1995 reg = <5>; 1996 #address-cells = <1>; 1997 #size-cells = <0>; 1998 1999 smb_m2_ssb_ssd2: regulator@3a { 2000 compatible = "maxim,max5978"; 2001 reg = <0x3a>; 2002 2003 interrupt-parent = <&smb_pex_vr_ctrl>; 2004 interrupts = <39 IRQ_TYPE_LEVEL_LOW>; 2005 vss1-supply = <&p3v3_aux>; 2006 leds { 2007 #address-cells = <1>; 2008 #size-cells = <0>; 2009 2010 led@0 { 2011 reg = <0>; 2012 label = "m2_ssb_ssd2:green:power"; 2013 default-state = "off"; 2014 }; 2015 }; 2016 2017 regulators { 2018 sw0_smb_m2_ssb_ssd2: sw0 { 2019 shunt-resistor-micro-ohms = <12000>; 2020 regulator-over-current-protection; 2021 regulator-oc-protection-microamp = <2800000>; 2022 regulator-name = "p3v3_m2_ssd2"; 2023 regulator-enable-ramp-delay = <10000>; 2024 }; 2025 }; 2026 }; 2027 }; 2028 2029 i2c@6 { 2030 reg = <1>; 2031 #address-cells = <1>; 2032 #size-cells = <0>; 2033 }; 2034 2035 i2c@7 { 2036 reg = <1>; 2037 #address-cells = <1>; 2038 #size-cells = <0>; 2039 }; 2040 }; 2041}; 2042 2043&i2c4 { 2044 status = "okay"; 2045 multi-master; 2046 bus-frequency = <1000000>; 2047 2048 bmc-slave@10 { 2049 compatible = "ipmb-dev"; 2050 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 2051 2052 i2c-protocol; 2053 }; 2054}; 2055 2056&i2c5 { 2057 status = "okay"; 2058 2059 i2cmux2: mux@77 { 2060 compatible = "maxim,max7357"; 2061 reg = <0x77>; 2062 #address-cells = <1>; 2063 #size-cells = <0>; 2064 2065 reset-gpios = <&gpio0 ASPEED_GPIO(Z, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2066 vdd-supply = <&p3v3_aux>; 2067 2068 i2c@1 { 2069 reg = <1>; 2070 #address-cells = <1>; 2071 #size-cells = <0>; 2072 2073 p1v05_pch_aux: ir38263-p1v05-pch-aux@40 { 2074 compatible = "infineon,ir38263"; 2075 reg = <0x40>; 2076 2077 regulator-name = "p1v05_pch_aux"; 2078 regulator-enable-ramp-delay = <2000>; 2079 vin-supply = <&p12v>; 2080 }; 2081 }; 2082 2083 i2c@2 { 2084 reg = <2>; 2085 #address-cells = <1>; 2086 #size-cells = <0>; 2087 2088 p1v8_pch_aux: ir38060-p1v8-pch-aux@40 { 2089 compatible = "infineon,ir38060"; 2090 reg = <0x40>; 2091 2092 regulator-name = "p1v8_pch_aux"; 2093 regulator-enable-ramp-delay = <2000>; 2094 vin-supply = <&p12v>; 2095 }; 2096 }; 2097 2098 i2c@4 { 2099 reg = <4>; 2100 #address-cells = <1>; 2101 #size-cells = <0>; 2102 }; 2103 2104 i2c@5 { 2105 reg = <5>; 2106 #address-cells = <1>; 2107 #size-cells = <0>; 2108 }; 2109 2110 i2c@6 { 2111 reg = <6>; 2112 #address-cells = <1>; 2113 #size-cells = <0>; 2114 }; 2115 2116 i2c@7 { 2117 reg = <7>; 2118 #address-cells = <1>; 2119 #size-cells = <0>; 2120 }; 2121 }; 2122}; 2123 2124&i2c14 { 2125 status = "okay"; 2126 2127 i2cmux13: mux@77 { 2128 compatible = "maxim,max7357"; 2129 reg = <0x77>; 2130 #address-cells = <1>; 2131 #size-cells = <0>; 2132 2133 reset-gpios = <&gpio0 ASPEED_GPIO(R, 6) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2134 vdd-supply = <&p3v3_aux>; 2135 2136 i2c@0 { 2137 reg = <0>; 2138 #address-cells = <1>; 2139 #size-cells = <0>; 2140 2141 smb_pex_cpu0_event: pinctrl@20 { 2142 compatible = "cypress,cy8c9540"; 2143 reg = <0x20>; 2144 gpio-controller; 2145 #gpio-cells = <2>; 2146 2147 interrupt-parent = <&smb_pex_vr_ctrl>; 2148 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 2149 interrupt-controller; 2150 #interrupt-cells = <2>; 2151 2152 vdd-supply = <&p3v3_aux>; 2153 reset-gpios = <&smb_svc_pex_cpu0_led 16 GPIO_ACTIVE_HIGH>; 2154 2155 gpio-reserved-ranges = <14 2>, <21 1>, <25 3>, <33 1>; 2156 2157 gpio-line-names = 2158 /* GPORT0 */ 2159 "PWRGD_CHD_CPU0", "PWRGD_CHC_CPU0", 2160 "PWRGD_CHB_CPU0", "PWRGD_CHA_CPU0", 2161 "PWRGD_CHE_CPU0", "PWRGD_CHF_CPU0", 2162 "PWRGD_CHG_CPU0", "PWRGD_CHH_CPU0", 2163 /* GPORT1 */ 2164 "SMB_VR_PVPP_HBM_CPU0_ALERT_N", "SMB_VR_PVCCINFAON_CPU0_ALERT_N", 2165 "SMB_VR_PVNN_MAIN_CPU0_ALERT_N", "SMB_VR_PVCCD_HV_CPU0_ALERT_N", 2166 "SMB_VR_PVCCIN_CPU0_ALERT_N", "SEL_SMB_DIMM_CPU0", 2167 "", "", 2168 /* GPORT2 */ 2169 "PWRGD_LVC3_CPU0_AB_DRAM_G", "PWRGD_LVC3_CPU0_CD_DRAM_G", 2170 "PWRGD_LVC3_CPU0_EF_DRAM_G", "PWRGD_LVC3_CPU0_GH_DRAM_G", 2171 /* GPORT3 */ 2172 "FM_CPU0_DISABLE_COD_N", "", 2173 "RST_LVC3_CPU0_RESET_N", "PWRGD_LVC3_CPU0_PWRGOOD", 2174 "PWRGD_PLT_AUX_CPU0_LVT3", "", 2175 "", "", 2176 /* GPORT4 */ 2177 "H_LVT3_CPU0_PROCHOT_N", "H_LVT3_CPU0_MEMHOT_IN_N", 2178 "H_LVT3_CPU0_MEMHOT_OUT_N", "H_LVT3_CPU0_MEMTRIP_OUT_N", 2179 "H_LVT3_CPU0_THERMTRIP_OUT_N", "", 2180 "H_LVT3_CPU0_NMI", "FM_S3M_CPU0_CD_INIT_ERROR", 2181 /* GPORT5 */ 2182 "FM_CPU0_PKG_ID0", "FM_CPU0_PKG_ID1", 2183 "FM_CPU0_PROC_ID0", "FM_CPU0_PROC_ID1"; 2184 2185 pinctrl-0 = <&U62080_pins>; 2186 pinctrl-names = "default"; 2187 U62080_pins: cfg-pins { 2188 pins = "gp10", "gp11", "gp12", "gp13", "gp14"; 2189 function = "gpio"; 2190 input-enable; 2191 bias-pull-up; 2192 }; 2193 }; 2194 }; 2195 2196 i2c@1 { 2197 reg = <1>; 2198 #address-cells = <1>; 2199 #size-cells = <0>; 2200 }; 2201 2202 i2c@2 { 2203 reg = <2>; 2204 #address-cells = <1>; 2205 #size-cells = <0>; 2206 2207 pvccinfaon-pvccfa-cpu0@58 { 2208 compatible = "mps,mp2971"; 2209 reg = <0x58>; 2210 interrupt-parent = <&smb_pex_cpu0_event>; 2211 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 2212 2213 regulators { 2214 pvccinfaon_cpu0: vout0 { 2215 regulator-name = "pvccinfaon_cpu0"; 2216 regulator-enable-ramp-delay = <200>; 2217 }; 2218 pvccfa_ehv_cpu0: vout1 { 2219 regulator-name = "pvccfa_ehv_cpu0"; 2220 regulator-enable-ramp-delay = <200>; 2221 }; 2222 }; 2223 }; 2224 tda38640-pvnn-main-cpu0@40 { 2225 compatible = "infineon,tda38640"; 2226 reg = <0x40>; 2227 interrupt-parent = <&smb_pex_cpu0_event>; 2228 interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 2229 2230 regulators { 2231 pvnn_main_cpu0: vout { 2232 regulator-name = "pvnn_main_cpu0"; 2233 regulator-enable-ramp-delay = <200>; 2234 }; 2235 }; 2236 }; 2237 }; 2238 2239 i2c@3 { 2240 reg = <3>; 2241 #address-cells = <1>; 2242 #size-cells = <0>; 2243 2244 mp2973-pvccin-pvccfa-cpu0@58 { 2245 compatible = "mps,mp2973"; 2246 reg = <0x58>; 2247 interrupt-parent = <&smb_pex_cpu0_event>; 2248 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 2249 2250 regulators { 2251 pvccin_cpu0: vout0 { 2252 regulator-name = "pvccin_cpu0"; 2253 regulator-enable-ramp-delay = <200>; 2254 }; 2255 pvccfa_ehv_fivra_cpu0: vout1 { 2256 regulator-name = "pvccfa_ehv_fivra_cpu0"; 2257 regulator-enable-ramp-delay = <200>; 2258 }; 2259 }; 2260 }; 2261 }; 2262 2263 i2c@4 { 2264 reg = <4>; 2265 #address-cells = <1>; 2266 #size-cells = <0>; 2267 2268 tda38640-pvccd-hv-cpu0@40 { 2269 compatible = "infineon,tda38640"; 2270 reg = <0x40>; 2271 interrupt-parent = <&smb_pex_cpu0_event>; 2272 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 2273 infineon,en-pin-fixed-level; 2274 2275 regulators { 2276 pvccd_hv_cpu0: vout { 2277 regulator-name = "pvccd_hv_cpu0"; 2278 regulator-enable-ramp-delay = <200>; 2279 }; 2280 }; 2281 }; 2282 }; 2283 2284 i2c@5 { 2285 reg = <5>; 2286 #address-cells = <1>; 2287 #size-cells = <0>; 2288 2289 tda38640-pvpp-hbm-cpu0@40 { 2290 compatible = "infineon,tda38640"; 2291 reg = <0x40>; 2292 interrupt-parent = <&smb_pex_cpu0_event>; 2293 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 2294 2295 regulators { 2296 pvpp_hbm_cpu0: vout { 2297 regulator-name = "pvpp_hbm_cpu0"; 2298 regulator-enable-ramp-delay = <200>; 2299 }; 2300 }; 2301 }; 2302 }; 2303 2304 i2c@6 { 2305 reg = <6>; 2306 #address-cells = <1>; 2307 #size-cells = <0>; 2308 }; 2309 2310 i2c@7 { 2311 reg = <7>; 2312 #address-cells = <1>; 2313 #size-cells = <0>; 2314 }; 2315 }; 2316}; 2317 2318&i2c7 { 2319 status = "okay"; 2320 2321 i2cmux4: mux@77 { 2322 compatible = "maxim,max7357"; 2323 reg = <0x77>; 2324 #address-cells = <1>; 2325 #size-cells = <0>; 2326 2327 reset-gpios = <&gpio0 ASPEED_GPIO(F, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2328 vdd-supply = <&p3v3_aux>; 2329 2330 i2c@0 { 2331 reg = <0>; 2332 #address-cells = <1>; 2333 #size-cells = <0>; 2334 2335 smb_pex_cpu1_event: pinctrl@20 { 2336 compatible = "cypress,cy8c9540"; 2337 reg = <0x20>; 2338 gpio-controller; 2339 #gpio-cells = <2>; 2340 2341 interrupt-parent = <&smb_pex_vr_ctrl>; 2342 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 2343 interrupt-controller; 2344 #interrupt-cells = <2>; 2345 2346 vdd-supply = <&p3v3_aux>; 2347 reset-gpios = <&smb_svc_pex_cpu1_led 16 GPIO_ACTIVE_HIGH>; 2348 2349 gpio-reserved-ranges = <14 2>, <21 1>, <25 3>, <33 1>; 2350 2351 gpio-line-names = 2352 /* GPORT0 */ 2353 "PWRGD_CHD_CPU1", "PWRGD_CHC_CPU1", 2354 "PWRGD_CHB_CPU1", "PWRGD_CHA_CPU1", 2355 "PWRGD_CHE_CPU1", "PWRGD_CHF_CPU1", 2356 "PWRGD_CHG_CPU1", "PWRGD_CHH_CPU1", 2357 /* GPORT1 */ 2358 "SMB_VR_PVPP_HBM_CPU1_ALERT_N", "SMB_VR_PVCCINFAON_CPU1_ALERT_N", 2359 "SMB_VR_PVNN_MAIN_CPU1_ALERT_N", "SMB_VR_PVCCD_HV_CPU1_ALERT_N", 2360 "SMB_VR_PVCCIN_CPU1_ALERT_N", "SEL_SMB_DIMM_CPU1", 2361 "", "", 2362 /* GPORT2 */ 2363 "PWRGD_LVC3_CPU1_AB_DRAM_G", "PWRGD_LVC3_CPU1_CD_DRAM_G", 2364 "PWRGD_LVC3_CPU1_EF_DRAM_G", "PWRGD_LVC3_CPU1_GH_DRAM_G", 2365 /* GPORT3 */ 2366 "FM_CPU1_DISABLE_COD_N", "", 2367 "RST_LVC3_CPU1_RESET_N", "PWRGD_LVC3_CPU1_PWRGOOD", 2368 "PWRGD_PLT_AUX_CPU1_LVT3", "", 2369 "", "", 2370 /* GPORT4 */ 2371 "H_LVT3_CPU1_PROCHOT_N", "H_LVT3_CPU1_MEMHOT_IN_N", 2372 "H_LVT3_CPU1_MEMHOT_OUT_N", "H_LVT3_CPU1_MEMTRIP_OUT_N", 2373 "H_LVT3_CPU1_THERMTRIP_OUT_N", "", 2374 "H_LVT3_CPU1_NMI", "FM_S3M_CPU1_CD_INIT_ERROR", 2375 /* GPORT5 */ 2376 "FM_CPU1_PKG_ID0", "FM_CPU1_PKG_ID1", 2377 "FM_CPU1_PROC_ID0", "FM_CPU1_PROC_ID1"; 2378 2379 pinctrl-0 = <&U62090_pins>; 2380 pinctrl-names = "default"; 2381 U62090_pins: cfg-pins { 2382 pins = "gp10", "gp11", "gp12", "gp13", "gp14"; 2383 function = "gpio"; 2384 input-enable; 2385 bias-pull-up; 2386 }; 2387 }; 2388 }; 2389 2390 i2c@1 { 2391 reg = <1>; 2392 #address-cells = <1>; 2393 #size-cells = <0>; 2394 }; 2395 2396 i2c@2 { 2397 reg = <2>; 2398 #address-cells = <1>; 2399 #size-cells = <0>; 2400 2401 pvccinfaon-pvccfa-cpu1@58 { 2402 compatible = "mps,mp2971"; 2403 reg = <0x58>; 2404 interrupt-parent = <&smb_pex_cpu1_event>; 2405 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 2406 2407 regulators { 2408 pvccinfaon_cpu1: vout0 { 2409 regulator-name = "pvccinfaon_cpu1"; 2410 regulator-enable-ramp-delay = <200>; 2411 }; 2412 pvccfa_ehv_cpu1: vout1 { 2413 regulator-name = "pvccfa_ehv_cpu1"; 2414 regulator-enable-ramp-delay = <200>; 2415 }; 2416 }; 2417 }; 2418 tda38640-pvnn-main-cpu1@40 { 2419 compatible = "infineon,tda38640"; 2420 reg = <0x40>; 2421 interrupt-parent = <&smb_pex_cpu1_event>; 2422 interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 2423 2424 regulators { 2425 pvnn_main_cpu1: vout { 2426 regulator-name = "pvnn_main_cpu1"; 2427 regulator-enable-ramp-delay = <200>; 2428 }; 2429 }; 2430 }; 2431 }; 2432 2433 i2c@3 { 2434 reg = <3>; 2435 #address-cells = <1>; 2436 #size-cells = <0>; 2437 2438 mp2973-pvccin-pvccfa-cpu1@58 { 2439 compatible = "mps,mp2973"; 2440 reg = <0x58>; 2441 interrupt-parent = <&smb_pex_cpu1_event>; 2442 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 2443 2444 regulators { 2445 pvccin_cpu1: vout0 { 2446 regulator-name = "pvccin_cpu1"; 2447 regulator-enable-ramp-delay = <200>; 2448 }; 2449 pvccfa_ehv_fivra_cpu1: vout1 { 2450 regulator-name = "pvccfa_ehv_fivra_cpu1"; 2451 regulator-enable-ramp-delay = <200>; 2452 }; 2453 }; 2454 }; 2455 }; 2456 2457 i2c@4 { 2458 reg = <4>; 2459 #address-cells = <1>; 2460 #size-cells = <0>; 2461 2462 tda38640-pvccd-hv-cpu1@40 { 2463 compatible = "infineon,tda38640"; 2464 reg = <0x40>; 2465 interrupt-parent = <&smb_pex_cpu1_event>; 2466 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 2467 infineon,en-pin-fixed-level; 2468 2469 regulators { 2470 pvccd_hv_cpu1: vout { 2471 regulator-name = "pvccd_hv_cpu1"; 2472 regulator-enable-ramp-delay = <200>; 2473 }; 2474 }; 2475 }; 2476 }; 2477 2478 i2c@5 { 2479 reg = <5>; 2480 #address-cells = <1>; 2481 #size-cells = <0>; 2482 2483 tda38640-pvpp-hbm-cpu1@40 { 2484 compatible = "infineon,tda38640"; 2485 reg = <0x40>; 2486 interrupt-parent = <&smb_pex_cpu1_event>; 2487 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 2488 2489 regulators { 2490 pvpp_hbm_cpu1: vout { 2491 regulator-name = "pvpp_hbm_cpu1"; 2492 regulator-enable-ramp-delay = <200>; 2493 }; 2494 }; 2495 }; 2496 }; 2497 2498 i2c@6 { 2499 reg = <6>; 2500 #address-cells = <1>; 2501 #size-cells = <0>; 2502 }; 2503 2504 i2c@7 { 2505 reg = <7>; 2506 #address-cells = <1>; 2507 #size-cells = <0>; 2508 }; 2509 }; 2510}; 2511 2512&i2c6 { 2513 status = "okay"; 2514 2515 i2cmux3: mux@77 { 2516 compatible = "maxim,max7357"; 2517 reg = <0x77>; 2518 #address-cells = <1>; 2519 #size-cells = <0>; 2520 2521 vdd-supply = <&p3v3_aux>; 2522 2523 i2c@0 { 2524 reg = <0>; 2525 #address-cells = <1>; 2526 #size-cells = <0>; 2527 2528 smb_pex_cpu2_event: pinctrl@20 { 2529 compatible = "cypress,cy8c9540"; 2530 reg = <0x20>; 2531 gpio-controller; 2532 #gpio-cells = <2>; 2533 2534 interrupt-parent = <&smb_pex_vr_ctrl>; 2535 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; 2536 interrupt-controller; 2537 #interrupt-cells = <2>; 2538 2539 vdd-supply = <&p3v3_aux>; 2540 reset-gpios = <&smb_svc_pex_cpu2_led 16 GPIO_ACTIVE_HIGH>; 2541 2542 gpio-reserved-ranges = <14 2>, <21 1>, <25 3>, <33 1>; 2543 2544 gpio-line-names = 2545 /* GPORT0 */ 2546 "PWRGD_CHD_CPU2", "PWRGD_CHC_CPU2", 2547 "PWRGD_CHB_CPU2", "PWRGD_CHA_CPU2", 2548 "PWRGD_CHE_CPU2", "PWRGD_CHF_CPU2", 2549 "PWRGD_CHG_CPU2", "PWRGD_CHH_CPU2", 2550 /* GPORT1 */ 2551 "SMB_VR_PVPP_HBM_CPU2_ALERT_N", "SMB_VR_PVCCINFAON_CPU2_ALERT_N", 2552 "SMB_VR_PVNN_MAIN_CPU2_ALERT_N", "SMB_VR_PVCCD_HV_CPU2_ALERT_N", 2553 "SMB_VR_PVCCIN_CPU2_ALERT_N", "SEL_SMB_DIMM_CPU2", 2554 "", "", 2555 /* GPORT2 */ 2556 "PWRGD_LVC3_CPU2_AB_DRAM_G", "PWRGD_LVC3_CPU2_CD_DRAM_G", 2557 "PWRGD_LVC3_CPU2_EF_DRAM_G", "PWRGD_LVC3_CPU2_GH_DRAM_G", 2558 /* GPORT3 */ 2559 "FM_CPU2_DISABLE_COD_N", "", 2560 "RST_LVC3_CPU2_RESET_N", "PWRGD_LVC3_CPU2_PWRGOOD", 2561 "PWRGD_PLT_AUX_CPU2_LVT3", "", 2562 "", "", 2563 /* GPORT4 */ 2564 "H_LVT3_CPU2_PROCHOT_N", "H_LVT3_CPU2_MEMHOT_IN_N", 2565 "H_LVT3_CPU2_MEMHOT_OUT_N", "H_LVT3_CPU2_MEMTRIP_OUT_N", 2566 "H_LVT3_CPU2_THERMTRIP_OUT_N", "", 2567 "H_LVT3_CPU2_NMI", "FM_S3M_CPU2_CD_INIT_ERROR", 2568 /* GPORT5 */ 2569 "FM_CPU2_PKG_ID0", "FM_CPU2_PKG_ID1", 2570 "FM_CPU2_PROC_ID0", "FM_CPU2_PROC_ID1"; 2571 2572 pinctrl-0 = <&U62100_pins>; 2573 pinctrl-names = "default"; 2574 U62100_pins: cfg-pins { 2575 pins = "gp10", "gp11", "gp12", "gp13", "gp14"; 2576 function = "gpio"; 2577 input-enable; 2578 bias-pull-up; 2579 }; 2580 }; 2581 }; 2582 2583 i2c@1 { 2584 reg = <1>; 2585 #address-cells = <1>; 2586 #size-cells = <0>; 2587 }; 2588 2589 i2c@2 { 2590 reg = <2>; 2591 #address-cells = <1>; 2592 #size-cells = <0>; 2593 2594 pvccinfaon-pvccfa-cpu2@58 { 2595 compatible = "mps,mp2971"; 2596 reg = <0x58>; 2597 interrupt-parent = <&smb_pex_cpu2_event>; 2598 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 2599 2600 regulators { 2601 pvccinfaon_cpu2: vout0 { 2602 regulator-name = "pvccinfaon_cpu2"; 2603 regulator-enable-ramp-delay = <200>; 2604 }; 2605 pvccfa_ehv_cpu2: vout1 { 2606 regulator-name = "pvccfa_ehv_cpu2"; 2607 regulator-enable-ramp-delay = <200>; 2608 }; 2609 }; 2610 }; 2611 tda38640-pvnn-main-cpu2@40 { 2612 compatible = "infineon,tda38640"; 2613 reg = <0x40>; 2614 interrupt-parent = <&smb_pex_cpu2_event>; 2615 interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 2616 2617 regulators { 2618 pvnn_main_cpu2: vout { 2619 regulator-name = "pvnn_main_cpu2"; 2620 regulator-enable-ramp-delay = <200>; 2621 }; 2622 }; 2623 }; 2624 }; 2625 2626 i2c@3 { 2627 reg = <3>; 2628 #address-cells = <1>; 2629 #size-cells = <0>; 2630 2631 mp2973-pvccin-pvccfa-cpu2@58 { 2632 compatible = "mps,mp2973"; 2633 reg = <0x58>; 2634 interrupt-parent = <&smb_pex_cpu2_event>; 2635 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 2636 2637 regulators { 2638 pvccin_cpu2: vout0 { 2639 regulator-name = "pvccin_cpu2"; 2640 regulator-enable-ramp-delay = <200>; 2641 }; 2642 pvccfa_ehv_fivra_cpu2: vout1 { 2643 regulator-name = "pvccfa_ehv_fivra_cpu2"; 2644 regulator-enable-ramp-delay = <200>; 2645 }; 2646 }; 2647 }; 2648 }; 2649 2650 i2c@4 { 2651 reg = <4>; 2652 #address-cells = <1>; 2653 #size-cells = <0>; 2654 2655 tda38640-pvccd-hv-cpu2@40 { 2656 compatible = "infineon,tda38640"; 2657 reg = <0x40>; 2658 interrupt-parent = <&smb_pex_cpu2_event>; 2659 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 2660 infineon,en-pin-fixed-level; 2661 2662 regulators { 2663 pvccd_hv_cpu2: vout { 2664 regulator-name = "pvccd_hv_cpu2"; 2665 regulator-enable-ramp-delay = <200>; 2666 }; 2667 }; 2668 }; 2669 }; 2670 2671 i2c@5 { 2672 reg = <5>; 2673 #address-cells = <1>; 2674 #size-cells = <0>; 2675 2676 tda38640-pvpp-hbm-cpu2@40 { 2677 compatible = "infineon,tda38640"; 2678 reg = <0x40>; 2679 interrupt-parent = <&smb_pex_cpu2_event>; 2680 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 2681 2682 regulators { 2683 pvpp_hbm_cpu2: vout { 2684 regulator-name = "pvpp_hbm_cpu2"; 2685 regulator-enable-ramp-delay = <200>; 2686 }; 2687 }; 2688 }; 2689 }; 2690 2691 i2c@6 { 2692 reg = <6>; 2693 #address-cells = <1>; 2694 #size-cells = <0>; 2695 }; 2696 2697 i2c@7 { 2698 reg = <7>; 2699 #address-cells = <1>; 2700 #size-cells = <0>; 2701 }; 2702 }; 2703}; 2704 2705&i2c12 { 2706 status = "okay"; 2707 2708 i2cmux22: mux@77 { 2709 compatible = "maxim,max7357"; 2710 reg = <0x77>; 2711 #address-cells = <1>; 2712 #size-cells = <0>; 2713 2714 reset-gpios = <&gpio0 ASPEED_GPIO(P, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2715 vdd-supply = <&p3v3_aux>; 2716 2717 i2c@0 { 2718 reg = <0>; 2719 #address-cells = <1>; 2720 #size-cells = <0>; 2721 2722 smb_pex_cpu3_event: pinctrl@20 { 2723 compatible = "cypress,cy8c9540"; 2724 reg = <0x20>; 2725 gpio-controller; 2726 #gpio-cells = <2>; 2727 2728 interrupt-parent = <&smb_pex_vr_ctrl>; 2729 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; 2730 interrupt-controller; 2731 #interrupt-cells = <2>; 2732 2733 vdd-supply = <&p3v3_aux>; 2734 reset-gpios = <&smb_svc_pex_cpu3_led 16 GPIO_ACTIVE_HIGH>; 2735 2736 gpio-reserved-ranges = <14 2>, <21 1>, <25 3>, <33 1>; 2737 2738 gpio-line-names = 2739 /* GPORT0 */ 2740 "PWRGD_CHD_CPU3", "PWRGD_CHC_CPU3", 2741 "PWRGD_CHB_CPU3", "PWRGD_CHA_CPU3", 2742 "PWRGD_CHE_CPU3", "PWRGD_CHF_CPU3", 2743 "PWRGD_CHG_CPU3", "PWRGD_CHH_CPU3", 2744 /* GPORT1 */ 2745 "SMB_VR_PVPP_HBM_CPU3_ALERT_N", "SMB_VR_PVCCINFAON_CPU3_ALERT_N", 2746 "SMB_VR_PVNN_MAIN_CPU3_ALERT_N", "SMB_VR_PVCCD_HV_CPU3_ALERT_N", 2747 "SMB_VR_PVCCIN_CPU3_ALERT_N", "SEL_SMB_DIMM_CPU3", 2748 "", "", 2749 /* GPORT2 */ 2750 "PWRGD_LVC3_CPU3_AB_DRAM_G", "PWRGD_LVC3_CPU3_CD_DRAM_G", 2751 "PWRGD_LVC3_CPU3_EF_DRAM_G", "PWRGD_LVC3_CPU3_GH_DRAM_G", 2752 /* GPORT3 */ 2753 "FM_CPU3_DISABLE_COD_N", "", 2754 "RST_LVC3_CPU3_RESET_N", "PWRGD_LVC3_CPU3_PWRGOOD", 2755 "PWRGD_PLT_AUX_CPU3_LVT3", "", 2756 "", "", 2757 /* GPORT4 */ 2758 "H_LVT3_CPU3_PROCHOT_N", "H_LVT3_CPU3_MEMHOT_IN_N", 2759 "H_LVT3_CPU3_MEMHOT_OUT_N", "H_LVT3_CPU3_MEMTRIP_OUT_N", 2760 "H_LVT3_CPU3_THERMTRIP_OUT_N", "", 2761 "H_LVT3_CPU3_NMI", "FM_S3M_CPU3_CD_INIT_ERROR", 2762 /* GPORT5 */ 2763 "FM_CPU3_PKG_ID0", "FM_CPU3_PKG_ID1", 2764 "FM_CPU3_PROC_ID0", "FM_CPU3_PROC_ID1"; 2765 2766 pinctrl-0 = <&U62110_pins>; 2767 pinctrl-names = "default"; 2768 U62110_pins: cfg-pins { 2769 pins = "gp10", "gp11", "gp12", "gp13", "gp14"; 2770 function = "gpio"; 2771 input-enable; 2772 bias-pull-up; 2773 }; 2774 }; 2775 }; 2776 2777 i2c@1 { 2778 reg = <1>; 2779 #address-cells = <1>; 2780 #size-cells = <0>; 2781 }; 2782 2783 i2c@2 { 2784 reg = <2>; 2785 #address-cells = <1>; 2786 #size-cells = <0>; 2787 2788 pvccinfaon-pvccfa-cpu3@58 { 2789 compatible = "mps,mp2971"; 2790 reg = <0x58>; 2791 interrupt-parent = <&smb_pex_cpu3_event>; 2792 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 2793 2794 regulators { 2795 pvccinfaon_cpu3: vout0 { 2796 regulator-name = "pvccinfaon_cpu3"; 2797 regulator-enable-ramp-delay = <200>; 2798 }; 2799 pvccfa_ehv_cpu3: vout1 { 2800 regulator-name = "pvccfa_ehv_cpu3"; 2801 regulator-enable-ramp-delay = <200>; 2802 }; 2803 }; 2804 }; 2805 tda38640-pvnn-main-cpu3@40 { 2806 compatible = "infineon,tda38640"; 2807 reg = <0x40>; 2808 interrupt-parent = <&smb_pex_cpu3_event>; 2809 interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 2810 2811 regulators { 2812 pvnn_main_cpu3: vout { 2813 regulator-name = "pvnn_main_cpu3"; 2814 regulator-enable-ramp-delay = <200>; 2815 }; 2816 }; 2817 }; 2818 }; 2819 2820 i2c@3 { 2821 reg = <3>; 2822 #address-cells = <1>; 2823 #size-cells = <0>; 2824 2825 mp2973-pvccin-pvccfa-cpu3@58 { 2826 compatible = "mps,mp2973"; 2827 reg = <0x58>; 2828 interrupt-parent = <&smb_pex_cpu3_event>; 2829 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 2830 2831 regulators { 2832 pvccin_cpu3: vout0 { 2833 regulator-name = "pvccin_cpu3"; 2834 regulator-enable-ramp-delay = <200>; 2835 }; 2836 pvccfa_ehv_fivra_cpu3: vout1 { 2837 regulator-name = "pvccfa_ehv_fivra_cpu3"; 2838 regulator-enable-ramp-delay = <200>; 2839 }; 2840 }; 2841 }; 2842 }; 2843 2844 i2c@4 { 2845 reg = <4>; 2846 #address-cells = <1>; 2847 #size-cells = <0>; 2848 2849 tda38640-pvccd-hv-cpu3@40 { 2850 compatible = "infineon,tda38640"; 2851 reg = <0x40>; 2852 interrupt-parent = <&smb_pex_cpu3_event>; 2853 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 2854 infineon,en-pin-fixed-level; 2855 2856 regulators { 2857 pvccd_hv_cpu3: vout { 2858 regulator-name = "pvccd_hv_cpu3"; 2859 regulator-enable-ramp-delay = <200>; 2860 }; 2861 }; 2862 }; 2863 }; 2864 2865 i2c@5 { 2866 reg = <5>; 2867 #address-cells = <1>; 2868 #size-cells = <0>; 2869 2870 tda38640-pvpp-hbm-cpu3@40 { 2871 compatible = "infineon,tda38640"; 2872 reg = <0x40>; 2873 interrupt-parent = <&smb_pex_cpu3_event>; 2874 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 2875 2876 regulators { 2877 pvpp_hbm_cpu3: vout { 2878 regulator-name = "pvpp_hbm_cpu3"; 2879 regulator-enable-ramp-delay = <200>; 2880 }; 2881 }; 2882 }; 2883 }; 2884 2885 i2c@6 { 2886 reg = <6>; 2887 #address-cells = <1>; 2888 #size-cells = <0>; 2889 }; 2890 2891 i2c@7 { 2892 reg = <7>; 2893 #address-cells = <1>; 2894 #size-cells = <0>; 2895 }; 2896 }; 2897}; 2898 2899&i2c15 { 2900 status = "okay"; 2901 2902 i2cmux14: mux@77 { 2903 compatible = "maxim,max7357"; 2904 reg = <0x77>; 2905 #address-cells = <1>; 2906 #size-cells = <0>; 2907 2908 reset-gpios = <&gpio0 ASPEED_GPIO(R, 1) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2909 vdd-supply = <&p3v3_aux>; 2910 2911 i2c@0 { 2912 reg = <0>; 2913 #address-cells = <1>; 2914 #size-cells = <0>; 2915 2916 i2cmux15: mux@70 { 2917 compatible = "maxim,max7357"; 2918 reg = <0x70>; 2919 #address-cells = <1>; 2920 #size-cells = <0>; 2921 2922 reset-gpios = <&bmc_pex_irq 11 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2923 vdd-supply = <&p3v3_aux>; 2924 }; 2925 }; 2926 2927 i2c@1 { 2928 reg = <1>; 2929 #address-cells = <1>; 2930 #size-cells = <0>; 2931 2932 i2cmux16: mux@70 { 2933 compatible = "maxim,max7357"; 2934 reg = <0x70>; 2935 #address-cells = <1>; 2936 #size-cells = <0>; 2937 2938 reset-gpios = <&bmc_pex_irq 2 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2939 vdd-supply = <&p3v3_aux>; 2940 }; 2941 }; 2942 2943 i2c@2 { 2944 reg = <2>; 2945 #address-cells = <1>; 2946 #size-cells = <0>; 2947 2948 i2cmux17: mux@70 { 2949 compatible = "maxim,max7357"; 2950 reg = <0x70>; 2951 #address-cells = <1>; 2952 #size-cells = <0>; 2953 2954 reset-gpios = <&bmc_pex_irq 0 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2955 vdd-supply = <&p3v3_aux>; 2956 }; 2957 }; 2958 2959 i2c@3 { 2960 reg = <3>; 2961 #address-cells = <1>; 2962 #size-cells = <0>; 2963 2964 i2cmux18: mux@70 { 2965 compatible = "maxim,max7357"; 2966 reg = <0x70>; 2967 #address-cells = <1>; 2968 #size-cells = <0>; 2969 2970 reset-gpios = <&bmc_pex_irq 3 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2971 vdd-supply = <&p3v3_aux>; 2972 }; 2973 }; 2974 2975 i2c@4 { 2976 reg = <4>; 2977 #address-cells = <1>; 2978 #size-cells = <0>; 2979 2980 i2cmux19: mux@70 { 2981 compatible = "maxim,max7357"; 2982 reg = <0x70>; 2983 #address-cells = <1>; 2984 #size-cells = <0>; 2985 2986 reset-gpios = <&bmc_pex_irq 9 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 2987 vdd-supply = <&p3v3_aux>; 2988 }; 2989 }; 2990 2991 i2c@5 { 2992 reg = <5>; 2993 #address-cells = <1>; 2994 #size-cells = <0>; 2995 2996 smb_pex_rssd17_32: pinctrl@20 { 2997 compatible = "cypress,cy8c9560"; 2998 reg = <0x20>; 2999 gpio-controller; 3000 #gpio-cells = <2>; 3001 3002 interrupt-parent = <&bmc_pex_irq>; 3003 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; 3004 interrupt-controller; 3005 #interrupt-cells = <2>; 3006 3007 vdd-supply = <&p3v3_aux>; 3008 reset-gpios = <&bmc_pex_irq 19 GPIO_ACTIVE_HIGH>; 3009 3010 gpio-reserved-ranges = <48 12>; 3011 3012 gpio-line-names = 3013 /* GPORT0 */ 3014 "RSSD17_SMBRST_N", "RSSD18_SMBRST_N", 3015 "RSSD19_SMBRST_N", "RSSD20_SMBRST_N", 3016 "RSSD21_SMBRST_N", "RSSD22_SMBRST_N", 3017 "RSSD23_SMBRST_N", "RSSD24_SMBRST_N", 3018 /* GPORT1 */ 3019 "RSSD25_SMBRST_N", "RSSD26_SMBRST_N", 3020 "RSSD27_SMBRST_N", "RSSD28_SMBRST_N", 3021 "RSSD29_SMBRST_N", "RSSD30_SMBRST_N", 3022 "RSSD31_SMBRST_N", "RSSD32_SMBRST_N", 3023 /* GPORT2 */ 3024 "RSSD17_PWRDIS", "RSSD18_PWRDIS", 3025 "RSSD19_PWRDIS", "RSSD20_PWRDIS", 3026 /* GPORT3 */ 3027 "RSSD21_PWRDIS", "RSSD22_PWRDIS", 3028 "RSSD23_PWRDIS", "RSSD24_PWRDIS", 3029 "RSSD25_PWRDIS", "RSSD26_PWRDIS", 3030 "RSSD27_PWRDIS", "RSSD28_PWRDIS", 3031 /* GPORT4 */ 3032 "RSSD29_PWRDIS", "RSSD30_PWRDIS", 3033 "RSSD31_PWRDIS", "RSSD32_PWRDIS", 3034 "RSSD17_RESET_N", "RSSD18_RESET_N", 3035 "RSSD19_RESET_N", "RSSD20_RESET_N", 3036 /* GPORT5 */ 3037 "RSSD21_RESET_N", "RSSD22_RESET_N", 3038 "RSSD23_RESET_N", "RSSD24_RESET_N", 3039 "RSSD25_RESET_N", "RSSD26_RESET_N", 3040 "RSSD27_RESET_N", "RSSD28_RESET_N", 3041 /* GPORT6 */ 3042 "RSSD29_RESET_N", "RSSD30_RESET_N", 3043 "RSSD31_RESET_N", "RSSD32_RESET_N", 3044 "", "", 3045 "", "", 3046 /* GPORT7 */ 3047 "", "", 3048 "", "", 3049 "", "", 3050 "", ""; 3051 }; 3052 }; 3053 3054 i2c@6 { 3055 reg = <6>; 3056 #address-cells = <1>; 3057 #size-cells = <0>; 3058 3059 i2cmux20: mux@70 { 3060 compatible = "maxim,max7357"; 3061 reg = <0x70>; 3062 #address-cells = <1>; 3063 #size-cells = <0>; 3064 3065 reset-gpios = <&bmc_pex_irq 4 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3066 vdd-supply = <&p3v3_aux>; 3067 3068 i2c@0 { 3069 reg = <0>; 3070 #address-cells = <1>; 3071 #size-cells = <0>; 3072 }; 3073 i2c@1 { 3074 reg = <1>; 3075 #address-cells = <1>; 3076 #size-cells = <0>; 3077 }; 3078 i2c@2 { 3079 reg = <2>; 3080 #address-cells = <1>; 3081 #size-cells = <0>; 3082 }; 3083 i2c@3 { 3084 reg = <3>; 3085 #address-cells = <1>; 3086 #size-cells = <0>; 3087 }; 3088 i2c@4 { 3089 reg = <4>; 3090 #address-cells = <1>; 3091 #size-cells = <0>; 3092 }; 3093 i2c@5 { 3094 reg = <5>; 3095 #address-cells = <1>; 3096 #size-cells = <0>; 3097 }; 3098 i2c@6 { 3099 reg = <6>; 3100 #address-cells = <1>; 3101 #size-cells = <0>; 3102 }; 3103 i2c@7 { 3104 reg = <7>; 3105 #address-cells = <1>; 3106 #size-cells = <0>; 3107 }; 3108 }; 3109 }; 3110 3111 i2c@7 { 3112 reg = <7>; 3113 #address-cells = <1>; 3114 #size-cells = <0>; 3115 3116 i2cmux21: mux@70 { 3117 compatible = "maxim,max7357"; 3118 reg = <0x70>; 3119 #address-cells = <1>; 3120 #size-cells = <0>; 3121 3122 reset-gpios = <&bmc_pex_irq 5 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3123 vdd-supply = <&p3v3_aux>; 3124 3125 i2c@0 { 3126 reg = <0>; 3127 #address-cells = <1>; 3128 #size-cells = <0>; 3129 }; 3130 i2c@1 { 3131 reg = <1>; 3132 #address-cells = <1>; 3133 #size-cells = <0>; 3134 }; 3135 i2c@2 { 3136 reg = <2>; 3137 #address-cells = <1>; 3138 #size-cells = <0>; 3139 }; 3140 i2c@3 { 3141 reg = <3>; 3142 #address-cells = <1>; 3143 #size-cells = <0>; 3144 }; 3145 i2c@4 { 3146 reg = <4>; 3147 #address-cells = <1>; 3148 #size-cells = <0>; 3149 }; 3150 i2c@5 { 3151 reg = <5>; 3152 #address-cells = <1>; 3153 #size-cells = <0>; 3154 }; 3155 i2c@6 { 3156 reg = <6>; 3157 #address-cells = <1>; 3158 #size-cells = <0>; 3159 }; 3160 i2c@7 { 3161 reg = <7>; 3162 #address-cells = <1>; 3163 #size-cells = <0>; 3164 }; 3165 }; 3166 }; 3167 }; 3168}; 3169 3170&i2c8 { 3171 status = "okay"; 3172 3173 i2cmux5: mux@77 { 3174 compatible = "maxim,max7357"; 3175 reg = <0x77>; 3176 #address-cells = <1>; 3177 #size-cells = <0>; 3178 3179 reset-gpios = <&gpio0 ASPEED_GPIO(R, 0) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3180 vdd-supply = <&p3v3_aux>; 3181 3182 i2c@0 { 3183 reg = <0>; 3184 #address-cells = <1>; 3185 #size-cells = <0>; 3186 3187 i2cmux6: mux@70 { 3188 compatible = "maxim,max7357"; 3189 reg = <0x70>; 3190 #address-cells = <1>; 3191 #size-cells = <0>; 3192 3193 reset-gpios = <&bmc_pex_irq 16 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3194 vdd-supply = <&p3v3_aux>; 3195 }; 3196 }; 3197 3198 i2c@1 { 3199 reg = <1>; 3200 #address-cells = <1>; 3201 #size-cells = <0>; 3202 3203 i2cmux7: mux@70 { 3204 compatible = "maxim,max7357"; 3205 reg = <0x70>; 3206 #address-cells = <1>; 3207 #size-cells = <0>; 3208 3209 reset-gpios = <&bmc_pex_irq 7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3210 vdd-supply = <&p3v3_aux>; 3211 }; 3212 }; 3213 3214 i2c@2 { 3215 reg = <2>; 3216 #address-cells = <1>; 3217 #size-cells = <0>; 3218 3219 i2cmux8: mux@70 { 3220 compatible = "maxim,max7357"; 3221 reg = <0x70>; 3222 #address-cells = <1>; 3223 #size-cells = <0>; 3224 3225 reset-gpios = <&bmc_pex_irq 1 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3226 vdd-supply = <&p3v3_aux>; 3227 }; 3228 }; 3229 3230 i2c@3 { 3231 reg = <3>; 3232 #address-cells = <1>; 3233 #size-cells = <0>; 3234 3235 i2cmux9: mux@70 { 3236 compatible = "maxim,max7357"; 3237 reg = <0x70>; 3238 #address-cells = <1>; 3239 #size-cells = <0>; 3240 3241 reset-gpios = <&bmc_pex_irq 10 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3242 vdd-supply = <&p3v3_aux>; 3243 }; 3244 }; 3245 3246 i2c@4 { 3247 reg = <4>; 3248 #address-cells = <1>; 3249 #size-cells = <0>; 3250 3251 i2cmux10: mux@70 { 3252 compatible = "maxim,max7357"; 3253 reg = <0x70>; 3254 #address-cells = <1>; 3255 #size-cells = <0>; 3256 3257 reset-gpios = <&bmc_pex_irq 15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3258 vdd-supply = <&p3v3_aux>; 3259 }; 3260 }; 3261 3262 i2c@5 { 3263 reg = <5>; 3264 #address-cells = <1>; 3265 #size-cells = <0>; 3266 3267 smb_pex_rssd_01_16: pinctrl@20 { 3268 compatible = "cypress,cy8c9560"; 3269 reg = <0x20>; 3270 gpio-controller; 3271 #gpio-cells = <2>; 3272 3273 interrupt-parent = <&bmc_pex_irq>; 3274 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; 3275 interrupt-controller; 3276 #interrupt-cells = <2>; 3277 3278 vdd-supply = <&p3v3_aux>; 3279 reset-gpios = <&bmc_pex_irq 18 GPIO_ACTIVE_HIGH>; 3280 3281 gpio-reserved-ranges = <48 12>; 3282 3283 gpio-line-names = 3284 /* GPORT0 */ 3285 "RSSD01_SMBRST_N", "RSSD02_SMBRST_N", 3286 "RSSD03_SMBRST_N", "RSSD04_SMBRST_N", 3287 "RSSD05_SMBRST_N", "RSSD06_SMBRST_N", 3288 "RSSD07_SMBRST_N", "RSSD08_SMBRST_N", 3289 /* GPORT1 */ 3290 "RSSD09_SMBRST_N", "RSSD10_SMBRST_N", 3291 "RSSD11_SMBRST_N", "RSSD12_SMBRST_N", 3292 "RSSD13_SMBRST_N", "RSSD14_SMBRST_N", 3293 "RSSD15_SMBRST_N", "RSSD16_SMBRST_N", 3294 /* GPORT2 */ 3295 "RSSD01_PWRDIS", "RSSD02_PWRDIS", 3296 "RSSD03_PWRDIS", "RSSD04_PWRDIS", 3297 /* GPORT3 */ 3298 "RSSD05_PWRDIS", "RSSD06_PWRDIS", 3299 "RSSD07_PWRDIS", "RSSD08_PWRDIS", 3300 "RSSD09_PWRDIS", "RSSD10_PWRDIS", 3301 "RSSD11_PWRDIS", "RSSD12_PWRDIS", 3302 /* GPORT4 */ 3303 "RSSD13_PWRDIS", "RSSD14_PWRDIS", 3304 "RSSD15_PWRDIS", "RSSD16_PWRDIS", 3305 "RSSD01_RESET_N", "RSSD02_RESET_N", 3306 "RSSD03_RESET_N", "RSSD04_RESET_N", 3307 /* GPORT5 */ 3308 "RSSD05_RESET_N", "RSSD06_RESET_N", 3309 "RSSD07_RESET_N", "RSSD08_RESET_N", 3310 "RSSD09_RESET_N", "RSSD10_RESET_N", 3311 "RSSD11_RESET_N", "RSSD12_RESET_N", 3312 /* GPORT6 */ 3313 "RSSD13_RESET_N", "RSSD14_RESET_N", 3314 "RSSD15_RESET_N", "RSSD16_RESET_N", 3315 "", "", 3316 "", "", 3317 /* GPORT7 */ 3318 "", "", 3319 "", "", 3320 "", "", 3321 "", ""; 3322 }; 3323 }; 3324 3325 i2c@6 { 3326 reg = <6>; 3327 #address-cells = <1>; 3328 #size-cells = <0>; 3329 3330 i2cmux11: mux@70 { 3331 compatible = "maxim,max7357"; 3332 reg = <0x70>; 3333 #address-cells = <1>; 3334 #size-cells = <0>; 3335 3336 reset-gpios = <&bmc_pex_irq 12 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3337 vdd-supply = <&p3v3_aux>; 3338 3339 i2c@0 { 3340 reg = <0>; 3341 #address-cells = <1>; 3342 #size-cells = <0>; 3343 }; 3344 i2c@1 { 3345 reg = <1>; 3346 #address-cells = <1>; 3347 #size-cells = <0>; 3348 }; 3349 i2c@2 { 3350 reg = <2>; 3351 #address-cells = <1>; 3352 #size-cells = <0>; 3353 }; 3354 i2c@3 { 3355 reg = <3>; 3356 #address-cells = <1>; 3357 #size-cells = <0>; 3358 }; 3359 i2c@4 { 3360 reg = <4>; 3361 #address-cells = <1>; 3362 #size-cells = <0>; 3363 }; 3364 i2c@5 { 3365 reg = <5>; 3366 #address-cells = <1>; 3367 #size-cells = <0>; 3368 }; 3369 i2c@6 { 3370 reg = <6>; 3371 #address-cells = <1>; 3372 #size-cells = <0>; 3373 }; 3374 i2c@7 { 3375 reg = <7>; 3376 #address-cells = <1>; 3377 #size-cells = <0>; 3378 }; 3379 }; 3380 }; 3381 3382 i2c@7 { 3383 reg = <7>; 3384 #address-cells = <1>; 3385 #size-cells = <0>; 3386 3387 i2cmux12: mux@70 { 3388 compatible = "maxim,max7357"; 3389 reg = <0x70>; 3390 #address-cells = <1>; 3391 #size-cells = <0>; 3392 3393 reset-gpios = <&bmc_pex_irq 14 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3394 vdd-supply = <&p3v3_aux>; 3395 3396 i2c@0 { 3397 reg = <0>; 3398 #address-cells = <1>; 3399 #size-cells = <0>; 3400 }; 3401 i2c@1 { 3402 reg = <1>; 3403 #address-cells = <1>; 3404 #size-cells = <0>; 3405 }; 3406 i2c@2 { 3407 reg = <2>; 3408 #address-cells = <1>; 3409 #size-cells = <0>; 3410 }; 3411 i2c@3 { 3412 reg = <3>; 3413 #address-cells = <1>; 3414 #size-cells = <0>; 3415 }; 3416 i2c@4 { 3417 reg = <4>; 3418 #address-cells = <1>; 3419 #size-cells = <0>; 3420 }; 3421 i2c@5 { 3422 reg = <5>; 3423 #address-cells = <1>; 3424 #size-cells = <0>; 3425 }; 3426 i2c@6 { 3427 reg = <6>; 3428 #address-cells = <1>; 3429 #size-cells = <0>; 3430 }; 3431 i2c@7 { 3432 reg = <7>; 3433 #address-cells = <1>; 3434 #size-cells = <0>; 3435 }; 3436 }; 3437 }; 3438 }; 3439}; 3440 3441&i2c13 { 3442 status = "okay"; 3443 3444 i2cmux23: mux@77 { 3445 compatible = "maxim,max7357"; 3446 reg = <0x77>; 3447 #address-cells = <1>; 3448 #size-cells = <0>; 3449 3450 reset-gpios = <&gpio0 ASPEED_GPIO(R, 4) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3451 vdd-supply = <&p3v3_bmc_aux>; 3452 }; 3453}; 3454 3455&i2cmux23 { 3456 i2c@0 { 3457 reg = <0>; 3458 #address-cells = <1>; 3459 #size-cells = <0>; 3460 smb_pex_vr_ctrl: pinctrl@20 { 3461 compatible = "cypress,cy8c9540"; 3462 reg = <0x20>; 3463 gpio-controller; 3464 #gpio-cells = <2>; 3465 interrupt-parent = <&gpio0>; 3466 interrupts = <ASPEED_GPIO(V, 2) IRQ_TYPE_LEVEL_HIGH>; 3467 interrupt-controller; 3468 #interrupt-cells = <2>; 3469 vdd-supply = <&p3v3_bmc_aux>; 3470 reset-gpios = <&gpio0 ASPEED_GPIO(Q, 2) GPIO_ACTIVE_HIGH>; 3471 gpio-line-names = 3472 /* GPORT0 */ 3473 "BCM0_INPUT_DISABLE_N", "SMB_VR_P3V3_AUX_ALERT_N", 3474 "SMB_PEX_CPU1_EVENT_INT", "SMB_PEX_CPU2_EVENT_INT", 3475 "DPIC0_VOLTAGE_DETECTB_N", "DPIC0_VOLTAGE_DETECTA_N", 3476 "DPIC1_VOLTAGE_DETECTA_N", "DPIC1_VOLTAGE_DETECTB_N", 3477 /* GPORT1 */ 3478 "SMB_PEX_NIC_INT", "SMB_VR_P1V05_PCH_AUX_ALERT_N", 3479 "SMB_PEX_CPU0_EVENT_INT", "SMB_PEX_CPU3_EVENT_INT", 3480 "LED_ID_TPM", "PLUG_DETECT_TPM", 3481 "PLUG_DETECT_M2_SSD_CARRIER1", "RST_M2_SSD1_PERST_N", 3482 /* GPORT2 */ 3483 "LED_ID_BAT", "LED_ID_MGMT_PORT2", 3484 "LED_ID_MGMT_PORT1", "SMB_VR_P5V_AUX_ALERT_N", 3485 /* GPORT3 */ 3486 "SMB_VR_AUX_SSB_ALERT_N", "BCM1_INPUT_DISABLE_N", 3487 "LED_ID_NIC1_PORT1", "LED_ID_NIC1_PORT2", 3488 "LED_ID_NIC2_PORT1", "LED_ID_NIC2_PORT2", 3489 "RST_M2_SSD2_PERST_N", "PLUG_DETECT_M2_SSD2", 3490 /* GPORT4 */ 3491 "PLUG_DETECT_BAT", "PLUG_DETECT_M2_SSD1", 3492 "M2_SSD1_SSB_ALERT_N", "BCM2_INPUT_DISABLE_N", 3493 "SMB_VR_P1V8_PCH_AUX_ALERT_N", "BCM3_INPUT_DISABLE_N", 3494 "LED_PWR_DWR_BACK", "LED_ID_DWR_BACK_P", 3495 /* GPORT5 */ 3496 "LED_ID_M2_SSD2", "LED_ID_M2_SSD1", 3497 "PLUG_DETECT_M2_SSD_CARRIER2", "M2_SSD2_SSB_ALERT_N"; 3498 3499 pinctrl-0 = <&U62120_input &U62120_input_pullup>; 3500 pinctrl-names = "default"; 3501 U62120_input: input-pins { 3502 pins = "gp10"; 3503 function = "gpio"; 3504 input-enable; 3505 bias-disable; 3506 }; 3507 U62120_input_pullup: input-pullup-pins { 3508 pins = "gp01", "gp02", "gp03", "gp11", "gp12", "gp13", 3509 "gp23", "gp30", "gp40", "gp42", "gp44", "gp53"; 3510 function = "gpio"; 3511 input-enable; 3512 bias-pull-up; 3513 }; 3514 }; 3515 }; 3516 i2c@1 { 3517 reg = <1>; 3518 #address-cells = <1>; 3519 #size-cells = <0>; 3520 bmc_pex_irq: pinctrl@20 { 3521 compatible = "cypress,cy8c9520"; 3522 reg = <0x20>; 3523 gpio-controller; 3524 #gpio-cells = <2>; 3525 interrupt-parent = <&gpio0>; 3526 interrupts = <ASPEED_GPIO(V, 0) IRQ_TYPE_LEVEL_HIGH>; 3527 interrupt-controller; 3528 #interrupt-cells = <2>; 3529 vdd-supply = <&p3v3_aux>; 3530 reset-gpios = <&gpio0 ASPEED_GPIO(Q, 1) GPIO_ACTIVE_HIGH>; 3531 gpio-line-names = 3532 /* GPORT0 */ 3533 "SMB_MUX_PWM_FANGRP2_RST_INT_N", "SMB_MUX_SSB_FANGRP2_RST_INT_N", 3534 "SMB_MUX_PWM_FANGRP1_RST_INT_N", "SMB_MUX_SSB_RSSD01_08_RST_INT_N", 3535 "SMB_MUX_RSSD01_08_RST_INT_N", "SMB_MUX_RSSD09_16_RST_INT_N", 3536 "SMB_PEX_RSSD01_16_INT", "SMB_MUX_SSB_FANGRP1_RST_INT_N", 3537 /* GPORT1 */ 3538 "SMB_SVC_PEX_FAN_ALERT_INT", "SMB_MUX_SSB_RSSD09_16_RST_INT_N", 3539 "SMB_MUX_SSB_RSSD17_24_RST_INT_N", "SMB_MUX_PWM_FANGRP0_RST_INT_N", 3540 "SMB_MUX_RSSD17_24_RST_INT_N", "SMB_PEX_RSSD17_32_INT", 3541 "SMB_MUX_RSSD25_32_RST_INT_N", "SMB_MUX_SSB_RSSD25_32_RST_INT_N", 3542 /* GPORT2 */ 3543 "SMB_MUX_SSB_FANGRP0_RST_INT_N", "PEX_FAN_ALERT_RST", 3544 "PEX_RSSD01_16_RST", "PEX_RSSD17_32_RST"; 3545 pinctrl-0 = <&U60000_pins>; 3546 pinctrl-names = "default"; 3547 U60000_pins: cfg-pins { 3548 pins = "gp06", "gp10", "gp15"; 3549 function = "gpio"; 3550 input-enable; 3551 bias-disable; 3552 }; 3553 }; 3554 }; 3555 i2c@2 { 3556 reg = <2>; 3557 #address-cells = <1>; 3558 #size-cells = <0>; 3559 i2cmux24: mux@70 { 3560 compatible = "maxim,max7357"; 3561 reg = <0x70>; 3562 #address-cells = <1>; 3563 #size-cells = <0>; 3564 3565 vdd-supply = <&p3v3_bmc_aux>; 3566 }; 3567 }; 3568 i2c@3 { 3569 reg = <3>; 3570 #address-cells = <1>; 3571 #size-cells = <0>; 3572 eeprom@51 { 3573 compatible = "atmel,24c32"; 3574 reg = <0x51>; 3575 pagesize = <32>; 3576 vcc-supply = <&p3v3_bmc_aux>; 3577 }; 3578 }; 3579 i2c@7 { 3580 reg = <7>; 3581 #address-cells = <1>; 3582 #size-cells = <0>; 3583 i2cmux25: mux@70 { 3584 compatible = "maxim,max7357"; 3585 reg = <0x70>; 3586 #address-cells = <1>; 3587 #size-cells = <0>; 3588 }; 3589 }; 3590}; 3591 3592&i2cmux25 { 3593 reset-gpios = <&gpio0 ASPEED_GPIO(R, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3594 vdd-supply = <&p3v3_bmc_aux>; 3595 i2c@1 { 3596 reg = <1>; 3597 #address-cells = <1>; 3598 #size-cells = <0>; 3599 p5v_aux: ir38263-p5v-aux@40 { 3600 compatible = "infineon,ir38263"; 3601 reg = <0x40>; 3602 3603 regulator-name = "p5v_aux"; 3604 regulator-enable-ramp-delay = <2000>; 3605 vin-supply = <&p12v>; 3606 vbus-supply = <&p3v3_bmc_aux>; 3607 regulator-always-on; 3608 regulator-boot-on; 3609 }; 3610 }; 3611 i2c@2 { 3612 reg = <2>; 3613 #address-cells = <1>; 3614 #size-cells = <0>; 3615 p3v3_aux: ir38263-p3v3-aux@40 { 3616 compatible = "infineon,ir38263"; 3617 reg = <0x40>; 3618 3619 vin-supply = <&p12v>; 3620 regulator-name = "p3v3_aux"; 3621 /* 3622 * 2msec for regulator + 18msec for board capacitance 3623 * Note: Every IC has a PTC which slowly charges the bypass 3624 * cap. 3625 */ 3626 regulator-enable-ramp-delay = <200000>; 3627 }; 3628 }; 3629 i2c@3 { 3630 reg = <3>; 3631 #address-cells = <1>; 3632 #size-cells = <0>; 3633 aux_ssb: regulator@3a { 3634 compatible = "maxim,max5970"; 3635 reg = <0x3a>; 3636 interrupt-parent = <&smb_pex_vr_ctrl>; 3637 interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 3638 vss1-supply = <&p5v_aux>; 3639 vss2-supply = <&p3v3_aux>; 3640 regulators { 3641 p5v: sw0 { 3642 regulator-name = "p5v"; 3643 shunt-resistor-micro-ohms = <12000>; 3644 regulator-over-current-protection; 3645 regulator-oc-protection-microamp = <3400000>; 3646 regulator-enable-ramp-delay = <100000>; 3647 }; 3648 p3v3_pch: sw1 { 3649 regulator-name = "p3v3_pch"; 3650 shunt-resistor-micro-ohms = <12000>; 3651 regulator-over-current-protection; 3652 regulator-oc-protection-microamp = <3400000>; 3653 regulator-enable-ramp-delay = <100000>; 3654 }; 3655 }; 3656 }; 3657 }; 3658 i2c@4 { 3659 reg = <4>; 3660 #address-cells = <1>; 3661 #size-cells = <0>; 3662 pli1209bc_p12v_a: regulator@5f { 3663 compatible = "vicor,pli1209bc"; 3664 reg = <0x5f>; 3665 regulators { 3666 p12v_a: vout2 { 3667 regulator-name = "bcm0"; 3668 regulator-boot-on; 3669 }; 3670 }; 3671 }; 3672 }; 3673 i2c@5 { 3674 reg = <5>; 3675 #address-cells = <1>; 3676 #size-cells = <0>; 3677 pli1209bc_p12v_b: regulator@5f { 3678 compatible = "vicor,pli1209bc"; 3679 reg = <0x5f>; 3680 regulators { 3681 p12v_b: vout2 { 3682 regulator-name = "bcm1"; 3683 regulator-boot-on; 3684 }; 3685 }; 3686 }; 3687 }; 3688 i2c@6 { 3689 reg = <6>; 3690 #address-cells = <1>; 3691 #size-cells = <0>; 3692 pli1209bc_p12v_c: regulator@5f { 3693 compatible = "vicor,pli1209bc"; 3694 reg = <0x5f>; 3695 regulators { 3696 p12v_c: vout2 { 3697 regulator-name = "bcm2"; 3698 regulator-boot-on; 3699 }; 3700 }; 3701 }; 3702 }; 3703 i2c@7 { 3704 reg = <7>; 3705 #address-cells = <1>; 3706 #size-cells = <0>; 3707 pli1209bc_p12v_d: regulator@5f { 3708 compatible = "vicor,pli1209bc"; 3709 reg = <0x5f>; 3710 regulators { 3711 p12v_d: vout2 { 3712 regulator-name = "bcm3"; 3713 regulator-boot-on; 3714 }; 3715 }; 3716 }; 3717 }; 3718}; 3719 3720&i2cmux24 { 3721 3722 reset-gpios = <&gpio0 ASPEED_GPIO(P, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 3723 3724 i2c@0 { 3725 #address-cells = <1>; 3726 #size-cells = <0>; 3727 reg = <0>; 3728 smb_svc_pex_rssd01_16: pinctrl@20 { 3729 compatible = "cypress,cy8c9560"; 3730 reg = <0x20>; 3731 gpio-controller; 3732 #gpio-cells = <2>; 3733 interrupt-parent = <&gpio0>; 3734 interrupts = <ASPEED_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>; 3735 interrupt-controller; 3736 #interrupt-cells = <2>; 3737 vdd-supply = <&p3v3_bmc_aux>; 3738 reset-gpios = <&smb_svc_pex_cpu0_led 17 GPIO_ACTIVE_HIGH>; 3739 gpio-line-names = 3740 /* GPORT0 */ 3741 "LED_ID_RSSD01", "LED_ID_RSSD02", 3742 "LED_ID_RSSD03", "LED_ID_RSSD04", 3743 "LED_ID_RSSD05", "LED_ID_RSSD06", 3744 "LED_ID_RSSD07", "LED_ID_RSSD08", 3745 /* GPORT1 */ 3746 "LED_ID_RSSD09", "LED_ID_RSSD10", 3747 "LED_ID_RSSD11", "LED_ID_RSSD12", 3748 "LED_ID_RSSD13", "LED_ID_RSSD14", 3749 "LED_ID_RSSD15", "LED_ID_RSSD16", 3750 /* GPORT2 */ 3751 "RSSD01_PRESENT_N", "RSSD02_PRESENT_N", 3752 "RSSD03_PRESENT_N", "RSSD04_PRESENT_N", 3753 /* GPORT3 */ 3754 "RSSD05_PRESENT_N", "RSSD06_PRESENT_N", 3755 "RSSD07_PRESENT_N", "RSSD08_PRESENT_N", 3756 "RSSD09_PRESENT_N", "RSSD10_PRESENT_N", 3757 "RSSD11_PRESENT_N", "RSSD12_PRESENT_N", 3758 /* GPORT4 */ 3759 "RSSD13_PRESENT_N", "RSSD14_PRESENT_N", 3760 "RSSD15_PRESENT_N", "RSSD16_PRESENT_N", 3761 "LED_ID_FAN_ASM01", "LED_ID_FAN_ASM02", 3762 "LED_ID_FAN_ASM03", "LED_ID_FAN_ASM04", 3763 /* GPORT5 */ 3764 "LED_ID_FAN_ASM05", "LED_ID_FAN_ASM06", 3765 "PLUG_DETECT_FAN_ASM01", "PLUG_DETECT_FAN_ASM02", 3766 "PLUG_DETECT_FAN_ASM03", "PLUG_DETECT_FAN_ASM04", 3767 "PLUG_DETECT_FAN_ASM05", "PLUG_DETECT_FAN_ASM06", 3768 /* GPORT6 */ 3769 "SSB_RSSD01_ALERT_N", "SSB_RSSD02_ALERT_N", 3770 "SSB_RSSD03_ALERT_N", "SSB_RSSD04_ALERT_N", 3771 "SSB_RSSD05_ALERT_N", "SSB_RSSD06_ALERT_N", 3772 "SSB_RSSD07_ALERT_N", "SSB_RSSD08_ALERT_N", 3773 /* GPORT7 */ 3774 "SSB_RSSD09_ALERT_N", "SSB_RSSD10_ALERT_N", 3775 "SSB_RSSD11_ALERT_N", "SSB_RSSD12_ALERT_N", 3776 "SSB_RSSD13_ALERT_N", "SSB_RSSD14_ALERT_N", 3777 "SSB_RSSD15_ALERT_N", "SSB_RSSD16_ALERT_N"; 3778 pinctrl-0 = <&U65200_pins>; 3779 pinctrl-names = "default"; 3780 U65200_pins: cfg-pins { 3781 pins = "gp60", "gp61", "gp62", 3782 "gp63", "gp64", "gp65", "gp66", 3783 "gp67", "gp70", "gp71", "gp72", 3784 "gp73", "gp74", "gp75", "gp76", "gp77"; 3785 function = "gpio"; 3786 input-enable; 3787 bias-pull-up; 3788 }; 3789 }; 3790 }; 3791 i2c@1 { 3792 reg = <1>; 3793 #address-cells = <1>; 3794 #size-cells = <0>; 3795 smb_svc_pex_rssd17_32: pinctrl@20 { 3796 compatible = "cypress,cy8c9560"; 3797 reg = <0x20>; 3798 gpio-controller; 3799 #gpio-cells = <2>; 3800 interrupt-parent = <&gpio0>; 3801 interrupts = <ASPEED_GPIO(H, 0) IRQ_TYPE_LEVEL_HIGH>; 3802 interrupt-controller; 3803 #interrupt-cells = <2>; 3804 vdd-supply = <&p3v3_bmc_aux>; 3805 reset-gpios = <&smb_svc_pex_cpu1_led 17 GPIO_ACTIVE_HIGH>; 3806 gpio-line-names = 3807 /* GPORT0 */ 3808 "LED_ID_RSSD17", "LED_ID_RSSD18", 3809 "LED_ID_RSSD19", "LED_ID_RSSD20", 3810 "LED_ID_RSSD21", "LED_ID_RSSD22", 3811 "LED_ID_RSSD23", "LED_ID_RSSD24", 3812 /* GPORT1 */ 3813 "LED_ID_RSSD25", "LED_ID_RSSD26", 3814 "LED_ID_RSSD27", "LED_ID_RSSD28", 3815 "LED_ID_RSSD29", "LED_ID_RSSD30", 3816 "LED_ID_RSSD31", "LED_ID_RSSD32", 3817 /* GPORT2 */ 3818 "RSSD17_PRESENT_N", "RSSD18_PRESENT_N", 3819 "RSSD19_PRESENT_N", "RSSD20_PRESENT_N", 3820 /* GPORT3 */ 3821 "RSSD21_PRESENT_N", "RSSD22_PRESENT_N", 3822 "RSSD23_PRESENT_N", "RSSD24_PRESENT_N", 3823 "RSSD25_PRESENT_N", "RSSD26_PRESENT_N", 3824 "RSSD27_PRESENT_N", "RSSD28_PRESENT_N", 3825 /* GPORT4 */ 3826 "RSSD29_PRESENT_N", "RSSD30_PRESENT_N", 3827 "RSSD31_PRESENT_N", "RSSD32_PRESENT_N", 3828 "LED_ID_FAN_ASM07", "LED_ID_FAN_ASM08", 3829 "LED_ID_FAN_ASM09", "LED_ID_FAN_ASM10", 3830 /* GPORT5 */ 3831 "LED_ID_FAN_ASM11", "LED_ID_FAN_ASM12", 3832 "PLUG_DETECT_FAN_ASM07", "PLUG_DETECT_FAN_ASM08", 3833 "PLUG_DETECT_FAN_ASM09", "PLUG_DETECT_FAN_ASM10", 3834 "PLUG_DETECT_FAN_ASM11", "PLUG_DETECT_FAN_ASM12", 3835 /* GPORT6 */ 3836 "SSB_RSSD17_ALERT_N", "SSB_RSSD18_ALERT_N", 3837 "SSB_RSSD19_ALERT_N", "SSB_RSSD20_ALERT_N", 3838 "SSB_RSSD21_ALERT_N", "SSB_RSSD22_ALERT_N", 3839 "SSB_RSSD23_ALERT_N", "SSB_RSSD24_ALERT_N", 3840 /* GPORT7 */ 3841 "SSB_RSSD25_ALERT_N", "SSB_RSSD26_ALERT_N", 3842 "SSB_RSSD27_ALERT_N", "SSB_RSSD28_ALERT_N", 3843 "SSB_RSSD29_ALERT_N", "SSB_RSSD30_ALERT_N", 3844 "SSB_RSSD31_ALERT_N", "SSB_RSSD32_ALERT_N"; 3845 pinctrl-0 = <&U65300_pins>; 3846 pinctrl-names = "default"; 3847 U65300_pins: cfg-pins { 3848 pins = "gp60", "gp61", "gp62", 3849 "gp63", "gp64", "gp65", "gp66", 3850 "gp67", "gp70", "gp71", "gp72", 3851 "gp73", "gp74", "gp75", "gp76", 3852 "gp77"; 3853 function = "gpio"; 3854 input-enable; 3855 bias-pull-up; 3856 }; 3857 }; 3858 }; 3859 i2c@2 { 3860 reg = <2>; 3861 #address-cells = <1>; 3862 #size-cells = <0>; 3863 smb_svc_pex_cpu1_led: pinctrl@20 { 3864 compatible = "cypress,cy8c9540"; 3865 reg = <0x20>; 3866 gpio-controller; 3867 #gpio-cells = <2>; 3868 interrupt-parent = <&gpio0>; 3869 interrupts = <ASPEED_GPIO(V, 6) IRQ_TYPE_LEVEL_HIGH>; 3870 interrupt-controller; 3871 #interrupt-cells = <2>; 3872 vdd-supply = <&p3v3_bmc_aux>; 3873 reset-gpios = <&gpio0 ASPEED_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; 3874 gpio-reserved-ranges = <18 2>, <36 2>; 3875 gpio-line-names = 3876 /* GPORT0 */ 3877 "PLUG_DETECT_DIMM_C1E2", "PLUG_DETECT_DIMM_C1E1", 3878 "PLUG_DETECT_DIMM_C1F2", "PLUG_DETECT_DIMM_C1F1", 3879 "PLUG_DETECT_DIMM_C1G2", "PLUG_DETECT_DIMM_C1G1", 3880 "PLUG_DETECT_DIMM_C1H2", "PLUG_DETECT_DIMM_C1H1", 3881 /* GPORT1 */ 3882 "PLUG_DETECT_DIMM_C1D1", "PLUG_DETECT_DIMM_C1D2", 3883 "PLUG_DETECT_DIMM_C1C1", "PLUG_DETECT_DIMM_C1C2", 3884 "PLUG_DETECT_DIMM_C1B1", "PLUG_DETECT_DIMM_C1B2", 3885 "PLUG_DETECT_DIMM_C1A1", "PLUG_DETECT_DIMM_C1A2", 3886 /* GPORT2 */ 3887 "PEX_CPU1_EVENT_RST", "SVC_PEX_RSSD17_32_RST", 3888 "", "", 3889 /* GPORT3 */ 3890 "LED_ID_DIMM_C1E2", "LED_ID_DIMM_C1E1", 3891 "LED_ID_DIMM_C1F2", "LED_ID_DIMM_C1F1", 3892 "LED_ID_DIMM_C1G2", "LED_ID_DIMM_C1G1", 3893 "LED_ID_DIMM_C1H2", "LED_ID_DIMM_C1H1", 3894 /* GPORT4 */ 3895 "LED_ID_DIMM_C1A2", "LED_ID_DIMM_C1A1", 3896 "LED_ID_DIMM_C1B2", "LED_ID_DIMM_C1B1", 3897 "LED_ID_DIMM_C1C2", "LED_ID_DIMM_C1C1", 3898 "LED_ID_DIMM_C1D2", "LED_ID_DIMM_C1D1", 3899 /* GPORT5 */ 3900 "", "", 3901 "FM_CPU1_SKTOCC_N", "LED_ID_CPU1"; 3902 }; 3903 }; 3904 i2c@3 { 3905 reg = <3>; 3906 #address-cells = <1>; 3907 #size-cells = <0>; 3908 smb_svc_pex_fan_alert: pinctrl@20 { 3909 compatible = "cypress,cy8c9560"; 3910 reg = <0x20>; 3911 gpio-controller; 3912 #gpio-cells = <2>; 3913 interrupt-parent = <&bmc_pex_irq>; 3914 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 3915 interrupt-controller; 3916 #interrupt-cells = <2>; 3917 vdd-supply = <&p3v3_aux>; 3918 reset-gpios = <&bmc_pex_irq 17 GPIO_ACTIVE_HIGH>; 3919 gpio-reserved-ranges = <24 3>, <51 9>; 3920 gpio-line-names = 3921 /* GPORT0 */ 3922 "FAN01_SSB_ALERT_N", "FAN02_SSB_ALERT_N", 3923 "FAN03_SSB_ALERT_N", "FAN04_SSB_ALERT_N", 3924 "FAN05_SSB_ALERT_N", "FAN06_SSB_ALERT_N", 3925 "FAN07_SSB_ALERT_N", "FAN08_SSB_ALERT_N", 3926 /* GPORT1 */ 3927 "FAN09_SSB_ALERT_N", "FAN10_SSB_ALERT_N", 3928 "FAN11_SSB_ALERT_N", "FAN12_SSB_ALERT_N", 3929 "FAN13_SSB_ALERT_N", "FAN14_SSB_ALERT_N", 3930 "FAN15_SSB_ALERT_N", "FAN16_SSB_ALERT_N", 3931 /* GPORT2 */ 3932 "FAN17_SSB_ALERT_N", "FAN18_SSB_ALERT_N", 3933 "FAN19_SSB_ALERT_N", "FAN20_SSB_ALERT_N", 3934 /* GPORT3 */ 3935 "FAN21_SSB_ALERT_N", "FAN22_SSB_ALERT_N", 3936 "FAN23_SSB_ALERT_N", "FAN24_SSB_ALERT_N", 3937 "", "", 3938 "", "FAN01_PWM_ALERT_N", 3939 /* GPORT4 */ 3940 "FAN02_PWM_ALERT_N", "FAN03_PWM_ALERT_N", 3941 "FAN04_PWM_ALERT_N", "FAN05_PWM_ALERT_N", 3942 "FAN06_PWM_ALERT_N", "FAN07_PWM_ALERT_N", 3943 "FAN08_PWM_ALERT_N", "FAN09_PWM_ALERT_N", 3944 /* GPORT5 */ 3945 "FAN10_PWM_ALERT_N", "FAN11_PWM_ALERT_N", 3946 "FAN12_PWM_ALERT_N", "FAN13_PWM_ALERT_N", 3947 "FAN14_PWM_ALERT_N", "FAN15_PWM_ALERT_N", 3948 "FAN16_PWM_ALERT_N", "FAN17_PWM_ALERT_N", 3949 /* GPORT6 */ 3950 "FAN18_PWM_ALERT_N", "FAN19_PWM_ALERT_N", 3951 "FAN20_PWM_ALERT_N", "FAN21_PWM_ALERT_N", 3952 "FAN22_PWM_ALERT_N", "FAN23_PWM_ALERT_N", 3953 "FAN24_PWM_ALERT_N", "", 3954 /* GPORT7 */ 3955 "", "", 3956 "", "", 3957 "", "", 3958 "", ""; 3959 pinctrl-0 = <&U65600_pins>; 3960 pinctrl-names = "default"; 3961 U65600_pins: cfg-pins { 3962 pins = "gp00", "gp01", "gp02", 3963 "gp03", "gp04", "gp05", "gp06", 3964 "gp07", "gp10", "gp11", "gp12", 3965 "gp13", "gp14", "gp15", "gp16", 3966 "gp17", "gp20", "gp21", "gp22", 3967 "gp23", "gp30", "gp31", "gp32", 3968 "gp33", "gp37", "gp40", "gp41", 3969 "gp42", "gp43", "gp44", "gp45", 3970 "gp46", "gp47", "gp50", "gp51", 3971 "gp52", "gp53", "gp54", "gp55", 3972 "gp56", "gp57", "gp60", "gp61", 3973 "gp62", "gp63", "gp64", "gp65", 3974 "gp66"; 3975 function = "gpio"; 3976 input-enable; 3977 bias-pull-up; 3978 }; 3979 }; 3980 }; 3981 i2c@4 { 3982 reg = <4>; 3983 #address-cells = <1>; 3984 #size-cells = <0>; 3985 smb_svc_pex_cpu2_led: pinctrl@20 { 3986 compatible = "cypress,cy8c9540"; 3987 reg = <0x20>; 3988 gpio-controller; 3989 #gpio-cells = <2>; 3990 interrupt-parent = <&gpio0>; 3991 interrupts = <ASPEED_GPIO(V, 5) IRQ_TYPE_LEVEL_HIGH>; 3992 interrupt-controller; 3993 #interrupt-cells = <2>; 3994 vdd-supply = <&p3v3_bmc_aux>; 3995 reset-gpios = <&gpio0 ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>; 3996 gpio-reserved-ranges = <17 3>, <36 2>; 3997 gpio-line-names = 3998 /* GPORT0 */ 3999 "PLUG_DETECT_DIMM_C2E2", "PLUG_DETECT_DIMM_C2E1", 4000 "PLUG_DETECT_DIMM_C2F2", "PLUG_DETECT_DIMM_C2F1", 4001 "PLUG_DETECT_DIMM_C2G2", "PLUG_DETECT_DIMM_C2G1", 4002 "PLUG_DETECT_DIMM_C2H2", "PLUG_DETECT_DIMM_C2H1", 4003 /* GPORT1 */ 4004 "PLUG_DETECT_DIMM_C2D1", "PLUG_DETECT_DIMM_C2D2", 4005 "PLUG_DETECT_DIMM_C2C1", "PLUG_DETECT_DIMM_C2C2", 4006 "PLUG_DETECT_DIMM_C2B1", "PLUG_DETECT_DIMM_C2B2", 4007 "PLUG_DETECT_DIMM_C2A1", "PLUG_DETECT_DIMM_C2A2", 4008 /* GPORT2 */ 4009 "PEX_CPU2_EVENT_RST", "", 4010 "", "", 4011 /* GPORT3 */ 4012 "LED_ID_DIMM_C2E2", "LED_ID_DIMM_C2E1", 4013 "LED_ID_DIMM_C2F2", "LED_ID_DIMM_C2F1", 4014 "LED_ID_DIMM_C2G2", "LED_ID_DIMM_C2G1", 4015 "LED_ID_DIMM_C2H2", "LED_ID_DIMM_C2H1", 4016 /* GPORT4 */ 4017 "LED_ID_DIMM_C2A2", "LED_ID_DIMM_C2A1", 4018 "LED_ID_DIMM_C2B2", "LED_ID_DIMM_C2B1", 4019 "LED_ID_DIMM_C2C2", "LED_ID_DIMM_C2C1", 4020 "LED_ID_DIMM_C2D2", "LED_ID_DIMM_C2D1", 4021 /* GPORT5 */ 4022 "", "", 4023 "FM_CPU2_SKTOCC_N", "LED_ID_CPU2"; 4024 }; 4025 }; 4026 i2c@5 { 4027 reg = <5>; 4028 #address-cells = <1>; 4029 #size-cells = <0>; 4030 4031 smb_svc_pex_cpu3_led: pinctrl@20 { 4032 compatible = "cypress,cy8c9540"; 4033 reg = <0x20>; 4034 gpio-controller; 4035 #gpio-cells = <2>; 4036 interrupt-parent = <&gpio0>; 4037 interrupts = <ASPEED_GPIO(V, 3) IRQ_TYPE_LEVEL_HIGH>; 4038 interrupt-controller; 4039 #interrupt-cells = <2>; 4040 vdd-supply = <&p3v3_bmc_aux>; 4041 reset-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; 4042 gpio-reserved-ranges = <17 3>; 4043 gpio-line-names = 4044 /* GPORT0 */ 4045 "PLUG_DETECT_DIMM_C3E2", "PLUG_DETECT_DIMM_C3E1", 4046 "PLUG_DETECT_DIMM_C3F2", "PLUG_DETECT_DIMM_C3F1", 4047 "PLUG_DETECT_DIMM_C3G2", "PLUG_DETECT_DIMM_C3G1", 4048 "PLUG_DETECT_DIMM_C3H2", "PLUG_DETECT_DIMM_C3H1", 4049 /* GPORT1 */ 4050 "PLUG_DETECT_DIMM_C3D1", "PLUG_DETECT_DIMM_C3D2", 4051 "PLUG_DETECT_DIMM_C3C1", "PLUG_DETECT_DIMM_C3C2", 4052 "PLUG_DETECT_DIMM_C3B1", "PLUG_DETECT_DIMM_C3B2", 4053 "PLUG_DETECT_DIMM_C3A1", "PLUG_DETECT_DIMM_C3A2", 4054 /* GPORT2 */ 4055 "PEX_CPU3_EVENT_RST", "", 4056 "", "", 4057 /* GPORT3 */ 4058 "LED_ID_DIMM_C3E2", "LED_ID_DIMM_C3E1", 4059 "LED_ID_DIMM_C3F2", "LED_ID_DIMM_C3F1", 4060 "LED_ID_DIMM_C3G2", "LED_ID_DIMM_C3G1", 4061 "LED_ID_DIMM_C3H2", "LED_ID_DIMM_C3H1", 4062 /* GPORT4 */ 4063 "LED_ID_DIMM_C3A2", "LED_ID_DIMM_C3A1", 4064 "LED_ID_DIMM_C3B2", "LED_ID_DIMM_C3B1", 4065 "LED_ID_DIMM_C3C2", "LED_ID_DIMM_C3C1", 4066 "LED_ID_DIMM_C3D2", "LED_ID_DIMM_C3D1", 4067 /* GPORT5 */ 4068 "LED_PWR_DWR_FRNT", "LED_ID_DWR_FRNT_P", 4069 "FM_CPU3_SKTOCC_N", "LED_ID_CPU3"; 4070 }; 4071 }; 4072 i2c@6 { 4073 reg = <6>; 4074 #address-cells = <1>; 4075 #size-cells = <0>; 4076 smb_svc_pex_cpu0_led: pinctrl@20 { 4077 compatible = "cypress,cy8c9540"; 4078 reg = <0x20>; 4079 gpio-controller; 4080 #gpio-cells = <2>; 4081 interrupt-parent = <&gpio0>; 4082 interrupts = <ASPEED_GPIO(O, 3) IRQ_TYPE_LEVEL_HIGH>; 4083 interrupt-controller; 4084 #interrupt-cells = <2>; 4085 vdd-supply = <&p3v3_bmc_aux>; 4086 reset-gpios = <&gpio0 ASPEED_GPIO(Q, 4) GPIO_ACTIVE_HIGH>; 4087 gpio-reserved-ranges = <18 2>, <36 2>; 4088 gpio-line-names = 4089 /* GPORT0 */ 4090 "PLUG_DETECT_DIMM_C0E2", "PLUG_DETECT_DIMM_C0E1", 4091 "PLUG_DETECT_DIMM_C0F2", "PLUG_DETECT_DIMM_C0F1", 4092 "PLUG_DETECT_DIMM_C0G2", "PLUG_DETECT_DIMM_C0G1", 4093 "PLUG_DETECT_DIMM_C0H2", "PLUG_DETECT_DIMM_C0H1", 4094 /* GPORT1 */ 4095 "PLUG_DETECT_DIMM_C0D1", "PLUG_DETECT_DIMM_C0D2", 4096 "PLUG_DETECT_DIMM_C0C1", "PLUG_DETECT_DIMM_C0C2", 4097 "PLUG_DETECT_DIMM_C0B1", "PLUG_DETECT_DIMM_C0B2", 4098 "PLUG_DETECT_DIMM_C0A1", "PLUG_DETECT_DIMM_C0A2", 4099 /* GPORT2 */ 4100 "PEX_CPU0_EVENT_RST", "SVC_PEX_RSSD01_16_RST", 4101 "", "", 4102 /* GPORT3 */ 4103 "LED_ID_DIMM_C0E2", "LED_ID_DIMM_C0E1", 4104 "LED_ID_DIMM_C0F2", "LED_ID_DIMM_C0F1", 4105 "LED_ID_DIMM_C0G2", "LED_ID_DIMM_C0G1", 4106 "LED_ID_DIMM_C0H2", "LED_ID_DIMM_C0H1", 4107 /* GPORT4 */ 4108 "LED_ID_DIMM_C0A2", "LED_ID_DIMM_C0A1", 4109 "LED_ID_DIMM_C0B2", "LED_ID_DIMM_C0B1", 4110 "LED_ID_DIMM_C0C2", "LED_ID_DIMM_C0C1", 4111 "LED_ID_DIMM_C0D2", "LED_ID_DIMM_C0D1", 4112 /* GPORT5 */ 4113 "", "", 4114 "FM_CPU0_SKTOCC_N", "LED_ID_CPU0"; 4115 }; 4116 }; 4117}; 4118 4119&i2c9 { 4120 status = "okay"; 4121 4122 p1v2_bmc_aux_mon: pmic@60 { 4123 compatible = "maxim,max8952"; 4124 reg = <0x60>; 4125 max8952,default-mode = <3>; 4126 max8952,dvs-mode-microvolt = <1100000>, <1100000>, 4127 <1100000>, <1100000>; 4128 max8952,sync-freq = <0>; 4129 max8952,ramp-speed = <0>; 4130 regulator-always-on; 4131 regulator-boot-on; 4132 }; 4133}; 4134 4135&i2cmux8 { 4136 i2c@0 { 4137 reg = <0>; 4138 #address-cells = <1>; 4139 #size-cells = <0>; 4140 4141 fan10_ssb: regulator@3a { 4142 compatible = "maxim,max5978"; 4143 reg = <0x3a>; 4144 vss1-supply = <&p12v>; 4145 interrupt-parent = <&smb_svc_pex_fan_alert>; 4146 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 4147 4148 regulators { 4149 sw0_fan10_ssb: sw0 { 4150 regulator-name = "fan10_supply"; 4151 shunt-resistor-micro-ohms = <10000>; 4152 regulator-over-current-protection; 4153 regulator-oc-protection-microamp = <3400000>; 4154 regulator-enable-ramp-delay = <1000>; 4155 }; 4156 }; 4157 }; 4158 4159 }; 4160 i2c@1 { 4161 reg = <1>; 4162 #address-cells = <1>; 4163 #size-cells = <0>; 4164 4165 fan12_ssb: regulator@3a { 4166 compatible = "maxim,max5978"; 4167 reg = <0x3a>; 4168 vss1-supply = <&p12v>; 4169 interrupt-parent = <&smb_svc_pex_fan_alert>; 4170 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 4171 4172 regulators { 4173 sw0_fan12_ssb: sw0 { 4174 regulator-name = "fan12_supply"; 4175 shunt-resistor-micro-ohms = <10000>; 4176 regulator-over-current-protection; 4177 regulator-oc-protection-microamp = <3400000>; 4178 regulator-enable-ramp-delay = <1000>; 4179 }; 4180 }; 4181 }; 4182 4183 }; 4184 i2c@2 { 4185 reg = <2>; 4186 #address-cells = <1>; 4187 #size-cells = <0>; 4188 4189 fan14_ssb: regulator@3a { 4190 compatible = "maxim,max5978"; 4191 reg = <0x3a>; 4192 vss1-supply = <&p12v>; 4193 interrupt-parent = <&smb_svc_pex_fan_alert>; 4194 interrupts = <13 IRQ_TYPE_LEVEL_LOW>; 4195 4196 regulators { 4197 sw0_fan14_ssb: sw0 { 4198 regulator-name = "fan14_supply"; 4199 shunt-resistor-micro-ohms = <10000>; 4200 regulator-over-current-protection; 4201 regulator-oc-protection-microamp = <3400000>; 4202 regulator-enable-ramp-delay = <1000>; 4203 }; 4204 }; 4205 }; 4206 }; 4207 i2c@3 { 4208 reg = <3>; 4209 #address-cells = <1>; 4210 #size-cells = <0>; 4211 4212 fan16_ssb: regulator@3a { 4213 compatible = "maxim,max5978"; 4214 reg = <0x3a>; 4215 vss1-supply = <&p12v>; 4216 interrupt-parent = <&smb_svc_pex_fan_alert>; 4217 interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 4218 4219 regulators { 4220 sw0_fan16_ssb: sw0 { 4221 regulator-name = "fan16_supply"; 4222 shunt-resistor-micro-ohms = <10000>; 4223 regulator-over-current-protection; 4224 regulator-oc-protection-microamp = <3400000>; 4225 regulator-enable-ramp-delay = <1000>; 4226 }; 4227 }; 4228 }; 4229 }; 4230 i2c@4 { 4231 reg = <4>; 4232 #address-cells = <1>; 4233 #size-cells = <0>; 4234 4235 fan18_ssb: regulator@3a { 4236 compatible = "maxim,max5978"; 4237 reg = <0x3a>; 4238 vss1-supply = <&p12v>; 4239 interrupt-parent = <&smb_svc_pex_fan_alert>; 4240 interrupts = <17 IRQ_TYPE_LEVEL_LOW>; 4241 4242 regulators { 4243 sw0_fan18_ssb: sw0 { 4244 regulator-name = "fan18_supply"; 4245 shunt-resistor-micro-ohms = <10000>; 4246 regulator-over-current-protection; 4247 regulator-oc-protection-microamp = <3400000>; 4248 regulator-enable-ramp-delay = <1000>; 4249 }; 4250 }; 4251 }; 4252 }; 4253 i2c@5 { 4254 reg = <5>; 4255 #address-cells = <1>; 4256 #size-cells = <0>; 4257 4258 fan20_ssb: regulator@3a { 4259 compatible = "maxim,max5978"; 4260 reg = <0x3a>; 4261 vss1-supply = <&p12v>; 4262 interrupt-parent = <&smb_svc_pex_fan_alert>; 4263 interrupts = <19 IRQ_TYPE_LEVEL_LOW>; 4264 4265 regulators { 4266 sw0_fan20_ssb: sw0 { 4267 regulator-name = "fan20_supply"; 4268 shunt-resistor-micro-ohms = <10000>; 4269 regulator-over-current-protection; 4270 regulator-oc-protection-microamp = <3400000>; 4271 regulator-enable-ramp-delay = <1000>; 4272 }; 4273 }; 4274 }; 4275 }; 4276 i2c@6 { 4277 reg = <6>; 4278 #address-cells = <1>; 4279 #size-cells = <0>; 4280 4281 fan22_ssb: regulator@3a { 4282 compatible = "maxim,max5978"; 4283 reg = <0x3a>; 4284 vss1-supply = <&p12v>; 4285 interrupt-parent = <&smb_svc_pex_fan_alert>; 4286 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 4287 4288 regulators { 4289 sw0_fan22_ssb: sw0 { 4290 regulator-name = "fan22_supply"; 4291 shunt-resistor-micro-ohms = <10000>; 4292 regulator-over-current-protection; 4293 regulator-oc-protection-microamp = <3400000>; 4294 regulator-enable-ramp-delay = <1000>; 4295 }; 4296 }; 4297 }; 4298 }; 4299 i2c@7 { 4300 reg = <7>; 4301 #address-cells = <1>; 4302 #size-cells = <0>; 4303 4304 fan24_ssb: regulator@3a { 4305 compatible = "maxim,max5978"; 4306 reg = <0x3a>; 4307 vss1-supply = <&p12v>; 4308 interrupt-parent = <&smb_svc_pex_fan_alert>; 4309 interrupts = <23 IRQ_TYPE_LEVEL_LOW>; 4310 4311 regulators { 4312 sw0_fan24_ssb: sw0 { 4313 regulator-name = "fan24_supply"; 4314 shunt-resistor-micro-ohms = <10000>; 4315 regulator-over-current-protection; 4316 regulator-oc-protection-microamp = <3400000>; 4317 regulator-enable-ramp-delay = <1000>; 4318 }; 4319 }; 4320 }; 4321 }; 4322}; 4323 4324&i2cmux7 { 4325 i2c@0 { 4326 reg = <0>; 4327 #address-cells = <1>; 4328 #size-cells = <0>; 4329 4330 fan17_ssb: regulator@3a { 4331 compatible = "maxim,max5978"; 4332 reg = <0x3a>; 4333 vss1-supply = <&p12v>; 4334 interrupt-parent = <&smb_svc_pex_fan_alert>; 4335 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 4336 4337 regulators { 4338 sw0_fan17_ssb: sw0 { 4339 regulator-name = "fan17_supply"; 4340 shunt-resistor-micro-ohms = <10000>; 4341 regulator-over-current-protection; 4342 regulator-oc-protection-microamp = <3400000>; 4343 regulator-enable-ramp-delay = <1000>; 4344 }; 4345 }; 4346 }; 4347 }; 4348 i2c@1 { 4349 reg = <1>; 4350 #address-cells = <1>; 4351 #size-cells = <0>; 4352 4353 fan19_ssb: regulator@3a { 4354 compatible = "maxim,max5978"; 4355 reg = <0x3a>; 4356 vss1-supply = <&p12v>; 4357 interrupt-parent = <&smb_svc_pex_fan_alert>; 4358 interrupts = <18 IRQ_TYPE_LEVEL_LOW>; 4359 4360 regulators { 4361 sw0_fan19_ssb: sw0 { 4362 regulator-name = "fan19_supply"; 4363 shunt-resistor-micro-ohms = <10000>; 4364 regulator-over-current-protection; 4365 regulator-oc-protection-microamp = <3400000>; 4366 regulator-enable-ramp-delay = <1000>; 4367 }; 4368 }; 4369 }; 4370 }; 4371 i2c@2 { 4372 reg = <2>; 4373 #address-cells = <1>; 4374 #size-cells = <0>; 4375 4376 fan21_ssb: regulator@3a { 4377 compatible = "maxim,max5978"; 4378 reg = <0x3a>; 4379 vss1-supply = <&p12v>; 4380 interrupt-parent = <&smb_svc_pex_fan_alert>; 4381 interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 4382 4383 regulators { 4384 sw0_fan21_ssb: sw0 { 4385 regulator-name = "fan21_supply"; 4386 shunt-resistor-micro-ohms = <10000>; 4387 regulator-over-current-protection; 4388 regulator-oc-protection-microamp = <3400000>; 4389 regulator-enable-ramp-delay = <1000>; 4390 }; 4391 }; 4392 }; 4393 }; 4394 i2c@3 { 4395 reg = <3>; 4396 #address-cells = <1>; 4397 #size-cells = <0>; 4398 4399 fan23_ssb: regulator@3a { 4400 compatible = "maxim,max5978"; 4401 reg = <0x3a>; 4402 vss1-supply = <&p12v>; 4403 interrupt-parent = <&smb_svc_pex_fan_alert>; 4404 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 4405 4406 regulators { 4407 sw0_fan23_ssb: sw0 { 4408 regulator-name = "fan23_supply"; 4409 shunt-resistor-micro-ohms = <10000>; 4410 regulator-over-current-protection; 4411 regulator-oc-protection-microamp = <3400000>; 4412 regulator-enable-ramp-delay = <1000>; 4413 }; 4414 }; 4415 }; 4416 }; 4417 i2c@4 { 4418 reg = <4>; 4419 #address-cells = <1>; 4420 #size-cells = <0>; 4421 4422 fan02_ssb: regulator@3a { 4423 compatible = "maxim,max5978"; 4424 reg = <0x3a>; 4425 vss1-supply = <&p12v>; 4426 interrupt-parent = <&smb_svc_pex_fan_alert>; 4427 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 4428 4429 regulators { 4430 sw0_fan02_ssb: sw0 { 4431 regulator-name = "fan02_supply"; 4432 shunt-resistor-micro-ohms = <10000>; 4433 regulator-over-current-protection; 4434 regulator-oc-protection-microamp = <3400000>; 4435 regulator-enable-ramp-delay = <1000>; 4436 }; 4437 }; 4438 }; 4439 }; 4440 i2c@5 { 4441 reg = <5>; 4442 #address-cells = <1>; 4443 #size-cells = <0>; 4444 4445 fan04_ssb: regulator@3a { 4446 compatible = "maxim,max5978"; 4447 reg = <0x3a>; 4448 vss1-supply = <&p12v>; 4449 interrupt-parent = <&smb_svc_pex_fan_alert>; 4450 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 4451 4452 regulators { 4453 sw0_fan04_ssb: sw0 { 4454 regulator-name = "fan04_supply"; 4455 shunt-resistor-micro-ohms = <10000>; 4456 regulator-over-current-protection; 4457 regulator-oc-protection-microamp = <3400000>; 4458 regulator-enable-ramp-delay = <1000>; 4459 }; 4460 }; 4461 }; 4462 }; 4463 i2c@6 { 4464 reg = <6>; 4465 #address-cells = <1>; 4466 #size-cells = <0>; 4467 4468 fan06_ssb: regulator@3a { 4469 compatible = "maxim,max5978"; 4470 reg = <0x3a>; 4471 vss1-supply = <&p12v>; 4472 interrupt-parent = <&smb_svc_pex_fan_alert>; 4473 interrupts = <5 IRQ_TYPE_LEVEL_LOW>; 4474 4475 regulators { 4476 sw0_fan06_ssb: sw0 { 4477 regulator-name = "fan06_supply"; 4478 shunt-resistor-micro-ohms = <10000>; 4479 regulator-over-current-protection; 4480 regulator-oc-protection-microamp = <3400000>; 4481 regulator-enable-ramp-delay = <1000>; 4482 }; 4483 }; 4484 }; 4485 }; 4486 i2c@7 { 4487 reg = <7>; 4488 #address-cells = <1>; 4489 #size-cells = <0>; 4490 4491 fan08_ssb: regulator@3a { 4492 compatible = "maxim,max5978"; 4493 reg = <0x3a>; 4494 vss1-supply = <&p12v>; 4495 interrupt-parent = <&smb_svc_pex_fan_alert>; 4496 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 4497 4498 regulators { 4499 sw0_fan08_ssb: sw0 { 4500 regulator-name = "fan08_supply"; 4501 shunt-resistor-micro-ohms = <10000>; 4502 regulator-over-current-protection; 4503 regulator-oc-protection-microamp = <3400000>; 4504 regulator-enable-ramp-delay = <1000>; 4505 }; 4506 }; 4507 }; 4508 }; 4509}; 4510 4511&i2cmux6 { 4512 i2c@0 { 4513 reg = <0>; 4514 #address-cells = <1>; 4515 #size-cells = <0>; 4516 4517 fan01_ssb: regulator@3a { 4518 compatible = "maxim,max5978"; 4519 reg = <0x3a>; 4520 vss1-supply = <&p12v>; 4521 interrupt-parent = <&smb_svc_pex_fan_alert>; 4522 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 4523 4524 regulators { 4525 sw0_fan01_ssb: sw0 { 4526 regulator-name = "fan01_supply"; 4527 shunt-resistor-micro-ohms = <10000>; 4528 regulator-over-current-protection; 4529 regulator-oc-protection-microamp = <3400000>; 4530 regulator-enable-ramp-delay = <1000>; 4531 }; 4532 }; 4533 }; 4534 }; 4535 i2c@1 { 4536 reg = <1>; 4537 #address-cells = <1>; 4538 #size-cells = <0>; 4539 4540 fan03_ssb: regulator@3a { 4541 compatible = "maxim,max5978"; 4542 reg = <0x3a>; 4543 vss1-supply = <&p12v>; 4544 interrupt-parent = <&smb_svc_pex_fan_alert>; 4545 interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 4546 4547 regulators { 4548 sw0_fan03_ssb: sw0 { 4549 regulator-name = "fan03_supply"; 4550 4551 shunt-resistor-micro-ohms = <10000>; 4552 regulator-over-current-protection; 4553 regulator-oc-protection-microamp = <3400000>; 4554 regulator-enable-ramp-delay = <1000>; 4555 }; 4556 }; 4557 }; 4558 }; 4559 i2c@2 { 4560 reg = <2>; 4561 #address-cells = <1>; 4562 #size-cells = <0>; 4563 4564 fan05_ssb: regulator@3a { 4565 compatible = "maxim,max5978"; 4566 reg = <0x3a>; 4567 vss1-supply = <&p12v>; 4568 interrupt-parent = <&smb_svc_pex_fan_alert>; 4569 interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 4570 4571 regulators { 4572 sw0_fan05_ssb: sw0 { 4573 regulator-name = "fan05_supply"; 4574 shunt-resistor-micro-ohms = <10000>; 4575 regulator-over-current-protection; 4576 regulator-oc-protection-microamp = <3400000>; 4577 regulator-enable-ramp-delay = <1000>; 4578 }; 4579 }; 4580 }; 4581 }; 4582 i2c@3 { 4583 reg = <3>; 4584 #address-cells = <1>; 4585 #size-cells = <0>; 4586 4587 fan07_ssb: regulator@3a { 4588 compatible = "maxim,max5978"; 4589 reg = <0x3a>; 4590 vss1-supply = <&p12v>; 4591 interrupt-parent = <&smb_svc_pex_fan_alert>; 4592 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 4593 4594 regulators { 4595 sw0_fan07_ssb: sw0 { 4596 regulator-name = "fan07_supply"; 4597 shunt-resistor-micro-ohms = <10000>; 4598 regulator-over-current-protection; 4599 regulator-oc-protection-microamp = <3400000>; 4600 regulator-enable-ramp-delay = <1000>; 4601 }; 4602 }; 4603 }; 4604 }; 4605 i2c@4 { 4606 reg = <4>; 4607 #address-cells = <1>; 4608 #size-cells = <0>; 4609 4610 fan09_ssb: regulator@3a { 4611 compatible = "maxim,max5978"; 4612 reg = <0x3a>; 4613 vss1-supply = <&p12v>; 4614 interrupt-parent = <&smb_svc_pex_fan_alert>; 4615 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 4616 4617 regulators { 4618 sw0_fan09_ssb: sw0 { 4619 regulator-name = "fan09_supply"; 4620 shunt-resistor-micro-ohms = <10000>; 4621 regulator-over-current-protection; 4622 regulator-oc-protection-microamp = <3400000>; 4623 regulator-enable-ramp-delay = <1000>; 4624 }; 4625 }; 4626 }; 4627 }; 4628 i2c@5 { 4629 reg = <5>; 4630 #address-cells = <1>; 4631 #size-cells = <0>; 4632 4633 fan11_ssb: regulator@3a { 4634 compatible = "maxim,max5978"; 4635 reg = <0x3a>; 4636 vss1-supply = <&p12v>; 4637 interrupt-parent = <&smb_svc_pex_fan_alert>; 4638 interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 4639 4640 regulators { 4641 sw0_fan11_ssb: sw0 { 4642 regulator-name = "fan11_supply"; 4643 shunt-resistor-micro-ohms = <10000>; 4644 regulator-over-current-protection; 4645 regulator-oc-protection-microamp = <3400000>; 4646 regulator-enable-ramp-delay = <1000>; 4647 }; 4648 }; 4649 }; 4650 }; 4651 i2c@6 { 4652 reg = <6>; 4653 #address-cells = <1>; 4654 #size-cells = <0>; 4655 4656 fan13_ssb: regulator@3a { 4657 compatible = "maxim,max5978"; 4658 reg = <0x3a>; 4659 vss1-supply = <&p12v>; 4660 interrupt-parent = <&smb_svc_pex_fan_alert>; 4661 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 4662 4663 regulators { 4664 sw0_fan13_ssb: sw0 { 4665 regulator-name = "fan13_supply"; 4666 shunt-resistor-micro-ohms = <10000>; 4667 regulator-over-current-protection; 4668 regulator-oc-protection-microamp = <3400000>; 4669 regulator-enable-ramp-delay = <1000>; 4670 }; 4671 }; 4672 }; 4673 }; 4674 i2c@7 { 4675 reg = <7>; 4676 #address-cells = <1>; 4677 #size-cells = <0>; 4678 4679 fan15_ssb: regulator@3a { 4680 compatible = "maxim,max5978"; 4681 reg = <0x3a>; 4682 vss1-supply = <&p12v>; 4683 interrupt-parent = <&smb_svc_pex_fan_alert>; 4684 interrupts = <14 IRQ_TYPE_LEVEL_LOW>; 4685 4686 regulators { 4687 sw0_fan15_ssb: sw0 { 4688 regulator-name = "fan15_supply"; 4689 shunt-resistor-micro-ohms = <10000>; 4690 regulator-over-current-protection; 4691 regulator-oc-protection-microamp = <3400000>; 4692 regulator-enable-ramp-delay = <1000>; 4693 }; 4694 }; 4695 }; 4696 4697 }; 4698}; 4699 4700&i2cmux9 { 4701 i2c@0 { 4702 reg = <0>; 4703 #address-cells = <1>; 4704 #size-cells = <0>; 4705 4706 ssb_rssd19: regulator@3a { 4707 compatible = "maxim,max5970"; 4708 reg = <0x3a>; 4709 interrupt-parent = <&smb_svc_pex_rssd17_32>; 4710 interrupts = <46 IRQ_TYPE_LEVEL_LOW>; 4711 4712 vss1-supply = <&p3v3_aux>; 4713 vss2-supply = <&p12v>; 4714 4715 leds { 4716 #address-cells = <1>; 4717 #size-cells = <0>; 4718 4719 led@0 { 4720 reg = <0>; 4721 label = "rssd19:green:power"; 4722 default-state = "off"; 4723 }; 4724 }; 4725 4726 regulators { 4727 sw0_ssb_rssd19: sw0 { 4728 regulator-name = "rssd19_12v"; 4729 shunt-resistor-micro-ohms = <9000>; 4730 regulator-over-current-protection; 4731 regulator-oc-protection-microamp = <4500000>; 4732 regulator-enable-ramp-delay = <1000>; 4733 }; 4734 sw1_ssb_rssd19: sw1 { 4735 regulator-name = "rssd19_3v3"; 4736 shunt-resistor-micro-ohms = <100000>; 4737 regulator-over-current-protection; 4738 regulator-oc-protection-microamp = <410000>; 4739 regulator-enable-ramp-delay = <1000>; 4740 }; 4741 }; 4742 }; 4743 }; 4744 i2c@1 { 4745 reg = <1>; 4746 #address-cells = <1>; 4747 #size-cells = <0>; 4748 4749 ssb_rssd18: regulator@3a { 4750 compatible = "maxim,max5970"; 4751 reg = <0x3a>; 4752 interrupt-parent = <&smb_svc_pex_rssd17_32>; 4753 interrupts = <45 IRQ_TYPE_LEVEL_LOW>; 4754 4755 vss1-supply = <&p3v3_aux>; 4756 vss2-supply = <&p12v>; 4757 4758 leds { 4759 #address-cells = <1>; 4760 #size-cells = <0>; 4761 4762 led@0 { 4763 reg = <0>; 4764 label = "rssd18:green:power"; 4765 default-state = "off"; 4766 }; 4767 }; 4768 4769 regulators { 4770 sw0_ssb_rssd18: sw0 { 4771 regulator-name = "rssd18_12v"; 4772 shunt-resistor-micro-ohms = <9000>; 4773 regulator-over-current-protection; 4774 regulator-oc-protection-microamp = <4500000>; 4775 regulator-enable-ramp-delay = <1000>; 4776 }; 4777 sw1_ssb_rssd18: sw1 { 4778 regulator-name = "rssd18_3v3"; 4779 shunt-resistor-micro-ohms = <100000>; 4780 regulator-over-current-protection; 4781 regulator-oc-protection-microamp = <410000>; 4782 regulator-enable-ramp-delay = <1000>; 4783 }; 4784 }; 4785 }; 4786 }; 4787 i2c@2 { 4788 reg = <2>; 4789 #address-cells = <1>; 4790 #size-cells = <0>; 4791 4792 ssb_rssd17: regulator@3a { 4793 compatible = "maxim,max5970"; 4794 reg = <0x3a>; 4795 interrupt-parent = <&smb_svc_pex_rssd17_32>; 4796 interrupts = <44 IRQ_TYPE_LEVEL_LOW>; 4797 4798 vss1-supply = <&p3v3_aux>; 4799 vss2-supply = <&p12v>; 4800 4801 leds { 4802 #address-cells = <1>; 4803 #size-cells = <0>; 4804 4805 led@0 { 4806 reg = <0>; 4807 label = "rssd17:green:power"; 4808 default-state = "off"; 4809 }; 4810 }; 4811 4812 regulators { 4813 sw0_ssb_rssd17: sw0 { 4814 regulator-name = "rssd17_12v"; 4815 shunt-resistor-micro-ohms = <9000>; 4816 regulator-over-current-protection; 4817 regulator-oc-protection-microamp = <4500000>; 4818 regulator-enable-ramp-delay = <1000>; 4819 }; 4820 sw1_ssb_rssd17: sw1 { 4821 regulator-name = "rssd17_3v3"; 4822 shunt-resistor-micro-ohms = <100000>; 4823 regulator-over-current-protection; 4824 regulator-oc-protection-microamp = <410000>; 4825 regulator-enable-ramp-delay = <1000>; 4826 }; 4827 }; 4828 }; 4829 }; 4830 i2c@3 { 4831 reg = <3>; 4832 #address-cells = <1>; 4833 #size-cells = <0>; 4834 4835 ssb_rssd20: regulator@3a { 4836 compatible = "maxim,max5970"; 4837 reg = <0x3a>; 4838 interrupt-parent = <&smb_svc_pex_rssd17_32>; 4839 interrupts = <47 IRQ_TYPE_LEVEL_LOW>; 4840 4841 vss1-supply = <&p3v3_aux>; 4842 vss2-supply = <&p12v>; 4843 4844 leds { 4845 #address-cells = <1>; 4846 #size-cells = <0>; 4847 4848 led@0 { 4849 reg = <0>; 4850 label = "rssd20:green:power"; 4851 default-state = "off"; 4852 }; 4853 }; 4854 4855 regulators { 4856 sw0_ssb_rssd20: sw0 { 4857 regulator-name = "rssd20_12v"; 4858 shunt-resistor-micro-ohms = <9000>; 4859 regulator-over-current-protection; 4860 regulator-oc-protection-microamp = <4500000>; 4861 regulator-enable-ramp-delay = <1000>; 4862 }; 4863 sw1_ssb_rssd20: sw1 { 4864 regulator-name = "rssd20_3v3"; 4865 shunt-resistor-micro-ohms = <100000>; 4866 regulator-over-current-protection; 4867 regulator-oc-protection-microamp = <410000>; 4868 regulator-enable-ramp-delay = <1000>; 4869 }; 4870 }; 4871 }; 4872 }; 4873 i2c@4 { 4874 reg = <4>; 4875 #address-cells = <1>; 4876 #size-cells = <0>; 4877 4878 ssb_rssd21: regulator@3a { 4879 compatible = "maxim,max5970"; 4880 reg = <0x3a>; 4881 interrupt-parent = <&smb_svc_pex_rssd17_32>; 4882 interrupts = <48 IRQ_TYPE_LEVEL_LOW>; 4883 4884 vss1-supply = <&p3v3_aux>; 4885 vss2-supply = <&p12v>; 4886 4887 leds { 4888 #address-cells = <1>; 4889 #size-cells = <0>; 4890 4891 led@0 { 4892 reg = <0>; 4893 label = "rssd21:green:power"; 4894 default-state = "off"; 4895 }; 4896 }; 4897 4898 regulators { 4899 sw0_ssb_rssd21: sw0 { 4900 regulator-name = "rssd21_12v"; 4901 shunt-resistor-micro-ohms = <9000>; 4902 regulator-over-current-protection; 4903 regulator-oc-protection-microamp = <4500000>; 4904 regulator-enable-ramp-delay = <1000>; 4905 }; 4906 sw1_ssb_rssd21: sw1 { 4907 regulator-name = "rssd21_3v3"; 4908 shunt-resistor-micro-ohms = <100000>; 4909 regulator-over-current-protection; 4910 regulator-oc-protection-microamp = <410000>; 4911 regulator-enable-ramp-delay = <1000>; 4912 }; 4913 }; 4914 }; 4915 }; 4916 i2c@5 { 4917 reg = <5>; 4918 #address-cells = <1>; 4919 #size-cells = <0>; 4920 4921 ssb_rssd22: regulator@3a { 4922 compatible = "maxim,max5970"; 4923 reg = <0x3a>; 4924 interrupt-parent = <&smb_svc_pex_rssd17_32>; 4925 interrupts = <49 IRQ_TYPE_LEVEL_LOW>; 4926 4927 vss1-supply = <&p3v3_aux>; 4928 vss2-supply = <&p12v>; 4929 4930 leds { 4931 #address-cells = <1>; 4932 #size-cells = <0>; 4933 4934 led@0 { 4935 reg = <0>; 4936 label = "rssd22:green:power"; 4937 default-state = "off"; 4938 }; 4939 }; 4940 4941 regulators { 4942 sw0_ssb_rssd22: sw0 { 4943 regulator-name = "rssd22_12v"; 4944 shunt-resistor-micro-ohms = <9000>; 4945 regulator-over-current-protection; 4946 regulator-oc-protection-microamp = <4500000>; 4947 regulator-enable-ramp-delay = <1000>; 4948 }; 4949 sw1_ssb_rssd22: sw1 { 4950 regulator-name = "rssd22_3v3"; 4951 shunt-resistor-micro-ohms = <100000>; 4952 regulator-over-current-protection; 4953 regulator-oc-protection-microamp = <410000>; 4954 regulator-enable-ramp-delay = <1000>; 4955 }; 4956 }; 4957 }; 4958 }; 4959 i2c@6 { 4960 reg = <6>; 4961 #address-cells = <1>; 4962 #size-cells = <0>; 4963 4964 ssb_rssd24: regulator@3a { 4965 compatible = "maxim,max5970"; 4966 reg = <0x3a>; 4967 interrupt-parent = <&smb_svc_pex_rssd17_32>; 4968 interrupts = <51 IRQ_TYPE_LEVEL_LOW>; 4969 4970 vss1-supply = <&p3v3_aux>; 4971 vss2-supply = <&p12v>; 4972 4973 leds { 4974 #address-cells = <1>; 4975 #size-cells = <0>; 4976 4977 led@0 { 4978 reg = <0>; 4979 label = "rssd24:green:power"; 4980 default-state = "off"; 4981 }; 4982 }; 4983 4984 regulators { 4985 sw0_ssb_rssd24: sw0 { 4986 regulator-name = "rssd24_12v"; 4987 shunt-resistor-micro-ohms = <9000>; 4988 regulator-over-current-protection; 4989 regulator-oc-protection-microamp = <4500000>; 4990 regulator-enable-ramp-delay = <1000>; 4991 }; 4992 sw1_ssb_rssd24: sw1 { 4993 regulator-name = "rssd24_3v3"; 4994 shunt-resistor-micro-ohms = <100000>; 4995 regulator-over-current-protection; 4996 regulator-oc-protection-microamp = <410000>; 4997 regulator-enable-ramp-delay = <1000>; 4998 }; 4999 }; 5000 }; 5001 }; 5002 i2c@7 { 5003 reg = <7>; 5004 #address-cells = <1>; 5005 #size-cells = <0>; 5006 5007 ssb_rssd23: regulator@3a { 5008 compatible = "maxim,max5970"; 5009 reg = <0x3a>; 5010 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5011 interrupts = <50 IRQ_TYPE_LEVEL_LOW>; 5012 5013 vss1-supply = <&p3v3_aux>; 5014 vss2-supply = <&p12v>; 5015 5016 leds { 5017 #address-cells = <1>; 5018 #size-cells = <0>; 5019 5020 led@0 { 5021 reg = <0>; 5022 label = "rssd23:green:power"; 5023 default-state = "off"; 5024 }; 5025 }; 5026 5027 regulators { 5028 sw0_ssb_rssd23: sw0 { 5029 regulator-name = "rssd23_12v"; 5030 shunt-resistor-micro-ohms = <9000>; 5031 regulator-over-current-protection; 5032 regulator-oc-protection-microamp = <4500000>; 5033 regulator-enable-ramp-delay = <1000>; 5034 }; 5035 sw1_ssb_rssd23: sw1 { 5036 regulator-name = "rssd23_3v3"; 5037 shunt-resistor-micro-ohms = <100000>; 5038 regulator-over-current-protection; 5039 regulator-oc-protection-microamp = <410000>; 5040 regulator-enable-ramp-delay = <1000>; 5041 }; 5042 }; 5043 }; 5044 }; 5045}; 5046 5047&i2cmux10 { 5048 i2c@0 { 5049 reg = <0>; 5050 #address-cells = <1>; 5051 #size-cells = <0>; 5052 5053 ssb_rssd25: regulator@3a { 5054 compatible = "maxim,max5970"; 5055 reg = <0x3a>; 5056 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5057 interrupts = <52 IRQ_TYPE_LEVEL_LOW>; 5058 5059 vss1-supply = <&p3v3_aux>; 5060 vss2-supply = <&p12v>; 5061 5062 leds { 5063 #address-cells = <1>; 5064 #size-cells = <0>; 5065 5066 led@0 { 5067 reg = <0>; 5068 label = "rssd25:green:power"; 5069 default-state = "off"; 5070 }; 5071 }; 5072 5073 regulators { 5074 sw0_ssb_rssd25: sw0 { 5075 regulator-name = "rssd25_12v"; 5076 shunt-resistor-micro-ohms = <9000>; 5077 regulator-over-current-protection; 5078 regulator-oc-protection-microamp = <4500000>; 5079 regulator-enable-ramp-delay = <1000>; 5080 }; 5081 sw1_ssb_rssd25: sw1 { 5082 regulator-name = "rssd25_3v3"; 5083 shunt-resistor-micro-ohms = <100000>; 5084 regulator-over-current-protection; 5085 regulator-oc-protection-microamp = <410000>; 5086 regulator-enable-ramp-delay = <1000>; 5087 }; 5088 }; 5089 }; 5090 }; 5091 i2c@1 { 5092 reg = <1>; 5093 #address-cells = <1>; 5094 #size-cells = <0>; 5095 5096 ssb_rssd26: regulator@3a { 5097 compatible = "maxim,max5970"; 5098 reg = <0x3a>; 5099 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5100 interrupts = <53 IRQ_TYPE_LEVEL_LOW>; 5101 5102 vss1-supply = <&p3v3_aux>; 5103 vss2-supply = <&p12v>; 5104 5105 leds { 5106 #address-cells = <1>; 5107 #size-cells = <0>; 5108 5109 led@0 { 5110 reg = <0>; 5111 label = "rssd26:green:power"; 5112 default-state = "off"; 5113 }; 5114 }; 5115 5116 regulators { 5117 sw0_ssb_rssd26: sw0 { 5118 regulator-name = "rssd26_12v"; 5119 shunt-resistor-micro-ohms = <9000>; 5120 regulator-over-current-protection; 5121 regulator-oc-protection-microamp = <4500000>; 5122 regulator-enable-ramp-delay = <1000>; 5123 }; 5124 sw1_ssb_rssd26: sw1 { 5125 regulator-name = "rssd26_3v3"; 5126 shunt-resistor-micro-ohms = <100000>; 5127 regulator-over-current-protection; 5128 regulator-oc-protection-microamp = <410000>; 5129 regulator-enable-ramp-delay = <1000>; 5130 }; 5131 }; 5132 }; 5133 }; 5134 i2c@2 { 5135 reg = <2>; 5136 #address-cells = <1>; 5137 #size-cells = <0>; 5138 5139 ssb_rssd27: regulator@3a { 5140 compatible = "maxim,max5970"; 5141 reg = <0x3a>; 5142 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5143 interrupts = <54 IRQ_TYPE_LEVEL_LOW>; 5144 5145 vss1-supply = <&p3v3_aux>; 5146 vss2-supply = <&p12v>; 5147 5148 leds { 5149 #address-cells = <1>; 5150 #size-cells = <0>; 5151 5152 led@0 { 5153 reg = <0>; 5154 label = "rssd27:green:power"; 5155 default-state = "off"; 5156 }; 5157 }; 5158 5159 regulators { 5160 sw0_ssb_rssd27: sw0 { 5161 regulator-name = "rssd27_12v"; 5162 shunt-resistor-micro-ohms = <9000>; 5163 regulator-over-current-protection; 5164 regulator-oc-protection-microamp = <4500000>; 5165 regulator-enable-ramp-delay = <1000>; 5166 }; 5167 sw1_ssb_rssd27: sw1 { 5168 regulator-name = "rssd27_3v3"; 5169 shunt-resistor-micro-ohms = <100000>; 5170 regulator-over-current-protection; 5171 regulator-oc-protection-microamp = <410000>; 5172 regulator-enable-ramp-delay = <1000>; 5173 }; 5174 }; 5175 }; 5176 }; 5177 i2c@3 { 5178 reg = <3>; 5179 #address-cells = <1>; 5180 #size-cells = <0>; 5181 5182 ssb_rssd32: regulator@3a { 5183 compatible = "maxim,max5970"; 5184 reg = <0x3a>; 5185 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5186 interrupts = <59 IRQ_TYPE_LEVEL_LOW>; 5187 5188 vss1-supply = <&p3v3_aux>; 5189 vss2-supply = <&p12v>; 5190 5191 leds { 5192 #address-cells = <1>; 5193 #size-cells = <0>; 5194 5195 led@0 { 5196 reg = <0>; 5197 label = "rssd32:green:power"; 5198 default-state = "off"; 5199 }; 5200 }; 5201 5202 regulators { 5203 sw0_ssb_rssd32: sw0 { 5204 regulator-name = "rssd32_12v"; 5205 shunt-resistor-micro-ohms = <9000>; 5206 regulator-over-current-protection; 5207 regulator-oc-protection-microamp = <4500000>; 5208 regulator-enable-ramp-delay = <1000>; 5209 }; 5210 sw1_ssb_rssd32: sw1 { 5211 regulator-name = "rssd32_3v3"; 5212 shunt-resistor-micro-ohms = <100000>; 5213 regulator-over-current-protection; 5214 regulator-oc-protection-microamp = <410000>; 5215 regulator-enable-ramp-delay = <1000>; 5216 }; 5217 }; 5218 }; 5219 }; 5220 i2c@4 { 5221 reg = <4>; 5222 #address-cells = <1>; 5223 #size-cells = <0>; 5224 5225 ssb_rssd31: regulator@3a { 5226 compatible = "maxim,max5970"; 5227 reg = <0x3a>; 5228 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5229 interrupts = <58 IRQ_TYPE_LEVEL_LOW>; 5230 5231 vss1-supply = <&p3v3_aux>; 5232 vss2-supply = <&p12v>; 5233 5234 leds { 5235 #address-cells = <1>; 5236 #size-cells = <0>; 5237 5238 led@0 { 5239 reg = <0>; 5240 label = "rssd31:green:power"; 5241 default-state = "off"; 5242 }; 5243 }; 5244 5245 regulators { 5246 sw0_ssb_rssd31: sw0 { 5247 regulator-name = "rssd31_12v"; 5248 shunt-resistor-micro-ohms = <9000>; 5249 regulator-over-current-protection; 5250 regulator-oc-protection-microamp = <4500000>; 5251 regulator-enable-ramp-delay = <1000>; 5252 }; 5253 sw1_ssb_rssd31: sw1 { 5254 regulator-name = "rssd31_3v3"; 5255 shunt-resistor-micro-ohms = <100000>; 5256 regulator-over-current-protection; 5257 regulator-oc-protection-microamp = <410000>; 5258 regulator-enable-ramp-delay = <1000>; 5259 }; 5260 }; 5261 }; 5262 }; 5263 i2c@5 { 5264 reg = <5>; 5265 #address-cells = <1>; 5266 #size-cells = <0>; 5267 5268 ssb_rssd30: regulator@3a { 5269 compatible = "maxim,max5970"; 5270 reg = <0x3a>; 5271 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5272 interrupts = <57 IRQ_TYPE_LEVEL_LOW>; 5273 5274 vss1-supply = <&p3v3_aux>; 5275 vss2-supply = <&p12v>; 5276 5277 leds { 5278 #address-cells = <1>; 5279 #size-cells = <0>; 5280 5281 led@0 { 5282 reg = <0>; 5283 label = "rssd30:green:power"; 5284 default-state = "off"; 5285 }; 5286 }; 5287 5288 regulators { 5289 sw0_ssb_rssd30: sw0 { 5290 regulator-name = "rssd30_12v"; 5291 shunt-resistor-micro-ohms = <9000>; 5292 regulator-over-current-protection; 5293 regulator-oc-protection-microamp = <4500000>; 5294 regulator-enable-ramp-delay = <1000>; 5295 }; 5296 sw1_ssb_rssd30: sw1 { 5297 regulator-name = "rssd30_3v3"; 5298 shunt-resistor-micro-ohms = <100000>; 5299 regulator-over-current-protection; 5300 regulator-oc-protection-microamp = <410000>; 5301 regulator-enable-ramp-delay = <1000>; 5302 }; 5303 }; 5304 }; 5305 }; 5306 i2c@6 { 5307 reg = <6>; 5308 #address-cells = <1>; 5309 #size-cells = <0>; 5310 5311 ssb_rssd29: regulator@3a { 5312 compatible = "maxim,max5970"; 5313 reg = <0x3a>; 5314 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5315 interrupts = <56 IRQ_TYPE_LEVEL_LOW>; 5316 5317 vss1-supply = <&p3v3_aux>; 5318 vss2-supply = <&p12v>; 5319 5320 leds { 5321 #address-cells = <1>; 5322 #size-cells = <0>; 5323 5324 led@0 { 5325 reg = <0>; 5326 label = "rssd29:green:power"; 5327 default-state = "off"; 5328 }; 5329 }; 5330 5331 regulators { 5332 sw0_ssb_rssd29: sw0 { 5333 regulator-name = "rssd29_12v"; 5334 shunt-resistor-micro-ohms = <9000>; 5335 regulator-over-current-protection; 5336 regulator-oc-protection-microamp = <4500000>; 5337 regulator-enable-ramp-delay = <1000>; 5338 }; 5339 sw1_ssb_rssd29: sw1 { 5340 regulator-name = "rssd29_3v3"; 5341 shunt-resistor-micro-ohms = <100000>; 5342 regulator-over-current-protection; 5343 regulator-oc-protection-microamp = <410000>; 5344 regulator-enable-ramp-delay = <1000>; 5345 }; 5346 }; 5347 }; 5348 }; 5349 i2c@7 { 5350 reg = <7>; 5351 #address-cells = <1>; 5352 #size-cells = <0>; 5353 5354 ssb_rssd28: regulator@3a { 5355 compatible = "maxim,max5970"; 5356 reg = <0x3a>; 5357 interrupt-parent = <&smb_svc_pex_rssd17_32>; 5358 interrupts = <55 IRQ_TYPE_LEVEL_LOW>; 5359 5360 vss1-supply = <&p3v3_aux>; 5361 vss2-supply = <&p12v>; 5362 5363 leds { 5364 #address-cells = <1>; 5365 #size-cells = <0>; 5366 5367 led@0 { 5368 reg = <0>; 5369 label = "rssd28:green:power"; 5370 default-state = "off"; 5371 }; 5372 }; 5373 5374 regulators { 5375 sw0_ssb_rssd28: sw0 { 5376 regulator-name = "rssd28_12v"; 5377 shunt-resistor-micro-ohms = <9000>; 5378 regulator-over-current-protection; 5379 regulator-oc-protection-microamp = <4500000>; 5380 regulator-enable-ramp-delay = <1000>; 5381 }; 5382 sw1_ssb_rssd28: sw1 { 5383 regulator-name = "rssd28_3v3"; 5384 shunt-resistor-micro-ohms = <100000>; 5385 regulator-over-current-protection; 5386 regulator-oc-protection-microamp = <410000>; 5387 regulator-enable-ramp-delay = <1000>; 5388 }; 5389 }; 5390 }; 5391 }; 5392}; 5393 5394&i2cmux18 { 5395 i2c@0 { 5396 reg = <0>; 5397 #address-cells = <1>; 5398 #size-cells = <0>; 5399 5400 ssb_rssd03: regulator@3a { 5401 compatible = "maxim,max5970"; 5402 reg = <0x3a>; 5403 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5404 interrupts = <46 IRQ_TYPE_LEVEL_LOW>; 5405 5406 vss1-supply = <&p3v3_aux>; 5407 vss2-supply = <&p12v>; 5408 5409 leds { 5410 #address-cells = <1>; 5411 #size-cells = <0>; 5412 5413 led@0 { 5414 reg = <0>; 5415 label = "rssd03:green:power"; 5416 default-state = "off"; 5417 }; 5418 }; 5419 5420 regulators { 5421 sw0_ssb_rssd03: sw0 { 5422 regulator-name = "rssd03_12v"; 5423 shunt-resistor-micro-ohms = <9000>; 5424 regulator-over-current-protection; 5425 regulator-oc-protection-microamp = <4500000>; 5426 regulator-enable-ramp-delay = <1000>; 5427 }; 5428 sw1_ssb_rssd03: sw1 { 5429 regulator-name = "rssd03_3v3"; 5430 shunt-resistor-micro-ohms = <100000>; 5431 regulator-over-current-protection; 5432 regulator-oc-protection-microamp = <410000>; 5433 regulator-enable-ramp-delay = <1000>; 5434 }; 5435 }; 5436 }; 5437 }; 5438 i2c@1 { 5439 reg = <1>; 5440 #address-cells = <1>; 5441 #size-cells = <0>; 5442 5443 ssb_rssd02: regulator@3a { 5444 compatible = "maxim,max5970"; 5445 reg = <0x3a>; 5446 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5447 interrupts = <45 IRQ_TYPE_LEVEL_LOW>; 5448 5449 vss1-supply = <&p3v3_aux>; 5450 vss2-supply = <&p12v>; 5451 5452 leds { 5453 #address-cells = <1>; 5454 #size-cells = <0>; 5455 5456 led@0 { 5457 reg = <0>; 5458 label = "rssd02:green:power"; 5459 default-state = "off"; 5460 }; 5461 }; 5462 5463 regulators { 5464 sw0_ssb_rssd02: sw0 { 5465 regulator-name = "rssd02_12v"; 5466 shunt-resistor-micro-ohms = <9000>; 5467 regulator-over-current-protection; 5468 regulator-oc-protection-microamp = <4500000>; 5469 regulator-enable-ramp-delay = <1000>; 5470 }; 5471 sw1_ssb_rssd02: sw1 { 5472 regulator-name = "rssd02_3v3"; 5473 shunt-resistor-micro-ohms = <100000>; 5474 regulator-over-current-protection; 5475 regulator-oc-protection-microamp = <410000>; 5476 regulator-enable-ramp-delay = <1000>; 5477 }; 5478 }; 5479 }; 5480 }; 5481 i2c@2 { 5482 reg = <2>; 5483 #address-cells = <1>; 5484 #size-cells = <0>; 5485 5486 ssb_rssd01: regulator@3a { 5487 compatible = "maxim,max5970"; 5488 reg = <0x3a>; 5489 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5490 interrupts = <44 IRQ_TYPE_LEVEL_LOW>; 5491 5492 vss1-supply = <&p3v3_aux>; 5493 vss2-supply = <&p12v>; 5494 5495 leds { 5496 #address-cells = <1>; 5497 #size-cells = <0>; 5498 5499 led@0 { 5500 reg = <0>; 5501 label = "rssd01:green:power"; 5502 default-state = "off"; 5503 }; 5504 }; 5505 5506 regulators { 5507 sw0_ssb_rssd01: sw0 { 5508 regulator-name = "rssd01_12v"; 5509 shunt-resistor-micro-ohms = <9000>; 5510 regulator-over-current-protection; 5511 regulator-oc-protection-microamp = <4500000>; 5512 regulator-enable-ramp-delay = <1000>; 5513 }; 5514 sw1_ssb_rssd01: sw1 { 5515 regulator-name = "rssd01_3v3"; 5516 shunt-resistor-micro-ohms = <100000>; 5517 regulator-over-current-protection; 5518 regulator-oc-protection-microamp = <410000>; 5519 regulator-enable-ramp-delay = <1000>; 5520 }; 5521 }; 5522 }; 5523 }; 5524 i2c@3 { 5525 reg = <3>; 5526 #address-cells = <1>; 5527 #size-cells = <0>; 5528 5529 ssb_rssd04: regulator@3a { 5530 compatible = "maxim,max5970"; 5531 reg = <0x3a>; 5532 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5533 interrupts = <47 IRQ_TYPE_LEVEL_LOW>; 5534 5535 vss1-supply = <&p3v3_aux>; 5536 vss2-supply = <&p12v>; 5537 5538 leds { 5539 #address-cells = <1>; 5540 #size-cells = <0>; 5541 5542 led@0 { 5543 reg = <0>; 5544 label = "rssd04:green:power"; 5545 default-state = "off"; 5546 }; 5547 }; 5548 5549 regulators { 5550 sw0_ssb_rssd04: sw0 { 5551 regulator-name = "rssd04_12v"; 5552 shunt-resistor-micro-ohms = <9000>; 5553 regulator-over-current-protection; 5554 regulator-oc-protection-microamp = <4500000>; 5555 regulator-enable-ramp-delay = <1000>; 5556 }; 5557 sw1_ssb_rssd04: sw1 { 5558 regulator-name = "rssd04_3v3"; 5559 shunt-resistor-micro-ohms = <100000>; 5560 regulator-over-current-protection; 5561 regulator-oc-protection-microamp = <410000>; 5562 regulator-enable-ramp-delay = <1000>; 5563 }; 5564 }; 5565 }; 5566 }; 5567 i2c@4 { 5568 reg = <4>; 5569 #address-cells = <1>; 5570 #size-cells = <0>; 5571 5572 ssb_rssd05: regulator@3a { 5573 compatible = "maxim,max5970"; 5574 reg = <0x3a>; 5575 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5576 interrupts = <48 IRQ_TYPE_LEVEL_LOW>; 5577 5578 vss1-supply = <&p3v3_aux>; 5579 vss2-supply = <&p12v>; 5580 5581 leds { 5582 #address-cells = <1>; 5583 #size-cells = <0>; 5584 5585 led@0 { 5586 reg = <0>; 5587 label = "rssd05:green:power"; 5588 default-state = "off"; 5589 }; 5590 }; 5591 5592 regulators { 5593 sw0_ssb_rssd05: sw0 { 5594 regulator-name = "rssd05_12v"; 5595 shunt-resistor-micro-ohms = <9000>; 5596 regulator-over-current-protection; 5597 regulator-oc-protection-microamp = <4500000>; 5598 regulator-enable-ramp-delay = <1000>; 5599 }; 5600 sw1_ssb_rssd05: sw1 { 5601 regulator-name = "rssd05_3v3"; 5602 shunt-resistor-micro-ohms = <100000>; 5603 regulator-over-current-protection; 5604 regulator-oc-protection-microamp = <410000>; 5605 regulator-enable-ramp-delay = <1000>; 5606 }; 5607 }; 5608 }; 5609 }; 5610 i2c@5 { 5611 reg = <5>; 5612 #address-cells = <1>; 5613 #size-cells = <0>; 5614 5615 ssb_rssd08: regulator@3a { 5616 compatible = "maxim,max5970"; 5617 reg = <0x3a>; 5618 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5619 interrupts = <51 IRQ_TYPE_LEVEL_LOW>; 5620 5621 vss1-supply = <&p3v3_aux>; 5622 vss2-supply = <&p12v>; 5623 5624 leds { 5625 #address-cells = <1>; 5626 #size-cells = <0>; 5627 5628 led@0 { 5629 reg = <0>; 5630 label = "rssd08:green:power"; 5631 default-state = "off"; 5632 }; 5633 }; 5634 5635 regulators { 5636 sw0_ssb_rssd08: sw0 { 5637 regulator-name = "rssd08_12v"; 5638 shunt-resistor-micro-ohms = <9000>; 5639 regulator-over-current-protection; 5640 regulator-oc-protection-microamp = <4500000>; 5641 regulator-enable-ramp-delay = <1000>; 5642 }; 5643 sw1_ssb_rssd08: sw1 { 5644 regulator-name = "rssd08_3v3"; 5645 shunt-resistor-micro-ohms = <100000>; 5646 regulator-over-current-protection; 5647 regulator-oc-protection-microamp = <410000>; 5648 regulator-enable-ramp-delay = <1000>; 5649 }; 5650 }; 5651 }; 5652 }; 5653 i2c@6 { 5654 reg = <6>; 5655 #address-cells = <1>; 5656 #size-cells = <0>; 5657 5658 ssb_rssd07: regulator@3a { 5659 compatible = "maxim,max5970"; 5660 reg = <0x3a>; 5661 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5662 interrupts = <50 IRQ_TYPE_LEVEL_LOW>; 5663 5664 vss1-supply = <&p3v3_aux>; 5665 vss2-supply = <&p12v>; 5666 5667 leds { 5668 #address-cells = <1>; 5669 #size-cells = <0>; 5670 5671 led@0 { 5672 reg = <0>; 5673 label = "rssd07:green:power"; 5674 default-state = "off"; 5675 }; 5676 }; 5677 5678 regulators { 5679 sw0_ssb_rssd07: sw0 { 5680 regulator-name = "rssd07_12v"; 5681 shunt-resistor-micro-ohms = <9000>; 5682 regulator-over-current-protection; 5683 regulator-oc-protection-microamp = <4500000>; 5684 regulator-enable-ramp-delay = <1000>; 5685 }; 5686 sw1_ssb_rssd07: sw1 { 5687 regulator-name = "rssd07_3v3"; 5688 shunt-resistor-micro-ohms = <100000>; 5689 regulator-over-current-protection; 5690 regulator-oc-protection-microamp = <410000>; 5691 regulator-enable-ramp-delay = <1000>; 5692 }; 5693 }; 5694 }; 5695 }; 5696 i2c@7 { 5697 reg = <7>; 5698 #address-cells = <1>; 5699 #size-cells = <0>; 5700 5701 ssb_rssd06: regulator@3a { 5702 compatible = "maxim,max5970"; 5703 reg = <0x3a>; 5704 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5705 interrupts = <49 IRQ_TYPE_LEVEL_LOW>; 5706 5707 vss1-supply = <&p3v3_aux>; 5708 vss2-supply = <&p12v>; 5709 5710 leds { 5711 #address-cells = <1>; 5712 #size-cells = <0>; 5713 5714 led@0 { 5715 reg = <0>; 5716 label = "rssd06:green:power"; 5717 default-state = "off"; 5718 }; 5719 }; 5720 5721 regulators { 5722 sw0_ssb_rssd06: sw0 { 5723 regulator-name = "rssd06_12v"; 5724 shunt-resistor-micro-ohms = <9000>; 5725 regulator-over-current-protection; 5726 regulator-oc-protection-microamp = <4500000>; 5727 regulator-enable-ramp-delay = <1000>; 5728 }; 5729 sw1_ssb_rssd06: sw1 { 5730 regulator-name = "rssd06_3v3"; 5731 shunt-resistor-micro-ohms = <100000>; 5732 regulator-over-current-protection; 5733 regulator-oc-protection-microamp = <410000>; 5734 regulator-enable-ramp-delay = <1000>; 5735 }; 5736 }; 5737 }; 5738 }; 5739}; 5740 5741&i2cmux19 { 5742 i2c@0 { 5743 reg = <0>; 5744 #address-cells = <1>; 5745 #size-cells = <0>; 5746 5747 ssb_rssd14: regulator@3a { 5748 compatible = "maxim,max5970"; 5749 reg = <0x3a>; 5750 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5751 interrupts = <57 IRQ_TYPE_LEVEL_LOW>; 5752 5753 vss1-supply = <&p3v3_aux>; 5754 vss2-supply = <&p12v>; 5755 5756 leds { 5757 #address-cells = <1>; 5758 #size-cells = <0>; 5759 5760 led@0 { 5761 reg = <0>; 5762 label = "rssd14:green:power"; 5763 default-state = "off"; 5764 }; 5765 }; 5766 5767 regulators { 5768 sw0_ssb_rssd14: sw0 { 5769 regulator-name = "rssd14_12v"; 5770 shunt-resistor-micro-ohms = <9000>; 5771 regulator-over-current-protection; 5772 regulator-oc-protection-microamp = <4500000>; 5773 regulator-enable-ramp-delay = <1000>; 5774 }; 5775 sw1_ssb_rssd14: sw1 { 5776 regulator-name = "rssd14_3v3"; 5777 shunt-resistor-micro-ohms = <100000>; 5778 regulator-over-current-protection; 5779 regulator-oc-protection-microamp = <410000>; 5780 regulator-enable-ramp-delay = <1000>; 5781 }; 5782 }; 5783 }; 5784 }; 5785 i2c@1 { 5786 reg = <1>; 5787 #address-cells = <1>; 5788 #size-cells = <0>; 5789 5790 ssb_rssd13: regulator@3a { 5791 compatible = "maxim,max5970"; 5792 reg = <0x3a>; 5793 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5794 interrupts = <56 IRQ_TYPE_LEVEL_LOW>; 5795 5796 vss1-supply = <&p3v3_aux>; 5797 vss2-supply = <&p12v>; 5798 5799 leds { 5800 #address-cells = <1>; 5801 #size-cells = <0>; 5802 5803 led@0 { 5804 reg = <0>; 5805 label = "rssd13:green:power"; 5806 default-state = "off"; 5807 }; 5808 }; 5809 5810 regulators { 5811 sw0_ssb_rssd13: sw0 { 5812 regulator-name = "rssd13_12v"; 5813 shunt-resistor-micro-ohms = <9000>; 5814 regulator-over-current-protection; 5815 regulator-oc-protection-microamp = <4500000>; 5816 regulator-enable-ramp-delay = <1000>; 5817 }; 5818 sw1_ssb_rssd13: sw1 { 5819 regulator-name = "rssd13_3v3"; 5820 shunt-resistor-micro-ohms = <100000>; 5821 regulator-over-current-protection; 5822 regulator-oc-protection-microamp = <410000>; 5823 regulator-enable-ramp-delay = <1000>; 5824 }; 5825 }; 5826 }; 5827 }; 5828 i2c@2 { 5829 reg = <2>; 5830 #address-cells = <1>; 5831 #size-cells = <0>; 5832 5833 ssb_rssd12: regulator@3a { 5834 compatible = "maxim,max5970"; 5835 reg = <0x3a>; 5836 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5837 interrupts = <55 IRQ_TYPE_LEVEL_LOW>; 5838 5839 vss1-supply = <&p3v3_aux>; 5840 vss2-supply = <&p12v>; 5841 5842 leds { 5843 #address-cells = <1>; 5844 #size-cells = <0>; 5845 5846 led@0 { 5847 reg = <0>; 5848 label = "rssd12:green:power"; 5849 default-state = "off"; 5850 }; 5851 }; 5852 5853 regulators { 5854 sw0_ssb_rssd12: sw0 { 5855 regulator-name = "rssd12_12v"; 5856 shunt-resistor-micro-ohms = <9000>; 5857 regulator-over-current-protection; 5858 regulator-oc-protection-microamp = <4500000>; 5859 regulator-enable-ramp-delay = <1000>; 5860 }; 5861 sw1_ssb_rssd12: sw1 { 5862 regulator-name = "rssd12_3v3"; 5863 shunt-resistor-micro-ohms = <100000>; 5864 regulator-over-current-protection; 5865 regulator-oc-protection-microamp = <410000>; 5866 regulator-enable-ramp-delay = <1000>; 5867 }; 5868 }; 5869 }; 5870 }; 5871 i2c@3 { 5872 reg = <3>; 5873 #address-cells = <1>; 5874 #size-cells = <0>; 5875 5876 ssb_rssd11: regulator@3a { 5877 compatible = "maxim,max5970"; 5878 reg = <0x3a>; 5879 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5880 interrupts = <54 IRQ_TYPE_LEVEL_LOW>; 5881 5882 vss1-supply = <&p3v3_aux>; 5883 vss2-supply = <&p12v>; 5884 5885 leds { 5886 #address-cells = <1>; 5887 #size-cells = <0>; 5888 5889 led@0 { 5890 reg = <0>; 5891 label = "rssd11:green:power"; 5892 default-state = "off"; 5893 }; 5894 }; 5895 5896 regulators { 5897 sw0_ssb_rssd11: sw0 { 5898 regulator-name = "rssd11_12v"; 5899 shunt-resistor-micro-ohms = <9000>; 5900 regulator-over-current-protection; 5901 regulator-oc-protection-microamp = <4500000>; 5902 regulator-enable-ramp-delay = <1000>; 5903 }; 5904 sw1_ssb_rssd11: sw1 { 5905 regulator-name = "rssd11_3v3"; 5906 shunt-resistor-micro-ohms = <100000>; 5907 regulator-over-current-protection; 5908 regulator-oc-protection-microamp = <410000>; 5909 regulator-enable-ramp-delay = <1000>; 5910 }; 5911 }; 5912 }; 5913 }; 5914 i2c@4 { 5915 reg = <4>; 5916 #address-cells = <1>; 5917 #size-cells = <0>; 5918 5919 ssb_rssd10: regulator@3a { 5920 compatible = "maxim,max5970"; 5921 reg = <0x3a>; 5922 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5923 interrupts = <53 IRQ_TYPE_LEVEL_LOW>; 5924 5925 vss1-supply = <&p3v3_aux>; 5926 vss2-supply = <&p12v>; 5927 5928 leds { 5929 #address-cells = <1>; 5930 #size-cells = <0>; 5931 5932 led@0 { 5933 reg = <0>; 5934 label = "rssd10:green:power"; 5935 default-state = "off"; 5936 }; 5937 }; 5938 5939 regulators { 5940 sw0_ssb_rssd10: sw0 { 5941 regulator-name = "rssd10_12v"; 5942 shunt-resistor-micro-ohms = <9000>; 5943 regulator-over-current-protection; 5944 regulator-oc-protection-microamp = <4500000>; 5945 regulator-enable-ramp-delay = <1000>; 5946 }; 5947 sw1_ssb_rssd10: sw1 { 5948 regulator-name = "rssd10_3v3"; 5949 shunt-resistor-micro-ohms = <100000>; 5950 regulator-over-current-protection; 5951 regulator-oc-protection-microamp = <410000>; 5952 regulator-enable-ramp-delay = <1000>; 5953 }; 5954 }; 5955 }; 5956 }; 5957 i2c@5 { 5958 reg = <5>; 5959 #address-cells = <1>; 5960 #size-cells = <0>; 5961 5962 ssb_rssd09: regulator@3a { 5963 compatible = "maxim,max5970"; 5964 reg = <0x3a>; 5965 interrupt-parent = <&smb_svc_pex_rssd01_16>; 5966 interrupts = <52 IRQ_TYPE_LEVEL_LOW>; 5967 5968 vss1-supply = <&p3v3_aux>; 5969 vss2-supply = <&p12v>; 5970 5971 leds { 5972 #address-cells = <1>; 5973 #size-cells = <0>; 5974 5975 led@0 { 5976 reg = <0>; 5977 label = "rssd09:green:power"; 5978 default-state = "off"; 5979 }; 5980 }; 5981 5982 regulators { 5983 sw0_ssb_rssd09: sw0 { 5984 regulator-name = "rssd09_12v"; 5985 shunt-resistor-micro-ohms = <9000>; 5986 regulator-over-current-protection; 5987 regulator-oc-protection-microamp = <4500000>; 5988 regulator-enable-ramp-delay = <1000>; 5989 }; 5990 sw1_ssb_rssd09: sw1 { 5991 regulator-name = "rssd09_3v3"; 5992 shunt-resistor-micro-ohms = <100000>; 5993 regulator-over-current-protection; 5994 regulator-oc-protection-microamp = <410000>; 5995 regulator-enable-ramp-delay = <1000>; 5996 }; 5997 }; 5998 }; 5999 }; 6000 i2c@6 { 6001 reg = <6>; 6002 #address-cells = <1>; 6003 #size-cells = <0>; 6004 6005 ssb_rssd15: regulator@3a { 6006 compatible = "maxim,max5970"; 6007 reg = <0x3a>; 6008 interrupt-parent = <&smb_svc_pex_rssd01_16>; 6009 interrupts = <58 IRQ_TYPE_LEVEL_LOW>; 6010 6011 vss1-supply = <&p3v3_aux>; 6012 vss2-supply = <&p12v>; 6013 6014 leds { 6015 #address-cells = <1>; 6016 #size-cells = <0>; 6017 6018 led@0 { 6019 reg = <0>; 6020 label = "rssd15:green:power"; 6021 default-state = "off"; 6022 }; 6023 }; 6024 6025 regulators { 6026 sw0_ssb_rssd15: sw0 { 6027 regulator-name = "rssd15_12v"; 6028 shunt-resistor-micro-ohms = <9000>; 6029 regulator-over-current-protection; 6030 regulator-oc-protection-microamp = <4500000>; 6031 regulator-enable-ramp-delay = <1000>; 6032 }; 6033 sw1_ssb_rssd15: sw1 { 6034 regulator-name = "rssd15_3v3"; 6035 shunt-resistor-micro-ohms = <100000>; 6036 regulator-over-current-protection; 6037 regulator-oc-protection-microamp = <410000>; 6038 regulator-enable-ramp-delay = <1000>; 6039 }; 6040 }; 6041 }; 6042 }; 6043 i2c@7 { 6044 reg = <7>; 6045 #address-cells = <1>; 6046 #size-cells = <0>; 6047 6048 ssb_rssd16: regulator@3a { 6049 compatible = "maxim,max5970"; 6050 reg = <0x3a>; 6051 interrupt-parent = <&smb_svc_pex_rssd01_16>; 6052 interrupts = <59 IRQ_TYPE_LEVEL_LOW>; 6053 6054 vss1-supply = <&p3v3_aux>; 6055 vss2-supply = <&p12v>; 6056 6057 leds { 6058 #address-cells = <1>; 6059 #size-cells = <0>; 6060 6061 led@0 { 6062 reg = <0>; 6063 label = "rssd16:green:power"; 6064 default-state = "off"; 6065 }; 6066 }; 6067 6068 regulators { 6069 sw0_ssb_rssd16: sw0 { 6070 regulator-name = "rssd16_12v"; 6071 shunt-resistor-micro-ohms = <9000>; 6072 regulator-over-current-protection; 6073 regulator-oc-protection-microamp = <4500000>; 6074 regulator-enable-ramp-delay = <1000>; 6075 }; 6076 sw1_ssb_rssd16: sw1 { 6077 regulator-name = "rssd16_3v3"; 6078 shunt-resistor-micro-ohms = <100000>; 6079 regulator-over-current-protection; 6080 regulator-oc-protection-microamp = <410000>; 6081 regulator-enable-ramp-delay = <1000>; 6082 }; 6083 }; 6084 }; 6085 }; 6086}; 6087