1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (C) 2022 MediaTek Inc.
4 */
5
6 #include <linux/etherdevice.h>
7 #include <linux/of.h>
8 #include <linux/thermal.h>
9 #include "mt7996.h"
10 #include "mac.h"
11 #include "mcu.h"
12 #include "coredump.h"
13 #include "eeprom.h"
14
15 static const struct ieee80211_iface_limit if_limits[] = {
16 {
17 .max = 1,
18 .types = BIT(NL80211_IFTYPE_ADHOC)
19 }, {
20 .max = 16,
21 .types = BIT(NL80211_IFTYPE_AP)
22 #ifdef CONFIG_MAC80211_MESH
23 | BIT(NL80211_IFTYPE_MESH_POINT)
24 #endif
25 }, {
26 .max = MT7996_MAX_INTERFACES,
27 .types = BIT(NL80211_IFTYPE_STATION)
28 }
29 };
30
31 static const struct ieee80211_iface_combination if_comb[] = {
32 {
33 .limits = if_limits,
34 .n_limits = ARRAY_SIZE(if_limits),
35 .max_interfaces = MT7996_MAX_INTERFACES,
36 .num_different_channels = 1,
37 .beacon_int_infra_match = true,
38 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
39 BIT(NL80211_CHAN_WIDTH_20) |
40 BIT(NL80211_CHAN_WIDTH_40) |
41 BIT(NL80211_CHAN_WIDTH_80) |
42 BIT(NL80211_CHAN_WIDTH_160),
43 }
44 };
45
mt7996_led_set_config(struct led_classdev * led_cdev,u8 delay_on,u8 delay_off)46 static void mt7996_led_set_config(struct led_classdev *led_cdev,
47 u8 delay_on, u8 delay_off)
48 {
49 struct mt7996_dev *dev;
50 struct mt76_phy *mphy;
51 u32 val;
52
53 mphy = container_of(led_cdev, struct mt76_phy, leds.cdev);
54 dev = container_of(mphy->dev, struct mt7996_dev, mt76);
55
56 /* select TX blink mode, 2: only data frames */
57 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2);
58
59 /* enable LED */
60 mt76_wr(dev, MT_LED_EN(0), 1);
61
62 /* set LED Tx blink on/off time */
63 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) |
64 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off);
65 mt76_wr(dev, MT_LED_TX_BLINK(0), val);
66
67 /* control LED */
68 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK;
69 if (mphy->leds.al)
70 val |= MT_LED_CTRL_POLARITY;
71
72 mt76_wr(dev, MT_LED_CTRL(0), val);
73 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK);
74 }
75
mt7996_led_set_blink(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)76 static int mt7996_led_set_blink(struct led_classdev *led_cdev,
77 unsigned long *delay_on,
78 unsigned long *delay_off)
79 {
80 u16 delta_on = 0, delta_off = 0;
81
82 #define HW_TICK 10
83 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
84
85 if (*delay_on)
86 delta_on = TO_HW_TICK(*delay_on);
87 if (*delay_off)
88 delta_off = TO_HW_TICK(*delay_off);
89
90 mt7996_led_set_config(led_cdev, delta_on, delta_off);
91
92 return 0;
93 }
94
mt7996_led_set_brightness(struct led_classdev * led_cdev,enum led_brightness brightness)95 static void mt7996_led_set_brightness(struct led_classdev *led_cdev,
96 enum led_brightness brightness)
97 {
98 if (!brightness)
99 mt7996_led_set_config(led_cdev, 0, 0xff);
100 else
101 mt7996_led_set_config(led_cdev, 0xff, 0);
102 }
103
mt7996_init_txpower(struct mt7996_dev * dev,struct ieee80211_supported_band * sband)104 void mt7996_init_txpower(struct mt7996_dev *dev,
105 struct ieee80211_supported_band *sband)
106 {
107 int i, nss = hweight8(dev->mphy.antenna_mask);
108 int nss_delta = mt76_tx_power_nss_delta(nss);
109 int pwr_delta = mt7996_eeprom_get_power_delta(dev, sband->band);
110 struct mt76_power_limits limits;
111
112 for (i = 0; i < sband->n_channels; i++) {
113 struct ieee80211_channel *chan = &sband->channels[i];
114 int target_power = mt7996_eeprom_get_target_power(dev, chan);
115
116 target_power += pwr_delta;
117 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
118 &limits,
119 target_power);
120 target_power += nss_delta;
121 target_power = DIV_ROUND_UP(target_power, 2);
122 chan->max_power = min_t(int, chan->max_reg_power,
123 target_power);
124 chan->orig_mpwr = target_power;
125 }
126 }
127
128 static void
mt7996_regd_notifier(struct wiphy * wiphy,struct regulatory_request * request)129 mt7996_regd_notifier(struct wiphy *wiphy,
130 struct regulatory_request *request)
131 {
132 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
133 struct mt7996_dev *dev = mt7996_hw_dev(hw);
134 struct mt7996_phy *phy = mt7996_hw_phy(hw);
135
136 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
137 dev->mt76.region = request->dfs_region;
138
139 if (dev->mt76.region == NL80211_DFS_UNSET)
140 mt7996_mcu_rdd_background_enable(phy, NULL);
141
142 mt7996_init_txpower(dev, &phy->mt76->sband_2g.sband);
143 mt7996_init_txpower(dev, &phy->mt76->sband_5g.sband);
144 mt7996_init_txpower(dev, &phy->mt76->sband_6g.sband);
145
146 phy->mt76->dfs_state = MT_DFS_STATE_UNKNOWN;
147 mt7996_dfs_init_radar_detector(phy);
148 }
149
150 static void
mt7996_init_wiphy(struct ieee80211_hw * hw)151 mt7996_init_wiphy(struct ieee80211_hw *hw)
152 {
153 struct mt7996_phy *phy = mt7996_hw_phy(hw);
154 struct mt76_dev *mdev = &phy->dev->mt76;
155 struct wiphy *wiphy = hw->wiphy;
156 u16 max_subframes = phy->dev->has_eht ? IEEE80211_MAX_AMPDU_BUF_EHT :
157 IEEE80211_MAX_AMPDU_BUF_HE;
158
159 hw->queues = 4;
160 hw->max_rx_aggregation_subframes = max_subframes;
161 hw->max_tx_aggregation_subframes = max_subframes;
162 hw->netdev_features = NETIF_F_RXCSUM;
163
164 hw->radiotap_timestamp.units_pos =
165 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
166
167 phy->slottime = 9;
168
169 hw->sta_data_size = sizeof(struct mt7996_sta);
170 hw->vif_data_size = sizeof(struct mt7996_vif);
171
172 wiphy->iface_combinations = if_comb;
173 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
174 wiphy->reg_notifier = mt7996_regd_notifier;
175 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
176
177 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
178 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
179 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
180 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
181 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
182 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
183 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
184 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY);
185 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT);
186 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
187 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER);
188
189 if (!mdev->dev->of_node ||
190 !of_property_read_bool(mdev->dev->of_node,
191 "mediatek,disable-radar-background"))
192 wiphy_ext_feature_set(wiphy,
193 NL80211_EXT_FEATURE_RADAR_BACKGROUND);
194
195 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
196 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
197 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
198 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
199
200 hw->max_tx_fragments = 4;
201
202 if (phy->mt76->cap.has_2ghz) {
203 phy->mt76->sband_2g.sband.ht_cap.cap |=
204 IEEE80211_HT_CAP_LDPC_CODING |
205 IEEE80211_HT_CAP_MAX_AMSDU;
206 phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
207 IEEE80211_HT_MPDU_DENSITY_2;
208 }
209
210 if (phy->mt76->cap.has_5ghz) {
211 phy->mt76->sband_5g.sband.ht_cap.cap |=
212 IEEE80211_HT_CAP_LDPC_CODING |
213 IEEE80211_HT_CAP_MAX_AMSDU;
214
215 phy->mt76->sband_5g.sband.vht_cap.cap |=
216 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
217 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
218 IEEE80211_VHT_CAP_SHORT_GI_160 |
219 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ;
220 phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
221 IEEE80211_HT_MPDU_DENSITY_1;
222
223 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
224 }
225
226 mt76_set_stream_caps(phy->mt76, true);
227 mt7996_set_stream_vht_txbf_caps(phy);
228 mt7996_set_stream_he_eht_caps(phy);
229
230 wiphy->available_antennas_rx = phy->mt76->antenna_mask;
231 wiphy->available_antennas_tx = phy->mt76->antenna_mask;
232 }
233
234 static void
mt7996_mac_init_band(struct mt7996_dev * dev,u8 band)235 mt7996_mac_init_band(struct mt7996_dev *dev, u8 band)
236 {
237 u32 mask, set;
238
239 /* clear estimated value of EIFS for Rx duration & OBSS time */
240 mt76_wr(dev, MT_WF_RMAC_RSVD0(band), MT_WF_RMAC_RSVD0_EIFS_CLR);
241
242 /* clear backoff time for Rx duration */
243 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME1(band),
244 MT_WF_RMAC_MIB_NONQOSD_BACKOFF);
245 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME3(band),
246 MT_WF_RMAC_MIB_QOS01_BACKOFF);
247 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME4(band),
248 MT_WF_RMAC_MIB_QOS23_BACKOFF);
249
250 /* clear backoff time and set software compensation for OBSS time */
251 mask = MT_WF_RMAC_MIB_OBSS_BACKOFF | MT_WF_RMAC_MIB_ED_OFFSET;
252 set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) |
253 FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4);
254 mt76_rmw(dev, MT_WF_RMAC_MIB_AIRTIME0(band), mask, set);
255
256 /* filter out non-resp frames and get instanstaeous signal reporting */
257 mask = MT_WTBLOFF_RSCR_RCPI_MODE | MT_WTBLOFF_RSCR_RCPI_PARAM;
258 set = FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_MODE, 0) |
259 FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_PARAM, 0x3);
260 mt76_rmw(dev, MT_WTBLOFF_RSCR(band), mask, set);
261 }
262
mt7996_mac_init_basic_rates(struct mt7996_dev * dev)263 static void mt7996_mac_init_basic_rates(struct mt7996_dev *dev)
264 {
265 int i;
266
267 for (i = 0; i < ARRAY_SIZE(mt76_rates); i++) {
268 u16 rate = mt76_rates[i].hw_value;
269 u16 idx = MT7996_BASIC_RATES_TBL + i;
270
271 rate = FIELD_PREP(MT_TX_RATE_MODE, rate >> 8) |
272 FIELD_PREP(MT_TX_RATE_IDX, rate & GENMASK(7, 0));
273 mt7996_mac_set_fixed_rate_table(dev, idx, rate);
274 }
275 }
276
mt7996_mac_init(struct mt7996_dev * dev)277 void mt7996_mac_init(struct mt7996_dev *dev)
278 {
279 #define HIF_TXD_V2_1 0x21
280 int i;
281
282 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT);
283
284 for (i = 0; i < mt7996_wtbl_size(dev); i++)
285 mt7996_mac_wtbl_update(dev, i,
286 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
287
288 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
289 i = dev->mphy.leds.pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2;
290 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4);
291 }
292
293 /* txs report queue */
294 mt76_rmw_field(dev, MT_DMA_TCRF1(0), MT_DMA_TCRF1_QIDX, 0);
295 mt76_rmw_field(dev, MT_DMA_TCRF1(1), MT_DMA_TCRF1_QIDX, 6);
296 mt76_rmw_field(dev, MT_DMA_TCRF1(2), MT_DMA_TCRF1_QIDX, 0);
297
298 /* rro module init */
299 mt7996_mcu_set_rro(dev, UNI_RRO_SET_PLATFORM_TYPE, 2);
300 mt7996_mcu_set_rro(dev, UNI_RRO_SET_BYPASS_MODE, 3);
301 mt7996_mcu_set_rro(dev, UNI_RRO_SET_TXFREE_PATH, 1);
302
303 mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
304 MCU_WA_PARAM_HW_PATH_HIF_VER,
305 HIF_TXD_V2_1, 0);
306
307 for (i = MT_BAND0; i <= MT_BAND2; i++)
308 mt7996_mac_init_band(dev, i);
309
310 mt7996_mac_init_basic_rates(dev);
311 }
312
mt7996_txbf_init(struct mt7996_dev * dev)313 int mt7996_txbf_init(struct mt7996_dev *dev)
314 {
315 int ret;
316
317 if (dev->dbdc_support) {
318 ret = mt7996_mcu_set_txbf(dev, BF_MOD_EN_CTRL);
319 if (ret)
320 return ret;
321 }
322
323 /* trigger sounding packets */
324 ret = mt7996_mcu_set_txbf(dev, BF_SOUNDING_ON);
325 if (ret)
326 return ret;
327
328 /* enable eBF */
329 return mt7996_mcu_set_txbf(dev, BF_HW_EN_UPDATE);
330 }
331
mt7996_register_phy(struct mt7996_dev * dev,struct mt7996_phy * phy,enum mt76_band_id band)332 static int mt7996_register_phy(struct mt7996_dev *dev, struct mt7996_phy *phy,
333 enum mt76_band_id band)
334 {
335 struct mt76_phy *mphy;
336 u32 mac_ofs, hif1_ofs = 0;
337 int ret;
338
339 if (band != MT_BAND1 && band != MT_BAND2)
340 return 0;
341
342 if ((band == MT_BAND1 && !dev->dbdc_support) ||
343 (band == MT_BAND2 && !dev->tbtc_support))
344 return 0;
345
346 if (phy)
347 return 0;
348
349 if (band == MT_BAND2 && dev->hif2)
350 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
351
352 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7996_ops, band);
353 if (!mphy)
354 return -ENOMEM;
355
356 phy = mphy->priv;
357 phy->dev = dev;
358 phy->mt76 = mphy;
359 mphy->dev->phys[band] = mphy;
360
361 INIT_DELAYED_WORK(&mphy->mac_work, mt7996_mac_work);
362
363 ret = mt7996_eeprom_parse_hw_cap(dev, phy);
364 if (ret)
365 goto error;
366
367 mac_ofs = band == MT_BAND2 ? MT_EE_MAC_ADDR3 : MT_EE_MAC_ADDR2;
368 memcpy(mphy->macaddr, dev->mt76.eeprom.data + mac_ofs, ETH_ALEN);
369 /* Make the extra PHY MAC address local without overlapping with
370 * the usual MAC address allocation scheme on multiple virtual interfaces
371 */
372 if (!is_valid_ether_addr(mphy->macaddr)) {
373 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
374 ETH_ALEN);
375 mphy->macaddr[0] |= 2;
376 mphy->macaddr[0] ^= BIT(7);
377 if (band == MT_BAND2)
378 mphy->macaddr[0] ^= BIT(6);
379 }
380 mt76_eeprom_override(mphy);
381
382 /* init wiphy according to mphy and phy */
383 mt7996_init_wiphy(mphy->hw);
384 ret = mt76_connac_init_tx_queues(phy->mt76,
385 MT_TXQ_ID(band),
386 MT7996_TX_RING_SIZE,
387 MT_TXQ_RING_BASE(band) + hif1_ofs, 0);
388 if (ret)
389 goto error;
390
391 ret = mt76_register_phy(mphy, true, mt76_rates,
392 ARRAY_SIZE(mt76_rates));
393 if (ret)
394 goto error;
395
396 ret = mt7996_init_debugfs(phy);
397 if (ret)
398 goto error;
399
400 return 0;
401
402 error:
403 mphy->dev->phys[band] = NULL;
404 ieee80211_free_hw(mphy->hw);
405 return ret;
406 }
407
408 static void
mt7996_unregister_phy(struct mt7996_phy * phy,enum mt76_band_id band)409 mt7996_unregister_phy(struct mt7996_phy *phy, enum mt76_band_id band)
410 {
411 struct mt76_phy *mphy;
412
413 if (!phy)
414 return;
415
416 mphy = phy->dev->mt76.phys[band];
417 mt76_unregister_phy(mphy);
418 ieee80211_free_hw(mphy->hw);
419 phy->dev->mt76.phys[band] = NULL;
420 }
421
mt7996_init_work(struct work_struct * work)422 static void mt7996_init_work(struct work_struct *work)
423 {
424 struct mt7996_dev *dev = container_of(work, struct mt7996_dev,
425 init_work);
426
427 mt7996_mcu_set_eeprom(dev);
428 mt7996_mac_init(dev);
429 mt7996_init_txpower(dev, &dev->mphy.sband_2g.sband);
430 mt7996_init_txpower(dev, &dev->mphy.sband_5g.sband);
431 mt7996_init_txpower(dev, &dev->mphy.sband_6g.sband);
432 mt7996_txbf_init(dev);
433 }
434
mt7996_wfsys_reset(struct mt7996_dev * dev)435 void mt7996_wfsys_reset(struct mt7996_dev *dev)
436 {
437 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1);
438 msleep(20);
439
440 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1);
441 msleep(20);
442 }
443
mt7996_init_hardware(struct mt7996_dev * dev)444 static int mt7996_init_hardware(struct mt7996_dev *dev)
445 {
446 int ret, idx;
447
448 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
449
450 INIT_WORK(&dev->init_work, mt7996_init_work);
451
452 dev->dbdc_support = true;
453 dev->tbtc_support = true;
454
455 ret = mt7996_dma_init(dev);
456 if (ret)
457 return ret;
458
459 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
460
461 ret = mt7996_mcu_init(dev);
462 if (ret)
463 return ret;
464
465 ret = mt7996_eeprom_init(dev);
466 if (ret < 0)
467 return ret;
468
469 /* Beacon and mgmt frames should occupy wcid 0 */
470 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7996_WTBL_STA);
471 if (idx)
472 return -ENOSPC;
473
474 dev->mt76.global_wcid.idx = idx;
475 dev->mt76.global_wcid.hw_key_idx = -1;
476 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
477 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
478
479 return 0;
480 }
481
mt7996_set_stream_vht_txbf_caps(struct mt7996_phy * phy)482 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy)
483 {
484 int sts;
485 u32 *cap;
486
487 if (!phy->mt76->cap.has_5ghz)
488 return;
489
490 sts = hweight16(phy->mt76->chainmask);
491 cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
492
493 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
494 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
495 FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, sts - 1);
496
497 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
498 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
499 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
500
501 if (sts < 2)
502 return;
503
504 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
505 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
506 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, sts - 1);
507 }
508
509 static void
mt7996_set_stream_he_txbf_caps(struct mt7996_phy * phy,struct ieee80211_sta_he_cap * he_cap,int vif)510 mt7996_set_stream_he_txbf_caps(struct mt7996_phy *phy,
511 struct ieee80211_sta_he_cap *he_cap, int vif)
512 {
513 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
514 int sts = hweight16(phy->mt76->chainmask);
515 u8 c;
516
517 #ifdef CONFIG_MAC80211_MESH
518 if (vif == NL80211_IFTYPE_MESH_POINT)
519 return;
520 #endif
521
522 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
523 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
524
525 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK |
526 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
527 elem->phy_cap_info[5] &= ~c;
528
529 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
530 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
531 elem->phy_cap_info[6] &= ~c;
532
533 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
534
535 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
536 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
537 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
538 elem->phy_cap_info[2] |= c;
539
540 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
541 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 |
542 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
543 elem->phy_cap_info[4] |= c;
544
545 /* do not support NG16 due to spec D4.0 changes subcarrier idx */
546 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
547 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
548
549 if (vif == NL80211_IFTYPE_STATION)
550 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
551
552 elem->phy_cap_info[6] |= c;
553
554 if (sts < 2)
555 return;
556
557 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
558 elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3;
559
560 if (!(vif == NL80211_IFTYPE_AP || vif == NL80211_IFTYPE_STATION))
561 return;
562
563 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
564
565 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
566 sts - 1) |
567 FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
568 sts - 1);
569 elem->phy_cap_info[5] |= c;
570
571 if (vif != NL80211_IFTYPE_AP)
572 return;
573
574 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
575
576 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
577 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
578 elem->phy_cap_info[6] |= c;
579
580 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
581 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
582 elem->phy_cap_info[7] |= c;
583 }
584
585 static void
mt7996_init_he_caps(struct mt7996_phy * phy,enum nl80211_band band,struct ieee80211_sband_iftype_data * data,enum nl80211_iftype iftype)586 mt7996_init_he_caps(struct mt7996_phy *phy, enum nl80211_band band,
587 struct ieee80211_sband_iftype_data *data,
588 enum nl80211_iftype iftype)
589 {
590 struct ieee80211_sta_he_cap *he_cap = &data->he_cap;
591 struct ieee80211_he_cap_elem *he_cap_elem = &he_cap->he_cap_elem;
592 struct ieee80211_he_mcs_nss_supp *he_mcs = &he_cap->he_mcs_nss_supp;
593 int i, nss = hweight8(phy->mt76->antenna_mask);
594 u16 mcs_map = 0;
595
596 for (i = 0; i < 8; i++) {
597 if (i < nss)
598 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
599 else
600 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
601 }
602
603 he_cap->has_he = true;
604
605 he_cap_elem->mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE;
606 he_cap_elem->mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
607 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
608 he_cap_elem->mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
609
610 if (band == NL80211_BAND_2GHZ)
611 he_cap_elem->phy_cap_info[0] =
612 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
613 else
614 he_cap_elem->phy_cap_info[0] =
615 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
616 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
617
618 he_cap_elem->phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
619 he_cap_elem->phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
620 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
621
622 he_cap_elem->phy_cap_info[7] =
623 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
624
625 switch (iftype) {
626 case NL80211_IFTYPE_AP:
627 he_cap_elem->mac_cap_info[0] |= IEEE80211_HE_MAC_CAP0_TWT_RES;
628 he_cap_elem->mac_cap_info[2] |= IEEE80211_HE_MAC_CAP2_BSR;
629 he_cap_elem->mac_cap_info[4] |= IEEE80211_HE_MAC_CAP4_BQR;
630 he_cap_elem->mac_cap_info[5] |=
631 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
632 he_cap_elem->phy_cap_info[3] |=
633 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
634 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
635 he_cap_elem->phy_cap_info[6] |=
636 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
637 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
638 he_cap_elem->phy_cap_info[9] |=
639 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
640 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
641 break;
642 case NL80211_IFTYPE_STATION:
643 he_cap_elem->mac_cap_info[1] |=
644 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
645
646 if (band == NL80211_BAND_2GHZ)
647 he_cap_elem->phy_cap_info[0] |=
648 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
649 else
650 he_cap_elem->phy_cap_info[0] |=
651 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
652
653 he_cap_elem->phy_cap_info[1] |=
654 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
655 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
656 he_cap_elem->phy_cap_info[3] |=
657 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
658 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
659 he_cap_elem->phy_cap_info[6] |=
660 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
661 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
662 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
663 he_cap_elem->phy_cap_info[7] |=
664 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP;
665 he_cap_elem->phy_cap_info[8] |=
666 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
667 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
668 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
669 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
670 he_cap_elem->phy_cap_info[9] |=
671 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
672 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
673 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
674 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
675 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
676 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
677 break;
678 default:
679 break;
680 }
681
682 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
683 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
684 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map);
685 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map);
686
687 mt7996_set_stream_he_txbf_caps(phy, he_cap, iftype);
688
689 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
690 if (he_cap_elem->phy_cap_info[6] &
691 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
692 mt76_connac_gen_ppe_thresh(he_cap->ppe_thres, nss);
693 } else {
694 he_cap_elem->phy_cap_info[9] |=
695 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
696 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
697 }
698
699 if (band == NL80211_BAND_6GHZ) {
700 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
701 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
702
703 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_0_5,
704 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
705 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
706 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
707 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
708 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
709
710 data->he_6ghz_capa.capa = cpu_to_le16(cap);
711 }
712 }
713
714 static void
mt7996_init_eht_caps(struct mt7996_phy * phy,enum nl80211_band band,struct ieee80211_sband_iftype_data * data,enum nl80211_iftype iftype)715 mt7996_init_eht_caps(struct mt7996_phy *phy, enum nl80211_band band,
716 struct ieee80211_sband_iftype_data *data,
717 enum nl80211_iftype iftype)
718 {
719 struct ieee80211_sta_eht_cap *eht_cap = &data->eht_cap;
720 struct ieee80211_eht_cap_elem_fixed *eht_cap_elem = &eht_cap->eht_cap_elem;
721 struct ieee80211_eht_mcs_nss_supp *eht_nss = &eht_cap->eht_mcs_nss_supp;
722 enum nl80211_chan_width width = phy->mt76->chandef.width;
723 int nss = hweight8(phy->mt76->antenna_mask);
724 int sts = hweight16(phy->mt76->chainmask);
725 u8 val;
726
727 if (!phy->dev->has_eht)
728 return;
729
730 eht_cap->has_eht = true;
731
732 eht_cap_elem->mac_cap_info[0] =
733 IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
734 IEEE80211_EHT_MAC_CAP0_OM_CONTROL |
735 u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_11454,
736 IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK);
737
738 eht_cap_elem->phy_cap_info[0] =
739 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI |
740 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER |
741 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE;
742
743 val = max_t(u8, sts - 1, 3);
744 eht_cap_elem->phy_cap_info[0] |=
745 u8_encode_bits(u8_get_bits(val, BIT(0)),
746 IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK);
747
748 eht_cap_elem->phy_cap_info[1] =
749 u8_encode_bits(u8_get_bits(val, GENMASK(2, 1)),
750 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK) |
751 u8_encode_bits(val,
752 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK);
753
754 eht_cap_elem->phy_cap_info[2] =
755 u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_80MHZ_MASK) |
756 u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_160MHZ_MASK);
757
758 if (band == NL80211_BAND_6GHZ) {
759 eht_cap_elem->phy_cap_info[0] |=
760 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
761
762 eht_cap_elem->phy_cap_info[1] |=
763 u8_encode_bits(val,
764 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK);
765
766 eht_cap_elem->phy_cap_info[2] |=
767 u8_encode_bits(sts - 1,
768 IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK);
769 }
770
771 eht_cap_elem->phy_cap_info[3] =
772 IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK |
773 IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK |
774 IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK |
775 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK;
776
777 eht_cap_elem->phy_cap_info[4] =
778 IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI |
779 u8_encode_bits(min_t(int, sts - 1, 2),
780 IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK);
781
782 eht_cap_elem->phy_cap_info[5] =
783 u8_encode_bits(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US,
784 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK) |
785 u8_encode_bits(u8_get_bits(1, GENMASK(1, 0)),
786 IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK);
787
788 val = width == NL80211_CHAN_WIDTH_320 ? 0xf :
789 width == NL80211_CHAN_WIDTH_160 ? 0x7 :
790 width == NL80211_CHAN_WIDTH_80 ? 0x3 : 0x1;
791 eht_cap_elem->phy_cap_info[6] =
792 u8_encode_bits(val, IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK);
793
794 val = u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_RX) |
795 u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_TX);
796 #define SET_EHT_MAX_NSS(_bw, _val) do { \
797 eht_nss->bw._##_bw.rx_tx_mcs9_max_nss = _val; \
798 eht_nss->bw._##_bw.rx_tx_mcs11_max_nss = _val; \
799 eht_nss->bw._##_bw.rx_tx_mcs13_max_nss = _val; \
800 } while (0)
801
802 SET_EHT_MAX_NSS(80, val);
803 SET_EHT_MAX_NSS(160, val);
804 if (band == NL80211_BAND_6GHZ)
805 SET_EHT_MAX_NSS(320, val);
806 #undef SET_EHT_MAX_NSS
807
808 if (iftype != NL80211_IFTYPE_AP)
809 return;
810
811 eht_cap_elem->phy_cap_info[3] |=
812 IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK |
813 IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK;
814
815 eht_cap_elem->phy_cap_info[7] =
816 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_80MHZ |
817 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_160MHZ |
818 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_80MHZ |
819 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_160MHZ;
820
821 if (band != NL80211_BAND_6GHZ)
822 return;
823
824 eht_cap_elem->phy_cap_info[7] |=
825 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_320MHZ |
826 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_320MHZ;
827 }
828
829 static void
__mt7996_set_stream_he_eht_caps(struct mt7996_phy * phy,struct ieee80211_supported_band * sband,enum nl80211_band band)830 __mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy,
831 struct ieee80211_supported_band *sband,
832 enum nl80211_band band)
833 {
834 struct ieee80211_sband_iftype_data *data = phy->iftype[band];
835 int i, n = 0;
836
837 for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
838 switch (i) {
839 case NL80211_IFTYPE_STATION:
840 case NL80211_IFTYPE_AP:
841 #ifdef CONFIG_MAC80211_MESH
842 case NL80211_IFTYPE_MESH_POINT:
843 #endif
844 break;
845 default:
846 continue;
847 }
848
849 data[n].types_mask = BIT(i);
850 mt7996_init_he_caps(phy, band, &data[n], i);
851 mt7996_init_eht_caps(phy, band, &data[n], i);
852
853 n++;
854 }
855
856 sband->iftype_data = data;
857 sband->n_iftype_data = n;
858 }
859
mt7996_set_stream_he_eht_caps(struct mt7996_phy * phy)860 void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy)
861 {
862 if (phy->mt76->cap.has_2ghz)
863 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_2g.sband,
864 NL80211_BAND_2GHZ);
865
866 if (phy->mt76->cap.has_5ghz)
867 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_5g.sband,
868 NL80211_BAND_5GHZ);
869
870 if (phy->mt76->cap.has_6ghz)
871 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_6g.sband,
872 NL80211_BAND_6GHZ);
873 }
874
mt7996_register_device(struct mt7996_dev * dev)875 int mt7996_register_device(struct mt7996_dev *dev)
876 {
877 struct ieee80211_hw *hw = mt76_hw(dev);
878 int ret;
879
880 dev->phy.dev = dev;
881 dev->phy.mt76 = &dev->mt76.phy;
882 dev->mt76.phy.priv = &dev->phy;
883 INIT_WORK(&dev->rc_work, mt7996_mac_sta_rc_work);
884 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7996_mac_work);
885 INIT_LIST_HEAD(&dev->sta_rc_list);
886 INIT_LIST_HEAD(&dev->twt_list);
887
888 init_waitqueue_head(&dev->reset_wait);
889 INIT_WORK(&dev->reset_work, mt7996_mac_reset_work);
890 INIT_WORK(&dev->dump_work, mt7996_mac_dump_work);
891 mutex_init(&dev->dump_mutex);
892
893 ret = mt7996_init_hardware(dev);
894 if (ret)
895 return ret;
896
897 mt7996_init_wiphy(hw);
898
899 /* init led callbacks */
900 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
901 dev->mphy.leds.cdev.brightness_set = mt7996_led_set_brightness;
902 dev->mphy.leds.cdev.blink_set = mt7996_led_set_blink;
903 }
904
905 ret = mt76_register_device(&dev->mt76, true, mt76_rates,
906 ARRAY_SIZE(mt76_rates));
907 if (ret)
908 return ret;
909
910 ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
911
912 ret = mt7996_register_phy(dev, mt7996_phy2(dev), MT_BAND1);
913 if (ret)
914 return ret;
915
916 ret = mt7996_register_phy(dev, mt7996_phy3(dev), MT_BAND2);
917 if (ret)
918 return ret;
919
920 dev->recovery.hw_init_done = true;
921
922 ret = mt7996_init_debugfs(&dev->phy);
923 if (ret)
924 return ret;
925
926 return mt7996_coredump_register(dev);
927 }
928
mt7996_unregister_device(struct mt7996_dev * dev)929 void mt7996_unregister_device(struct mt7996_dev *dev)
930 {
931 mt7996_unregister_phy(mt7996_phy3(dev), MT_BAND2);
932 mt7996_unregister_phy(mt7996_phy2(dev), MT_BAND1);
933 mt7996_coredump_unregister(dev);
934 mt76_unregister_device(&dev->mt76);
935 mt7996_mcu_exit(dev);
936 mt7996_tx_token_put(dev);
937 mt7996_dma_cleanup(dev);
938 tasklet_disable(&dev->mt76.irq_tasklet);
939
940 mt76_free_device(&dev->mt76);
941 }
942