1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2019 MediaTek Inc.
3 *
4 * Author: Roy Luo <royluo@google.com>
5 * Ryder Lee <ryder.lee@mediatek.com>
6 * Felix Fietkau <nbd@nbd.name>
7 * Lorenzo Bianconi <lorenzo@kernel.org>
8 */
9
10 #include <linux/etherdevice.h>
11 #include <linux/hwmon.h>
12 #include <linux/hwmon-sysfs.h>
13 #include "mt7615.h"
14 #include "mac.h"
15 #include "mcu.h"
16 #include "eeprom.h"
17
mt7615_thermal_show_temp(struct device * dev,struct device_attribute * attr,char * buf)18 static ssize_t mt7615_thermal_show_temp(struct device *dev,
19 struct device_attribute *attr,
20 char *buf)
21 {
22 struct mt7615_dev *mdev = dev_get_drvdata(dev);
23 int temperature;
24
25 if (!mt7615_wait_for_mcu_init(mdev))
26 return 0;
27
28 mt7615_mutex_acquire(mdev);
29 temperature = mt7615_mcu_get_temperature(mdev);
30 mt7615_mutex_release(mdev);
31
32 if (temperature < 0)
33 return temperature;
34
35 /* display in millidegree celcius */
36 return sprintf(buf, "%u\n", temperature * 1000);
37 }
38
39 static SENSOR_DEVICE_ATTR(temp1_input, 0444, mt7615_thermal_show_temp,
40 NULL, 0);
41
42 static struct attribute *mt7615_hwmon_attrs[] = {
43 &sensor_dev_attr_temp1_input.dev_attr.attr,
44 NULL,
45 };
46 ATTRIBUTE_GROUPS(mt7615_hwmon);
47
mt7615_thermal_init(struct mt7615_dev * dev)48 int mt7615_thermal_init(struct mt7615_dev *dev)
49 {
50 struct wiphy *wiphy = mt76_hw(dev)->wiphy;
51 struct device *hwmon;
52 const char *name;
53
54 if (!IS_REACHABLE(CONFIG_HWMON))
55 return 0;
56
57 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7615_%s",
58 wiphy_name(wiphy));
59 if (!name)
60 return -ENOMEM;
61
62 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, dev,
63 mt7615_hwmon_groups);
64 if (IS_ERR(hwmon))
65 return PTR_ERR(hwmon);
66
67 return 0;
68 }
69 EXPORT_SYMBOL_GPL(mt7615_thermal_init);
70
71 static void
mt7615_phy_init(struct mt7615_dev * dev)72 mt7615_phy_init(struct mt7615_dev *dev)
73 {
74 /* disable rf low power beacon mode */
75 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
76 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
77 }
78
79 static void
mt7615_init_mac_chain(struct mt7615_dev * dev,int chain)80 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
81 {
82 u32 val;
83
84 if (!chain)
85 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
86 else
87 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
88
89 /* enable band 0/1 clk */
90 mt76_set(dev, MT_CFG_CCR, val);
91
92 mt76_rmw(dev, MT_TMAC_TRCR(chain),
93 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
94 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
95 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
96
97 mt76_wr(dev, MT_AGG_ACR(chain),
98 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
99 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
100 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
101
102 mt76_wr(dev, MT_AGG_ARUCR(chain),
103 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
104 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
105 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
106 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
107 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
108 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
109 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
110 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
111
112 mt76_wr(dev, MT_AGG_ARDCR(chain),
113 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
114 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
115 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
116 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
117 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
118 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
119 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
120 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
121
122 mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS);
123 if (!mt7615_firmware_offload(dev)) {
124 u32 mask, set;
125
126 mask = MT_DMA_RCFR0_MCU_RX_MGMT |
127 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
128 MT_DMA_RCFR0_MCU_RX_CTL_BAR |
129 MT_DMA_RCFR0_MCU_RX_BYPASS |
130 MT_DMA_RCFR0_RX_DROPPED_UCAST |
131 MT_DMA_RCFR0_RX_DROPPED_MCAST;
132 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
133 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
134 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
135 }
136 }
137
138 static void
mt7615_mac_init(struct mt7615_dev * dev)139 mt7615_mac_init(struct mt7615_dev *dev)
140 {
141 int i;
142
143 mt7615_init_mac_chain(dev, 0);
144
145 mt76_rmw_field(dev, MT_TMAC_CTCR0,
146 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
147 mt76_rmw_field(dev, MT_TMAC_CTCR0,
148 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
149 mt76_rmw(dev, MT_TMAC_CTCR0,
150 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
151 MT_TMAC_CTCR0_INS_DDLMT_EN,
152 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
153 MT_TMAC_CTCR0_INS_DDLMT_EN);
154
155 mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0);
156 mt7615_mac_set_scs(&dev->phy, true);
157
158 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
159 MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
160
161 mt76_wr(dev, MT_AGG_ARCR,
162 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
163 MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
164 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
165 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
166
167 for (i = 0; i < MT7615_WTBL_SIZE; i++)
168 mt7615_mac_wtbl_update(dev, i,
169 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
170
171 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
172 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
173
174 mt76_wr(dev, MT_DMA_DCR0,
175 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
176 MT_DMA_DCR0_RX_VEC_DROP | MT_DMA_DCR0_DAMSDU_EN |
177 MT_DMA_DCR0_RX_HDR_TRANS_EN);
178 /* disable TDLS filtering */
179 mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN);
180 mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
181 if (is_mt7663(&dev->mt76)) {
182 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
183 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
184 } else {
185 mt7615_init_mac_chain(dev, 1);
186 }
187 mt7615_mcu_set_rx_hdr_trans_blacklist(dev);
188 }
189
190 static void
mt7615_check_offload_capability(struct mt7615_dev * dev)191 mt7615_check_offload_capability(struct mt7615_dev *dev)
192 {
193 struct ieee80211_hw *hw = mt76_hw(dev);
194 struct wiphy *wiphy = hw->wiphy;
195
196 if (mt7615_firmware_offload(dev)) {
197 ieee80211_hw_set(hw, SUPPORTS_PS);
198 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
199
200 wiphy->flags &= ~WIPHY_FLAG_4ADDR_STATION;
201 wiphy->max_remain_on_channel_duration = 5000;
202 wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
203 NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR |
204 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
205 NL80211_FEATURE_P2P_GO_CTWIN |
206 NL80211_FEATURE_P2P_GO_OPPPS;
207 } else {
208 dev->ops->hw_scan = NULL;
209 dev->ops->cancel_hw_scan = NULL;
210 dev->ops->sched_scan_start = NULL;
211 dev->ops->sched_scan_stop = NULL;
212 dev->ops->set_rekey_data = NULL;
213 dev->ops->remain_on_channel = NULL;
214 dev->ops->cancel_remain_on_channel = NULL;
215
216 wiphy->max_sched_scan_plan_interval = 0;
217 wiphy->max_sched_scan_ie_len = 0;
218 wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
219 wiphy->max_sched_scan_ssids = 0;
220 wiphy->max_match_sets = 0;
221 wiphy->max_sched_scan_reqs = 0;
222 }
223 }
224
mt7615_wait_for_mcu_init(struct mt7615_dev * dev)225 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
226 {
227 flush_work(&dev->mcu_work);
228
229 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
230 }
231 EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init);
232
233 static const struct ieee80211_iface_limit if_limits[] = {
234 {
235 .max = 1,
236 .types = BIT(NL80211_IFTYPE_ADHOC)
237 }, {
238 .max = MT7615_MAX_INTERFACES,
239 .types = BIT(NL80211_IFTYPE_AP) |
240 #ifdef CONFIG_MAC80211_MESH
241 BIT(NL80211_IFTYPE_MESH_POINT) |
242 #endif
243 BIT(NL80211_IFTYPE_P2P_CLIENT) |
244 BIT(NL80211_IFTYPE_P2P_GO) |
245 BIT(NL80211_IFTYPE_STATION)
246 }
247 };
248
249 static const struct ieee80211_iface_combination if_comb_radar[] = {
250 {
251 .limits = if_limits,
252 .n_limits = ARRAY_SIZE(if_limits),
253 .max_interfaces = MT7615_MAX_INTERFACES,
254 .num_different_channels = 1,
255 .beacon_int_infra_match = true,
256 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
257 BIT(NL80211_CHAN_WIDTH_20) |
258 BIT(NL80211_CHAN_WIDTH_40) |
259 BIT(NL80211_CHAN_WIDTH_80) |
260 BIT(NL80211_CHAN_WIDTH_160) |
261 BIT(NL80211_CHAN_WIDTH_80P80),
262 }
263 };
264
265 static const struct ieee80211_iface_combination if_comb[] = {
266 {
267 .limits = if_limits,
268 .n_limits = ARRAY_SIZE(if_limits),
269 .max_interfaces = MT7615_MAX_INTERFACES,
270 .num_different_channels = 1,
271 .beacon_int_infra_match = true,
272 }
273 };
274
mt7615_init_txpower(struct mt7615_dev * dev,struct ieee80211_supported_band * sband)275 void mt7615_init_txpower(struct mt7615_dev *dev,
276 struct ieee80211_supported_band *sband)
277 {
278 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
279 int delta_idx, delta = mt76_tx_power_nss_delta(n_chains);
280 u8 *eep = (u8 *)dev->mt76.eeprom.data;
281 enum nl80211_band band = sband->band;
282 struct mt76_power_limits limits;
283 u8 rate_val;
284
285 delta_idx = mt7615_eeprom_get_power_delta_index(dev, band);
286 rate_val = eep[delta_idx];
287 if ((rate_val & ~MT_EE_RATE_POWER_MASK) ==
288 (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN))
289 delta += rate_val & MT_EE_RATE_POWER_MASK;
290
291 if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band))
292 target_chains = 1;
293 else
294 target_chains = n_chains;
295
296 for (i = 0; i < sband->n_channels; i++) {
297 struct ieee80211_channel *chan = &sband->channels[i];
298 u8 target_power = 0;
299 int j;
300
301 for (j = 0; j < target_chains; j++) {
302 int index;
303
304 index = mt7615_eeprom_get_target_power_index(dev, chan, j);
305 if (index < 0)
306 continue;
307
308 target_power = max(target_power, eep[index]);
309 }
310
311 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
312 &limits,
313 target_power);
314 target_power += delta;
315 target_power = DIV_ROUND_UP(target_power, 2);
316 chan->max_power = min_t(int, chan->max_reg_power,
317 target_power);
318 chan->orig_mpwr = target_power;
319 }
320 }
321 EXPORT_SYMBOL_GPL(mt7615_init_txpower);
322
mt7615_init_work(struct mt7615_dev * dev)323 void mt7615_init_work(struct mt7615_dev *dev)
324 {
325 mt7615_mcu_set_eeprom(dev);
326 mt7615_mac_init(dev);
327 mt7615_phy_init(dev);
328 mt7615_mcu_del_wtbl_all(dev);
329 mt7615_check_offload_capability(dev);
330 }
331 EXPORT_SYMBOL_GPL(mt7615_init_work);
332
333 static void
mt7615_regd_notifier(struct wiphy * wiphy,struct regulatory_request * request)334 mt7615_regd_notifier(struct wiphy *wiphy,
335 struct regulatory_request *request)
336 {
337 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
338 struct mt7615_dev *dev = mt7615_hw_dev(hw);
339 struct mt76_phy *mphy = hw->priv;
340 struct mt7615_phy *phy = mphy->priv;
341 struct cfg80211_chan_def *chandef = &mphy->chandef;
342
343 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
344 dev->mt76.region = request->dfs_region;
345
346 mt7615_init_txpower(dev, &mphy->sband_2g.sband);
347 mt7615_init_txpower(dev, &mphy->sband_5g.sband);
348
349 mt7615_mutex_acquire(dev);
350
351 if (chandef->chan->flags & IEEE80211_CHAN_RADAR)
352 mt7615_dfs_init_radar_detector(phy);
353
354 if (mt7615_firmware_offload(phy->dev)) {
355 mt76_connac_mcu_set_channel_domain(mphy);
356 mt76_connac_mcu_set_rate_txpower(mphy);
357 }
358
359 mt7615_mutex_release(dev);
360 }
361
362 static void
mt7615_init_wiphy(struct ieee80211_hw * hw)363 mt7615_init_wiphy(struct ieee80211_hw *hw)
364 {
365 struct mt7615_phy *phy = mt7615_hw_phy(hw);
366 struct wiphy *wiphy = hw->wiphy;
367
368 hw->queues = 4;
369 hw->max_rates = 3;
370 hw->max_report_rates = 7;
371 hw->max_rate_tries = 11;
372 hw->netdev_features = NETIF_F_RXCSUM;
373
374 hw->radiotap_timestamp.units_pos =
375 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
376
377 phy->slottime = 9;
378
379 hw->sta_data_size = sizeof(struct mt7615_sta);
380 hw->vif_data_size = sizeof(struct mt7615_vif);
381
382 if (is_mt7663(&phy->dev->mt76)) {
383 wiphy->iface_combinations = if_comb;
384 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
385 } else {
386 wiphy->iface_combinations = if_comb_radar;
387 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar);
388 }
389 wiphy->reg_notifier = mt7615_regd_notifier;
390
391 wiphy->max_sched_scan_plan_interval =
392 MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL;
393 wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
394 wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN;
395 wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID;
396 wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH;
397 wiphy->max_sched_scan_reqs = 1;
398 wiphy->max_scan_ssids = 4;
399
400 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
401 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
402 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
403 if (!is_mt7622(&phy->dev->mt76))
404 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER);
405
406 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
407 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
408 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
409 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
410 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
411
412 if (is_mt7615(&phy->dev->mt76))
413 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
414 else
415 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
416
417 phy->mt76->sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
418 phy->mt76->sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
419 phy->mt76->sband_5g.sband.vht_cap.cap |=
420 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
421 }
422
423 static void
mt7615_cap_dbdc_enable(struct mt7615_dev * dev)424 mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
425 {
426 dev->mphy.sband_5g.sband.vht_cap.cap &=
427 ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
428 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
429 if (dev->chainmask == 0xf)
430 dev->mphy.antenna_mask = dev->chainmask >> 2;
431 else
432 dev->mphy.antenna_mask = dev->chainmask >> 1;
433 dev->mphy.chainmask = dev->mphy.antenna_mask;
434 dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask;
435 dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask;
436 mt76_set_stream_caps(&dev->mphy, true);
437 }
438
439 static void
mt7615_cap_dbdc_disable(struct mt7615_dev * dev)440 mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
441 {
442 dev->mphy.sband_5g.sband.vht_cap.cap |=
443 IEEE80211_VHT_CAP_SHORT_GI_160 |
444 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
445 dev->mphy.antenna_mask = dev->chainmask;
446 dev->mphy.chainmask = dev->chainmask;
447 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
448 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
449 mt76_set_stream_caps(&dev->mphy, true);
450 }
451
mt7615_reg_map(struct mt7615_dev * dev,u32 addr)452 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr)
453 {
454 u32 base, offset;
455
456 if (is_mt7663(&dev->mt76)) {
457 base = addr & MT7663_MCU_PCIE_REMAP_2_BASE;
458 offset = addr & MT7663_MCU_PCIE_REMAP_2_OFFSET;
459 } else {
460 base = addr & MT_MCU_PCIE_REMAP_2_BASE;
461 offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET;
462 }
463 mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base);
464
465 return MT_PCIE_REMAP_BASE_2 + offset;
466 }
467 EXPORT_SYMBOL_GPL(mt7615_reg_map);
468
469 static void
mt7615_led_set_config(struct led_classdev * led_cdev,u8 delay_on,u8 delay_off)470 mt7615_led_set_config(struct led_classdev *led_cdev,
471 u8 delay_on, u8 delay_off)
472 {
473 struct mt7615_dev *dev;
474 struct mt76_phy *mphy;
475 u32 val, addr;
476 u8 index;
477
478 mphy = container_of(led_cdev, struct mt76_phy, leds.cdev);
479 dev = container_of(mphy->dev, struct mt7615_dev, mt76);
480
481 if (!mt76_connac_pm_ref(mphy, &dev->pm))
482 return;
483
484 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |
485 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
486 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
487
488 index = dev->dbdc_support ? mphy->band_idx : mphy->leds.pin;
489 addr = mt7615_reg_map(dev, MT_LED_STATUS_0(index));
490 mt76_wr(dev, addr, val);
491 addr = mt7615_reg_map(dev, MT_LED_STATUS_1(index));
492 mt76_wr(dev, addr, val);
493
494 val = MT_LED_CTRL_REPLAY(index) | MT_LED_CTRL_KICK(index);
495 if (dev->mphy.leds.al)
496 val |= MT_LED_CTRL_POLARITY(index);
497 if (mphy->band_idx)
498 val |= MT_LED_CTRL_BAND(index);
499
500 addr = mt7615_reg_map(dev, MT_LED_CTRL);
501 mt76_wr(dev, addr, val);
502
503 mt76_connac_pm_unref(mphy, &dev->pm);
504 }
505
mt7615_led_set_blink(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)506 int mt7615_led_set_blink(struct led_classdev *led_cdev,
507 unsigned long *delay_on,
508 unsigned long *delay_off)
509 {
510 u8 delta_on, delta_off;
511
512 delta_off = max_t(u8, *delay_off / 10, 1);
513 delta_on = max_t(u8, *delay_on / 10, 1);
514
515 mt7615_led_set_config(led_cdev, delta_on, delta_off);
516
517 return 0;
518 }
519 EXPORT_SYMBOL_GPL(mt7615_led_set_blink);
520
mt7615_led_set_brightness(struct led_classdev * led_cdev,enum led_brightness brightness)521 void mt7615_led_set_brightness(struct led_classdev *led_cdev,
522 enum led_brightness brightness)
523 {
524 if (!brightness)
525 mt7615_led_set_config(led_cdev, 0, 0xff);
526 else
527 mt7615_led_set_config(led_cdev, 0xff, 0);
528 }
529 EXPORT_SYMBOL_GPL(mt7615_led_set_brightness);
530
mt7615_register_ext_phy(struct mt7615_dev * dev)531 int mt7615_register_ext_phy(struct mt7615_dev *dev)
532 {
533 struct mt7615_phy *phy = mt7615_ext_phy(dev);
534 struct mt76_phy *mphy;
535 int i, ret;
536
537 if (!is_mt7615(&dev->mt76))
538 return -EOPNOTSUPP;
539
540 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
541 return -EINVAL;
542
543 if (phy)
544 return 0;
545
546 mt7615_cap_dbdc_enable(dev);
547 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops, MT_BAND1);
548 if (!mphy)
549 return -ENOMEM;
550
551 phy = mphy->priv;
552 phy->dev = dev;
553 phy->mt76 = mphy;
554 mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask;
555 mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1;
556 mt7615_init_wiphy(mphy->hw);
557
558 INIT_DELAYED_WORK(&mphy->mac_work, mt7615_mac_work);
559 INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
560 skb_queue_head_init(&phy->scan_event_list);
561
562 INIT_WORK(&phy->roc_work, mt7615_roc_work);
563 timer_setup(&phy->roc_timer, mt7615_roc_timer, 0);
564 init_waitqueue_head(&phy->roc_wait);
565
566 mt7615_mac_set_scs(phy, true);
567
568 /*
569 * Make the secondary PHY MAC address local without overlapping with
570 * the usual MAC address allocation scheme on multiple virtual interfaces
571 */
572 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
573 ETH_ALEN);
574 mphy->macaddr[0] |= 2;
575 mphy->macaddr[0] ^= BIT(7);
576 mt76_eeprom_override(mphy);
577
578 /* second phy can only handle 5 GHz */
579 mphy->cap.has_5ghz = true;
580
581 /* mt7615 second phy shares the same hw queues with the primary one */
582 for (i = 0; i <= MT_TXQ_PSD ; i++)
583 mphy->q_tx[i] = dev->mphy.q_tx[i];
584
585 /* init led callbacks */
586 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
587 mphy->leds.cdev.brightness_set = mt7615_led_set_brightness;
588 mphy->leds.cdev.blink_set = mt7615_led_set_blink;
589 }
590
591 ret = mt76_register_phy(mphy, true, mt76_rates,
592 ARRAY_SIZE(mt76_rates));
593 if (ret)
594 ieee80211_free_hw(mphy->hw);
595
596 return ret;
597 }
598 EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
599
mt7615_unregister_ext_phy(struct mt7615_dev * dev)600 void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
601 {
602 struct mt7615_phy *phy = mt7615_ext_phy(dev);
603 struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
604
605 if (!phy)
606 return;
607
608 mt7615_cap_dbdc_disable(dev);
609 mt76_unregister_phy(mphy);
610 ieee80211_free_hw(mphy->hw);
611 }
612 EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy);
613
mt7615_init_device(struct mt7615_dev * dev)614 void mt7615_init_device(struct mt7615_dev *dev)
615 {
616 struct ieee80211_hw *hw = mt76_hw(dev);
617
618 dev->phy.dev = dev;
619 dev->phy.mt76 = &dev->mt76.phy;
620 dev->mt76.phy.priv = &dev->phy;
621 dev->mt76.tx_worker.fn = mt7615_tx_worker;
622
623 INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work);
624 INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work);
625 spin_lock_init(&dev->pm.wake.lock);
626 mutex_init(&dev->pm.mutex);
627 init_waitqueue_head(&dev->pm.wait);
628 spin_lock_init(&dev->pm.txq_lock);
629 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7615_mac_work);
630 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
631 INIT_DELAYED_WORK(&dev->coredump.work, mt7615_coredump_work);
632 skb_queue_head_init(&dev->phy.scan_event_list);
633 skb_queue_head_init(&dev->coredump.msg_list);
634 init_waitqueue_head(&dev->reset_wait);
635 init_waitqueue_head(&dev->phy.roc_wait);
636
637 INIT_WORK(&dev->phy.roc_work, mt7615_roc_work);
638 timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0);
639
640 mt7615_init_wiphy(hw);
641 dev->pm.idle_timeout = MT7615_PM_TIMEOUT;
642 dev->pm.stats.last_wake_event = jiffies;
643 dev->pm.stats.last_doze_event = jiffies;
644 mt7615_cap_dbdc_disable(dev);
645
646 #ifdef CONFIG_NL80211_TESTMODE
647 dev->mt76.test_ops = &mt7615_testmode_ops;
648 #endif
649 }
650 EXPORT_SYMBOL_GPL(mt7615_init_device);
651