| /openbmc/linux/arch/arm/mach-omap1/ |
| H A D | mux.h | 27 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \ argument
41 #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \ argument
53 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ argument
64 #define MUX_REG_7XX(reg, mode_offset, mode) \ argument
75 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ argument
94 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ argument
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| /openbmc/linux/drivers/media/cec/core/ |
| H A D | cec-pin-error-inj.c | 14 unsigned int mode_offset; member
195 unsigned int mode_offset; in cec_pin_error_inj_parse_line() local
317 unsigned int mode_offset; in cec_pin_error_inj_show() local
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| H A D | cec-pin.c | 156 static bool rx_error_inj(struct cec_pin *pin, unsigned int mode_offset, in rx_error_inj()
218 static bool tx_error_inj(struct cec_pin *pin, unsigned int mode_offset, in tx_error_inj()
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| /openbmc/linux/include/linux/ |
| H A D | pktcdvd.h | 165 __u8 mode_offset; /* 0 / 8 */ member
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| /openbmc/linux/arch/arm/mach-davinci/ |
| H A D | mux.h | 668 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
679 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
690 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
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| /openbmc/linux/drivers/net/wireless/ath/ath5k/ |
| H A D | eeprom.c | 470 u32 mode_offset[3]; in ath5k_eeprom_init_modes() local
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| /openbmc/u-boot/lib/ |
| H A D | tpm-v1.c | 40 const size_t mode_offset = 10; in tpm1_startup() local
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-pll.c | 1060 int lock_shift, int mode_offset, int mode_shift, in rockchip_clk_register_pll()
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| H A D | clk.h | 402 int mode_offset; member
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