1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Support for the camera device found on Marvell MMP processors; known
4  * to work with the Armada 610 as used in the OLPC 1.75 system.
5  *
6  * Copyright 2011 Jonathan Corbet <corbet@lwn.net>
7  * Copyright 2018 Lubomir Rintel <lkundrak@v3.sk>
8  */
9 
10 #include <linux/init.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/interrupt.h>
14 #include <linux/spinlock.h>
15 #include <linux/slab.h>
16 #include <linux/videodev2.h>
17 #include <media/v4l2-device.h>
18 #include <linux/platform_data/media/mmp-camera.h>
19 #include <linux/device.h>
20 #include <linux/of.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_device.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/io.h>
25 #include <linux/list.h>
26 #include <linux/pm.h>
27 #include <linux/clk.h>
28 
29 #include "mcam-core.h"
30 
31 MODULE_ALIAS("platform:mmp-camera");
32 MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
33 MODULE_LICENSE("GPL");
34 
35 static char *mcam_clks[] = {"axi", "func", "phy"};
36 
37 struct mmp_camera {
38 	struct platform_device *pdev;
39 	struct mcam_camera mcam;
40 	struct list_head devlist;
41 	struct clk *mipi_clk;
42 	int irq;
43 };
44 
mcam_to_cam(struct mcam_camera * mcam)45 static inline struct mmp_camera *mcam_to_cam(struct mcam_camera *mcam)
46 {
47 	return container_of(mcam, struct mmp_camera, mcam);
48 }
49 
50 /*
51  * calc the dphy register values
52  * There are three dphy registers being used.
53  * dphy[0] - CSI2_DPHY3
54  * dphy[1] - CSI2_DPHY5
55  * dphy[2] - CSI2_DPHY6
56  * CSI2_DPHY3 and CSI2_DPHY6 can be set with a default value
57  * or be calculated dynamically
58  */
mmpcam_calc_dphy(struct mcam_camera * mcam)59 static void mmpcam_calc_dphy(struct mcam_camera *mcam)
60 {
61 	struct mmp_camera *cam = mcam_to_cam(mcam);
62 	struct mmp_camera_platform_data *pdata = cam->pdev->dev.platform_data;
63 	struct device *dev = &cam->pdev->dev;
64 	unsigned long tx_clk_esc;
65 
66 	/*
67 	 * If CSI2_DPHY3 is calculated dynamically,
68 	 * pdata->lane_clk should be already set
69 	 * either in the board driver statically
70 	 * or in the sensor driver dynamically.
71 	 */
72 	/*
73 	 * dphy[0] - CSI2_DPHY3:
74 	 *  bit 0 ~ bit 7: HS Term Enable.
75 	 *   defines the time that the DPHY
76 	 *   wait before enabling the data
77 	 *   lane termination after detecting
78 	 *   that the sensor has driven the data
79 	 *   lanes to the LP00 bridge state.
80 	 *   The value is calculated by:
81 	 *   (Max T(D_TERM_EN)/Period(DDR)) - 1
82 	 *  bit 8 ~ bit 15: HS_SETTLE
83 	 *   Time interval during which the HS
84 	 *   receiver shall ignore any Data Lane
85 	 *   HS transitions.
86 	 *   The value has been calibrated on
87 	 *   different boards. It seems to work well.
88 	 *
89 	 *  More detail please refer
90 	 *  MIPI Alliance Spectification for D-PHY
91 	 *  document for explanation of HS-SETTLE
92 	 *  and D-TERM-EN.
93 	 */
94 	switch (pdata->dphy3_algo) {
95 	case DPHY3_ALGO_PXA910:
96 		/*
97 		 * Calculate CSI2_DPHY3 algo for PXA910
98 		 */
99 		pdata->dphy[0] =
100 			(((1 + (pdata->lane_clk * 80) / 1000) & 0xff) << 8)
101 			| (1 + pdata->lane_clk * 35 / 1000);
102 		break;
103 	case DPHY3_ALGO_PXA2128:
104 		/*
105 		 * Calculate CSI2_DPHY3 algo for PXA2128
106 		 */
107 		pdata->dphy[0] =
108 			(((2 + (pdata->lane_clk * 110) / 1000) & 0xff) << 8)
109 			| (1 + pdata->lane_clk * 35 / 1000);
110 		break;
111 	default:
112 		/*
113 		 * Use default CSI2_DPHY3 value for PXA688/PXA988
114 		 */
115 		dev_dbg(dev, "camera: use the default CSI2_DPHY3 value\n");
116 	}
117 
118 	/*
119 	 * mipi_clk will never be changed, it is a fixed value on MMP
120 	 */
121 	if (IS_ERR(cam->mipi_clk))
122 		return;
123 
124 	/* get the escape clk, this is hard coded */
125 	clk_prepare_enable(cam->mipi_clk);
126 	tx_clk_esc = (clk_get_rate(cam->mipi_clk) / 1000000) / 12;
127 	clk_disable_unprepare(cam->mipi_clk);
128 	/*
129 	 * dphy[2] - CSI2_DPHY6:
130 	 * bit 0 ~ bit 7: CK Term Enable
131 	 *  Time for the Clock Lane receiver to enable the HS line
132 	 *  termination. The value is calculated similarly with
133 	 *  HS Term Enable
134 	 * bit 8 ~ bit 15: CK Settle
135 	 *  Time interval during which the HS receiver shall ignore
136 	 *  any Clock Lane HS transitions.
137 	 *  The value is calibrated on the boards.
138 	 */
139 	pdata->dphy[2] =
140 		((((534 * tx_clk_esc) / 2000 - 1) & 0xff) << 8)
141 		| (((38 * tx_clk_esc) / 1000 - 1) & 0xff);
142 
143 	dev_dbg(dev, "camera: DPHY sets: dphy3=0x%x, dphy5=0x%x, dphy6=0x%x\n",
144 		pdata->dphy[0], pdata->dphy[1], pdata->dphy[2]);
145 }
146 
mmpcam_irq(int irq,void * data)147 static irqreturn_t mmpcam_irq(int irq, void *data)
148 {
149 	struct mcam_camera *mcam = data;
150 	unsigned int irqs, handled;
151 
152 	spin_lock(&mcam->dev_lock);
153 	irqs = mcam_reg_read(mcam, REG_IRQSTAT);
154 	handled = mccic_irq(mcam, irqs);
155 	spin_unlock(&mcam->dev_lock);
156 	return IRQ_RETVAL(handled);
157 }
158 
mcam_init_clk(struct mcam_camera * mcam)159 static void mcam_init_clk(struct mcam_camera *mcam)
160 {
161 	unsigned int i;
162 
163 	for (i = 0; i < NR_MCAM_CLK; i++) {
164 		if (mcam_clks[i] != NULL) {
165 			/* Some clks are not necessary on some boards
166 			 * We still try to run even it fails getting clk
167 			 */
168 			mcam->clk[i] = devm_clk_get(mcam->dev, mcam_clks[i]);
169 			if (IS_ERR(mcam->clk[i]))
170 				dev_warn(mcam->dev, "Could not get clk: %s\n",
171 						mcam_clks[i]);
172 		}
173 	}
174 }
175 
mmpcam_probe(struct platform_device * pdev)176 static int mmpcam_probe(struct platform_device *pdev)
177 {
178 	struct mmp_camera *cam;
179 	struct mcam_camera *mcam;
180 	struct resource *res;
181 	struct fwnode_handle *ep;
182 	struct mmp_camera_platform_data *pdata;
183 	struct v4l2_async_connection *asd;
184 	int ret;
185 
186 	cam = devm_kzalloc(&pdev->dev, sizeof(*cam), GFP_KERNEL);
187 	if (cam == NULL)
188 		return -ENOMEM;
189 	platform_set_drvdata(pdev, cam);
190 	cam->pdev = pdev;
191 	INIT_LIST_HEAD(&cam->devlist);
192 
193 	mcam = &cam->mcam;
194 	mcam->calc_dphy = mmpcam_calc_dphy;
195 	mcam->dev = &pdev->dev;
196 	pdata = pdev->dev.platform_data;
197 	if (pdata) {
198 		mcam->mclk_src = pdata->mclk_src;
199 		mcam->mclk_div = pdata->mclk_div;
200 		mcam->bus_type = pdata->bus_type;
201 		mcam->dphy = pdata->dphy;
202 		mcam->lane = pdata->lane;
203 	} else {
204 		/*
205 		 * These are values that used to be hardcoded in mcam-core and
206 		 * work well on a OLPC XO 1.75 with a parallel bus sensor.
207 		 * If it turns out other setups make sense, the values should
208 		 * be obtained from the device tree.
209 		 */
210 		mcam->mclk_src = 3;
211 		mcam->mclk_div = 2;
212 	}
213 	if (mcam->bus_type == V4L2_MBUS_CSI2_DPHY) {
214 		cam->mipi_clk = devm_clk_get(mcam->dev, "mipi");
215 		if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0))
216 			return PTR_ERR(cam->mipi_clk);
217 	}
218 	mcam->mipi_enabled = false;
219 	mcam->chip_id = MCAM_ARMADA610;
220 	mcam->buffer_mode = B_DMA_sg;
221 	strscpy(mcam->bus_info, "platform:mmp-camera", sizeof(mcam->bus_info));
222 	spin_lock_init(&mcam->dev_lock);
223 	/*
224 	 * Get our I/O memory.
225 	 */
226 	mcam->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
227 	if (IS_ERR(mcam->regs))
228 		return PTR_ERR(mcam->regs);
229 	mcam->regs_size = resource_size(res);
230 
231 	mcam_init_clk(mcam);
232 
233 	/*
234 	 * Create a match of the sensor against its OF node.
235 	 */
236 	ep = fwnode_graph_get_next_endpoint(of_fwnode_handle(pdev->dev.of_node),
237 					    NULL);
238 	if (!ep)
239 		return -ENODEV;
240 
241 	v4l2_async_nf_init(&mcam->notifier, &mcam->v4l2_dev);
242 
243 	asd = v4l2_async_nf_add_fwnode_remote(&mcam->notifier, ep,
244 					      struct v4l2_async_connection);
245 	fwnode_handle_put(ep);
246 	if (IS_ERR(asd)) {
247 		ret = PTR_ERR(asd);
248 		goto out;
249 	}
250 
251 	/*
252 	 * Register the device with the core.
253 	 */
254 	ret = mccic_register(mcam);
255 	if (ret)
256 		goto out;
257 
258 	/*
259 	 * Add OF clock provider.
260 	 */
261 	ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
262 								mcam->mclk);
263 	if (ret) {
264 		dev_err(&pdev->dev, "can't add DT clock provider\n");
265 		goto out;
266 	}
267 
268 	/*
269 	 * Finally, set up our IRQ now that the core is ready to
270 	 * deal with it.
271 	 */
272 	ret = platform_get_irq(pdev, 0);
273 	if (ret < 0)
274 		goto out;
275 	cam->irq = ret;
276 	ret = devm_request_irq(&pdev->dev, cam->irq, mmpcam_irq, IRQF_SHARED,
277 					"mmp-camera", mcam);
278 	if (ret)
279 		goto out;
280 
281 	pm_runtime_enable(&pdev->dev);
282 	return 0;
283 out:
284 	mccic_shutdown(mcam);
285 
286 	return ret;
287 }
288 
mmpcam_remove(struct platform_device * pdev)289 static void mmpcam_remove(struct platform_device *pdev)
290 {
291 	struct mmp_camera *cam = platform_get_drvdata(pdev);
292 	struct mcam_camera *mcam = &cam->mcam;
293 
294 	mccic_shutdown(mcam);
295 	pm_runtime_force_suspend(mcam->dev);
296 }
297 
298 /*
299  * Suspend/resume support.
300  */
301 
mmpcam_runtime_resume(struct device * dev)302 static int __maybe_unused mmpcam_runtime_resume(struct device *dev)
303 {
304 	struct mmp_camera *cam = dev_get_drvdata(dev);
305 	struct mcam_camera *mcam = &cam->mcam;
306 	unsigned int i;
307 
308 	for (i = 0; i < NR_MCAM_CLK; i++) {
309 		if (!IS_ERR(mcam->clk[i]))
310 			clk_prepare_enable(mcam->clk[i]);
311 	}
312 
313 	return 0;
314 }
315 
mmpcam_runtime_suspend(struct device * dev)316 static int __maybe_unused mmpcam_runtime_suspend(struct device *dev)
317 {
318 	struct mmp_camera *cam = dev_get_drvdata(dev);
319 	struct mcam_camera *mcam = &cam->mcam;
320 	int i;
321 
322 	for (i = NR_MCAM_CLK - 1; i >= 0; i--) {
323 		if (!IS_ERR(mcam->clk[i]))
324 			clk_disable_unprepare(mcam->clk[i]);
325 	}
326 
327 	return 0;
328 }
329 
mmpcam_suspend(struct device * dev)330 static int __maybe_unused mmpcam_suspend(struct device *dev)
331 {
332 	struct mmp_camera *cam = dev_get_drvdata(dev);
333 
334 	if (!pm_runtime_suspended(dev))
335 		mccic_suspend(&cam->mcam);
336 	return 0;
337 }
338 
mmpcam_resume(struct device * dev)339 static int __maybe_unused mmpcam_resume(struct device *dev)
340 {
341 	struct mmp_camera *cam = dev_get_drvdata(dev);
342 
343 	if (!pm_runtime_suspended(dev))
344 		return mccic_resume(&cam->mcam);
345 	return 0;
346 }
347 
348 static const struct dev_pm_ops mmpcam_pm_ops = {
349 	SET_RUNTIME_PM_OPS(mmpcam_runtime_suspend, mmpcam_runtime_resume, NULL)
350 	SET_SYSTEM_SLEEP_PM_OPS(mmpcam_suspend, mmpcam_resume)
351 };
352 
353 static const struct of_device_id mmpcam_of_match[] = {
354 	{ .compatible = "marvell,mmp2-ccic", },
355 	{},
356 };
357 MODULE_DEVICE_TABLE(of, mmpcam_of_match);
358 
359 static struct platform_driver mmpcam_driver = {
360 	.probe		= mmpcam_probe,
361 	.remove_new	= mmpcam_remove,
362 	.driver = {
363 		.name	= "mmp-camera",
364 		.of_match_table = mmpcam_of_match,
365 		.pm = &mmpcam_pm_ops,
366 	}
367 };
368 
369 module_platform_driver(mmpcam_driver);
370