1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 2000 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
10 */
11 #include <linux/bug.h>
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/smp.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/string.h>
20 #include <linux/types.h>
21 #include <linux/pagemap.h>
22 #include <linux/ptrace.h>
23 #include <linux/mman.h>
24 #include <linux/mm.h>
25 #include <linux/memblock.h>
26 #include <linux/highmem.h>
27 #include <linux/swap.h>
28 #include <linux/proc_fs.h>
29 #include <linux/pfn.h>
30 #include <linux/hardirq.h>
31 #include <linux/gfp.h>
32 #include <linux/kcore.h>
33 #include <linux/initrd.h>
34
35 #include <asm/bootinfo.h>
36 #include <asm/cachectl.h>
37 #include <asm/cpu.h>
38 #include <asm/dma.h>
39 #include <asm/maar.h>
40 #include <asm/mmu_context.h>
41 #include <asm/sections.h>
42 #include <asm/pgalloc.h>
43 #include <asm/tlb.h>
44 #include <asm/fixmap.h>
45
46 /*
47 * We have up to 8 empty zeroed pages so we can map one of the right colour
48 * when needed. This is necessary only on R4000 / R4400 SC and MC versions
49 * where we have to avoid VCED / VECI exceptions for good performance at
50 * any price. Since page is never written to after the initialization we
51 * don't have to care about aliases on other CPUs.
52 */
53 unsigned long empty_zero_page, zero_page_mask;
54 EXPORT_SYMBOL_GPL(empty_zero_page);
55 EXPORT_SYMBOL(zero_page_mask);
56
57 /*
58 * Not static inline because used by IP27 special magic initialization code
59 */
setup_zero_pages(void)60 void setup_zero_pages(void)
61 {
62 unsigned int order, i;
63 struct page *page;
64
65 if (cpu_has_vce)
66 order = 3;
67 else
68 order = 0;
69
70 empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
71 if (!empty_zero_page)
72 panic("Oh boy, that early out of memory?");
73
74 page = virt_to_page((void *)empty_zero_page);
75 split_page(page, order);
76 for (i = 0; i < (1 << order); i++, page++)
77 mark_page_reserved(page);
78
79 zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK;
80 }
81
__kmap_pgprot(struct page * page,unsigned long addr,pgprot_t prot)82 static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
83 {
84 enum fixed_addresses idx;
85 unsigned int old_mmid;
86 unsigned long vaddr, flags, entrylo;
87 unsigned long old_ctx;
88 pte_t pte;
89 int tlbidx;
90
91 BUG_ON(folio_test_dcache_dirty(page_folio(page)));
92
93 preempt_disable();
94 pagefault_disable();
95 idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
96 idx += in_interrupt() ? FIX_N_COLOURS : 0;
97 vaddr = __fix_to_virt(FIX_CMAP_END - idx);
98 pte = mk_pte(page, prot);
99 #if defined(CONFIG_XPA)
100 entrylo = pte_to_entrylo(pte.pte_high);
101 #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
102 entrylo = pte.pte_high;
103 #else
104 entrylo = pte_to_entrylo(pte_val(pte));
105 #endif
106
107 local_irq_save(flags);
108 old_ctx = read_c0_entryhi();
109 write_c0_entryhi(vaddr & (PAGE_MASK << 1));
110 write_c0_entrylo0(entrylo);
111 write_c0_entrylo1(entrylo);
112 if (cpu_has_mmid) {
113 old_mmid = read_c0_memorymapid();
114 write_c0_memorymapid(MMID_KERNEL_WIRED);
115 }
116 #ifdef CONFIG_XPA
117 if (cpu_has_xpa) {
118 entrylo = (pte.pte_low & _PFNX_MASK);
119 writex_c0_entrylo0(entrylo);
120 writex_c0_entrylo1(entrylo);
121 }
122 #endif
123 tlbidx = num_wired_entries();
124 write_c0_wired(tlbidx + 1);
125 write_c0_index(tlbidx);
126 mtc0_tlbw_hazard();
127 tlb_write_indexed();
128 tlbw_use_hazard();
129 write_c0_entryhi(old_ctx);
130 if (cpu_has_mmid)
131 write_c0_memorymapid(old_mmid);
132 local_irq_restore(flags);
133
134 return (void*) vaddr;
135 }
136
kmap_coherent(struct page * page,unsigned long addr)137 void *kmap_coherent(struct page *page, unsigned long addr)
138 {
139 return __kmap_pgprot(page, addr, PAGE_KERNEL);
140 }
141
kmap_noncoherent(struct page * page,unsigned long addr)142 void *kmap_noncoherent(struct page *page, unsigned long addr)
143 {
144 return __kmap_pgprot(page, addr, PAGE_KERNEL_NC);
145 }
146
kunmap_coherent(void)147 void kunmap_coherent(void)
148 {
149 unsigned int wired;
150 unsigned long flags, old_ctx;
151
152 local_irq_save(flags);
153 old_ctx = read_c0_entryhi();
154 wired = num_wired_entries() - 1;
155 write_c0_wired(wired);
156 write_c0_index(wired);
157 write_c0_entryhi(UNIQUE_ENTRYHI(wired));
158 write_c0_entrylo0(0);
159 write_c0_entrylo1(0);
160 mtc0_tlbw_hazard();
161 tlb_write_indexed();
162 tlbw_use_hazard();
163 write_c0_entryhi(old_ctx);
164 local_irq_restore(flags);
165 pagefault_enable();
166 preempt_enable();
167 }
168
copy_user_highpage(struct page * to,struct page * from,unsigned long vaddr,struct vm_area_struct * vma)169 void copy_user_highpage(struct page *to, struct page *from,
170 unsigned long vaddr, struct vm_area_struct *vma)
171 {
172 struct folio *src = page_folio(from);
173 void *vfrom, *vto;
174
175 vto = kmap_atomic(to);
176 if (cpu_has_dc_aliases &&
177 folio_mapped(src) && !folio_test_dcache_dirty(src)) {
178 vfrom = kmap_coherent(from, vaddr);
179 copy_page(vto, vfrom);
180 kunmap_coherent();
181 } else {
182 vfrom = kmap_atomic(from);
183 copy_page(vto, vfrom);
184 kunmap_atomic(vfrom);
185 }
186 if ((!cpu_has_ic_fills_f_dc) ||
187 pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
188 flush_data_cache_page((unsigned long)vto);
189 kunmap_atomic(vto);
190 /* Make sure this page is cleared on other CPU's too before using it */
191 smp_wmb();
192 }
193
copy_to_user_page(struct vm_area_struct * vma,struct page * page,unsigned long vaddr,void * dst,const void * src,unsigned long len)194 void copy_to_user_page(struct vm_area_struct *vma,
195 struct page *page, unsigned long vaddr, void *dst, const void *src,
196 unsigned long len)
197 {
198 struct folio *folio = page_folio(page);
199
200 if (cpu_has_dc_aliases &&
201 folio_mapped(folio) && !folio_test_dcache_dirty(folio)) {
202 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
203 memcpy(vto, src, len);
204 kunmap_coherent();
205 } else {
206 memcpy(dst, src, len);
207 if (cpu_has_dc_aliases)
208 folio_set_dcache_dirty(folio);
209 }
210 if (vma->vm_flags & VM_EXEC)
211 flush_cache_page(vma, vaddr, page_to_pfn(page));
212 }
213
copy_from_user_page(struct vm_area_struct * vma,struct page * page,unsigned long vaddr,void * dst,const void * src,unsigned long len)214 void copy_from_user_page(struct vm_area_struct *vma,
215 struct page *page, unsigned long vaddr, void *dst, const void *src,
216 unsigned long len)
217 {
218 struct folio *folio = page_folio(page);
219
220 if (cpu_has_dc_aliases &&
221 folio_mapped(folio) && !folio_test_dcache_dirty(folio)) {
222 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
223 memcpy(dst, vfrom, len);
224 kunmap_coherent();
225 } else {
226 memcpy(dst, src, len);
227 if (cpu_has_dc_aliases)
228 folio_set_dcache_dirty(folio);
229 }
230 }
231 EXPORT_SYMBOL_GPL(copy_from_user_page);
232
fixrange_init(unsigned long start,unsigned long end,pgd_t * pgd_base)233 void __init fixrange_init(unsigned long start, unsigned long end,
234 pgd_t *pgd_base)
235 {
236 #ifdef CONFIG_HIGHMEM
237 pgd_t *pgd;
238 pud_t *pud;
239 pmd_t *pmd;
240 pte_t *pte;
241 int i, j, k;
242 unsigned long vaddr;
243
244 vaddr = start;
245 i = pgd_index(vaddr);
246 j = pud_index(vaddr);
247 k = pmd_index(vaddr);
248 pgd = pgd_base + i;
249
250 for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) {
251 pud = (pud_t *)pgd;
252 for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) {
253 pmd = (pmd_t *)pud;
254 for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) {
255 if (pmd_none(*pmd)) {
256 pte = (pte_t *) memblock_alloc_low(PAGE_SIZE,
257 PAGE_SIZE);
258 if (!pte)
259 panic("%s: Failed to allocate %lu bytes align=%lx\n",
260 __func__, PAGE_SIZE,
261 PAGE_SIZE);
262
263 set_pmd(pmd, __pmd((unsigned long)pte));
264 BUG_ON(pte != pte_offset_kernel(pmd, 0));
265 }
266 vaddr += PMD_SIZE;
267 }
268 k = 0;
269 }
270 j = 0;
271 }
272 #endif
273 }
274
275 struct maar_walk_info {
276 struct maar_config cfg[16];
277 unsigned int num_cfg;
278 };
279
maar_res_walk(unsigned long start_pfn,unsigned long nr_pages,void * data)280 static int maar_res_walk(unsigned long start_pfn, unsigned long nr_pages,
281 void *data)
282 {
283 struct maar_walk_info *wi = data;
284 struct maar_config *cfg = &wi->cfg[wi->num_cfg];
285 unsigned int maar_align;
286
287 /* MAAR registers hold physical addresses right shifted by 4 bits */
288 maar_align = BIT(MIPS_MAAR_ADDR_SHIFT + 4);
289
290 /* Fill in the MAAR config entry */
291 cfg->lower = ALIGN(PFN_PHYS(start_pfn), maar_align);
292 cfg->upper = ALIGN_DOWN(PFN_PHYS(start_pfn + nr_pages), maar_align) - 1;
293 cfg->attrs = MIPS_MAAR_S;
294
295 /* Ensure we don't overflow the cfg array */
296 if (!WARN_ON(wi->num_cfg >= ARRAY_SIZE(wi->cfg)))
297 wi->num_cfg++;
298
299 return 0;
300 }
301
302
platform_maar_init(unsigned num_pairs)303 unsigned __weak platform_maar_init(unsigned num_pairs)
304 {
305 unsigned int num_configured;
306 struct maar_walk_info wi;
307
308 wi.num_cfg = 0;
309 walk_system_ram_range(0, max_pfn, &wi, maar_res_walk);
310
311 num_configured = maar_config(wi.cfg, wi.num_cfg, num_pairs);
312 if (num_configured < wi.num_cfg)
313 pr_warn("Not enough MAAR pairs (%u) for all memory regions (%u)\n",
314 num_pairs, wi.num_cfg);
315
316 return num_configured;
317 }
318
maar_init(void)319 void maar_init(void)
320 {
321 unsigned num_maars, used, i;
322 phys_addr_t lower, upper, attr;
323 static struct {
324 struct maar_config cfgs[3];
325 unsigned used;
326 } recorded = { { { 0 } }, 0 };
327
328 if (!cpu_has_maar)
329 return;
330
331 /* Detect the number of MAARs */
332 write_c0_maari(~0);
333 back_to_back_c0_hazard();
334 num_maars = read_c0_maari() + 1;
335
336 /* MAARs should be in pairs */
337 WARN_ON(num_maars % 2);
338
339 /* Set MAARs using values we recorded already */
340 if (recorded.used) {
341 used = maar_config(recorded.cfgs, recorded.used, num_maars / 2);
342 BUG_ON(used != recorded.used);
343 } else {
344 /* Configure the required MAARs */
345 used = platform_maar_init(num_maars / 2);
346 }
347
348 /* Disable any further MAARs */
349 for (i = (used * 2); i < num_maars; i++) {
350 write_c0_maari(i);
351 back_to_back_c0_hazard();
352 write_c0_maar(0);
353 back_to_back_c0_hazard();
354 }
355
356 if (recorded.used)
357 return;
358
359 pr_info("MAAR configuration:\n");
360 for (i = 0; i < num_maars; i += 2) {
361 write_c0_maari(i);
362 back_to_back_c0_hazard();
363 upper = read_c0_maar();
364 #ifdef CONFIG_XPA
365 upper |= (phys_addr_t)readx_c0_maar() << MIPS_MAARX_ADDR_SHIFT;
366 #endif
367
368 write_c0_maari(i + 1);
369 back_to_back_c0_hazard();
370 lower = read_c0_maar();
371 #ifdef CONFIG_XPA
372 lower |= (phys_addr_t)readx_c0_maar() << MIPS_MAARX_ADDR_SHIFT;
373 #endif
374
375 attr = lower & upper;
376 lower = (lower & MIPS_MAAR_ADDR) << 4;
377 upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff;
378
379 pr_info(" [%d]: ", i / 2);
380 if ((attr & MIPS_MAAR_V) != MIPS_MAAR_V) {
381 pr_cont("disabled\n");
382 continue;
383 }
384
385 pr_cont("%pa-%pa", &lower, &upper);
386
387 if (attr & MIPS_MAAR_S)
388 pr_cont(" speculate");
389
390 pr_cont("\n");
391
392 /* Record the setup for use on secondary CPUs */
393 if (used <= ARRAY_SIZE(recorded.cfgs)) {
394 recorded.cfgs[recorded.used].lower = lower;
395 recorded.cfgs[recorded.used].upper = upper;
396 recorded.cfgs[recorded.used].attrs = attr;
397 recorded.used++;
398 }
399 }
400 }
401
402 #ifndef CONFIG_NUMA
paging_init(void)403 void __init paging_init(void)
404 {
405 unsigned long max_zone_pfns[MAX_NR_ZONES];
406
407 pagetable_init();
408
409 #ifdef CONFIG_ZONE_DMA
410 max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
411 #endif
412 #ifdef CONFIG_ZONE_DMA32
413 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
414 #endif
415 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
416 #ifdef CONFIG_HIGHMEM
417 max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
418
419 if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
420 printk(KERN_WARNING "This processor doesn't support highmem."
421 " %ldk highmem ignored\n",
422 (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
423 max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
424 }
425
426 max_mapnr = highend_pfn ? highend_pfn : max_low_pfn;
427 #else
428 max_mapnr = max_low_pfn;
429 #endif
430 high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
431
432 free_area_init(max_zone_pfns);
433 }
434
435 #ifdef CONFIG_64BIT
436 static struct kcore_list kcore_kseg0;
437 #endif
438
mem_init_free_highmem(void)439 static inline void __init mem_init_free_highmem(void)
440 {
441 #ifdef CONFIG_HIGHMEM
442 unsigned long tmp;
443
444 if (cpu_has_dc_aliases)
445 return;
446
447 for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
448 struct page *page = pfn_to_page(tmp);
449
450 if (!memblock_is_memory(PFN_PHYS(tmp)))
451 SetPageReserved(page);
452 else
453 free_highmem_page(page);
454 }
455 #endif
456 }
457
mem_init(void)458 void __init mem_init(void)
459 {
460 /*
461 * When PFN_PTE_SHIFT is greater than PAGE_SHIFT we won't have enough PTE
462 * bits to hold a full 32b physical address on MIPS32 systems.
463 */
464 BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT) && (PFN_PTE_SHIFT > PAGE_SHIFT));
465
466 maar_init();
467 memblock_free_all();
468 setup_zero_pages(); /* Setup zeroed pages. */
469 mem_init_free_highmem();
470
471 #ifdef CONFIG_64BIT
472 if ((unsigned long) &_text > (unsigned long) CKSEG0)
473 /* The -4 is a hack so that user tools don't have to handle
474 the overflow. */
475 kclist_add(&kcore_kseg0, (void *) CKSEG0,
476 0x80000000 - 4, KCORE_TEXT);
477 #endif
478 }
479 #endif /* !CONFIG_NUMA */
480
free_init_pages(const char * what,unsigned long begin,unsigned long end)481 void free_init_pages(const char *what, unsigned long begin, unsigned long end)
482 {
483 unsigned long pfn;
484
485 for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
486 struct page *page = pfn_to_page(pfn);
487 void *addr = phys_to_virt(PFN_PHYS(pfn));
488
489 memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
490 free_reserved_page(page);
491 }
492 printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
493 }
494
495 void (*free_init_pages_eva)(void *begin, void *end) = NULL;
496
prom_free_prom_memory(void)497 void __weak __init prom_free_prom_memory(void)
498 {
499 /* nothing to do */
500 }
501
free_initmem(void)502 void __ref free_initmem(void)
503 {
504 prom_free_prom_memory();
505 /*
506 * Let the platform define a specific function to free the
507 * init section since EVA may have used any possible mapping
508 * between virtual and physical addresses.
509 */
510 if (free_init_pages_eva)
511 free_init_pages_eva((void *)&__init_begin, (void *)&__init_end);
512 else
513 free_initmem_default(POISON_FREE_INITMEM);
514 }
515
516 #ifdef CONFIG_HAVE_SETUP_PER_CPU_AREA
517 unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
518 EXPORT_SYMBOL(__per_cpu_offset);
519
pcpu_cpu_distance(unsigned int from,unsigned int to)520 static int __init pcpu_cpu_distance(unsigned int from, unsigned int to)
521 {
522 return node_distance(cpu_to_node(from), cpu_to_node(to));
523 }
524
pcpu_cpu_to_node(int cpu)525 static int __init pcpu_cpu_to_node(int cpu)
526 {
527 return cpu_to_node(cpu);
528 }
529
setup_per_cpu_areas(void)530 void __init setup_per_cpu_areas(void)
531 {
532 unsigned long delta;
533 unsigned int cpu;
534 int rc;
535
536 /*
537 * Always reserve area for module percpu variables. That's
538 * what the legacy allocator did.
539 */
540 rc = pcpu_embed_first_chunk(PERCPU_MODULE_RESERVE,
541 PERCPU_DYNAMIC_RESERVE, PAGE_SIZE,
542 pcpu_cpu_distance,
543 pcpu_cpu_to_node);
544 if (rc < 0)
545 panic("Failed to initialize percpu areas.");
546
547 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
548 for_each_possible_cpu(cpu)
549 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
550 }
551 #endif
552
553 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
554 unsigned long pgd_current[NR_CPUS];
555 #endif
556
557 /*
558 * Align swapper_pg_dir in to 64K, allows its address to be loaded
559 * with a single LUI instruction in the TLB handlers. If we used
560 * __aligned(64K), its size would get rounded up to the alignment
561 * size, and waste space. So we place it in its own section and align
562 * it in the linker script.
563 */
564 pgd_t swapper_pg_dir[PTRS_PER_PGD] __section(".bss..swapper_pg_dir");
565 #ifndef __PAGETABLE_PUD_FOLDED
566 pud_t invalid_pud_table[PTRS_PER_PUD] __page_aligned_bss;
567 #endif
568 #ifndef __PAGETABLE_PMD_FOLDED
569 pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
570 EXPORT_SYMBOL_GPL(invalid_pmd_table);
571 #endif
572 pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
573 EXPORT_SYMBOL(invalid_pte_table);
574