xref: /openbmc/linux/sound/pci/bt87x.c (revision e5a54e23)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
4  *
5  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6  *
7  * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
8  */
9 
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/slab.h>
14 #include <linux/module.h>
15 #include <linux/bitops.h>
16 #include <linux/io.h>
17 #include <sound/core.h>
18 #include <sound/pcm.h>
19 #include <sound/pcm_params.h>
20 #include <sound/control.h>
21 #include <sound/initval.h>
22 
23 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
24 MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
25 MODULE_LICENSE("GPL");
26 
27 static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
28 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
29 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;	/* Enable this card */
30 static int digital_rate[SNDRV_CARDS];	/* digital input rate */
31 static bool load_all;	/* allow to load cards not the allowlist */
32 
33 module_param_array(index, int, NULL, 0444);
34 MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
35 module_param_array(id, charp, NULL, 0444);
36 MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
37 module_param_array(enable, bool, NULL, 0444);
38 MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
39 module_param_array(digital_rate, int, NULL, 0444);
40 MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
41 module_param(load_all, bool, 0444);
42 MODULE_PARM_DESC(load_all, "Allow to load cards not on the allowlist");
43 
44 
45 /* register offsets */
46 #define REG_INT_STAT		0x100	/* interrupt status */
47 #define REG_INT_MASK		0x104	/* interrupt mask */
48 #define REG_GPIO_DMA_CTL	0x10c	/* audio control */
49 #define REG_PACKET_LEN		0x110	/* audio packet lengths */
50 #define REG_RISC_STRT_ADD	0x114	/* RISC program start address */
51 #define REG_RISC_COUNT		0x120	/* RISC program counter */
52 
53 /* interrupt bits */
54 #define INT_OFLOW	(1 <<  3)	/* audio A/D overflow */
55 #define INT_RISCI	(1 << 11)	/* RISC instruction IRQ bit set */
56 #define INT_FBUS	(1 << 12)	/* FIFO overrun due to bus access latency */
57 #define INT_FTRGT	(1 << 13)	/* FIFO overrun due to target latency */
58 #define INT_FDSR	(1 << 14)	/* FIFO data stream resynchronization */
59 #define INT_PPERR	(1 << 15)	/* PCI parity error */
60 #define INT_RIPERR	(1 << 16)	/* RISC instruction parity error */
61 #define INT_PABORT	(1 << 17)	/* PCI master or target abort */
62 #define INT_OCERR	(1 << 18)	/* invalid opcode */
63 #define INT_SCERR	(1 << 19)	/* sync counter overflow */
64 #define INT_RISC_EN	(1 << 27)	/* DMA controller running */
65 #define INT_RISCS_SHIFT	      28	/* RISC status bits */
66 
67 /* audio control bits */
68 #define CTL_FIFO_ENABLE		(1 <<  0)	/* enable audio data FIFO */
69 #define CTL_RISC_ENABLE		(1 <<  1)	/* enable audio DMA controller */
70 #define CTL_PKTP_4		(0 <<  2)	/* packet mode FIFO trigger point - 4 DWORDs */
71 #define CTL_PKTP_8		(1 <<  2)	/* 8 DWORDs */
72 #define CTL_PKTP_16		(2 <<  2)	/* 16 DWORDs */
73 #define CTL_ACAP_EN		(1 <<  4)	/* enable audio capture */
74 #define CTL_DA_APP		(1 <<  5)	/* GPIO input */
75 #define CTL_DA_IOM_AFE		(0 <<  6)	/* audio A/D input */
76 #define CTL_DA_IOM_DA		(1 <<  6)	/* digital audio input */
77 #define CTL_DA_SDR_SHIFT	       8	/* DDF first stage decimation rate */
78 #define CTL_DA_SDR_MASK		(0xf<< 8)
79 #define CTL_DA_LMT		(1 << 12)	/* limit audio data values */
80 #define CTL_DA_ES2		(1 << 13)	/* enable DDF stage 2 */
81 #define CTL_DA_SBR		(1 << 14)	/* samples rounded to 8 bits */
82 #define CTL_DA_DPM		(1 << 15)	/* data packet mode */
83 #define CTL_DA_LRD_SHIFT	      16	/* ALRCK delay */
84 #define CTL_DA_MLB		(1 << 21)	/* MSB/LSB format */
85 #define CTL_DA_LRI		(1 << 22)	/* left/right indication */
86 #define CTL_DA_SCE		(1 << 23)	/* sample clock edge */
87 #define CTL_A_SEL_STV		(0 << 24)	/* TV tuner audio input */
88 #define CTL_A_SEL_SFM		(1 << 24)	/* FM audio input */
89 #define CTL_A_SEL_SML		(2 << 24)	/* mic/line audio input */
90 #define CTL_A_SEL_SMXC		(3 << 24)	/* MUX bypass */
91 #define CTL_A_SEL_SHIFT		      24
92 #define CTL_A_SEL_MASK		(3 << 24)
93 #define CTL_A_PWRDN		(1 << 26)	/* analog audio power-down */
94 #define CTL_A_G2X		(1 << 27)	/* audio gain boost */
95 #define CTL_A_GAIN_SHIFT	      28	/* audio input gain */
96 #define CTL_A_GAIN_MASK		(0xf<<28)
97 
98 /* RISC instruction opcodes */
99 #define RISC_WRITE	(0x1 << 28)	/* write FIFO data to memory at address */
100 #define RISC_WRITEC	(0x5 << 28)	/* write FIFO data to memory at current address */
101 #define RISC_SKIP	(0x2 << 28)	/* skip FIFO data */
102 #define RISC_JUMP	(0x7 << 28)	/* jump to address */
103 #define RISC_SYNC	(0x8 << 28)	/* synchronize with FIFO */
104 
105 /* RISC instruction bits */
106 #define RISC_BYTES_ENABLE	(0xf << 12)	/* byte enable bits */
107 #define RISC_RESYNC		(  1 << 15)	/* disable FDSR errors */
108 #define RISC_SET_STATUS_SHIFT	        16	/* set status bits */
109 #define RISC_RESET_STATUS_SHIFT	        20	/* clear status bits */
110 #define RISC_IRQ		(  1 << 24)	/* interrupt */
111 #define RISC_EOL		(  1 << 26)	/* end of line */
112 #define RISC_SOL		(  1 << 27)	/* start of line */
113 
114 /* SYNC status bits values */
115 #define RISC_SYNC_FM1	0x6
116 #define RISC_SYNC_VRO	0xc
117 
118 #define ANALOG_CLOCK 1792000
119 #ifdef CONFIG_SND_BT87X_OVERCLOCK
120 #define CLOCK_DIV_MIN 1
121 #else
122 #define CLOCK_DIV_MIN 4
123 #endif
124 #define CLOCK_DIV_MAX 15
125 
126 #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
127 			  INT_RIPERR | INT_PABORT | INT_OCERR)
128 #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
129 
130 /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
131 #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
132 
133 /* Cards with configuration information */
134 enum snd_bt87x_boardid {
135 	SND_BT87X_BOARD_UNKNOWN,
136 	SND_BT87X_BOARD_GENERIC,	/* both an & dig interfaces, 32kHz */
137 	SND_BT87X_BOARD_ANALOG,		/* board with no external A/D */
138 	SND_BT87X_BOARD_OSPREY2x0,
139 	SND_BT87X_BOARD_OSPREY440,
140 	SND_BT87X_BOARD_AVPHONE98,
141 };
142 
143 /* Card configuration */
144 struct snd_bt87x_board {
145 	int dig_rate;		/* Digital input sampling rate */
146 	u32 digital_fmt;	/* Register settings for digital input */
147 	unsigned no_analog:1;	/* No analog input */
148 	unsigned no_digital:1;	/* No digital input */
149 };
150 
151 static const struct snd_bt87x_board snd_bt87x_boards[] = {
152 	[SND_BT87X_BOARD_UNKNOWN] = {
153 		.dig_rate = 32000, /* just a guess */
154 	},
155 	[SND_BT87X_BOARD_GENERIC] = {
156 		.dig_rate = 32000,
157 	},
158 	[SND_BT87X_BOARD_ANALOG] = {
159 		.no_digital = 1,
160 	},
161 	[SND_BT87X_BOARD_OSPREY2x0] = {
162 		.dig_rate = 44100,
163 		.digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
164 	},
165 	[SND_BT87X_BOARD_OSPREY440] = {
166 		.dig_rate = 32000,
167 		.digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
168 		.no_analog = 1,
169 	},
170 	[SND_BT87X_BOARD_AVPHONE98] = {
171 		.dig_rate = 48000,
172 	},
173 };
174 
175 struct snd_bt87x {
176 	struct snd_card *card;
177 	struct pci_dev *pci;
178 	struct snd_bt87x_board board;
179 
180 	void __iomem *mmio;
181 	int irq;
182 
183 	spinlock_t reg_lock;
184 	unsigned long opened;
185 	struct snd_pcm_substream *substream;
186 
187 	struct snd_dma_buffer dma_risc;
188 	unsigned int line_bytes;
189 	unsigned int lines;
190 
191 	u32 reg_control;
192 	u32 interrupt_mask;
193 
194 	int current_line;
195 
196 	int pci_parity_errors;
197 };
198 
199 enum { DEVICE_DIGITAL, DEVICE_ANALOG };
200 
snd_bt87x_readl(struct snd_bt87x * chip,u32 reg)201 static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg)
202 {
203 	return readl(chip->mmio + reg);
204 }
205 
snd_bt87x_writel(struct snd_bt87x * chip,u32 reg,u32 value)206 static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value)
207 {
208 	writel(value, chip->mmio + reg);
209 }
210 
snd_bt87x_create_risc(struct snd_bt87x * chip,struct snd_pcm_substream * substream,unsigned int periods,unsigned int period_bytes)211 static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream,
212 			       	 unsigned int periods, unsigned int period_bytes)
213 {
214 	unsigned int i, offset;
215 	__le32 *risc;
216 
217 	if (chip->dma_risc.area == NULL) {
218 		if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
219 					PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
220 			return -ENOMEM;
221 	}
222 	risc = (__le32 *)chip->dma_risc.area;
223 	offset = 0;
224 	*risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
225 	*risc++ = cpu_to_le32(0);
226 	for (i = 0; i < periods; ++i) {
227 		u32 rest;
228 
229 		rest = period_bytes;
230 		do {
231 			u32 cmd, len;
232 			unsigned int addr;
233 
234 			len = PAGE_SIZE - (offset % PAGE_SIZE);
235 			if (len > rest)
236 				len = rest;
237 			cmd = RISC_WRITE | len;
238 			if (rest == period_bytes) {
239 				u32 block = i * 16 / periods;
240 				cmd |= RISC_SOL;
241 				cmd |= block << RISC_SET_STATUS_SHIFT;
242 				cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
243 			}
244 			if (len == rest)
245 				cmd |= RISC_EOL | RISC_IRQ;
246 			*risc++ = cpu_to_le32(cmd);
247 			addr = snd_pcm_sgbuf_get_addr(substream, offset);
248 			*risc++ = cpu_to_le32(addr);
249 			offset += len;
250 			rest -= len;
251 		} while (rest > 0);
252 	}
253 	*risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
254 	*risc++ = cpu_to_le32(0);
255 	*risc++ = cpu_to_le32(RISC_JUMP);
256 	*risc++ = cpu_to_le32(chip->dma_risc.addr);
257 	chip->line_bytes = period_bytes;
258 	chip->lines = periods;
259 	return 0;
260 }
261 
snd_bt87x_free_risc(struct snd_bt87x * chip)262 static void snd_bt87x_free_risc(struct snd_bt87x *chip)
263 {
264 	if (chip->dma_risc.area) {
265 		snd_dma_free_pages(&chip->dma_risc);
266 		chip->dma_risc.area = NULL;
267 	}
268 }
269 
snd_bt87x_pci_error(struct snd_bt87x * chip,unsigned int status)270 static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status)
271 {
272 	int pci_status = pci_status_get_and_clear_errors(chip->pci);
273 
274 	if (pci_status != PCI_STATUS_DETECTED_PARITY)
275 		dev_err(chip->card->dev,
276 			"Aieee - PCI error! status %#08x, PCI status %#04x\n",
277 			   status & ERROR_INTERRUPTS, pci_status);
278 	else {
279 		dev_err(chip->card->dev,
280 			"Aieee - PCI parity error detected!\n");
281 		/* error 'handling' similar to aic7xxx_pci.c: */
282 		chip->pci_parity_errors++;
283 		if (chip->pci_parity_errors > 20) {
284 			dev_err(chip->card->dev,
285 				"Too many PCI parity errors observed.\n");
286 			dev_err(chip->card->dev,
287 				"Some device on this bus is generating bad parity.\n");
288 			dev_err(chip->card->dev,
289 				"This is an error *observed by*, not *generated by*, this card.\n");
290 			dev_err(chip->card->dev,
291 				"PCI parity error checking has been disabled.\n");
292 			chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
293 			snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
294 		}
295 	}
296 }
297 
snd_bt87x_interrupt(int irq,void * dev_id)298 static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id)
299 {
300 	struct snd_bt87x *chip = dev_id;
301 	unsigned int status, irq_status;
302 
303 	status = snd_bt87x_readl(chip, REG_INT_STAT);
304 	irq_status = status & chip->interrupt_mask;
305 	if (!irq_status)
306 		return IRQ_NONE;
307 	snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
308 
309 	if (irq_status & ERROR_INTERRUPTS) {
310 		if (irq_status & (INT_FBUS | INT_FTRGT))
311 			dev_warn(chip->card->dev,
312 				 "FIFO overrun, status %#08x\n", status);
313 		if (irq_status & INT_OCERR)
314 			dev_err(chip->card->dev,
315 				"internal RISC error, status %#08x\n", status);
316 		if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
317 			snd_bt87x_pci_error(chip, irq_status);
318 	}
319 	if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
320 		int current_block, irq_block;
321 
322 		/* assume that exactly one line has been recorded */
323 		chip->current_line = (chip->current_line + 1) % chip->lines;
324 		/* but check if some interrupts have been skipped */
325 		current_block = chip->current_line * 16 / chip->lines;
326 		irq_block = status >> INT_RISCS_SHIFT;
327 		if (current_block != irq_block)
328 			chip->current_line = DIV_ROUND_UP(irq_block * chip->lines,
329 							  16);
330 
331 		snd_pcm_period_elapsed(chip->substream);
332 	}
333 	return IRQ_HANDLED;
334 }
335 
336 static const struct snd_pcm_hardware snd_bt87x_digital_hw = {
337 	.info = SNDRV_PCM_INFO_MMAP |
338 		SNDRV_PCM_INFO_INTERLEAVED |
339 		SNDRV_PCM_INFO_BLOCK_TRANSFER |
340 		SNDRV_PCM_INFO_MMAP_VALID |
341 		SNDRV_PCM_INFO_BATCH,
342 	.formats = SNDRV_PCM_FMTBIT_S16_LE,
343 	.rates = 0, /* set at runtime */
344 	.channels_min = 2,
345 	.channels_max = 2,
346 	.buffer_bytes_max = 255 * 4092,
347 	.period_bytes_min = 32,
348 	.period_bytes_max = 4092,
349 	.periods_min = 2,
350 	.periods_max = 255,
351 };
352 
353 static const struct snd_pcm_hardware snd_bt87x_analog_hw = {
354 	.info = SNDRV_PCM_INFO_MMAP |
355 		SNDRV_PCM_INFO_INTERLEAVED |
356 		SNDRV_PCM_INFO_BLOCK_TRANSFER |
357 		SNDRV_PCM_INFO_MMAP_VALID |
358 		SNDRV_PCM_INFO_BATCH,
359 	.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
360 	.rates = SNDRV_PCM_RATE_KNOT,
361 	.rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
362 	.rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
363 	.channels_min = 1,
364 	.channels_max = 1,
365 	.buffer_bytes_max = 255 * 4092,
366 	.period_bytes_min = 32,
367 	.period_bytes_max = 4092,
368 	.periods_min = 2,
369 	.periods_max = 255,
370 };
371 
snd_bt87x_set_digital_hw(struct snd_bt87x * chip,struct snd_pcm_runtime * runtime)372 static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
373 {
374 	chip->reg_control |= CTL_DA_IOM_DA | CTL_A_PWRDN;
375 	runtime->hw = snd_bt87x_digital_hw;
376 	runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->board.dig_rate);
377 	runtime->hw.rate_min = chip->board.dig_rate;
378 	runtime->hw.rate_max = chip->board.dig_rate;
379 	return 0;
380 }
381 
snd_bt87x_set_analog_hw(struct snd_bt87x * chip,struct snd_pcm_runtime * runtime)382 static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
383 {
384 	static const struct snd_ratnum analog_clock = {
385 		.num = ANALOG_CLOCK,
386 		.den_min = CLOCK_DIV_MIN,
387 		.den_max = CLOCK_DIV_MAX,
388 		.den_step = 1
389 	};
390 	static const struct snd_pcm_hw_constraint_ratnums constraint_rates = {
391 		.nrats = 1,
392 		.rats = &analog_clock
393 	};
394 
395 	chip->reg_control &= ~(CTL_DA_IOM_DA | CTL_A_PWRDN);
396 	runtime->hw = snd_bt87x_analog_hw;
397 	return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
398 					     &constraint_rates);
399 }
400 
snd_bt87x_pcm_open(struct snd_pcm_substream * substream)401 static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream)
402 {
403 	struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
404 	struct snd_pcm_runtime *runtime = substream->runtime;
405 	int err;
406 
407 	if (test_and_set_bit(0, &chip->opened))
408 		return -EBUSY;
409 
410 	if (substream->pcm->device == DEVICE_DIGITAL)
411 		err = snd_bt87x_set_digital_hw(chip, runtime);
412 	else
413 		err = snd_bt87x_set_analog_hw(chip, runtime);
414 	if (err < 0)
415 		goto _error;
416 
417 	err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
418 	if (err < 0)
419 		goto _error;
420 
421 	chip->substream = substream;
422 	return 0;
423 
424 _error:
425 	clear_bit(0, &chip->opened);
426 	smp_mb__after_atomic();
427 	return err;
428 }
429 
snd_bt87x_close(struct snd_pcm_substream * substream)430 static int snd_bt87x_close(struct snd_pcm_substream *substream)
431 {
432 	struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
433 
434 	spin_lock_irq(&chip->reg_lock);
435 	chip->reg_control |= CTL_A_PWRDN;
436 	snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
437 	spin_unlock_irq(&chip->reg_lock);
438 
439 	chip->substream = NULL;
440 	clear_bit(0, &chip->opened);
441 	smp_mb__after_atomic();
442 	return 0;
443 }
444 
snd_bt87x_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)445 static int snd_bt87x_hw_params(struct snd_pcm_substream *substream,
446 			       struct snd_pcm_hw_params *hw_params)
447 {
448 	struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
449 
450 	return snd_bt87x_create_risc(chip, substream,
451 				     params_periods(hw_params),
452 				     params_period_bytes(hw_params));
453 }
454 
snd_bt87x_hw_free(struct snd_pcm_substream * substream)455 static int snd_bt87x_hw_free(struct snd_pcm_substream *substream)
456 {
457 	struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
458 
459 	snd_bt87x_free_risc(chip);
460 	return 0;
461 }
462 
snd_bt87x_prepare(struct snd_pcm_substream * substream)463 static int snd_bt87x_prepare(struct snd_pcm_substream *substream)
464 {
465 	struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
466 	struct snd_pcm_runtime *runtime = substream->runtime;
467 	int decimation;
468 
469 	spin_lock_irq(&chip->reg_lock);
470 	chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
471 	decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
472 	chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
473 	if (runtime->format == SNDRV_PCM_FORMAT_S8)
474 		chip->reg_control |= CTL_DA_SBR;
475 	snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
476 	spin_unlock_irq(&chip->reg_lock);
477 	return 0;
478 }
479 
snd_bt87x_start(struct snd_bt87x * chip)480 static int snd_bt87x_start(struct snd_bt87x *chip)
481 {
482 	spin_lock(&chip->reg_lock);
483 	chip->current_line = 0;
484 	chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
485 	snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
486 	snd_bt87x_writel(chip, REG_PACKET_LEN,
487 			 chip->line_bytes | (chip->lines << 16));
488 	snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
489 	snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
490 	spin_unlock(&chip->reg_lock);
491 	return 0;
492 }
493 
snd_bt87x_stop(struct snd_bt87x * chip)494 static int snd_bt87x_stop(struct snd_bt87x *chip)
495 {
496 	spin_lock(&chip->reg_lock);
497 	chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
498 	snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
499 	snd_bt87x_writel(chip, REG_INT_MASK, 0);
500 	snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
501 	spin_unlock(&chip->reg_lock);
502 	return 0;
503 }
504 
snd_bt87x_trigger(struct snd_pcm_substream * substream,int cmd)505 static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd)
506 {
507 	struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
508 
509 	switch (cmd) {
510 	case SNDRV_PCM_TRIGGER_START:
511 		return snd_bt87x_start(chip);
512 	case SNDRV_PCM_TRIGGER_STOP:
513 		return snd_bt87x_stop(chip);
514 	default:
515 		return -EINVAL;
516 	}
517 }
518 
snd_bt87x_pointer(struct snd_pcm_substream * substream)519 static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream)
520 {
521 	struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
522 	struct snd_pcm_runtime *runtime = substream->runtime;
523 
524 	return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
525 }
526 
527 static const struct snd_pcm_ops snd_bt87x_pcm_ops = {
528 	.open = snd_bt87x_pcm_open,
529 	.close = snd_bt87x_close,
530 	.hw_params = snd_bt87x_hw_params,
531 	.hw_free = snd_bt87x_hw_free,
532 	.prepare = snd_bt87x_prepare,
533 	.trigger = snd_bt87x_trigger,
534 	.pointer = snd_bt87x_pointer,
535 };
536 
snd_bt87x_capture_volume_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * info)537 static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol,
538 					 struct snd_ctl_elem_info *info)
539 {
540 	info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
541 	info->count = 1;
542 	info->value.integer.min = 0;
543 	info->value.integer.max = 15;
544 	return 0;
545 }
546 
snd_bt87x_capture_volume_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)547 static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol,
548 					struct snd_ctl_elem_value *value)
549 {
550 	struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
551 
552 	value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
553 	return 0;
554 }
555 
snd_bt87x_capture_volume_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)556 static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol,
557 					struct snd_ctl_elem_value *value)
558 {
559 	struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
560 	u32 old_control;
561 	int changed;
562 
563 	spin_lock_irq(&chip->reg_lock);
564 	old_control = chip->reg_control;
565 	chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
566 		| (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
567 	snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
568 	changed = old_control != chip->reg_control;
569 	spin_unlock_irq(&chip->reg_lock);
570 	return changed;
571 }
572 
573 static const struct snd_kcontrol_new snd_bt87x_capture_volume = {
574 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
575 	.name = "Capture Volume",
576 	.info = snd_bt87x_capture_volume_info,
577 	.get = snd_bt87x_capture_volume_get,
578 	.put = snd_bt87x_capture_volume_put,
579 };
580 
581 #define snd_bt87x_capture_boost_info	snd_ctl_boolean_mono_info
582 
snd_bt87x_capture_boost_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)583 static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol,
584 				       struct snd_ctl_elem_value *value)
585 {
586 	struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
587 
588 	value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
589 	return 0;
590 }
591 
snd_bt87x_capture_boost_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)592 static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol,
593 				       struct snd_ctl_elem_value *value)
594 {
595 	struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
596 	u32 old_control;
597 	int changed;
598 
599 	spin_lock_irq(&chip->reg_lock);
600 	old_control = chip->reg_control;
601 	chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
602 		| (value->value.integer.value[0] ? CTL_A_G2X : 0);
603 	snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
604 	changed = chip->reg_control != old_control;
605 	spin_unlock_irq(&chip->reg_lock);
606 	return changed;
607 }
608 
609 static const struct snd_kcontrol_new snd_bt87x_capture_boost = {
610 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
611 	.name = "Capture Boost",
612 	.info = snd_bt87x_capture_boost_info,
613 	.get = snd_bt87x_capture_boost_get,
614 	.put = snd_bt87x_capture_boost_put,
615 };
616 
snd_bt87x_capture_source_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * info)617 static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol,
618 					 struct snd_ctl_elem_info *info)
619 {
620 	static const char *const texts[3] = {"TV Tuner", "FM", "Mic/Line"};
621 
622 	return snd_ctl_enum_info(info, 1, 3, texts);
623 }
624 
snd_bt87x_capture_source_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)625 static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol,
626 					struct snd_ctl_elem_value *value)
627 {
628 	struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
629 
630 	value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
631 	return 0;
632 }
633 
snd_bt87x_capture_source_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * value)634 static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol,
635 					struct snd_ctl_elem_value *value)
636 {
637 	struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
638 	u32 old_control;
639 	int changed;
640 
641 	spin_lock_irq(&chip->reg_lock);
642 	old_control = chip->reg_control;
643 	chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
644 		| (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
645 	snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
646 	changed = chip->reg_control != old_control;
647 	spin_unlock_irq(&chip->reg_lock);
648 	return changed;
649 }
650 
651 static const struct snd_kcontrol_new snd_bt87x_capture_source = {
652 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
653 	.name = "Capture Source",
654 	.info = snd_bt87x_capture_source_info,
655 	.get = snd_bt87x_capture_source_get,
656 	.put = snd_bt87x_capture_source_put,
657 };
658 
snd_bt87x_free(struct snd_card * card)659 static void snd_bt87x_free(struct snd_card *card)
660 {
661 	struct snd_bt87x *chip = card->private_data;
662 
663 	snd_bt87x_stop(chip);
664 }
665 
snd_bt87x_pcm(struct snd_bt87x * chip,int device,char * name)666 static int snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name)
667 {
668 	int err;
669 	struct snd_pcm *pcm;
670 
671 	err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
672 	if (err < 0)
673 		return err;
674 	pcm->private_data = chip;
675 	strcpy(pcm->name, name);
676 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
677 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
678 				       &chip->pci->dev,
679 				       128 * 1024,
680 				       ALIGN(255 * 4092, 1024));
681 	return 0;
682 }
683 
snd_bt87x_create(struct snd_card * card,struct pci_dev * pci)684 static int snd_bt87x_create(struct snd_card *card,
685 			    struct pci_dev *pci)
686 {
687 	struct snd_bt87x *chip = card->private_data;
688 	int err;
689 
690 	err = pcim_enable_device(pci);
691 	if (err < 0)
692 		return err;
693 
694 	chip->card = card;
695 	chip->pci = pci;
696 	chip->irq = -1;
697 	spin_lock_init(&chip->reg_lock);
698 
699 	err = pcim_iomap_regions(pci, 1 << 0, "Bt87x audio");
700 	if (err < 0)
701 		return err;
702 	chip->mmio = pcim_iomap_table(pci)[0];
703 
704 	chip->reg_control = CTL_A_PWRDN | CTL_DA_ES2 |
705 			    CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
706 	chip->interrupt_mask = MY_INTERRUPTS;
707 	snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
708 	snd_bt87x_writel(chip, REG_INT_MASK, 0);
709 	snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
710 
711 	err = devm_request_irq(&pci->dev, pci->irq, snd_bt87x_interrupt,
712 			       IRQF_SHARED, KBUILD_MODNAME, chip);
713 	if (err < 0) {
714 		dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
715 		return err;
716 	}
717 	chip->irq = pci->irq;
718 	card->sync_irq = chip->irq;
719 	card->private_free = snd_bt87x_free;
720 	pci_set_master(pci);
721 
722 	return 0;
723 }
724 
725 #define BT_DEVICE(chip, subvend, subdev, id) \
726 	{ .vendor = PCI_VENDOR_ID_BROOKTREE, \
727 	  .device = chip, \
728 	  .subvendor = subvend, .subdevice = subdev, \
729 	  .driver_data = SND_BT87X_BOARD_ ## id }
730 /* driver_data is the card id for that device */
731 
732 static const struct pci_device_id snd_bt87x_ids[] = {
733 	/* Hauppauge WinTV series */
734 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, GENERIC),
735 	/* Hauppauge WinTV series */
736 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, GENERIC),
737 	/* Viewcast Osprey 200 */
738 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, OSPREY2x0),
739 	/* Viewcast Osprey 440 (rate is configurable via gpio) */
740 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff07, OSPREY440),
741 	/* ATI TV-Wonder */
742 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, GENERIC),
743 	/* Leadtek Winfast tv 2000xp delux */
744 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, GENERIC),
745 	/* Pinnacle PCTV */
746 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x11bd, 0x0012, GENERIC),
747 	/* Voodoo TV 200 */
748 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, GENERIC),
749 	/* Askey Computer Corp. MagicTView'99 */
750 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x144f, 0x3000, GENERIC),
751 	/* AVerMedia Studio No. 103, 203, ...? */
752 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, AVPHONE98),
753 	/* Prolink PixelView PV-M4900 */
754 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1554, 0x4011, GENERIC),
755 	/* Pinnacle  Studio PCTV rave */
756 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0xbd11, 0x1200, GENERIC),
757 	{ }
758 };
759 MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
760 
761 /* cards known not to have audio
762  * (DVB cards use the audio function to transfer MPEG data) */
763 static struct {
764 	unsigned short subvendor, subdevice;
765 } denylist[] = {
766 	{0x0071, 0x0101}, /* Nebula Electronics DigiTV */
767 	{0x11bd, 0x001c}, /* Pinnacle PCTV Sat */
768 	{0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
769 	{0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
770 	{0x1461, 0x0771}, /* AVermedia DVB-T 771 */
771 	{0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
772 	{0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */
773 	{0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
774 	{0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */
775 	{0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
776 	{0x7063, 0x2000}, /* pcHDTV HD-2000 TV */
777 };
778 
779 static struct pci_driver driver;
780 
781 /* return the id of the card, or a negative value if it's on the denylist */
snd_bt87x_detect_card(struct pci_dev * pci)782 static int snd_bt87x_detect_card(struct pci_dev *pci)
783 {
784 	int i;
785 	const struct pci_device_id *supported;
786 
787 	supported = pci_match_id(snd_bt87x_ids, pci);
788 	if (supported && supported->driver_data > 0)
789 		return supported->driver_data;
790 
791 	for (i = 0; i < ARRAY_SIZE(denylist); ++i)
792 		if (denylist[i].subvendor == pci->subsystem_vendor &&
793 		    denylist[i].subdevice == pci->subsystem_device) {
794 			dev_dbg(&pci->dev,
795 				"card %#04x-%#04x:%#04x has no audio\n",
796 				    pci->device, pci->subsystem_vendor, pci->subsystem_device);
797 			return -EBUSY;
798 		}
799 
800 	dev_info(&pci->dev, "unknown card %#04x-%#04x:%#04x\n",
801 		   pci->device, pci->subsystem_vendor, pci->subsystem_device);
802 	dev_info(&pci->dev, "please mail id, board name, and, "
803 		   "if it works, the correct digital_rate option to "
804 		   "<alsa-devel@alsa-project.org>\n");
805 	return SND_BT87X_BOARD_UNKNOWN;
806 }
807 
__snd_bt87x_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)808 static int __snd_bt87x_probe(struct pci_dev *pci,
809 			     const struct pci_device_id *pci_id)
810 {
811 	static int dev;
812 	struct snd_card *card;
813 	struct snd_bt87x *chip;
814 	int err;
815 	enum snd_bt87x_boardid boardid;
816 
817 	if (!pci_id->driver_data) {
818 		err = snd_bt87x_detect_card(pci);
819 		if (err < 0)
820 			return -ENODEV;
821 		boardid = err;
822 	} else
823 		boardid = pci_id->driver_data;
824 
825 	if (dev >= SNDRV_CARDS)
826 		return -ENODEV;
827 	if (!enable[dev]) {
828 		++dev;
829 		return -ENOENT;
830 	}
831 
832 	err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
833 				sizeof(*chip), &card);
834 	if (err < 0)
835 		return err;
836 	chip = card->private_data;
837 
838 	err = snd_bt87x_create(card, pci);
839 	if (err < 0)
840 		return err;
841 
842 	memcpy(&chip->board, &snd_bt87x_boards[boardid], sizeof(chip->board));
843 
844 	if (!chip->board.no_digital) {
845 		if (digital_rate[dev] > 0)
846 			chip->board.dig_rate = digital_rate[dev];
847 
848 		chip->reg_control |= chip->board.digital_fmt;
849 
850 		err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
851 		if (err < 0)
852 			return err;
853 	}
854 	if (!chip->board.no_analog) {
855 		err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
856 		if (err < 0)
857 			return err;
858 		err = snd_ctl_add(card, snd_ctl_new1(
859 				  &snd_bt87x_capture_volume, chip));
860 		if (err < 0)
861 			return err;
862 		err = snd_ctl_add(card, snd_ctl_new1(
863 				  &snd_bt87x_capture_boost, chip));
864 		if (err < 0)
865 			return err;
866 		err = snd_ctl_add(card, snd_ctl_new1(
867 				  &snd_bt87x_capture_source, chip));
868 		if (err < 0)
869 			return err;
870 	}
871 	dev_info(card->dev, "bt87x%d: Using board %d, %sanalog, %sdigital "
872 		   "(rate %d Hz)\n", dev, boardid,
873 		   chip->board.no_analog ? "no " : "",
874 		   chip->board.no_digital ? "no " : "", chip->board.dig_rate);
875 
876 	strcpy(card->driver, "Bt87x");
877 	sprintf(card->shortname, "Brooktree Bt%x", pci->device);
878 	sprintf(card->longname, "%s at %#llx, irq %i",
879 		card->shortname, (unsigned long long)pci_resource_start(pci, 0),
880 		chip->irq);
881 	strcpy(card->mixername, "Bt87x");
882 
883 	err = snd_card_register(card);
884 	if (err < 0)
885 		return err;
886 
887 	pci_set_drvdata(pci, card);
888 	++dev;
889 	return 0;
890 }
891 
snd_bt87x_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)892 static int snd_bt87x_probe(struct pci_dev *pci,
893 			   const struct pci_device_id *pci_id)
894 {
895 	return snd_card_free_on_error(&pci->dev, __snd_bt87x_probe(pci, pci_id));
896 }
897 
898 /* default entries for all Bt87x cards - it's not exported */
899 /* driver_data is set to 0 to call detection */
900 static const struct pci_device_id snd_bt87x_default_ids[] = {
901 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
902 	BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
903 	{ }
904 };
905 
906 static struct pci_driver driver = {
907 	.name = KBUILD_MODNAME,
908 	.id_table = snd_bt87x_ids,
909 	.probe = snd_bt87x_probe,
910 };
911 
alsa_card_bt87x_init(void)912 static int __init alsa_card_bt87x_init(void)
913 {
914 	if (load_all)
915 		driver.id_table = snd_bt87x_default_ids;
916 	return pci_register_driver(&driver);
917 }
918 
alsa_card_bt87x_exit(void)919 static void __exit alsa_card_bt87x_exit(void)
920 {
921 	pci_unregister_driver(&driver);
922 }
923 
924 module_init(alsa_card_bt87x_init)
925 module_exit(alsa_card_bt87x_exit)
926