1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell RVU Ethernet driver
3 *
4 * Copyright (C) 2020 Marvell.
5 *
6 */
7
8 #include <linux/pci.h>
9 #include <linux/ethtool.h>
10 #include <linux/stddef.h>
11 #include <linux/etherdevice.h>
12 #include <linux/log2.h>
13 #include <linux/net_tstamp.h>
14 #include <linux/linkmode.h>
15
16 #include "otx2_common.h"
17 #include "otx2_ptp.h"
18
19 #define DRV_NAME "rvu-nicpf"
20 #define DRV_VF_NAME "rvu-nicvf"
21
22 struct otx2_stat {
23 char name[ETH_GSTRING_LEN];
24 unsigned int index;
25 };
26
27 /* HW device stats */
28 #define OTX2_DEV_STAT(stat) { \
29 .name = #stat, \
30 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \
31 }
32
33 enum link_mode {
34 OTX2_MODE_SUPPORTED,
35 OTX2_MODE_ADVERTISED
36 };
37
38 static const struct otx2_stat otx2_dev_stats[] = {
39 OTX2_DEV_STAT(rx_ucast_frames),
40 OTX2_DEV_STAT(rx_bcast_frames),
41 OTX2_DEV_STAT(rx_mcast_frames),
42
43 OTX2_DEV_STAT(tx_ucast_frames),
44 OTX2_DEV_STAT(tx_bcast_frames),
45 OTX2_DEV_STAT(tx_mcast_frames),
46 };
47
48 /* Driver level stats */
49 #define OTX2_DRV_STAT(stat) { \
50 .name = #stat, \
51 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \
52 }
53
54 static const struct otx2_stat otx2_drv_stats[] = {
55 OTX2_DRV_STAT(rx_fcs_errs),
56 OTX2_DRV_STAT(rx_oversize_errs),
57 OTX2_DRV_STAT(rx_undersize_errs),
58 OTX2_DRV_STAT(rx_csum_errs),
59 OTX2_DRV_STAT(rx_len_errs),
60 OTX2_DRV_STAT(rx_other_errs),
61 };
62
63 static const struct otx2_stat otx2_queue_stats[] = {
64 { "bytes", 0 },
65 { "frames", 1 },
66 };
67
68 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats);
69 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats);
70 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats);
71
72 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf);
73
otx2_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)74 static void otx2_get_drvinfo(struct net_device *netdev,
75 struct ethtool_drvinfo *info)
76 {
77 struct otx2_nic *pfvf = netdev_priv(netdev);
78
79 strscpy(info->driver, DRV_NAME, sizeof(info->driver));
80 strscpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info));
81 }
82
otx2_get_qset_strings(struct otx2_nic * pfvf,u8 ** data,int qset)83 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset)
84 {
85 int start_qidx = qset * pfvf->hw.rx_queues;
86 int qidx, stats;
87
88 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) {
89 for (stats = 0; stats < otx2_n_queue_stats; stats++) {
90 sprintf(*data, "rxq%d: %s", qidx + start_qidx,
91 otx2_queue_stats[stats].name);
92 *data += ETH_GSTRING_LEN;
93 }
94 }
95
96 for (qidx = 0; qidx < otx2_get_total_tx_queues(pfvf); qidx++) {
97 for (stats = 0; stats < otx2_n_queue_stats; stats++) {
98 if (qidx >= pfvf->hw.non_qos_queues)
99 sprintf(*data, "txq_qos%d: %s",
100 qidx + start_qidx - pfvf->hw.non_qos_queues,
101 otx2_queue_stats[stats].name);
102 else
103 sprintf(*data, "txq%d: %s", qidx + start_qidx,
104 otx2_queue_stats[stats].name);
105 *data += ETH_GSTRING_LEN;
106 }
107 }
108 }
109
otx2_get_strings(struct net_device * netdev,u32 sset,u8 * data)110 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data)
111 {
112 struct otx2_nic *pfvf = netdev_priv(netdev);
113 int stats;
114
115 if (sset != ETH_SS_STATS)
116 return;
117
118 for (stats = 0; stats < otx2_n_dev_stats; stats++) {
119 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN);
120 data += ETH_GSTRING_LEN;
121 }
122
123 for (stats = 0; stats < otx2_n_drv_stats; stats++) {
124 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN);
125 data += ETH_GSTRING_LEN;
126 }
127
128 otx2_get_qset_strings(pfvf, &data, 0);
129
130 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) {
131 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) {
132 sprintf(data, "cgx_rxstat%d: ", stats);
133 data += ETH_GSTRING_LEN;
134 }
135
136 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) {
137 sprintf(data, "cgx_txstat%d: ", stats);
138 data += ETH_GSTRING_LEN;
139 }
140 }
141
142 strcpy(data, "reset_count");
143 data += ETH_GSTRING_LEN;
144 sprintf(data, "Fec Corrected Errors: ");
145 data += ETH_GSTRING_LEN;
146 sprintf(data, "Fec Uncorrected Errors: ");
147 data += ETH_GSTRING_LEN;
148 }
149
otx2_get_qset_stats(struct otx2_nic * pfvf,struct ethtool_stats * stats,u64 ** data)150 static void otx2_get_qset_stats(struct otx2_nic *pfvf,
151 struct ethtool_stats *stats, u64 **data)
152 {
153 int stat, qidx;
154
155 if (!pfvf)
156 return;
157 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) {
158 if (!otx2_update_rq_stats(pfvf, qidx)) {
159 for (stat = 0; stat < otx2_n_queue_stats; stat++)
160 *((*data)++) = 0;
161 continue;
162 }
163 for (stat = 0; stat < otx2_n_queue_stats; stat++)
164 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats)
165 [otx2_queue_stats[stat].index];
166 }
167
168 for (qidx = 0; qidx < otx2_get_total_tx_queues(pfvf); qidx++) {
169 if (!otx2_update_sq_stats(pfvf, qidx)) {
170 for (stat = 0; stat < otx2_n_queue_stats; stat++)
171 *((*data)++) = 0;
172 continue;
173 }
174 for (stat = 0; stat < otx2_n_queue_stats; stat++)
175 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats)
176 [otx2_queue_stats[stat].index];
177 }
178 }
179
otx2_get_phy_fec_stats(struct otx2_nic * pfvf)180 static int otx2_get_phy_fec_stats(struct otx2_nic *pfvf)
181 {
182 struct msg_req *req;
183 int rc = -ENOMEM;
184
185 mutex_lock(&pfvf->mbox.lock);
186 req = otx2_mbox_alloc_msg_cgx_get_phy_fec_stats(&pfvf->mbox);
187 if (!req)
188 goto end;
189
190 if (!otx2_sync_mbox_msg(&pfvf->mbox))
191 rc = 0;
192 end:
193 mutex_unlock(&pfvf->mbox.lock);
194 return rc;
195 }
196
197 /* Get device and per queue statistics */
otx2_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)198 static void otx2_get_ethtool_stats(struct net_device *netdev,
199 struct ethtool_stats *stats, u64 *data)
200 {
201 struct otx2_nic *pfvf = netdev_priv(netdev);
202 u64 fec_corr_blks, fec_uncorr_blks;
203 struct cgx_fw_data *rsp;
204 int stat;
205
206 otx2_get_dev_stats(pfvf);
207 for (stat = 0; stat < otx2_n_dev_stats; stat++)
208 *(data++) = ((u64 *)&pfvf->hw.dev_stats)
209 [otx2_dev_stats[stat].index];
210
211 for (stat = 0; stat < otx2_n_drv_stats; stat++)
212 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats)
213 [otx2_drv_stats[stat].index]);
214
215 otx2_get_qset_stats(pfvf, stats, &data);
216
217 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) {
218 otx2_update_lmac_stats(pfvf);
219 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++)
220 *(data++) = pfvf->hw.cgx_rx_stats[stat];
221 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++)
222 *(data++) = pfvf->hw.cgx_tx_stats[stat];
223 }
224
225 *(data++) = pfvf->reset_count;
226
227 fec_corr_blks = pfvf->hw.cgx_fec_corr_blks;
228 fec_uncorr_blks = pfvf->hw.cgx_fec_uncorr_blks;
229
230 rsp = otx2_get_fwdata(pfvf);
231 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats &&
232 !otx2_get_phy_fec_stats(pfvf)) {
233 /* Fetch fwdata again because it's been recently populated with
234 * latest PHY FEC stats.
235 */
236 rsp = otx2_get_fwdata(pfvf);
237 if (!IS_ERR(rsp)) {
238 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats;
239
240 if (pfvf->linfo.fec == OTX2_FEC_BASER) {
241 fec_corr_blks = p->brfec_corr_blks;
242 fec_uncorr_blks = p->brfec_uncorr_blks;
243 } else {
244 fec_corr_blks = p->rsfec_corr_cws;
245 fec_uncorr_blks = p->rsfec_uncorr_cws;
246 }
247 }
248 }
249
250 *(data++) = fec_corr_blks;
251 *(data++) = fec_uncorr_blks;
252 }
253
otx2_get_sset_count(struct net_device * netdev,int sset)254 static int otx2_get_sset_count(struct net_device *netdev, int sset)
255 {
256 struct otx2_nic *pfvf = netdev_priv(netdev);
257 int qstats_count, mac_stats = 0;
258
259 if (sset != ETH_SS_STATS)
260 return -EINVAL;
261
262 qstats_count = otx2_n_queue_stats *
263 (pfvf->hw.rx_queues + otx2_get_total_tx_queues(pfvf));
264 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag))
265 mac_stats = CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT;
266 otx2_update_lmac_fec_stats(pfvf);
267
268 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count +
269 mac_stats + OTX2_FEC_STATS_CNT + 1;
270 }
271
272 /* Get no of queues device supports and current queue count */
otx2_get_channels(struct net_device * dev,struct ethtool_channels * channel)273 static void otx2_get_channels(struct net_device *dev,
274 struct ethtool_channels *channel)
275 {
276 struct otx2_nic *pfvf = netdev_priv(dev);
277
278 channel->max_rx = pfvf->hw.max_queues;
279 channel->max_tx = pfvf->hw.max_queues;
280
281 channel->rx_count = pfvf->hw.rx_queues;
282 channel->tx_count = pfvf->hw.tx_queues;
283 }
284
285 /* Set no of Tx, Rx queues to be used */
otx2_set_channels(struct net_device * dev,struct ethtool_channels * channel)286 static int otx2_set_channels(struct net_device *dev,
287 struct ethtool_channels *channel)
288 {
289 struct otx2_nic *pfvf = netdev_priv(dev);
290 bool if_up = netif_running(dev);
291 int err, qos_txqs;
292
293 if (!channel->rx_count || !channel->tx_count)
294 return -EINVAL;
295
296 if (bitmap_weight(&pfvf->rq_bmap, pfvf->hw.rx_queues) > 1) {
297 netdev_err(dev,
298 "Receive queues are in use by TC police action\n");
299 return -EINVAL;
300 }
301
302 if (if_up)
303 dev->netdev_ops->ndo_stop(dev);
304
305 qos_txqs = bitmap_weight(pfvf->qos.qos_sq_bmap,
306 OTX2_QOS_MAX_LEAF_NODES);
307
308 err = otx2_set_real_num_queues(dev, channel->tx_count + qos_txqs,
309 channel->rx_count);
310 if (err)
311 return err;
312
313 pfvf->hw.rx_queues = channel->rx_count;
314 pfvf->hw.tx_queues = channel->tx_count;
315 if (pfvf->xdp_prog)
316 pfvf->hw.xdp_queues = channel->rx_count;
317
318 if (if_up)
319 err = dev->netdev_ops->ndo_open(dev);
320
321 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n",
322 pfvf->hw.tx_queues, pfvf->hw.rx_queues);
323
324 return err;
325 }
326
otx2_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)327 static void otx2_get_pauseparam(struct net_device *netdev,
328 struct ethtool_pauseparam *pause)
329 {
330 struct otx2_nic *pfvf = netdev_priv(netdev);
331 struct cgx_pause_frm_cfg *req, *rsp;
332
333 if (is_otx2_lbkvf(pfvf->pdev))
334 return;
335
336 mutex_lock(&pfvf->mbox.lock);
337 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox);
338 if (!req) {
339 mutex_unlock(&pfvf->mbox.lock);
340 return;
341 }
342
343 if (!otx2_sync_mbox_msg(&pfvf->mbox)) {
344 rsp = (struct cgx_pause_frm_cfg *)
345 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr);
346 if (IS_ERR(rsp)) {
347 mutex_unlock(&pfvf->mbox.lock);
348 return;
349 }
350
351 pause->rx_pause = rsp->rx_pause;
352 pause->tx_pause = rsp->tx_pause;
353 }
354 mutex_unlock(&pfvf->mbox.lock);
355 }
356
otx2_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)357 static int otx2_set_pauseparam(struct net_device *netdev,
358 struct ethtool_pauseparam *pause)
359 {
360 struct otx2_nic *pfvf = netdev_priv(netdev);
361
362 if (pause->autoneg)
363 return -EOPNOTSUPP;
364
365 if (is_otx2_lbkvf(pfvf->pdev))
366 return -EOPNOTSUPP;
367
368 if (pause->rx_pause)
369 pfvf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED;
370 else
371 pfvf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED;
372
373 if (pause->tx_pause)
374 pfvf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED;
375 else
376 pfvf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED;
377
378 return otx2_config_pause_frm(pfvf);
379 }
380
otx2_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)381 static void otx2_get_ringparam(struct net_device *netdev,
382 struct ethtool_ringparam *ring,
383 struct kernel_ethtool_ringparam *kernel_ring,
384 struct netlink_ext_ack *extack)
385 {
386 struct otx2_nic *pfvf = netdev_priv(netdev);
387 struct otx2_qset *qs = &pfvf->qset;
388
389 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX);
390 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256);
391 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX);
392 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K);
393 kernel_ring->rx_buf_len = pfvf->hw.rbuf_len;
394 kernel_ring->cqe_size = pfvf->hw.xqe_size;
395 }
396
otx2_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)397 static int otx2_set_ringparam(struct net_device *netdev,
398 struct ethtool_ringparam *ring,
399 struct kernel_ethtool_ringparam *kernel_ring,
400 struct netlink_ext_ack *extack)
401 {
402 struct otx2_nic *pfvf = netdev_priv(netdev);
403 u32 rx_buf_len = kernel_ring->rx_buf_len;
404 u32 old_rx_buf_len = pfvf->hw.rbuf_len;
405 u32 xqe_size = kernel_ring->cqe_size;
406 bool if_up = netif_running(netdev);
407 struct otx2_qset *qs = &pfvf->qset;
408 u32 rx_count, tx_count;
409
410 if (ring->rx_mini_pending || ring->rx_jumbo_pending)
411 return -EINVAL;
412
413 /* Hardware supports max size of 32k for a receive buffer
414 * and 1536 is typical ethernet frame size.
415 */
416 if (rx_buf_len && (rx_buf_len < 1536 || rx_buf_len > 32768)) {
417 netdev_err(netdev,
418 "Receive buffer range is 1536 - 32768");
419 return -EINVAL;
420 }
421
422 if (xqe_size != 128 && xqe_size != 512) {
423 netdev_err(netdev,
424 "Completion event size must be 128 or 512");
425 return -EINVAL;
426 }
427
428 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */
429 rx_count = ring->rx_pending;
430 /* On some silicon variants a skid or reserved CQEs are
431 * needed to avoid CQ overflow.
432 */
433 if (rx_count < pfvf->hw.rq_skid)
434 rx_count = pfvf->hw.rq_skid;
435 rx_count = Q_COUNT(Q_SIZE(rx_count, 3));
436
437 /* Due pipelining impact minimum 2000 unused SQ CQE's
438 * need to be maintained to avoid CQ overflow, hence the
439 * minimum 4K size.
440 */
441 tx_count = clamp_t(u32, ring->tx_pending,
442 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX));
443 tx_count = Q_COUNT(Q_SIZE(tx_count, 3));
444
445 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt &&
446 rx_buf_len == old_rx_buf_len && xqe_size == pfvf->hw.xqe_size)
447 return 0;
448
449 if (if_up)
450 netdev->netdev_ops->ndo_stop(netdev);
451
452 /* Assigned to the nearest possible exponent. */
453 qs->sqe_cnt = tx_count;
454 qs->rqe_cnt = rx_count;
455
456 pfvf->hw.rbuf_len = rx_buf_len;
457 pfvf->hw.xqe_size = xqe_size;
458
459 if (if_up)
460 return netdev->netdev_ops->ndo_open(netdev);
461
462 return 0;
463 }
464
otx2_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * cmd,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)465 static int otx2_get_coalesce(struct net_device *netdev,
466 struct ethtool_coalesce *cmd,
467 struct kernel_ethtool_coalesce *kernel_coal,
468 struct netlink_ext_ack *extack)
469 {
470 struct otx2_nic *pfvf = netdev_priv(netdev);
471 struct otx2_hw *hw = &pfvf->hw;
472
473 cmd->rx_coalesce_usecs = hw->cq_time_wait;
474 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait;
475 cmd->tx_coalesce_usecs = hw->cq_time_wait;
476 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait;
477 if ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) ==
478 OTX2_FLAG_ADPTV_INT_COAL_ENABLED) {
479 cmd->use_adaptive_rx_coalesce = 1;
480 cmd->use_adaptive_tx_coalesce = 1;
481 } else {
482 cmd->use_adaptive_rx_coalesce = 0;
483 cmd->use_adaptive_tx_coalesce = 0;
484 }
485
486 return 0;
487 }
488
otx2_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)489 static int otx2_set_coalesce(struct net_device *netdev,
490 struct ethtool_coalesce *ec,
491 struct kernel_ethtool_coalesce *kernel_coal,
492 struct netlink_ext_ack *extack)
493 {
494 struct otx2_nic *pfvf = netdev_priv(netdev);
495 struct otx2_hw *hw = &pfvf->hw;
496 u8 priv_coalesce_status;
497 int qidx;
498
499 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames)
500 return 0;
501
502 if (ec->use_adaptive_rx_coalesce != ec->use_adaptive_tx_coalesce) {
503 netdev_err(netdev,
504 "adaptive-rx should be same as adaptive-tx");
505 return -EINVAL;
506 }
507
508 /* Check and update coalesce status */
509 if ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) ==
510 OTX2_FLAG_ADPTV_INT_COAL_ENABLED) {
511 priv_coalesce_status = 1;
512 if (!ec->use_adaptive_rx_coalesce)
513 pfvf->flags &= ~OTX2_FLAG_ADPTV_INT_COAL_ENABLED;
514 } else {
515 priv_coalesce_status = 0;
516 if (ec->use_adaptive_rx_coalesce)
517 pfvf->flags |= OTX2_FLAG_ADPTV_INT_COAL_ENABLED;
518 }
519
520 /* 'cq_time_wait' is 8bit and is in multiple of 100ns,
521 * so clamp the user given value to the range of 1 to 25usec.
522 */
523 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs,
524 1, CQ_TIMER_THRESH_MAX);
525 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs,
526 1, CQ_TIMER_THRESH_MAX);
527
528 /* Rx and Tx are mapped to same CQ, check which one
529 * is changed, if both then choose the min.
530 */
531 if (hw->cq_time_wait == ec->rx_coalesce_usecs)
532 hw->cq_time_wait = ec->tx_coalesce_usecs;
533 else if (hw->cq_time_wait == ec->tx_coalesce_usecs)
534 hw->cq_time_wait = ec->rx_coalesce_usecs;
535 else
536 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs,
537 ec->tx_coalesce_usecs);
538
539 /* Max ecount_wait supported is 16bit,
540 * so clamp the user given value to the range of 1 to 64k.
541 */
542 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames,
543 1, NAPI_POLL_WEIGHT);
544 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames,
545 1, NAPI_POLL_WEIGHT);
546
547 /* Rx and Tx are mapped to same CQ, check which one
548 * is changed, if both then choose the min.
549 */
550 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames)
551 hw->cq_ecount_wait = ec->tx_max_coalesced_frames;
552 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames)
553 hw->cq_ecount_wait = ec->rx_max_coalesced_frames;
554 else
555 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames,
556 ec->tx_max_coalesced_frames);
557
558 /* Reset 'cq_time_wait' and 'cq_ecount_wait' to
559 * default values if coalesce status changed from
560 * 'on' to 'off'.
561 */
562 if (priv_coalesce_status &&
563 ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) !=
564 OTX2_FLAG_ADPTV_INT_COAL_ENABLED)) {
565 hw->cq_time_wait = CQ_TIMER_THRESH_DEFAULT;
566 hw->cq_ecount_wait = CQ_CQE_THRESH_DEFAULT;
567 }
568
569 if (netif_running(netdev)) {
570 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++)
571 otx2_config_irq_coalescing(pfvf, qidx);
572 }
573
574 return 0;
575 }
576
otx2_get_rss_hash_opts(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc)577 static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf,
578 struct ethtool_rxnfc *nfc)
579 {
580 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
581
582 if (!(rss->flowkey_cfg &
583 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6)))
584 return 0;
585
586 /* Mimimum is IPv4 and IPv6, SIP/DIP */
587 nfc->data = RXH_IP_SRC | RXH_IP_DST;
588 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_VLAN)
589 nfc->data |= RXH_VLAN;
590
591 switch (nfc->flow_type) {
592 case TCP_V4_FLOW:
593 case TCP_V6_FLOW:
594 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP)
595 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
596 break;
597 case UDP_V4_FLOW:
598 case UDP_V6_FLOW:
599 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP)
600 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
601 break;
602 case SCTP_V4_FLOW:
603 case SCTP_V6_FLOW:
604 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP)
605 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
606 break;
607 case AH_ESP_V4_FLOW:
608 case AH_ESP_V6_FLOW:
609 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_ESP)
610 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
611 break;
612 case AH_V4_FLOW:
613 case ESP_V4_FLOW:
614 case IPV4_FLOW:
615 break;
616 case AH_V6_FLOW:
617 case ESP_V6_FLOW:
618 case IPV6_FLOW:
619 break;
620 default:
621 return -EINVAL;
622 }
623
624 return 0;
625 }
626
otx2_set_rss_hash_opts(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc)627 static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf,
628 struct ethtool_rxnfc *nfc)
629 {
630 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
631 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3;
632 u32 rss_cfg = rss->flowkey_cfg;
633
634 if (!rss->enable) {
635 netdev_err(pfvf->netdev,
636 "RSS is disabled, cannot change settings\n");
637 return -EIO;
638 }
639
640 /* Mimimum is IPv4 and IPv6, SIP/DIP */
641 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST))
642 return -EINVAL;
643
644 if (nfc->data & RXH_VLAN)
645 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN;
646 else
647 rss_cfg &= ~NIX_FLOW_KEY_TYPE_VLAN;
648
649 switch (nfc->flow_type) {
650 case TCP_V4_FLOW:
651 case TCP_V6_FLOW:
652 /* Different config for v4 and v6 is not supported.
653 * Both of them have to be either 4-tuple or 2-tuple.
654 */
655 switch (nfc->data & rxh_l4) {
656 case 0:
657 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP;
658 break;
659 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
660 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP;
661 break;
662 default:
663 return -EINVAL;
664 }
665 break;
666 case UDP_V4_FLOW:
667 case UDP_V6_FLOW:
668 switch (nfc->data & rxh_l4) {
669 case 0:
670 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP;
671 break;
672 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
673 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP;
674 break;
675 default:
676 return -EINVAL;
677 }
678 break;
679 case SCTP_V4_FLOW:
680 case SCTP_V6_FLOW:
681 switch (nfc->data & rxh_l4) {
682 case 0:
683 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP;
684 break;
685 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
686 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP;
687 break;
688 default:
689 return -EINVAL;
690 }
691 break;
692 case AH_ESP_V4_FLOW:
693 case AH_ESP_V6_FLOW:
694 switch (nfc->data & rxh_l4) {
695 case 0:
696 rss_cfg &= ~(NIX_FLOW_KEY_TYPE_ESP |
697 NIX_FLOW_KEY_TYPE_AH);
698 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN |
699 NIX_FLOW_KEY_TYPE_IPV4_PROTO;
700 break;
701 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
702 /* If VLAN hashing is also requested for ESP then do not
703 * allow because of hardware 40 bytes flow key limit.
704 */
705 if (rss_cfg & NIX_FLOW_KEY_TYPE_VLAN) {
706 netdev_err(pfvf->netdev,
707 "RSS hash of ESP or AH with VLAN is not supported\n");
708 return -EOPNOTSUPP;
709 }
710
711 rss_cfg |= NIX_FLOW_KEY_TYPE_ESP | NIX_FLOW_KEY_TYPE_AH;
712 /* Disable IPv4 proto hashing since IPv6 SA+DA(32 bytes)
713 * and ESP SPI+sequence(8 bytes) uses hardware maximum
714 * limit of 40 byte flow key.
715 */
716 rss_cfg &= ~NIX_FLOW_KEY_TYPE_IPV4_PROTO;
717 break;
718 default:
719 return -EINVAL;
720 }
721 break;
722 case IPV4_FLOW:
723 case IPV6_FLOW:
724 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6;
725 break;
726 default:
727 return -EINVAL;
728 }
729
730 rss->flowkey_cfg = rss_cfg;
731 otx2_set_flowkey_cfg(pfvf);
732 return 0;
733 }
734
otx2_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * nfc,u32 * rules)735 static int otx2_get_rxnfc(struct net_device *dev,
736 struct ethtool_rxnfc *nfc, u32 *rules)
737 {
738 bool ntuple = !!(dev->features & NETIF_F_NTUPLE);
739 struct otx2_nic *pfvf = netdev_priv(dev);
740 int ret = -EOPNOTSUPP;
741
742 switch (nfc->cmd) {
743 case ETHTOOL_GRXRINGS:
744 nfc->data = pfvf->hw.rx_queues;
745 ret = 0;
746 break;
747 case ETHTOOL_GRXCLSRLCNT:
748 if (netif_running(dev) && ntuple) {
749 nfc->rule_cnt = pfvf->flow_cfg->nr_flows;
750 ret = 0;
751 }
752 break;
753 case ETHTOOL_GRXCLSRULE:
754 if (netif_running(dev) && ntuple)
755 ret = otx2_get_flow(pfvf, nfc, nfc->fs.location);
756 break;
757 case ETHTOOL_GRXCLSRLALL:
758 if (netif_running(dev) && ntuple)
759 ret = otx2_get_all_flows(pfvf, nfc, rules);
760 break;
761 case ETHTOOL_GRXFH:
762 return otx2_get_rss_hash_opts(pfvf, nfc);
763 default:
764 break;
765 }
766 return ret;
767 }
768
otx2_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * nfc)769 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc)
770 {
771 bool ntuple = !!(dev->features & NETIF_F_NTUPLE);
772 struct otx2_nic *pfvf = netdev_priv(dev);
773 int ret = -EOPNOTSUPP;
774
775 pfvf->flow_cfg->ntuple = ntuple;
776 switch (nfc->cmd) {
777 case ETHTOOL_SRXFH:
778 ret = otx2_set_rss_hash_opts(pfvf, nfc);
779 break;
780 case ETHTOOL_SRXCLSRLINS:
781 if (netif_running(dev) && ntuple)
782 ret = otx2_add_flow(pfvf, nfc);
783 break;
784 case ETHTOOL_SRXCLSRLDEL:
785 if (netif_running(dev) && ntuple)
786 ret = otx2_remove_flow(pfvf, nfc->fs.location);
787 break;
788 default:
789 break;
790 }
791
792 return ret;
793 }
794
otx2_get_rxfh_key_size(struct net_device * netdev)795 static u32 otx2_get_rxfh_key_size(struct net_device *netdev)
796 {
797 struct otx2_nic *pfvf = netdev_priv(netdev);
798 struct otx2_rss_info *rss;
799
800 rss = &pfvf->hw.rss_info;
801
802 return sizeof(rss->key);
803 }
804
otx2_get_rxfh_indir_size(struct net_device * dev)805 static u32 otx2_get_rxfh_indir_size(struct net_device *dev)
806 {
807 return MAX_RSS_INDIR_TBL_SIZE;
808 }
809
otx2_rss_ctx_delete(struct otx2_nic * pfvf,int ctx_id)810 static int otx2_rss_ctx_delete(struct otx2_nic *pfvf, int ctx_id)
811 {
812 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
813
814 otx2_rss_ctx_flow_del(pfvf, ctx_id);
815 kfree(rss->rss_ctx[ctx_id]);
816 rss->rss_ctx[ctx_id] = NULL;
817
818 return 0;
819 }
820
otx2_rss_ctx_create(struct otx2_nic * pfvf,u32 * rss_context)821 static int otx2_rss_ctx_create(struct otx2_nic *pfvf,
822 u32 *rss_context)
823 {
824 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
825 u8 ctx;
826
827 for (ctx = 0; ctx < MAX_RSS_GROUPS; ctx++) {
828 if (!rss->rss_ctx[ctx])
829 break;
830 }
831 if (ctx == MAX_RSS_GROUPS)
832 return -EINVAL;
833
834 rss->rss_ctx[ctx] = kzalloc(sizeof(*rss->rss_ctx[ctx]), GFP_KERNEL);
835 if (!rss->rss_ctx[ctx])
836 return -ENOMEM;
837 *rss_context = ctx;
838
839 return 0;
840 }
841
842 /* RSS context configuration */
otx2_set_rxfh_context(struct net_device * dev,const u32 * indir,const u8 * hkey,const u8 hfunc,u32 * rss_context,bool delete)843 static int otx2_set_rxfh_context(struct net_device *dev, const u32 *indir,
844 const u8 *hkey, const u8 hfunc,
845 u32 *rss_context, bool delete)
846 {
847 struct otx2_nic *pfvf = netdev_priv(dev);
848 struct otx2_rss_ctx *rss_ctx;
849 struct otx2_rss_info *rss;
850 int ret, idx;
851
852 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
853 return -EOPNOTSUPP;
854
855 if (*rss_context != ETH_RXFH_CONTEXT_ALLOC &&
856 *rss_context >= MAX_RSS_GROUPS)
857 return -EINVAL;
858
859 rss = &pfvf->hw.rss_info;
860
861 if (!rss->enable) {
862 netdev_err(dev, "RSS is disabled, cannot change settings\n");
863 return -EIO;
864 }
865
866 if (hkey) {
867 memcpy(rss->key, hkey, sizeof(rss->key));
868 otx2_set_rss_key(pfvf);
869 }
870 if (delete)
871 return otx2_rss_ctx_delete(pfvf, *rss_context);
872
873 if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) {
874 ret = otx2_rss_ctx_create(pfvf, rss_context);
875 if (ret)
876 return ret;
877 }
878 if (indir) {
879 rss_ctx = rss->rss_ctx[*rss_context];
880 for (idx = 0; idx < rss->rss_size; idx++)
881 rss_ctx->ind_tbl[idx] = indir[idx];
882 }
883 otx2_set_rss_table(pfvf, *rss_context);
884
885 return 0;
886 }
887
otx2_get_rxfh_context(struct net_device * dev,u32 * indir,u8 * hkey,u8 * hfunc,u32 rss_context)888 static int otx2_get_rxfh_context(struct net_device *dev, u32 *indir,
889 u8 *hkey, u8 *hfunc, u32 rss_context)
890 {
891 struct otx2_nic *pfvf = netdev_priv(dev);
892 struct otx2_rss_ctx *rss_ctx;
893 struct otx2_rss_info *rss;
894 int idx, rx_queues;
895
896 rss = &pfvf->hw.rss_info;
897
898 if (hfunc)
899 *hfunc = ETH_RSS_HASH_TOP;
900
901 if (!indir)
902 return 0;
903
904 if (!rss->enable && rss_context == DEFAULT_RSS_CONTEXT_GROUP) {
905 rx_queues = pfvf->hw.rx_queues;
906 for (idx = 0; idx < MAX_RSS_INDIR_TBL_SIZE; idx++)
907 indir[idx] = ethtool_rxfh_indir_default(idx, rx_queues);
908 return 0;
909 }
910 if (rss_context >= MAX_RSS_GROUPS)
911 return -ENOENT;
912
913 rss_ctx = rss->rss_ctx[rss_context];
914 if (!rss_ctx)
915 return -ENOENT;
916
917 if (indir) {
918 for (idx = 0; idx < rss->rss_size; idx++)
919 indir[idx] = rss_ctx->ind_tbl[idx];
920 }
921 if (hkey)
922 memcpy(hkey, rss->key, sizeof(rss->key));
923
924 return 0;
925 }
926
927 /* Get RSS configuration */
otx2_get_rxfh(struct net_device * dev,u32 * indir,u8 * hkey,u8 * hfunc)928 static int otx2_get_rxfh(struct net_device *dev, u32 *indir,
929 u8 *hkey, u8 *hfunc)
930 {
931 return otx2_get_rxfh_context(dev, indir, hkey, hfunc,
932 DEFAULT_RSS_CONTEXT_GROUP);
933 }
934
935 /* Configure RSS table and hash key */
otx2_set_rxfh(struct net_device * dev,const u32 * indir,const u8 * hkey,const u8 hfunc)936 static int otx2_set_rxfh(struct net_device *dev, const u32 *indir,
937 const u8 *hkey, const u8 hfunc)
938 {
939
940 u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP;
941
942 return otx2_set_rxfh_context(dev, indir, hkey, hfunc, &rss_context, 0);
943 }
944
otx2_get_msglevel(struct net_device * netdev)945 static u32 otx2_get_msglevel(struct net_device *netdev)
946 {
947 struct otx2_nic *pfvf = netdev_priv(netdev);
948
949 return pfvf->msg_enable;
950 }
951
otx2_set_msglevel(struct net_device * netdev,u32 val)952 static void otx2_set_msglevel(struct net_device *netdev, u32 val)
953 {
954 struct otx2_nic *pfvf = netdev_priv(netdev);
955
956 pfvf->msg_enable = val;
957 }
958
otx2_get_link(struct net_device * netdev)959 static u32 otx2_get_link(struct net_device *netdev)
960 {
961 struct otx2_nic *pfvf = netdev_priv(netdev);
962
963 /* LBK link is internal and always UP */
964 if (is_otx2_lbkvf(pfvf->pdev))
965 return 1;
966 return pfvf->linfo.link_up;
967 }
968
otx2_get_ts_info(struct net_device * netdev,struct ethtool_ts_info * info)969 static int otx2_get_ts_info(struct net_device *netdev,
970 struct ethtool_ts_info *info)
971 {
972 struct otx2_nic *pfvf = netdev_priv(netdev);
973
974 if (!pfvf->ptp)
975 return ethtool_op_get_ts_info(netdev, info);
976
977 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
978 SOF_TIMESTAMPING_RX_SOFTWARE |
979 SOF_TIMESTAMPING_SOFTWARE |
980 SOF_TIMESTAMPING_TX_HARDWARE |
981 SOF_TIMESTAMPING_RX_HARDWARE |
982 SOF_TIMESTAMPING_RAW_HARDWARE;
983
984 info->phc_index = otx2_ptp_clock_index(pfvf);
985
986 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
987 if (test_bit(CN10K_PTP_ONESTEP, &pfvf->hw.cap_flag))
988 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
989
990 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
991 BIT(HWTSTAMP_FILTER_ALL);
992
993 return 0;
994 }
995
otx2_get_fwdata(struct otx2_nic * pfvf)996 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf)
997 {
998 struct cgx_fw_data *rsp = NULL;
999 struct msg_req *req;
1000 int err = 0;
1001
1002 mutex_lock(&pfvf->mbox.lock);
1003 req = otx2_mbox_alloc_msg_cgx_get_aux_link_info(&pfvf->mbox);
1004 if (!req) {
1005 mutex_unlock(&pfvf->mbox.lock);
1006 return ERR_PTR(-ENOMEM);
1007 }
1008
1009 err = otx2_sync_mbox_msg(&pfvf->mbox);
1010 if (!err) {
1011 rsp = (struct cgx_fw_data *)
1012 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr);
1013 } else {
1014 rsp = ERR_PTR(err);
1015 }
1016
1017 mutex_unlock(&pfvf->mbox.lock);
1018 return rsp;
1019 }
1020
otx2_get_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1021 static int otx2_get_fecparam(struct net_device *netdev,
1022 struct ethtool_fecparam *fecparam)
1023 {
1024 struct otx2_nic *pfvf = netdev_priv(netdev);
1025 struct cgx_fw_data *rsp;
1026 const int fec[] = {
1027 ETHTOOL_FEC_OFF,
1028 ETHTOOL_FEC_BASER,
1029 ETHTOOL_FEC_RS,
1030 ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS};
1031 #define FEC_MAX_INDEX 4
1032 if (pfvf->linfo.fec < FEC_MAX_INDEX)
1033 fecparam->active_fec = fec[pfvf->linfo.fec];
1034
1035 rsp = otx2_get_fwdata(pfvf);
1036 if (IS_ERR(rsp))
1037 return PTR_ERR(rsp);
1038
1039 if (rsp->fwdata.supported_fec < FEC_MAX_INDEX) {
1040 if (!rsp->fwdata.supported_fec)
1041 fecparam->fec = ETHTOOL_FEC_NONE;
1042 else
1043 fecparam->fec = fec[rsp->fwdata.supported_fec];
1044 }
1045 return 0;
1046 }
1047
otx2_set_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1048 static int otx2_set_fecparam(struct net_device *netdev,
1049 struct ethtool_fecparam *fecparam)
1050 {
1051 struct otx2_nic *pfvf = netdev_priv(netdev);
1052 struct mbox *mbox = &pfvf->mbox;
1053 struct fec_mode *req, *rsp;
1054 int err = 0, fec = 0;
1055
1056 switch (fecparam->fec) {
1057 /* Firmware does not support AUTO mode consider it as FEC_OFF */
1058 case ETHTOOL_FEC_OFF:
1059 case ETHTOOL_FEC_AUTO:
1060 fec = OTX2_FEC_OFF;
1061 break;
1062 case ETHTOOL_FEC_RS:
1063 fec = OTX2_FEC_RS;
1064 break;
1065 case ETHTOOL_FEC_BASER:
1066 fec = OTX2_FEC_BASER;
1067 break;
1068 default:
1069 netdev_warn(pfvf->netdev, "Unsupported FEC mode: %d",
1070 fecparam->fec);
1071 return -EINVAL;
1072 }
1073
1074 if (fec == pfvf->linfo.fec)
1075 return 0;
1076
1077 mutex_lock(&mbox->lock);
1078 req = otx2_mbox_alloc_msg_cgx_set_fec_param(&pfvf->mbox);
1079 if (!req) {
1080 err = -ENOMEM;
1081 goto end;
1082 }
1083 req->fec = fec;
1084 err = otx2_sync_mbox_msg(&pfvf->mbox);
1085 if (err)
1086 goto end;
1087
1088 rsp = (struct fec_mode *)otx2_mbox_get_rsp(&pfvf->mbox.mbox,
1089 0, &req->hdr);
1090 if (IS_ERR(rsp)) {
1091 err = PTR_ERR(rsp);
1092 goto end;
1093 }
1094
1095 if (rsp->fec >= 0)
1096 pfvf->linfo.fec = rsp->fec;
1097 else
1098 err = rsp->fec;
1099 end:
1100 mutex_unlock(&mbox->lock);
1101 return err;
1102 }
1103
otx2_get_fec_info(u64 index,int req_mode,struct ethtool_link_ksettings * link_ksettings)1104 static void otx2_get_fec_info(u64 index, int req_mode,
1105 struct ethtool_link_ksettings *link_ksettings)
1106 {
1107 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, };
1108
1109 switch (index) {
1110 case OTX2_FEC_NONE:
1111 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
1112 otx2_fec_modes);
1113 break;
1114 case OTX2_FEC_BASER:
1115 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1116 otx2_fec_modes);
1117 break;
1118 case OTX2_FEC_RS:
1119 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1120 otx2_fec_modes);
1121 break;
1122 case OTX2_FEC_BASER | OTX2_FEC_RS:
1123 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1124 otx2_fec_modes);
1125 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1126 otx2_fec_modes);
1127 break;
1128 }
1129
1130 /* Add fec modes to existing modes */
1131 if (req_mode == OTX2_MODE_ADVERTISED)
1132 linkmode_or(link_ksettings->link_modes.advertising,
1133 link_ksettings->link_modes.advertising,
1134 otx2_fec_modes);
1135 else
1136 linkmode_or(link_ksettings->link_modes.supported,
1137 link_ksettings->link_modes.supported,
1138 otx2_fec_modes);
1139 }
1140
otx2_get_link_mode_info(u64 link_mode_bmap,bool req_mode,struct ethtool_link_ksettings * link_ksettings)1141 static void otx2_get_link_mode_info(u64 link_mode_bmap,
1142 bool req_mode,
1143 struct ethtool_link_ksettings
1144 *link_ksettings)
1145 {
1146 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, };
1147 const int otx2_sgmii_features[6] = {
1148 ETHTOOL_LINK_MODE_10baseT_Half_BIT,
1149 ETHTOOL_LINK_MODE_10baseT_Full_BIT,
1150 ETHTOOL_LINK_MODE_100baseT_Half_BIT,
1151 ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1152 ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1153 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1154 };
1155 /* CGX link modes to Ethtool link mode mapping */
1156 const int cgx_link_mode[27] = {
1157 0, /* SGMII Mode */
1158 ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
1159 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1160 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
1161 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
1162 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1163 0,
1164 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1165 0,
1166 0,
1167 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1168 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1169 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1170 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1171 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1172 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1173 0,
1174 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
1175 0,
1176 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
1177 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
1178 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
1179 0,
1180 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1181 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1182 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1183 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT
1184 };
1185 u8 bit;
1186
1187 for_each_set_bit(bit, (unsigned long *)&link_mode_bmap, 27) {
1188 /* SGMII mode is set */
1189 if (bit == 0)
1190 linkmode_set_bit_array(otx2_sgmii_features,
1191 ARRAY_SIZE(otx2_sgmii_features),
1192 otx2_link_modes);
1193 else
1194 linkmode_set_bit(cgx_link_mode[bit], otx2_link_modes);
1195 }
1196
1197 if (req_mode == OTX2_MODE_ADVERTISED)
1198 linkmode_copy(link_ksettings->link_modes.advertising,
1199 otx2_link_modes);
1200 else
1201 linkmode_copy(link_ksettings->link_modes.supported,
1202 otx2_link_modes);
1203 }
1204
otx2_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)1205 static int otx2_get_link_ksettings(struct net_device *netdev,
1206 struct ethtool_link_ksettings *cmd)
1207 {
1208 struct otx2_nic *pfvf = netdev_priv(netdev);
1209 struct cgx_fw_data *rsp = NULL;
1210
1211 cmd->base.duplex = pfvf->linfo.full_duplex;
1212 cmd->base.speed = pfvf->linfo.speed;
1213 cmd->base.autoneg = pfvf->linfo.an;
1214
1215 rsp = otx2_get_fwdata(pfvf);
1216 if (IS_ERR(rsp))
1217 return PTR_ERR(rsp);
1218
1219 if (rsp->fwdata.supported_an)
1220 ethtool_link_ksettings_add_link_mode(cmd,
1221 supported,
1222 Autoneg);
1223
1224 otx2_get_link_mode_info(rsp->fwdata.advertised_link_modes,
1225 OTX2_MODE_ADVERTISED, cmd);
1226 otx2_get_fec_info(rsp->fwdata.advertised_fec,
1227 OTX2_MODE_ADVERTISED, cmd);
1228 otx2_get_link_mode_info(rsp->fwdata.supported_link_modes,
1229 OTX2_MODE_SUPPORTED, cmd);
1230 otx2_get_fec_info(rsp->fwdata.supported_fec,
1231 OTX2_MODE_SUPPORTED, cmd);
1232 return 0;
1233 }
1234
otx2_get_advertised_mode(const struct ethtool_link_ksettings * cmd,u64 * mode)1235 static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd,
1236 u64 *mode)
1237 {
1238 u32 bit_pos;
1239
1240 /* Firmware does not support requesting multiple advertised modes
1241 * return first set bit
1242 */
1243 bit_pos = find_first_bit(cmd->link_modes.advertising,
1244 __ETHTOOL_LINK_MODE_MASK_NBITS);
1245 if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS)
1246 *mode = bit_pos;
1247 }
1248
otx2_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)1249 static int otx2_set_link_ksettings(struct net_device *netdev,
1250 const struct ethtool_link_ksettings *cmd)
1251 {
1252 struct otx2_nic *pf = netdev_priv(netdev);
1253 struct ethtool_link_ksettings cur_ks;
1254 struct cgx_set_link_mode_req *req;
1255 struct mbox *mbox = &pf->mbox;
1256 int err = 0;
1257
1258 memset(&cur_ks, 0, sizeof(struct ethtool_link_ksettings));
1259
1260 if (!ethtool_validate_speed(cmd->base.speed) ||
1261 !ethtool_validate_duplex(cmd->base.duplex))
1262 return -EINVAL;
1263
1264 if (cmd->base.autoneg != AUTONEG_ENABLE &&
1265 cmd->base.autoneg != AUTONEG_DISABLE)
1266 return -EINVAL;
1267
1268 otx2_get_link_ksettings(netdev, &cur_ks);
1269
1270 /* Check requested modes against supported modes by hardware */
1271 if (!linkmode_subset(cmd->link_modes.advertising,
1272 cur_ks.link_modes.supported))
1273 return -EINVAL;
1274
1275 mutex_lock(&mbox->lock);
1276 req = otx2_mbox_alloc_msg_cgx_set_link_mode(&pf->mbox);
1277 if (!req) {
1278 err = -ENOMEM;
1279 goto end;
1280 }
1281
1282 req->args.speed = cmd->base.speed;
1283 /* firmware expects 1 for half duplex and 0 for full duplex
1284 * hence inverting
1285 */
1286 req->args.duplex = cmd->base.duplex ^ 0x1;
1287 req->args.an = cmd->base.autoneg;
1288 otx2_get_advertised_mode(cmd, &req->args.mode);
1289
1290 err = otx2_sync_mbox_msg(&pf->mbox);
1291 end:
1292 mutex_unlock(&mbox->lock);
1293 return err;
1294 }
1295
otx2_get_fec_stats(struct net_device * netdev,struct ethtool_fec_stats * fec_stats)1296 static void otx2_get_fec_stats(struct net_device *netdev,
1297 struct ethtool_fec_stats *fec_stats)
1298 {
1299 struct otx2_nic *pfvf = netdev_priv(netdev);
1300 struct cgx_fw_data *rsp;
1301
1302 otx2_update_lmac_fec_stats(pfvf);
1303
1304 /* Report MAC FEC stats */
1305 fec_stats->corrected_blocks.total = pfvf->hw.cgx_fec_corr_blks;
1306 fec_stats->uncorrectable_blocks.total = pfvf->hw.cgx_fec_uncorr_blks;
1307
1308 rsp = otx2_get_fwdata(pfvf);
1309 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats &&
1310 !otx2_get_phy_fec_stats(pfvf)) {
1311 /* Fetch fwdata again because it's been recently populated with
1312 * latest PHY FEC stats.
1313 */
1314 rsp = otx2_get_fwdata(pfvf);
1315 if (!IS_ERR(rsp)) {
1316 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats;
1317
1318 if (pfvf->linfo.fec == OTX2_FEC_BASER) {
1319 fec_stats->corrected_blocks.total = p->brfec_corr_blks;
1320 fec_stats->uncorrectable_blocks.total = p->brfec_uncorr_blks;
1321 } else {
1322 fec_stats->corrected_blocks.total = p->rsfec_corr_cws;
1323 fec_stats->uncorrectable_blocks.total = p->rsfec_uncorr_cws;
1324 }
1325 }
1326 }
1327 }
1328
1329 static const struct ethtool_ops otx2_ethtool_ops = {
1330 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1331 ETHTOOL_COALESCE_MAX_FRAMES |
1332 ETHTOOL_COALESCE_USE_ADAPTIVE,
1333 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN |
1334 ETHTOOL_RING_USE_CQE_SIZE,
1335 .get_link = otx2_get_link,
1336 .get_drvinfo = otx2_get_drvinfo,
1337 .get_strings = otx2_get_strings,
1338 .get_ethtool_stats = otx2_get_ethtool_stats,
1339 .get_sset_count = otx2_get_sset_count,
1340 .set_channels = otx2_set_channels,
1341 .get_channels = otx2_get_channels,
1342 .get_ringparam = otx2_get_ringparam,
1343 .set_ringparam = otx2_set_ringparam,
1344 .get_coalesce = otx2_get_coalesce,
1345 .set_coalesce = otx2_set_coalesce,
1346 .get_rxnfc = otx2_get_rxnfc,
1347 .set_rxnfc = otx2_set_rxnfc,
1348 .get_rxfh_key_size = otx2_get_rxfh_key_size,
1349 .get_rxfh_indir_size = otx2_get_rxfh_indir_size,
1350 .get_rxfh = otx2_get_rxfh,
1351 .set_rxfh = otx2_set_rxfh,
1352 .get_rxfh_context = otx2_get_rxfh_context,
1353 .set_rxfh_context = otx2_set_rxfh_context,
1354 .get_msglevel = otx2_get_msglevel,
1355 .set_msglevel = otx2_set_msglevel,
1356 .get_pauseparam = otx2_get_pauseparam,
1357 .set_pauseparam = otx2_set_pauseparam,
1358 .get_ts_info = otx2_get_ts_info,
1359 .get_fec_stats = otx2_get_fec_stats,
1360 .get_fecparam = otx2_get_fecparam,
1361 .set_fecparam = otx2_set_fecparam,
1362 .get_link_ksettings = otx2_get_link_ksettings,
1363 .set_link_ksettings = otx2_set_link_ksettings,
1364 };
1365
otx2_set_ethtool_ops(struct net_device * netdev)1366 void otx2_set_ethtool_ops(struct net_device *netdev)
1367 {
1368 netdev->ethtool_ops = &otx2_ethtool_ops;
1369 }
1370
1371 /* VF's ethtool APIs */
otx2vf_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)1372 static void otx2vf_get_drvinfo(struct net_device *netdev,
1373 struct ethtool_drvinfo *info)
1374 {
1375 struct otx2_nic *vf = netdev_priv(netdev);
1376
1377 strscpy(info->driver, DRV_VF_NAME, sizeof(info->driver));
1378 strscpy(info->bus_info, pci_name(vf->pdev), sizeof(info->bus_info));
1379 }
1380
otx2vf_get_strings(struct net_device * netdev,u32 sset,u8 * data)1381 static void otx2vf_get_strings(struct net_device *netdev, u32 sset, u8 *data)
1382 {
1383 struct otx2_nic *vf = netdev_priv(netdev);
1384 int stats;
1385
1386 if (sset != ETH_SS_STATS)
1387 return;
1388
1389 for (stats = 0; stats < otx2_n_dev_stats; stats++) {
1390 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN);
1391 data += ETH_GSTRING_LEN;
1392 }
1393
1394 for (stats = 0; stats < otx2_n_drv_stats; stats++) {
1395 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN);
1396 data += ETH_GSTRING_LEN;
1397 }
1398
1399 otx2_get_qset_strings(vf, &data, 0);
1400
1401 strcpy(data, "reset_count");
1402 data += ETH_GSTRING_LEN;
1403 }
1404
otx2vf_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)1405 static void otx2vf_get_ethtool_stats(struct net_device *netdev,
1406 struct ethtool_stats *stats, u64 *data)
1407 {
1408 struct otx2_nic *vf = netdev_priv(netdev);
1409 int stat;
1410
1411 otx2_get_dev_stats(vf);
1412 for (stat = 0; stat < otx2_n_dev_stats; stat++)
1413 *(data++) = ((u64 *)&vf->hw.dev_stats)
1414 [otx2_dev_stats[stat].index];
1415
1416 for (stat = 0; stat < otx2_n_drv_stats; stat++)
1417 *(data++) = atomic_read(&((atomic_t *)&vf->hw.drv_stats)
1418 [otx2_drv_stats[stat].index]);
1419
1420 otx2_get_qset_stats(vf, stats, &data);
1421 *(data++) = vf->reset_count;
1422 }
1423
otx2vf_get_sset_count(struct net_device * netdev,int sset)1424 static int otx2vf_get_sset_count(struct net_device *netdev, int sset)
1425 {
1426 struct otx2_nic *vf = netdev_priv(netdev);
1427 int qstats_count;
1428
1429 if (sset != ETH_SS_STATS)
1430 return -EINVAL;
1431
1432 qstats_count = otx2_n_queue_stats *
1433 (vf->hw.rx_queues + otx2_get_total_tx_queues(vf));
1434
1435 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 1;
1436 }
1437
otx2vf_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)1438 static int otx2vf_get_link_ksettings(struct net_device *netdev,
1439 struct ethtool_link_ksettings *cmd)
1440 {
1441 struct otx2_nic *pfvf = netdev_priv(netdev);
1442
1443 if (is_otx2_lbkvf(pfvf->pdev)) {
1444 cmd->base.duplex = DUPLEX_FULL;
1445 cmd->base.speed = SPEED_100000;
1446 } else {
1447 return otx2_get_link_ksettings(netdev, cmd);
1448 }
1449 return 0;
1450 }
1451
1452 static const struct ethtool_ops otx2vf_ethtool_ops = {
1453 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1454 ETHTOOL_COALESCE_MAX_FRAMES |
1455 ETHTOOL_COALESCE_USE_ADAPTIVE,
1456 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN |
1457 ETHTOOL_RING_USE_CQE_SIZE,
1458 .get_link = otx2_get_link,
1459 .get_drvinfo = otx2vf_get_drvinfo,
1460 .get_strings = otx2vf_get_strings,
1461 .get_ethtool_stats = otx2vf_get_ethtool_stats,
1462 .get_sset_count = otx2vf_get_sset_count,
1463 .set_channels = otx2_set_channels,
1464 .get_channels = otx2_get_channels,
1465 .get_rxnfc = otx2_get_rxnfc,
1466 .set_rxnfc = otx2_set_rxnfc,
1467 .get_rxfh_key_size = otx2_get_rxfh_key_size,
1468 .get_rxfh_indir_size = otx2_get_rxfh_indir_size,
1469 .get_rxfh = otx2_get_rxfh,
1470 .set_rxfh = otx2_set_rxfh,
1471 .get_rxfh_context = otx2_get_rxfh_context,
1472 .set_rxfh_context = otx2_set_rxfh_context,
1473 .get_ringparam = otx2_get_ringparam,
1474 .set_ringparam = otx2_set_ringparam,
1475 .get_coalesce = otx2_get_coalesce,
1476 .set_coalesce = otx2_set_coalesce,
1477 .get_msglevel = otx2_get_msglevel,
1478 .set_msglevel = otx2_set_msglevel,
1479 .get_pauseparam = otx2_get_pauseparam,
1480 .set_pauseparam = otx2_set_pauseparam,
1481 .get_link_ksettings = otx2vf_get_link_ksettings,
1482 .get_ts_info = otx2_get_ts_info,
1483 };
1484
otx2vf_set_ethtool_ops(struct net_device * netdev)1485 void otx2vf_set_ethtool_ops(struct net_device *netdev)
1486 {
1487 netdev->ethtool_ops = &otx2vf_ethtool_ops;
1488 }
1489 EXPORT_SYMBOL(otx2vf_set_ethtool_ops);
1490