1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * NVM Express device driver
4 * Copyright (c) 2011-2014, Intel Corporation.
5 */
6
7 #include <linux/blkdev.h>
8 #include <linux/blk-mq.h>
9 #include <linux/blk-integrity.h>
10 #include <linux/compat.h>
11 #include <linux/delay.h>
12 #include <linux/errno.h>
13 #include <linux/hdreg.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/backing-dev.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 #include <linux/pr.h>
20 #include <linux/ptrace.h>
21 #include <linux/nvme_ioctl.h>
22 #include <linux/pm_qos.h>
23 #include <asm/unaligned.h>
24
25 #include "nvme.h"
26 #include "fabrics.h"
27 #include <linux/nvme-auth.h>
28
29 #define CREATE_TRACE_POINTS
30 #include "trace.h"
31
32 #define NVME_MINORS (1U << MINORBITS)
33
34 struct nvme_ns_info {
35 struct nvme_ns_ids ids;
36 u32 nsid;
37 __le32 anagrpid;
38 bool is_shared;
39 bool is_readonly;
40 bool is_ready;
41 bool is_removed;
42 };
43
44 unsigned int admin_timeout = 60;
45 module_param(admin_timeout, uint, 0644);
46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
47 EXPORT_SYMBOL_GPL(admin_timeout);
48
49 unsigned int nvme_io_timeout = 30;
50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
52 EXPORT_SYMBOL_GPL(nvme_io_timeout);
53
54 static unsigned char shutdown_timeout = 5;
55 module_param(shutdown_timeout, byte, 0644);
56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
57
58 static u8 nvme_max_retries = 5;
59 module_param_named(max_retries, nvme_max_retries, byte, 0644);
60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
61
62 static unsigned long default_ps_max_latency_us = 100000;
63 module_param(default_ps_max_latency_us, ulong, 0644);
64 MODULE_PARM_DESC(default_ps_max_latency_us,
65 "max power saving latency for new devices; use PM QOS to change per device");
66
67 static bool force_apst;
68 module_param(force_apst, bool, 0644);
69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
70
71 static unsigned long apst_primary_timeout_ms = 100;
72 module_param(apst_primary_timeout_ms, ulong, 0644);
73 MODULE_PARM_DESC(apst_primary_timeout_ms,
74 "primary APST timeout in ms");
75
76 static unsigned long apst_secondary_timeout_ms = 2000;
77 module_param(apst_secondary_timeout_ms, ulong, 0644);
78 MODULE_PARM_DESC(apst_secondary_timeout_ms,
79 "secondary APST timeout in ms");
80
81 static unsigned long apst_primary_latency_tol_us = 15000;
82 module_param(apst_primary_latency_tol_us, ulong, 0644);
83 MODULE_PARM_DESC(apst_primary_latency_tol_us,
84 "primary APST latency tolerance in us");
85
86 static unsigned long apst_secondary_latency_tol_us = 100000;
87 module_param(apst_secondary_latency_tol_us, ulong, 0644);
88 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
89 "secondary APST latency tolerance in us");
90
91 /*
92 * nvme_wq - hosts nvme related works that are not reset or delete
93 * nvme_reset_wq - hosts nvme reset works
94 * nvme_delete_wq - hosts nvme delete works
95 *
96 * nvme_wq will host works such as scan, aen handling, fw activation,
97 * keep-alive, periodic reconnects etc. nvme_reset_wq
98 * runs reset works which also flush works hosted on nvme_wq for
99 * serialization purposes. nvme_delete_wq host controller deletion
100 * works which flush reset works for serialization.
101 */
102 struct workqueue_struct *nvme_wq;
103 EXPORT_SYMBOL_GPL(nvme_wq);
104
105 struct workqueue_struct *nvme_reset_wq;
106 EXPORT_SYMBOL_GPL(nvme_reset_wq);
107
108 struct workqueue_struct *nvme_delete_wq;
109 EXPORT_SYMBOL_GPL(nvme_delete_wq);
110
111 static LIST_HEAD(nvme_subsystems);
112 static DEFINE_MUTEX(nvme_subsystems_lock);
113
114 static DEFINE_IDA(nvme_instance_ida);
115 static dev_t nvme_ctrl_base_chr_devt;
116 static struct class *nvme_class;
117 static struct class *nvme_subsys_class;
118
119 static DEFINE_IDA(nvme_ns_chr_minor_ida);
120 static dev_t nvme_ns_chr_devt;
121 static struct class *nvme_ns_chr_class;
122
123 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
125 unsigned nsid);
126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
127 struct nvme_command *cmd);
128
nvme_queue_scan(struct nvme_ctrl * ctrl)129 void nvme_queue_scan(struct nvme_ctrl *ctrl)
130 {
131 /*
132 * Only new queue scan work when admin and IO queues are both alive
133 */
134 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
135 queue_work(nvme_wq, &ctrl->scan_work);
136 }
137
138 /*
139 * Use this function to proceed with scheduling reset_work for a controller
140 * that had previously been set to the resetting state. This is intended for
141 * code paths that can't be interrupted by other reset attempts. A hot removal
142 * may prevent this from succeeding.
143 */
nvme_try_sched_reset(struct nvme_ctrl * ctrl)144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
145 {
146 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
147 return -EBUSY;
148 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
149 return -EBUSY;
150 return 0;
151 }
152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
153
nvme_failfast_work(struct work_struct * work)154 static void nvme_failfast_work(struct work_struct *work)
155 {
156 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
157 struct nvme_ctrl, failfast_work);
158
159 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
160 return;
161
162 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
163 dev_info(ctrl->device, "failfast expired\n");
164 nvme_kick_requeue_lists(ctrl);
165 }
166
nvme_start_failfast_work(struct nvme_ctrl * ctrl)167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
168 {
169 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
170 return;
171
172 schedule_delayed_work(&ctrl->failfast_work,
173 ctrl->opts->fast_io_fail_tmo * HZ);
174 }
175
nvme_stop_failfast_work(struct nvme_ctrl * ctrl)176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
177 {
178 if (!ctrl->opts)
179 return;
180
181 cancel_delayed_work_sync(&ctrl->failfast_work);
182 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
183 }
184
185
nvme_reset_ctrl(struct nvme_ctrl * ctrl)186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
187 {
188 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
189 return -EBUSY;
190 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
191 return -EBUSY;
192 return 0;
193 }
194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
195
nvme_reset_ctrl_sync(struct nvme_ctrl * ctrl)196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
197 {
198 int ret;
199
200 ret = nvme_reset_ctrl(ctrl);
201 if (!ret) {
202 flush_work(&ctrl->reset_work);
203 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
204 ret = -ENETRESET;
205 }
206
207 return ret;
208 }
209
nvme_do_delete_ctrl(struct nvme_ctrl * ctrl)210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
211 {
212 dev_info(ctrl->device,
213 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
214
215 flush_work(&ctrl->reset_work);
216 nvme_stop_ctrl(ctrl);
217 nvme_remove_namespaces(ctrl);
218 ctrl->ops->delete_ctrl(ctrl);
219 nvme_uninit_ctrl(ctrl);
220 }
221
nvme_delete_ctrl_work(struct work_struct * work)222 static void nvme_delete_ctrl_work(struct work_struct *work)
223 {
224 struct nvme_ctrl *ctrl =
225 container_of(work, struct nvme_ctrl, delete_work);
226
227 nvme_do_delete_ctrl(ctrl);
228 }
229
nvme_delete_ctrl(struct nvme_ctrl * ctrl)230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
231 {
232 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
233 return -EBUSY;
234 if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
235 return -EBUSY;
236 return 0;
237 }
238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
239
nvme_delete_ctrl_sync(struct nvme_ctrl * ctrl)240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
241 {
242 /*
243 * Keep a reference until nvme_do_delete_ctrl() complete,
244 * since ->delete_ctrl can free the controller.
245 */
246 nvme_get_ctrl(ctrl);
247 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
248 nvme_do_delete_ctrl(ctrl);
249 nvme_put_ctrl(ctrl);
250 }
251
nvme_error_status(u16 status)252 static blk_status_t nvme_error_status(u16 status)
253 {
254 switch (status & 0x7ff) {
255 case NVME_SC_SUCCESS:
256 return BLK_STS_OK;
257 case NVME_SC_CAP_EXCEEDED:
258 return BLK_STS_NOSPC;
259 case NVME_SC_LBA_RANGE:
260 case NVME_SC_CMD_INTERRUPTED:
261 case NVME_SC_NS_NOT_READY:
262 return BLK_STS_TARGET;
263 case NVME_SC_BAD_ATTRIBUTES:
264 case NVME_SC_ONCS_NOT_SUPPORTED:
265 case NVME_SC_INVALID_OPCODE:
266 case NVME_SC_INVALID_FIELD:
267 case NVME_SC_INVALID_NS:
268 return BLK_STS_NOTSUPP;
269 case NVME_SC_WRITE_FAULT:
270 case NVME_SC_READ_ERROR:
271 case NVME_SC_UNWRITTEN_BLOCK:
272 case NVME_SC_ACCESS_DENIED:
273 case NVME_SC_READ_ONLY:
274 case NVME_SC_COMPARE_FAILED:
275 return BLK_STS_MEDIUM;
276 case NVME_SC_GUARD_CHECK:
277 case NVME_SC_APPTAG_CHECK:
278 case NVME_SC_REFTAG_CHECK:
279 case NVME_SC_INVALID_PI:
280 return BLK_STS_PROTECTION;
281 case NVME_SC_RESERVATION_CONFLICT:
282 return BLK_STS_RESV_CONFLICT;
283 case NVME_SC_HOST_PATH_ERROR:
284 return BLK_STS_TRANSPORT;
285 case NVME_SC_ZONE_TOO_MANY_ACTIVE:
286 return BLK_STS_ZONE_ACTIVE_RESOURCE;
287 case NVME_SC_ZONE_TOO_MANY_OPEN:
288 return BLK_STS_ZONE_OPEN_RESOURCE;
289 default:
290 return BLK_STS_IOERR;
291 }
292 }
293
nvme_retry_req(struct request * req)294 static void nvme_retry_req(struct request *req)
295 {
296 unsigned long delay = 0;
297 u16 crd;
298
299 /* The mask and shift result must be <= 3 */
300 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
301 if (crd)
302 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
303
304 nvme_req(req)->retries++;
305 blk_mq_requeue_request(req, false);
306 blk_mq_delay_kick_requeue_list(req->q, delay);
307 }
308
nvme_log_error(struct request * req)309 static void nvme_log_error(struct request *req)
310 {
311 struct nvme_ns *ns = req->q->queuedata;
312 struct nvme_request *nr = nvme_req(req);
313
314 if (ns) {
315 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
316 ns->disk ? ns->disk->disk_name : "?",
317 nvme_get_opcode_str(nr->cmd->common.opcode),
318 nr->cmd->common.opcode,
319 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)),
320 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift,
321 nvme_get_error_status_str(nr->status),
322 nr->status >> 8 & 7, /* Status Code Type */
323 nr->status & 0xff, /* Status Code */
324 nr->status & NVME_SC_MORE ? "MORE " : "",
325 nr->status & NVME_SC_DNR ? "DNR " : "");
326 return;
327 }
328
329 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
330 dev_name(nr->ctrl->device),
331 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
332 nr->cmd->common.opcode,
333 nvme_get_error_status_str(nr->status),
334 nr->status >> 8 & 7, /* Status Code Type */
335 nr->status & 0xff, /* Status Code */
336 nr->status & NVME_SC_MORE ? "MORE " : "",
337 nr->status & NVME_SC_DNR ? "DNR " : "");
338 }
339
340 enum nvme_disposition {
341 COMPLETE,
342 RETRY,
343 FAILOVER,
344 AUTHENTICATE,
345 };
346
nvme_decide_disposition(struct request * req)347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
348 {
349 if (likely(nvme_req(req)->status == 0))
350 return COMPLETE;
351
352 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
353 return AUTHENTICATE;
354
355 if (blk_noretry_request(req) ||
356 (nvme_req(req)->status & NVME_SC_DNR) ||
357 nvme_req(req)->retries >= nvme_max_retries)
358 return COMPLETE;
359
360 if (req->cmd_flags & REQ_NVME_MPATH) {
361 if (nvme_is_path_error(nvme_req(req)->status) ||
362 blk_queue_dying(req->q))
363 return FAILOVER;
364 } else {
365 if (blk_queue_dying(req->q))
366 return COMPLETE;
367 }
368
369 return RETRY;
370 }
371
nvme_end_req_zoned(struct request * req)372 static inline void nvme_end_req_zoned(struct request *req)
373 {
374 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
375 req_op(req) == REQ_OP_ZONE_APPEND)
376 req->__sector = nvme_lba_to_sect(req->q->queuedata,
377 le64_to_cpu(nvme_req(req)->result.u64));
378 }
379
nvme_end_req(struct request * req)380 void nvme_end_req(struct request *req)
381 {
382 blk_status_t status = nvme_error_status(nvme_req(req)->status);
383
384 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET)))
385 nvme_log_error(req);
386 nvme_end_req_zoned(req);
387 nvme_trace_bio_complete(req);
388 if (req->cmd_flags & REQ_NVME_MPATH)
389 nvme_mpath_end_request(req);
390 blk_mq_end_request(req, status);
391 }
392
nvme_complete_rq(struct request * req)393 void nvme_complete_rq(struct request *req)
394 {
395 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
396
397 trace_nvme_complete_rq(req);
398 nvme_cleanup_cmd(req);
399
400 /*
401 * Completions of long-running commands should not be able to
402 * defer sending of periodic keep alives, since the controller
403 * may have completed processing such commands a long time ago
404 * (arbitrarily close to command submission time).
405 * req->deadline - req->timeout is the command submission time
406 * in jiffies.
407 */
408 if (ctrl->kas &&
409 req->deadline - req->timeout >= ctrl->ka_last_check_time)
410 ctrl->comp_seen = true;
411
412 switch (nvme_decide_disposition(req)) {
413 case COMPLETE:
414 nvme_end_req(req);
415 return;
416 case RETRY:
417 nvme_retry_req(req);
418 return;
419 case FAILOVER:
420 nvme_failover_req(req);
421 return;
422 case AUTHENTICATE:
423 #ifdef CONFIG_NVME_AUTH
424 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
425 nvme_retry_req(req);
426 #else
427 nvme_end_req(req);
428 #endif
429 return;
430 }
431 }
432 EXPORT_SYMBOL_GPL(nvme_complete_rq);
433
nvme_complete_batch_req(struct request * req)434 void nvme_complete_batch_req(struct request *req)
435 {
436 trace_nvme_complete_rq(req);
437 nvme_cleanup_cmd(req);
438 nvme_end_req_zoned(req);
439 }
440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
441
442 /*
443 * Called to unwind from ->queue_rq on a failed command submission so that the
444 * multipathing code gets called to potentially failover to another path.
445 * The caller needs to unwind all transport specific resource allocations and
446 * must return propagate the return value.
447 */
nvme_host_path_error(struct request * req)448 blk_status_t nvme_host_path_error(struct request *req)
449 {
450 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
451 blk_mq_set_request_complete(req);
452 nvme_complete_rq(req);
453 return BLK_STS_OK;
454 }
455 EXPORT_SYMBOL_GPL(nvme_host_path_error);
456
nvme_cancel_request(struct request * req,void * data)457 bool nvme_cancel_request(struct request *req, void *data)
458 {
459 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
460 "Cancelling I/O %d", req->tag);
461
462 /* don't abort one completed or idle request */
463 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
464 return true;
465
466 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
467 nvme_req(req)->flags |= NVME_REQ_CANCELLED;
468 blk_mq_complete_request(req);
469 return true;
470 }
471 EXPORT_SYMBOL_GPL(nvme_cancel_request);
472
nvme_cancel_tagset(struct nvme_ctrl * ctrl)473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
474 {
475 if (ctrl->tagset) {
476 blk_mq_tagset_busy_iter(ctrl->tagset,
477 nvme_cancel_request, ctrl);
478 blk_mq_tagset_wait_completed_request(ctrl->tagset);
479 }
480 }
481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
482
nvme_cancel_admin_tagset(struct nvme_ctrl * ctrl)483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
484 {
485 if (ctrl->admin_tagset) {
486 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
487 nvme_cancel_request, ctrl);
488 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
489 }
490 }
491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
492
nvme_change_ctrl_state(struct nvme_ctrl * ctrl,enum nvme_ctrl_state new_state)493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
494 enum nvme_ctrl_state new_state)
495 {
496 enum nvme_ctrl_state old_state;
497 unsigned long flags;
498 bool changed = false;
499
500 spin_lock_irqsave(&ctrl->lock, flags);
501
502 old_state = nvme_ctrl_state(ctrl);
503 switch (new_state) {
504 case NVME_CTRL_LIVE:
505 switch (old_state) {
506 case NVME_CTRL_NEW:
507 case NVME_CTRL_RESETTING:
508 case NVME_CTRL_CONNECTING:
509 changed = true;
510 fallthrough;
511 default:
512 break;
513 }
514 break;
515 case NVME_CTRL_RESETTING:
516 switch (old_state) {
517 case NVME_CTRL_NEW:
518 case NVME_CTRL_LIVE:
519 changed = true;
520 fallthrough;
521 default:
522 break;
523 }
524 break;
525 case NVME_CTRL_CONNECTING:
526 switch (old_state) {
527 case NVME_CTRL_NEW:
528 case NVME_CTRL_RESETTING:
529 changed = true;
530 fallthrough;
531 default:
532 break;
533 }
534 break;
535 case NVME_CTRL_DELETING:
536 switch (old_state) {
537 case NVME_CTRL_LIVE:
538 case NVME_CTRL_RESETTING:
539 case NVME_CTRL_CONNECTING:
540 changed = true;
541 fallthrough;
542 default:
543 break;
544 }
545 break;
546 case NVME_CTRL_DELETING_NOIO:
547 switch (old_state) {
548 case NVME_CTRL_DELETING:
549 case NVME_CTRL_DEAD:
550 changed = true;
551 fallthrough;
552 default:
553 break;
554 }
555 break;
556 case NVME_CTRL_DEAD:
557 switch (old_state) {
558 case NVME_CTRL_DELETING:
559 changed = true;
560 fallthrough;
561 default:
562 break;
563 }
564 break;
565 default:
566 break;
567 }
568
569 if (changed) {
570 WRITE_ONCE(ctrl->state, new_state);
571 wake_up_all(&ctrl->state_wq);
572 }
573
574 spin_unlock_irqrestore(&ctrl->lock, flags);
575 if (!changed)
576 return false;
577
578 if (new_state == NVME_CTRL_LIVE) {
579 if (old_state == NVME_CTRL_CONNECTING)
580 nvme_stop_failfast_work(ctrl);
581 nvme_kick_requeue_lists(ctrl);
582 } else if (new_state == NVME_CTRL_CONNECTING &&
583 old_state == NVME_CTRL_RESETTING) {
584 nvme_start_failfast_work(ctrl);
585 }
586 return changed;
587 }
588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
589
590 /*
591 * Waits for the controller state to be resetting, or returns false if it is
592 * not possible to ever transition to that state.
593 */
nvme_wait_reset(struct nvme_ctrl * ctrl)594 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
595 {
596 wait_event(ctrl->state_wq,
597 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
598 nvme_state_terminal(ctrl));
599 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
600 }
601 EXPORT_SYMBOL_GPL(nvme_wait_reset);
602
nvme_free_ns_head(struct kref * ref)603 static void nvme_free_ns_head(struct kref *ref)
604 {
605 struct nvme_ns_head *head =
606 container_of(ref, struct nvme_ns_head, ref);
607
608 nvme_mpath_remove_disk(head);
609 ida_free(&head->subsys->ns_ida, head->instance);
610 cleanup_srcu_struct(&head->srcu);
611 nvme_put_subsystem(head->subsys);
612 kfree(head);
613 }
614
nvme_tryget_ns_head(struct nvme_ns_head * head)615 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
616 {
617 return kref_get_unless_zero(&head->ref);
618 }
619
nvme_put_ns_head(struct nvme_ns_head * head)620 void nvme_put_ns_head(struct nvme_ns_head *head)
621 {
622 kref_put(&head->ref, nvme_free_ns_head);
623 }
624
nvme_free_ns(struct kref * kref)625 static void nvme_free_ns(struct kref *kref)
626 {
627 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
628
629 put_disk(ns->disk);
630 nvme_put_ns_head(ns->head);
631 nvme_put_ctrl(ns->ctrl);
632 kfree(ns);
633 }
634
nvme_get_ns(struct nvme_ns * ns)635 bool nvme_get_ns(struct nvme_ns *ns)
636 {
637 return kref_get_unless_zero(&ns->kref);
638 }
639
nvme_put_ns(struct nvme_ns * ns)640 void nvme_put_ns(struct nvme_ns *ns)
641 {
642 kref_put(&ns->kref, nvme_free_ns);
643 }
644 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
645
nvme_clear_nvme_request(struct request * req)646 static inline void nvme_clear_nvme_request(struct request *req)
647 {
648 nvme_req(req)->status = 0;
649 nvme_req(req)->retries = 0;
650 nvme_req(req)->flags = 0;
651 req->rq_flags |= RQF_DONTPREP;
652 }
653
654 /* initialize a passthrough request */
nvme_init_request(struct request * req,struct nvme_command * cmd)655 void nvme_init_request(struct request *req, struct nvme_command *cmd)
656 {
657 if (req->q->queuedata)
658 req->timeout = NVME_IO_TIMEOUT;
659 else /* no queuedata implies admin queue */
660 req->timeout = NVME_ADMIN_TIMEOUT;
661
662 /* passthru commands should let the driver set the SGL flags */
663 cmd->common.flags &= ~NVME_CMD_SGL_ALL;
664
665 req->cmd_flags |= REQ_FAILFAST_DRIVER;
666 if (req->mq_hctx->type == HCTX_TYPE_POLL)
667 req->cmd_flags |= REQ_POLLED;
668 nvme_clear_nvme_request(req);
669 req->rq_flags |= RQF_QUIET;
670 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd));
671 }
672 EXPORT_SYMBOL_GPL(nvme_init_request);
673
674 /*
675 * For something we're not in a state to send to the device the default action
676 * is to busy it and retry it after the controller state is recovered. However,
677 * if the controller is deleting or if anything is marked for failfast or
678 * nvme multipath it is immediately failed.
679 *
680 * Note: commands used to initialize the controller will be marked for failfast.
681 * Note: nvme cli/ioctl commands are marked for failfast.
682 */
nvme_fail_nonready_command(struct nvme_ctrl * ctrl,struct request * rq)683 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
684 struct request *rq)
685 {
686 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
687
688 if (state != NVME_CTRL_DELETING_NOIO &&
689 state != NVME_CTRL_DELETING &&
690 state != NVME_CTRL_DEAD &&
691 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
692 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
693 return BLK_STS_RESOURCE;
694 return nvme_host_path_error(rq);
695 }
696 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
697
__nvme_check_ready(struct nvme_ctrl * ctrl,struct request * rq,bool queue_live)698 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
699 bool queue_live)
700 {
701 struct nvme_request *req = nvme_req(rq);
702
703 /*
704 * currently we have a problem sending passthru commands
705 * on the admin_q if the controller is not LIVE because we can't
706 * make sure that they are going out after the admin connect,
707 * controller enable and/or other commands in the initialization
708 * sequence. until the controller will be LIVE, fail with
709 * BLK_STS_RESOURCE so that they will be rescheduled.
710 */
711 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
712 return false;
713
714 if (ctrl->ops->flags & NVME_F_FABRICS) {
715 /*
716 * Only allow commands on a live queue, except for the connect
717 * command, which is require to set the queue live in the
718 * appropinquate states.
719 */
720 switch (nvme_ctrl_state(ctrl)) {
721 case NVME_CTRL_CONNECTING:
722 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
723 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
724 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
725 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
726 return true;
727 break;
728 default:
729 break;
730 case NVME_CTRL_DEAD:
731 return false;
732 }
733 }
734
735 return queue_live;
736 }
737 EXPORT_SYMBOL_GPL(__nvme_check_ready);
738
nvme_setup_flush(struct nvme_ns * ns,struct nvme_command * cmnd)739 static inline void nvme_setup_flush(struct nvme_ns *ns,
740 struct nvme_command *cmnd)
741 {
742 memset(cmnd, 0, sizeof(*cmnd));
743 cmnd->common.opcode = nvme_cmd_flush;
744 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
745 }
746
nvme_setup_discard(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)747 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
748 struct nvme_command *cmnd)
749 {
750 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
751 struct nvme_dsm_range *range;
752 struct bio *bio;
753
754 /*
755 * Some devices do not consider the DSM 'Number of Ranges' field when
756 * determining how much data to DMA. Always allocate memory for maximum
757 * number of segments to prevent device reading beyond end of buffer.
758 */
759 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
760
761 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
762 if (!range) {
763 /*
764 * If we fail allocation our range, fallback to the controller
765 * discard page. If that's also busy, it's safe to return
766 * busy, as we know we can make progress once that's freed.
767 */
768 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
769 return BLK_STS_RESOURCE;
770
771 range = page_address(ns->ctrl->discard_page);
772 }
773
774 if (queue_max_discard_segments(req->q) == 1) {
775 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req));
776 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9);
777
778 range[0].cattr = cpu_to_le32(0);
779 range[0].nlb = cpu_to_le32(nlb);
780 range[0].slba = cpu_to_le64(slba);
781 n = 1;
782 } else {
783 __rq_for_each_bio(bio, req) {
784 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector);
785 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
786
787 if (n < segments) {
788 range[n].cattr = cpu_to_le32(0);
789 range[n].nlb = cpu_to_le32(nlb);
790 range[n].slba = cpu_to_le64(slba);
791 }
792 n++;
793 }
794 }
795
796 if (WARN_ON_ONCE(n != segments)) {
797 if (virt_to_page(range) == ns->ctrl->discard_page)
798 clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
799 else
800 kfree(range);
801 return BLK_STS_IOERR;
802 }
803
804 memset(cmnd, 0, sizeof(*cmnd));
805 cmnd->dsm.opcode = nvme_cmd_dsm;
806 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
807 cmnd->dsm.nr = cpu_to_le32(segments - 1);
808 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
809
810 bvec_set_virt(&req->special_vec, range, alloc_size);
811 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
812
813 return BLK_STS_OK;
814 }
815
nvme_set_ref_tag(struct nvme_ns * ns,struct nvme_command * cmnd,struct request * req)816 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
817 struct request *req)
818 {
819 u32 upper, lower;
820 u64 ref48;
821
822 /* both rw and write zeroes share the same reftag format */
823 switch (ns->guard_type) {
824 case NVME_NVM_NS_16B_GUARD:
825 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
826 break;
827 case NVME_NVM_NS_64B_GUARD:
828 ref48 = ext_pi_ref_tag(req);
829 lower = lower_32_bits(ref48);
830 upper = upper_32_bits(ref48);
831
832 cmnd->rw.reftag = cpu_to_le32(lower);
833 cmnd->rw.cdw3 = cpu_to_le32(upper);
834 break;
835 default:
836 break;
837 }
838 }
839
nvme_setup_write_zeroes(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)840 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
841 struct request *req, struct nvme_command *cmnd)
842 {
843 memset(cmnd, 0, sizeof(*cmnd));
844
845 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
846 return nvme_setup_discard(ns, req, cmnd);
847
848 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
849 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
850 cmnd->write_zeroes.slba =
851 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
852 cmnd->write_zeroes.length =
853 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
854
855 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC))
856 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
857
858 if (nvme_ns_has_pi(ns)) {
859 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
860
861 switch (ns->pi_type) {
862 case NVME_NS_DPS_PI_TYPE1:
863 case NVME_NS_DPS_PI_TYPE2:
864 nvme_set_ref_tag(ns, cmnd, req);
865 break;
866 }
867 }
868
869 return BLK_STS_OK;
870 }
871
nvme_setup_rw(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd,enum nvme_opcode op)872 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
873 struct request *req, struct nvme_command *cmnd,
874 enum nvme_opcode op)
875 {
876 u16 control = 0;
877 u32 dsmgmt = 0;
878
879 if (req->cmd_flags & REQ_FUA)
880 control |= NVME_RW_FUA;
881 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
882 control |= NVME_RW_LR;
883
884 if (req->cmd_flags & REQ_RAHEAD)
885 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
886
887 cmnd->rw.opcode = op;
888 cmnd->rw.flags = 0;
889 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
890 cmnd->rw.cdw2 = 0;
891 cmnd->rw.cdw3 = 0;
892 cmnd->rw.metadata = 0;
893 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
894 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
895 cmnd->rw.reftag = 0;
896 cmnd->rw.apptag = 0;
897 cmnd->rw.appmask = 0;
898
899 if (ns->ms) {
900 /*
901 * If formated with metadata, the block layer always provides a
902 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
903 * we enable the PRACT bit for protection information or set the
904 * namespace capacity to zero to prevent any I/O.
905 */
906 if (!blk_integrity_rq(req)) {
907 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns)))
908 return BLK_STS_NOTSUPP;
909 control |= NVME_RW_PRINFO_PRACT;
910 }
911
912 switch (ns->pi_type) {
913 case NVME_NS_DPS_PI_TYPE3:
914 control |= NVME_RW_PRINFO_PRCHK_GUARD;
915 break;
916 case NVME_NS_DPS_PI_TYPE1:
917 case NVME_NS_DPS_PI_TYPE2:
918 control |= NVME_RW_PRINFO_PRCHK_GUARD |
919 NVME_RW_PRINFO_PRCHK_REF;
920 if (op == nvme_cmd_zone_append)
921 control |= NVME_RW_APPEND_PIREMAP;
922 nvme_set_ref_tag(ns, cmnd, req);
923 break;
924 }
925 }
926
927 cmnd->rw.control = cpu_to_le16(control);
928 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
929 return 0;
930 }
931
nvme_cleanup_cmd(struct request * req)932 void nvme_cleanup_cmd(struct request *req)
933 {
934 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
935 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
936
937 if (req->special_vec.bv_page == ctrl->discard_page)
938 clear_bit_unlock(0, &ctrl->discard_page_busy);
939 else
940 kfree(bvec_virt(&req->special_vec));
941 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD;
942 }
943 }
944 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
945
nvme_setup_cmd(struct nvme_ns * ns,struct request * req)946 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
947 {
948 struct nvme_command *cmd = nvme_req(req)->cmd;
949 blk_status_t ret = BLK_STS_OK;
950
951 if (!(req->rq_flags & RQF_DONTPREP))
952 nvme_clear_nvme_request(req);
953
954 switch (req_op(req)) {
955 case REQ_OP_DRV_IN:
956 case REQ_OP_DRV_OUT:
957 /* these are setup prior to execution in nvme_init_request() */
958 break;
959 case REQ_OP_FLUSH:
960 nvme_setup_flush(ns, cmd);
961 break;
962 case REQ_OP_ZONE_RESET_ALL:
963 case REQ_OP_ZONE_RESET:
964 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
965 break;
966 case REQ_OP_ZONE_OPEN:
967 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
968 break;
969 case REQ_OP_ZONE_CLOSE:
970 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
971 break;
972 case REQ_OP_ZONE_FINISH:
973 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
974 break;
975 case REQ_OP_WRITE_ZEROES:
976 ret = nvme_setup_write_zeroes(ns, req, cmd);
977 break;
978 case REQ_OP_DISCARD:
979 ret = nvme_setup_discard(ns, req, cmd);
980 break;
981 case REQ_OP_READ:
982 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
983 break;
984 case REQ_OP_WRITE:
985 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
986 break;
987 case REQ_OP_ZONE_APPEND:
988 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
989 break;
990 default:
991 WARN_ON_ONCE(1);
992 return BLK_STS_IOERR;
993 }
994
995 cmd->common.command_id = nvme_cid(req);
996 trace_nvme_setup_cmd(req, cmd);
997 return ret;
998 }
999 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1000
1001 /*
1002 * Return values:
1003 * 0: success
1004 * >0: nvme controller's cqe status response
1005 * <0: kernel error in lieu of controller response
1006 */
nvme_execute_rq(struct request * rq,bool at_head)1007 int nvme_execute_rq(struct request *rq, bool at_head)
1008 {
1009 blk_status_t status;
1010
1011 status = blk_execute_rq(rq, at_head);
1012 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1013 return -EINTR;
1014 if (nvme_req(rq)->status)
1015 return nvme_req(rq)->status;
1016 return blk_status_to_errno(status);
1017 }
1018 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1019
1020 /*
1021 * Returns 0 on success. If the result is negative, it's a Linux error code;
1022 * if the result is positive, it's an NVM Express status code
1023 */
__nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,union nvme_result * result,void * buffer,unsigned bufflen,int qid,int at_head,blk_mq_req_flags_t flags)1024 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1025 union nvme_result *result, void *buffer, unsigned bufflen,
1026 int qid, int at_head, blk_mq_req_flags_t flags)
1027 {
1028 struct request *req;
1029 int ret;
1030
1031 if (qid == NVME_QID_ANY)
1032 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags);
1033 else
1034 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags,
1035 qid - 1);
1036
1037 if (IS_ERR(req))
1038 return PTR_ERR(req);
1039 nvme_init_request(req, cmd);
1040
1041 if (buffer && bufflen) {
1042 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1043 if (ret)
1044 goto out;
1045 }
1046
1047 ret = nvme_execute_rq(req, at_head);
1048 if (result && ret >= 0)
1049 *result = nvme_req(req)->result;
1050 out:
1051 blk_mq_free_request(req);
1052 return ret;
1053 }
1054 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1055
nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,void * buffer,unsigned bufflen)1056 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1057 void *buffer, unsigned bufflen)
1058 {
1059 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1060 NVME_QID_ANY, 0, 0);
1061 }
1062 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1063
nvme_command_effects(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1064 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1065 {
1066 u32 effects = 0;
1067
1068 if (ns) {
1069 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1070 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1071 dev_warn_once(ctrl->device,
1072 "IO command:%02x has unusual effects:%08x\n",
1073 opcode, effects);
1074
1075 /*
1076 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1077 * which would deadlock when done on an I/O command. Note that
1078 * We already warn about an unusual effect above.
1079 */
1080 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1081 } else {
1082 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1083 }
1084
1085 return effects;
1086 }
1087 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1088
nvme_passthru_start(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1089 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1090 {
1091 u32 effects = nvme_command_effects(ctrl, ns, opcode);
1092
1093 /*
1094 * For simplicity, IO to all namespaces is quiesced even if the command
1095 * effects say only one namespace is affected.
1096 */
1097 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1098 mutex_lock(&ctrl->scan_lock);
1099 mutex_lock(&ctrl->subsys->lock);
1100 nvme_mpath_start_freeze(ctrl->subsys);
1101 nvme_mpath_wait_freeze(ctrl->subsys);
1102 nvme_start_freeze(ctrl);
1103 nvme_wait_freeze(ctrl);
1104 }
1105 return effects;
1106 }
1107 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1108
nvme_passthru_end(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u32 effects,struct nvme_command * cmd,int status)1109 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1110 struct nvme_command *cmd, int status)
1111 {
1112 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1113 nvme_unfreeze(ctrl);
1114 nvme_mpath_unfreeze(ctrl->subsys);
1115 mutex_unlock(&ctrl->subsys->lock);
1116 mutex_unlock(&ctrl->scan_lock);
1117 }
1118 if (effects & NVME_CMD_EFFECTS_CCC) {
1119 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1120 &ctrl->flags)) {
1121 dev_info(ctrl->device,
1122 "controller capabilities changed, reset may be required to take effect.\n");
1123 }
1124 }
1125 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1126 nvme_queue_scan(ctrl);
1127 flush_work(&ctrl->scan_work);
1128 }
1129 if (ns)
1130 return;
1131
1132 switch (cmd->common.opcode) {
1133 case nvme_admin_set_features:
1134 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1135 case NVME_FEAT_KATO:
1136 /*
1137 * Keep alive commands interval on the host should be
1138 * updated when KATO is modified by Set Features
1139 * commands.
1140 */
1141 if (!status)
1142 nvme_update_keep_alive(ctrl, cmd);
1143 break;
1144 default:
1145 break;
1146 }
1147 break;
1148 default:
1149 break;
1150 }
1151 }
1152 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1153
1154 /*
1155 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1156 *
1157 * The host should send Keep Alive commands at half of the Keep Alive Timeout
1158 * accounting for transport roundtrip times [..].
1159 */
nvme_keep_alive_work_period(struct nvme_ctrl * ctrl)1160 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1161 {
1162 unsigned long delay = ctrl->kato * HZ / 2;
1163
1164 /*
1165 * When using Traffic Based Keep Alive, we need to run
1166 * nvme_keep_alive_work at twice the normal frequency, as one
1167 * command completion can postpone sending a keep alive command
1168 * by up to twice the delay between runs.
1169 */
1170 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1171 delay /= 2;
1172 return delay;
1173 }
1174
nvme_queue_keep_alive_work(struct nvme_ctrl * ctrl)1175 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1176 {
1177 queue_delayed_work(nvme_wq, &ctrl->ka_work,
1178 nvme_keep_alive_work_period(ctrl));
1179 }
1180
nvme_keep_alive_end_io(struct request * rq,blk_status_t status)1181 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1182 blk_status_t status)
1183 {
1184 struct nvme_ctrl *ctrl = rq->end_io_data;
1185 unsigned long flags;
1186 bool startka = false;
1187 unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1188 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1189
1190 /*
1191 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1192 * at the desired frequency.
1193 */
1194 if (rtt <= delay) {
1195 delay -= rtt;
1196 } else {
1197 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1198 jiffies_to_msecs(rtt));
1199 delay = 0;
1200 }
1201
1202 blk_mq_free_request(rq);
1203
1204 if (status) {
1205 dev_err(ctrl->device,
1206 "failed nvme_keep_alive_end_io error=%d\n",
1207 status);
1208 return RQ_END_IO_NONE;
1209 }
1210
1211 ctrl->ka_last_check_time = jiffies;
1212 ctrl->comp_seen = false;
1213 spin_lock_irqsave(&ctrl->lock, flags);
1214 if (ctrl->state == NVME_CTRL_LIVE ||
1215 ctrl->state == NVME_CTRL_CONNECTING)
1216 startka = true;
1217 spin_unlock_irqrestore(&ctrl->lock, flags);
1218 if (startka)
1219 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1220 return RQ_END_IO_NONE;
1221 }
1222
nvme_keep_alive_work(struct work_struct * work)1223 static void nvme_keep_alive_work(struct work_struct *work)
1224 {
1225 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1226 struct nvme_ctrl, ka_work);
1227 bool comp_seen = ctrl->comp_seen;
1228 struct request *rq;
1229
1230 ctrl->ka_last_check_time = jiffies;
1231
1232 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1233 dev_dbg(ctrl->device,
1234 "reschedule traffic based keep-alive timer\n");
1235 ctrl->comp_seen = false;
1236 nvme_queue_keep_alive_work(ctrl);
1237 return;
1238 }
1239
1240 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1241 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1242 if (IS_ERR(rq)) {
1243 /* allocation failure, reset the controller */
1244 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1245 nvme_reset_ctrl(ctrl);
1246 return;
1247 }
1248 nvme_init_request(rq, &ctrl->ka_cmd);
1249
1250 rq->timeout = ctrl->kato * HZ;
1251 rq->end_io = nvme_keep_alive_end_io;
1252 rq->end_io_data = ctrl;
1253 blk_execute_rq_nowait(rq, false);
1254 }
1255
nvme_start_keep_alive(struct nvme_ctrl * ctrl)1256 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1257 {
1258 if (unlikely(ctrl->kato == 0))
1259 return;
1260
1261 nvme_queue_keep_alive_work(ctrl);
1262 }
1263
nvme_stop_keep_alive(struct nvme_ctrl * ctrl)1264 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1265 {
1266 if (unlikely(ctrl->kato == 0))
1267 return;
1268
1269 cancel_delayed_work_sync(&ctrl->ka_work);
1270 }
1271 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1272
nvme_update_keep_alive(struct nvme_ctrl * ctrl,struct nvme_command * cmd)1273 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1274 struct nvme_command *cmd)
1275 {
1276 unsigned int new_kato =
1277 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1278
1279 dev_info(ctrl->device,
1280 "keep alive interval updated from %u ms to %u ms\n",
1281 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1282
1283 nvme_stop_keep_alive(ctrl);
1284 ctrl->kato = new_kato;
1285 nvme_start_keep_alive(ctrl);
1286 }
1287
1288 /*
1289 * In NVMe 1.0 the CNS field was just a binary controller or namespace
1290 * flag, thus sending any new CNS opcodes has a big chance of not working.
1291 * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1292 * (but not for any later version).
1293 */
nvme_ctrl_limited_cns(struct nvme_ctrl * ctrl)1294 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1295 {
1296 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1297 return ctrl->vs < NVME_VS(1, 2, 0);
1298 return ctrl->vs < NVME_VS(1, 1, 0);
1299 }
1300
nvme_identify_ctrl(struct nvme_ctrl * dev,struct nvme_id_ctrl ** id)1301 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1302 {
1303 struct nvme_command c = { };
1304 int error;
1305
1306 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1307 c.identify.opcode = nvme_admin_identify;
1308 c.identify.cns = NVME_ID_CNS_CTRL;
1309
1310 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1311 if (!*id)
1312 return -ENOMEM;
1313
1314 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1315 sizeof(struct nvme_id_ctrl));
1316 if (error) {
1317 kfree(*id);
1318 *id = NULL;
1319 }
1320 return error;
1321 }
1322
nvme_process_ns_desc(struct nvme_ctrl * ctrl,struct nvme_ns_ids * ids,struct nvme_ns_id_desc * cur,bool * csi_seen)1323 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1324 struct nvme_ns_id_desc *cur, bool *csi_seen)
1325 {
1326 const char *warn_str = "ctrl returned bogus length:";
1327 void *data = cur;
1328
1329 switch (cur->nidt) {
1330 case NVME_NIDT_EUI64:
1331 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1332 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1333 warn_str, cur->nidl);
1334 return -1;
1335 }
1336 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1337 return NVME_NIDT_EUI64_LEN;
1338 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1339 return NVME_NIDT_EUI64_LEN;
1340 case NVME_NIDT_NGUID:
1341 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1342 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1343 warn_str, cur->nidl);
1344 return -1;
1345 }
1346 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1347 return NVME_NIDT_NGUID_LEN;
1348 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1349 return NVME_NIDT_NGUID_LEN;
1350 case NVME_NIDT_UUID:
1351 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1352 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1353 warn_str, cur->nidl);
1354 return -1;
1355 }
1356 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1357 return NVME_NIDT_UUID_LEN;
1358 uuid_copy(&ids->uuid, data + sizeof(*cur));
1359 return NVME_NIDT_UUID_LEN;
1360 case NVME_NIDT_CSI:
1361 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1362 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1363 warn_str, cur->nidl);
1364 return -1;
1365 }
1366 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1367 *csi_seen = true;
1368 return NVME_NIDT_CSI_LEN;
1369 default:
1370 /* Skip unknown types */
1371 return cur->nidl;
1372 }
1373 }
1374
nvme_identify_ns_descs(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1375 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1376 struct nvme_ns_info *info)
1377 {
1378 struct nvme_command c = { };
1379 bool csi_seen = false;
1380 int status, pos, len;
1381 void *data;
1382
1383 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1384 return 0;
1385 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1386 return 0;
1387
1388 c.identify.opcode = nvme_admin_identify;
1389 c.identify.nsid = cpu_to_le32(info->nsid);
1390 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1391
1392 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1393 if (!data)
1394 return -ENOMEM;
1395
1396 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1397 NVME_IDENTIFY_DATA_SIZE);
1398 if (status) {
1399 dev_warn(ctrl->device,
1400 "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1401 info->nsid, status);
1402 goto free_data;
1403 }
1404
1405 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1406 struct nvme_ns_id_desc *cur = data + pos;
1407
1408 if (cur->nidl == 0)
1409 break;
1410
1411 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1412 if (len < 0)
1413 break;
1414
1415 len += sizeof(*cur);
1416 }
1417
1418 if (nvme_multi_css(ctrl) && !csi_seen) {
1419 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1420 info->nsid);
1421 status = -EINVAL;
1422 }
1423
1424 free_data:
1425 kfree(data);
1426 return status;
1427 }
1428
nvme_identify_ns(struct nvme_ctrl * ctrl,unsigned nsid,struct nvme_id_ns ** id)1429 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1430 struct nvme_id_ns **id)
1431 {
1432 struct nvme_command c = { };
1433 int error;
1434
1435 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1436 c.identify.opcode = nvme_admin_identify;
1437 c.identify.nsid = cpu_to_le32(nsid);
1438 c.identify.cns = NVME_ID_CNS_NS;
1439
1440 *id = kmalloc(sizeof(**id), GFP_KERNEL);
1441 if (!*id)
1442 return -ENOMEM;
1443
1444 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1445 if (error) {
1446 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1447 kfree(*id);
1448 *id = NULL;
1449 }
1450 return error;
1451 }
1452
nvme_ns_info_from_identify(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1453 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1454 struct nvme_ns_info *info)
1455 {
1456 struct nvme_ns_ids *ids = &info->ids;
1457 struct nvme_id_ns *id;
1458 int ret;
1459
1460 ret = nvme_identify_ns(ctrl, info->nsid, &id);
1461 if (ret)
1462 return ret;
1463
1464 if (id->ncap == 0) {
1465 /* namespace not allocated or attached */
1466 info->is_removed = true;
1467 ret = -ENODEV;
1468 goto error;
1469 }
1470
1471 info->anagrpid = id->anagrpid;
1472 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1473 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1474 info->is_ready = true;
1475 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1476 dev_info(ctrl->device,
1477 "Ignoring bogus Namespace Identifiers\n");
1478 } else {
1479 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1480 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1481 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1482 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1483 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1484 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1485 }
1486
1487 error:
1488 kfree(id);
1489 return ret;
1490 }
1491
nvme_ns_info_from_id_cs_indep(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1492 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1493 struct nvme_ns_info *info)
1494 {
1495 struct nvme_id_ns_cs_indep *id;
1496 struct nvme_command c = {
1497 .identify.opcode = nvme_admin_identify,
1498 .identify.nsid = cpu_to_le32(info->nsid),
1499 .identify.cns = NVME_ID_CNS_NS_CS_INDEP,
1500 };
1501 int ret;
1502
1503 id = kmalloc(sizeof(*id), GFP_KERNEL);
1504 if (!id)
1505 return -ENOMEM;
1506
1507 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1508 if (!ret) {
1509 info->anagrpid = id->anagrpid;
1510 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1511 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1512 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1513 }
1514 kfree(id);
1515 return ret;
1516 }
1517
nvme_features(struct nvme_ctrl * dev,u8 op,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1518 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1519 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1520 {
1521 union nvme_result res = { 0 };
1522 struct nvme_command c = { };
1523 int ret;
1524
1525 c.features.opcode = op;
1526 c.features.fid = cpu_to_le32(fid);
1527 c.features.dword11 = cpu_to_le32(dword11);
1528
1529 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1530 buffer, buflen, NVME_QID_ANY, 0, 0);
1531 if (ret >= 0 && result)
1532 *result = le32_to_cpu(res.u32);
1533 return ret;
1534 }
1535
nvme_set_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1536 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1537 unsigned int dword11, void *buffer, size_t buflen,
1538 u32 *result)
1539 {
1540 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1541 buflen, result);
1542 }
1543 EXPORT_SYMBOL_GPL(nvme_set_features);
1544
nvme_get_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1545 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1546 unsigned int dword11, void *buffer, size_t buflen,
1547 u32 *result)
1548 {
1549 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1550 buflen, result);
1551 }
1552 EXPORT_SYMBOL_GPL(nvme_get_features);
1553
nvme_set_queue_count(struct nvme_ctrl * ctrl,int * count)1554 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1555 {
1556 u32 q_count = (*count - 1) | ((*count - 1) << 16);
1557 u32 result;
1558 int status, nr_io_queues;
1559
1560 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1561 &result);
1562 if (status < 0)
1563 return status;
1564
1565 /*
1566 * Degraded controllers might return an error when setting the queue
1567 * count. We still want to be able to bring them online and offer
1568 * access to the admin queue, as that might be only way to fix them up.
1569 */
1570 if (status > 0) {
1571 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1572 *count = 0;
1573 } else {
1574 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1575 *count = min(*count, nr_io_queues);
1576 }
1577
1578 return 0;
1579 }
1580 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1581
1582 #define NVME_AEN_SUPPORTED \
1583 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1584 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1585
nvme_enable_aen(struct nvme_ctrl * ctrl)1586 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1587 {
1588 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1589 int status;
1590
1591 if (!supported_aens)
1592 return;
1593
1594 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1595 NULL, 0, &result);
1596 if (status)
1597 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1598 supported_aens);
1599
1600 queue_work(nvme_wq, &ctrl->async_event_work);
1601 }
1602
nvme_ns_open(struct nvme_ns * ns)1603 static int nvme_ns_open(struct nvme_ns *ns)
1604 {
1605
1606 /* should never be called due to GENHD_FL_HIDDEN */
1607 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1608 goto fail;
1609 if (!nvme_get_ns(ns))
1610 goto fail;
1611 if (!try_module_get(ns->ctrl->ops->module))
1612 goto fail_put_ns;
1613
1614 return 0;
1615
1616 fail_put_ns:
1617 nvme_put_ns(ns);
1618 fail:
1619 return -ENXIO;
1620 }
1621
nvme_ns_release(struct nvme_ns * ns)1622 static void nvme_ns_release(struct nvme_ns *ns)
1623 {
1624
1625 module_put(ns->ctrl->ops->module);
1626 nvme_put_ns(ns);
1627 }
1628
nvme_open(struct gendisk * disk,blk_mode_t mode)1629 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1630 {
1631 return nvme_ns_open(disk->private_data);
1632 }
1633
nvme_release(struct gendisk * disk)1634 static void nvme_release(struct gendisk *disk)
1635 {
1636 nvme_ns_release(disk->private_data);
1637 }
1638
nvme_getgeo(struct block_device * bdev,struct hd_geometry * geo)1639 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1640 {
1641 /* some standard values */
1642 geo->heads = 1 << 6;
1643 geo->sectors = 1 << 5;
1644 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1645 return 0;
1646 }
1647
1648 #ifdef CONFIG_BLK_DEV_INTEGRITY
nvme_init_integrity(struct gendisk * disk,struct nvme_ns * ns,u32 max_integrity_segments)1649 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1650 u32 max_integrity_segments)
1651 {
1652 struct blk_integrity integrity = { };
1653
1654 switch (ns->pi_type) {
1655 case NVME_NS_DPS_PI_TYPE3:
1656 switch (ns->guard_type) {
1657 case NVME_NVM_NS_16B_GUARD:
1658 integrity.profile = &t10_pi_type3_crc;
1659 integrity.tag_size = sizeof(u16) + sizeof(u32);
1660 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1661 break;
1662 case NVME_NVM_NS_64B_GUARD:
1663 integrity.profile = &ext_pi_type3_crc64;
1664 integrity.tag_size = sizeof(u16) + 6;
1665 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1666 break;
1667 default:
1668 integrity.profile = NULL;
1669 break;
1670 }
1671 break;
1672 case NVME_NS_DPS_PI_TYPE1:
1673 case NVME_NS_DPS_PI_TYPE2:
1674 switch (ns->guard_type) {
1675 case NVME_NVM_NS_16B_GUARD:
1676 integrity.profile = &t10_pi_type1_crc;
1677 integrity.tag_size = sizeof(u16);
1678 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1679 break;
1680 case NVME_NVM_NS_64B_GUARD:
1681 integrity.profile = &ext_pi_type1_crc64;
1682 integrity.tag_size = sizeof(u16);
1683 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1684 break;
1685 default:
1686 integrity.profile = NULL;
1687 break;
1688 }
1689 break;
1690 default:
1691 integrity.profile = NULL;
1692 break;
1693 }
1694
1695 integrity.tuple_size = ns->ms;
1696 blk_integrity_register(disk, &integrity);
1697 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments);
1698 }
1699 #else
nvme_init_integrity(struct gendisk * disk,struct nvme_ns * ns,u32 max_integrity_segments)1700 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1701 u32 max_integrity_segments)
1702 {
1703 }
1704 #endif /* CONFIG_BLK_DEV_INTEGRITY */
1705
nvme_config_discard(struct gendisk * disk,struct nvme_ns * ns)1706 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
1707 {
1708 struct nvme_ctrl *ctrl = ns->ctrl;
1709 struct request_queue *queue = disk->queue;
1710 u32 size = queue_logical_block_size(queue);
1711
1712 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX))
1713 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl);
1714
1715 if (ctrl->max_discard_sectors == 0) {
1716 blk_queue_max_discard_sectors(queue, 0);
1717 return;
1718 }
1719
1720 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1721 NVME_DSM_MAX_RANGES);
1722
1723 queue->limits.discard_granularity = size;
1724
1725 /* If discard is already enabled, don't reset queue limits */
1726 if (queue->limits.max_discard_sectors)
1727 return;
1728
1729 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors);
1730 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments);
1731
1732 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1733 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
1734 }
1735
nvme_ns_ids_equal(struct nvme_ns_ids * a,struct nvme_ns_ids * b)1736 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1737 {
1738 return uuid_equal(&a->uuid, &b->uuid) &&
1739 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1740 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1741 a->csi == b->csi;
1742 }
1743
nvme_init_ms(struct nvme_ns * ns,struct nvme_id_ns * id)1744 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id)
1745 {
1746 bool first = id->dps & NVME_NS_DPS_PI_FIRST;
1747 unsigned lbaf = nvme_lbaf_index(id->flbas);
1748 struct nvme_ctrl *ctrl = ns->ctrl;
1749 struct nvme_command c = { };
1750 struct nvme_id_ns_nvm *nvm;
1751 int ret = 0;
1752 u32 elbaf;
1753
1754 ns->pi_size = 0;
1755 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1756 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1757 ns->pi_size = sizeof(struct t10_pi_tuple);
1758 ns->guard_type = NVME_NVM_NS_16B_GUARD;
1759 goto set_pi;
1760 }
1761
1762 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1763 if (!nvm)
1764 return -ENOMEM;
1765
1766 c.identify.opcode = nvme_admin_identify;
1767 c.identify.nsid = cpu_to_le32(ns->head->ns_id);
1768 c.identify.cns = NVME_ID_CNS_CS_NS;
1769 c.identify.csi = NVME_CSI_NVM;
1770
1771 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm));
1772 if (ret)
1773 goto free_data;
1774
1775 elbaf = le32_to_cpu(nvm->elbaf[lbaf]);
1776
1777 /* no support for storage tag formats right now */
1778 if (nvme_elbaf_sts(elbaf))
1779 goto free_data;
1780
1781 ns->guard_type = nvme_elbaf_guard_type(elbaf);
1782 switch (ns->guard_type) {
1783 case NVME_NVM_NS_64B_GUARD:
1784 ns->pi_size = sizeof(struct crc64_pi_tuple);
1785 break;
1786 case NVME_NVM_NS_16B_GUARD:
1787 ns->pi_size = sizeof(struct t10_pi_tuple);
1788 break;
1789 default:
1790 break;
1791 }
1792
1793 free_data:
1794 kfree(nvm);
1795 set_pi:
1796 if (ns->pi_size && (first || ns->ms == ns->pi_size))
1797 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1798 else
1799 ns->pi_type = 0;
1800
1801 return ret;
1802 }
1803
nvme_configure_metadata(struct nvme_ns * ns,struct nvme_id_ns * id)1804 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id)
1805 {
1806 struct nvme_ctrl *ctrl = ns->ctrl;
1807 int ret;
1808
1809 ret = nvme_init_ms(ns, id);
1810 if (ret)
1811 return ret;
1812
1813 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1814 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1815 return 0;
1816
1817 if (ctrl->ops->flags & NVME_F_FABRICS) {
1818 /*
1819 * The NVMe over Fabrics specification only supports metadata as
1820 * part of the extended data LBA. We rely on HCA/HBA support to
1821 * remap the separate metadata buffer from the block layer.
1822 */
1823 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1824 return 0;
1825
1826 ns->features |= NVME_NS_EXT_LBAS;
1827
1828 /*
1829 * The current fabrics transport drivers support namespace
1830 * metadata formats only if nvme_ns_has_pi() returns true.
1831 * Suppress support for all other formats so the namespace will
1832 * have a 0 capacity and not be usable through the block stack.
1833 *
1834 * Note, this check will need to be modified if any drivers
1835 * gain the ability to use other metadata formats.
1836 */
1837 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns))
1838 ns->features |= NVME_NS_METADATA_SUPPORTED;
1839 } else {
1840 /*
1841 * For PCIe controllers, we can't easily remap the separate
1842 * metadata buffer from the block layer and thus require a
1843 * separate metadata buffer for block layer metadata/PI support.
1844 * We allow extended LBAs for the passthrough interface, though.
1845 */
1846 if (id->flbas & NVME_NS_FLBAS_META_EXT)
1847 ns->features |= NVME_NS_EXT_LBAS;
1848 else
1849 ns->features |= NVME_NS_METADATA_SUPPORTED;
1850 }
1851 return 0;
1852 }
1853
nvme_set_queue_limits(struct nvme_ctrl * ctrl,struct request_queue * q)1854 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1855 struct request_queue *q)
1856 {
1857 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT;
1858
1859 if (ctrl->max_hw_sectors) {
1860 u32 max_segments =
1861 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1;
1862
1863 max_segments = min_not_zero(max_segments, ctrl->max_segments);
1864 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1865 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
1866 }
1867 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
1868 blk_queue_dma_alignment(q, 3);
1869 blk_queue_write_cache(q, vwc, vwc);
1870 }
1871
nvme_update_disk_info(struct gendisk * disk,struct nvme_ns * ns,struct nvme_id_ns * id)1872 static void nvme_update_disk_info(struct gendisk *disk,
1873 struct nvme_ns *ns, struct nvme_id_ns *id)
1874 {
1875 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze));
1876 u32 bs = 1U << ns->lba_shift;
1877 u32 atomic_bs, phys_bs, io_opt = 0;
1878
1879 /*
1880 * The block layer can't support LBA sizes larger than the page size
1881 * or smaller than a sector size yet, so catch this early and don't
1882 * allow block I/O.
1883 */
1884 if (ns->lba_shift > PAGE_SHIFT || ns->lba_shift < SECTOR_SHIFT) {
1885 capacity = 0;
1886 bs = (1 << 9);
1887 }
1888
1889 blk_integrity_unregister(disk);
1890
1891 atomic_bs = phys_bs = bs;
1892 if (id->nabo == 0) {
1893 /*
1894 * Bit 1 indicates whether NAWUPF is defined for this namespace
1895 * and whether it should be used instead of AWUPF. If NAWUPF ==
1896 * 0 then AWUPF must be used instead.
1897 */
1898 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1899 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1900 else
1901 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
1902 }
1903
1904 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1905 /* NPWG = Namespace Preferred Write Granularity */
1906 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
1907 /* NOWS = Namespace Optimal Write Size */
1908 io_opt = bs * (1 + le16_to_cpu(id->nows));
1909 }
1910
1911 blk_queue_logical_block_size(disk->queue, bs);
1912 /*
1913 * Linux filesystems assume writing a single physical block is
1914 * an atomic operation. Hence limit the physical block size to the
1915 * value of the Atomic Write Unit Power Fail parameter.
1916 */
1917 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
1918 blk_queue_io_min(disk->queue, phys_bs);
1919 blk_queue_io_opt(disk->queue, io_opt);
1920
1921 /*
1922 * Register a metadata profile for PI, or the plain non-integrity NVMe
1923 * metadata masquerading as Type 0 if supported, otherwise reject block
1924 * I/O to namespaces with metadata except when the namespace supports
1925 * PI, as it can strip/insert in that case.
1926 */
1927 if (ns->ms) {
1928 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
1929 (ns->features & NVME_NS_METADATA_SUPPORTED))
1930 nvme_init_integrity(disk, ns,
1931 ns->ctrl->max_integrity_segments);
1932 else if (!nvme_ns_has_pi(ns))
1933 capacity = 0;
1934 }
1935
1936 set_capacity_and_notify(disk, capacity);
1937
1938 nvme_config_discard(disk, ns);
1939 blk_queue_max_write_zeroes_sectors(disk->queue,
1940 ns->ctrl->max_zeroes_sectors);
1941 }
1942
nvme_ns_is_readonly(struct nvme_ns * ns,struct nvme_ns_info * info)1943 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
1944 {
1945 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
1946 }
1947
nvme_first_scan(struct gendisk * disk)1948 static inline bool nvme_first_scan(struct gendisk *disk)
1949 {
1950 /* nvme_alloc_ns() scans the disk prior to adding it */
1951 return !disk_live(disk);
1952 }
1953
nvme_set_chunk_sectors(struct nvme_ns * ns,struct nvme_id_ns * id)1954 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id)
1955 {
1956 struct nvme_ctrl *ctrl = ns->ctrl;
1957 u32 iob;
1958
1959 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
1960 is_power_of_2(ctrl->max_hw_sectors))
1961 iob = ctrl->max_hw_sectors;
1962 else
1963 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob));
1964
1965 if (!iob)
1966 return;
1967
1968 if (!is_power_of_2(iob)) {
1969 if (nvme_first_scan(ns->disk))
1970 pr_warn("%s: ignoring unaligned IO boundary:%u\n",
1971 ns->disk->disk_name, iob);
1972 return;
1973 }
1974
1975 if (blk_queue_is_zoned(ns->disk->queue)) {
1976 if (nvme_first_scan(ns->disk))
1977 pr_warn("%s: ignoring zoned namespace IO boundary\n",
1978 ns->disk->disk_name);
1979 return;
1980 }
1981
1982 blk_queue_chunk_sectors(ns->queue, iob);
1983 }
1984
nvme_update_ns_info_generic(struct nvme_ns * ns,struct nvme_ns_info * info)1985 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
1986 struct nvme_ns_info *info)
1987 {
1988 blk_mq_freeze_queue(ns->disk->queue);
1989 nvme_set_queue_limits(ns->ctrl, ns->queue);
1990 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
1991 blk_mq_unfreeze_queue(ns->disk->queue);
1992
1993 if (nvme_ns_head_multipath(ns->head)) {
1994 blk_mq_freeze_queue(ns->head->disk->queue);
1995 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
1996 nvme_mpath_revalidate_paths(ns);
1997 blk_stack_limits(&ns->head->disk->queue->limits,
1998 &ns->queue->limits, 0);
1999 ns->head->disk->flags |= GENHD_FL_HIDDEN;
2000 blk_mq_unfreeze_queue(ns->head->disk->queue);
2001 }
2002
2003 /* Hide the block-interface for these devices */
2004 ns->disk->flags |= GENHD_FL_HIDDEN;
2005 set_bit(NVME_NS_READY, &ns->flags);
2006
2007 return 0;
2008 }
2009
nvme_update_ns_info_block(struct nvme_ns * ns,struct nvme_ns_info * info)2010 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2011 struct nvme_ns_info *info)
2012 {
2013 struct nvme_id_ns *id;
2014 unsigned lbaf;
2015 int ret;
2016
2017 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2018 if (ret)
2019 return ret;
2020
2021 if (id->ncap == 0) {
2022 /* namespace not allocated or attached */
2023 info->is_removed = true;
2024 ret = -ENODEV;
2025 goto error;
2026 }
2027
2028 blk_mq_freeze_queue(ns->disk->queue);
2029 lbaf = nvme_lbaf_index(id->flbas);
2030 ns->lba_shift = id->lbaf[lbaf].ds;
2031 nvme_set_queue_limits(ns->ctrl, ns->queue);
2032
2033 ret = nvme_configure_metadata(ns, id);
2034 if (ret < 0) {
2035 blk_mq_unfreeze_queue(ns->disk->queue);
2036 goto out;
2037 }
2038 nvme_set_chunk_sectors(ns, id);
2039 nvme_update_disk_info(ns->disk, ns, id);
2040
2041 if (ns->head->ids.csi == NVME_CSI_ZNS) {
2042 ret = nvme_update_zone_info(ns, lbaf);
2043 if (ret) {
2044 blk_mq_unfreeze_queue(ns->disk->queue);
2045 goto out;
2046 }
2047 }
2048
2049 /*
2050 * Only set the DEAC bit if the device guarantees that reads from
2051 * deallocated data return zeroes. While the DEAC bit does not
2052 * require that, it must be a no-op if reads from deallocated data
2053 * do not return zeroes.
2054 */
2055 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2056 ns->features |= NVME_NS_DEAC;
2057 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2058 set_bit(NVME_NS_READY, &ns->flags);
2059 blk_mq_unfreeze_queue(ns->disk->queue);
2060
2061 if (blk_queue_is_zoned(ns->queue)) {
2062 ret = nvme_revalidate_zones(ns);
2063 if (ret && !nvme_first_scan(ns->disk))
2064 goto out;
2065 }
2066
2067 if (nvme_ns_head_multipath(ns->head)) {
2068 blk_mq_freeze_queue(ns->head->disk->queue);
2069 nvme_update_disk_info(ns->head->disk, ns, id);
2070 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2071 nvme_mpath_revalidate_paths(ns);
2072 blk_stack_limits(&ns->head->disk->queue->limits,
2073 &ns->queue->limits, 0);
2074 disk_update_readahead(ns->head->disk);
2075 blk_mq_unfreeze_queue(ns->head->disk->queue);
2076 }
2077
2078 ret = 0;
2079 out:
2080 /*
2081 * If probing fails due an unsupported feature, hide the block device,
2082 * but still allow other access.
2083 */
2084 if (ret == -ENODEV) {
2085 ns->disk->flags |= GENHD_FL_HIDDEN;
2086 set_bit(NVME_NS_READY, &ns->flags);
2087 ret = 0;
2088 }
2089
2090 error:
2091 kfree(id);
2092 return ret;
2093 }
2094
nvme_update_ns_info(struct nvme_ns * ns,struct nvme_ns_info * info)2095 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2096 {
2097 switch (info->ids.csi) {
2098 case NVME_CSI_ZNS:
2099 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2100 dev_info(ns->ctrl->device,
2101 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2102 info->nsid);
2103 return nvme_update_ns_info_generic(ns, info);
2104 }
2105 return nvme_update_ns_info_block(ns, info);
2106 case NVME_CSI_NVM:
2107 return nvme_update_ns_info_block(ns, info);
2108 default:
2109 dev_info(ns->ctrl->device,
2110 "block device for nsid %u not supported (csi %u)\n",
2111 info->nsid, info->ids.csi);
2112 return nvme_update_ns_info_generic(ns, info);
2113 }
2114 }
2115
2116 #ifdef CONFIG_BLK_SED_OPAL
nvme_sec_submit(void * data,u16 spsp,u8 secp,void * buffer,size_t len,bool send)2117 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2118 bool send)
2119 {
2120 struct nvme_ctrl *ctrl = data;
2121 struct nvme_command cmd = { };
2122
2123 if (send)
2124 cmd.common.opcode = nvme_admin_security_send;
2125 else
2126 cmd.common.opcode = nvme_admin_security_recv;
2127 cmd.common.nsid = 0;
2128 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2129 cmd.common.cdw11 = cpu_to_le32(len);
2130
2131 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2132 NVME_QID_ANY, 1, 0);
2133 }
2134
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2135 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2136 {
2137 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2138 if (!ctrl->opal_dev)
2139 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2140 else if (was_suspended)
2141 opal_unlock_from_suspend(ctrl->opal_dev);
2142 } else {
2143 free_opal_dev(ctrl->opal_dev);
2144 ctrl->opal_dev = NULL;
2145 }
2146 }
2147 #else
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2148 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2149 {
2150 }
2151 #endif /* CONFIG_BLK_SED_OPAL */
2152
2153 #ifdef CONFIG_BLK_DEV_ZONED
nvme_report_zones(struct gendisk * disk,sector_t sector,unsigned int nr_zones,report_zones_cb cb,void * data)2154 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2155 unsigned int nr_zones, report_zones_cb cb, void *data)
2156 {
2157 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2158 data);
2159 }
2160 #else
2161 #define nvme_report_zones NULL
2162 #endif /* CONFIG_BLK_DEV_ZONED */
2163
2164 const struct block_device_operations nvme_bdev_ops = {
2165 .owner = THIS_MODULE,
2166 .ioctl = nvme_ioctl,
2167 .compat_ioctl = blkdev_compat_ptr_ioctl,
2168 .open = nvme_open,
2169 .release = nvme_release,
2170 .getgeo = nvme_getgeo,
2171 .report_zones = nvme_report_zones,
2172 .pr_ops = &nvme_pr_ops,
2173 };
2174
nvme_wait_ready(struct nvme_ctrl * ctrl,u32 mask,u32 val,u32 timeout,const char * op)2175 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2176 u32 timeout, const char *op)
2177 {
2178 unsigned long timeout_jiffies = jiffies + timeout * HZ;
2179 u32 csts;
2180 int ret;
2181
2182 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2183 if (csts == ~0)
2184 return -ENODEV;
2185 if ((csts & mask) == val)
2186 break;
2187
2188 usleep_range(1000, 2000);
2189 if (fatal_signal_pending(current))
2190 return -EINTR;
2191 if (time_after(jiffies, timeout_jiffies)) {
2192 dev_err(ctrl->device,
2193 "Device not ready; aborting %s, CSTS=0x%x\n",
2194 op, csts);
2195 return -ENODEV;
2196 }
2197 }
2198
2199 return ret;
2200 }
2201
nvme_disable_ctrl(struct nvme_ctrl * ctrl,bool shutdown)2202 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2203 {
2204 int ret;
2205
2206 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2207 if (shutdown)
2208 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2209 else
2210 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2211
2212 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2213 if (ret)
2214 return ret;
2215
2216 if (shutdown) {
2217 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2218 NVME_CSTS_SHST_CMPLT,
2219 ctrl->shutdown_timeout, "shutdown");
2220 }
2221 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2222 msleep(NVME_QUIRK_DELAY_AMOUNT);
2223 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2224 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2225 }
2226 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2227
nvme_enable_ctrl(struct nvme_ctrl * ctrl)2228 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2229 {
2230 unsigned dev_page_min;
2231 u32 timeout;
2232 int ret;
2233
2234 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2235 if (ret) {
2236 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2237 return ret;
2238 }
2239 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2240
2241 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2242 dev_err(ctrl->device,
2243 "Minimum device page size %u too large for host (%u)\n",
2244 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2245 return -ENODEV;
2246 }
2247
2248 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2249 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2250 else
2251 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2252
2253 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS)
2254 ctrl->ctrl_config |= NVME_CC_CRIME;
2255
2256 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2257 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2258 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2259 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2260 if (ret)
2261 return ret;
2262
2263 /* Flush write to device (required if transport is PCI) */
2264 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2265 if (ret)
2266 return ret;
2267
2268 /* CAP value may change after initial CC write */
2269 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2270 if (ret)
2271 return ret;
2272
2273 timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2274 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2275 u32 crto, ready_timeout;
2276
2277 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2278 if (ret) {
2279 dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2280 ret);
2281 return ret;
2282 }
2283
2284 /*
2285 * CRTO should always be greater or equal to CAP.TO, but some
2286 * devices are known to get this wrong. Use the larger of the
2287 * two values.
2288 */
2289 if (ctrl->ctrl_config & NVME_CC_CRIME)
2290 ready_timeout = NVME_CRTO_CRIMT(crto);
2291 else
2292 ready_timeout = NVME_CRTO_CRWMT(crto);
2293
2294 if (ready_timeout < timeout)
2295 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2296 crto, ctrl->cap);
2297 else
2298 timeout = ready_timeout;
2299 }
2300
2301 ctrl->ctrl_config |= NVME_CC_ENABLE;
2302 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2303 if (ret)
2304 return ret;
2305 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2306 (timeout + 1) / 2, "initialisation");
2307 }
2308 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2309
nvme_configure_timestamp(struct nvme_ctrl * ctrl)2310 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2311 {
2312 __le64 ts;
2313 int ret;
2314
2315 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2316 return 0;
2317
2318 ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2319 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2320 NULL);
2321 if (ret)
2322 dev_warn_once(ctrl->device,
2323 "could not set timestamp (%d)\n", ret);
2324 return ret;
2325 }
2326
nvme_configure_host_options(struct nvme_ctrl * ctrl)2327 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2328 {
2329 struct nvme_feat_host_behavior *host;
2330 u8 acre = 0, lbafee = 0;
2331 int ret;
2332
2333 /* Don't bother enabling the feature if retry delay is not reported */
2334 if (ctrl->crdt[0])
2335 acre = NVME_ENABLE_ACRE;
2336 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2337 lbafee = NVME_ENABLE_LBAFEE;
2338
2339 if (!acre && !lbafee)
2340 return 0;
2341
2342 host = kzalloc(sizeof(*host), GFP_KERNEL);
2343 if (!host)
2344 return 0;
2345
2346 host->acre = acre;
2347 host->lbafee = lbafee;
2348 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2349 host, sizeof(*host), NULL);
2350 kfree(host);
2351 return ret;
2352 }
2353
2354 /*
2355 * The function checks whether the given total (exlat + enlat) latency of
2356 * a power state allows the latter to be used as an APST transition target.
2357 * It does so by comparing the latency to the primary and secondary latency
2358 * tolerances defined by module params. If there's a match, the corresponding
2359 * timeout value is returned and the matching tolerance index (1 or 2) is
2360 * reported.
2361 */
nvme_apst_get_transition_time(u64 total_latency,u64 * transition_time,unsigned * last_index)2362 static bool nvme_apst_get_transition_time(u64 total_latency,
2363 u64 *transition_time, unsigned *last_index)
2364 {
2365 if (total_latency <= apst_primary_latency_tol_us) {
2366 if (*last_index == 1)
2367 return false;
2368 *last_index = 1;
2369 *transition_time = apst_primary_timeout_ms;
2370 return true;
2371 }
2372 if (apst_secondary_timeout_ms &&
2373 total_latency <= apst_secondary_latency_tol_us) {
2374 if (*last_index <= 2)
2375 return false;
2376 *last_index = 2;
2377 *transition_time = apst_secondary_timeout_ms;
2378 return true;
2379 }
2380 return false;
2381 }
2382
2383 /*
2384 * APST (Autonomous Power State Transition) lets us program a table of power
2385 * state transitions that the controller will perform automatically.
2386 *
2387 * Depending on module params, one of the two supported techniques will be used:
2388 *
2389 * - If the parameters provide explicit timeouts and tolerances, they will be
2390 * used to build a table with up to 2 non-operational states to transition to.
2391 * The default parameter values were selected based on the values used by
2392 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2393 * regeneration of the APST table in the event of switching between external
2394 * and battery power, the timeouts and tolerances reflect a compromise
2395 * between values used by Microsoft for AC and battery scenarios.
2396 * - If not, we'll configure the table with a simple heuristic: we are willing
2397 * to spend at most 2% of the time transitioning between power states.
2398 * Therefore, when running in any given state, we will enter the next
2399 * lower-power non-operational state after waiting 50 * (enlat + exlat)
2400 * microseconds, as long as that state's exit latency is under the requested
2401 * maximum latency.
2402 *
2403 * We will not autonomously enter any non-operational state for which the total
2404 * latency exceeds ps_max_latency_us.
2405 *
2406 * Users can set ps_max_latency_us to zero to turn off APST.
2407 */
nvme_configure_apst(struct nvme_ctrl * ctrl)2408 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2409 {
2410 struct nvme_feat_auto_pst *table;
2411 unsigned apste = 0;
2412 u64 max_lat_us = 0;
2413 __le64 target = 0;
2414 int max_ps = -1;
2415 int state;
2416 int ret;
2417 unsigned last_lt_index = UINT_MAX;
2418
2419 /*
2420 * If APST isn't supported or if we haven't been initialized yet,
2421 * then don't do anything.
2422 */
2423 if (!ctrl->apsta)
2424 return 0;
2425
2426 if (ctrl->npss > 31) {
2427 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2428 return 0;
2429 }
2430
2431 table = kzalloc(sizeof(*table), GFP_KERNEL);
2432 if (!table)
2433 return 0;
2434
2435 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2436 /* Turn off APST. */
2437 dev_dbg(ctrl->device, "APST disabled\n");
2438 goto done;
2439 }
2440
2441 /*
2442 * Walk through all states from lowest- to highest-power.
2443 * According to the spec, lower-numbered states use more power. NPSS,
2444 * despite the name, is the index of the lowest-power state, not the
2445 * number of states.
2446 */
2447 for (state = (int)ctrl->npss; state >= 0; state--) {
2448 u64 total_latency_us, exit_latency_us, transition_ms;
2449
2450 if (target)
2451 table->entries[state] = target;
2452
2453 /*
2454 * Don't allow transitions to the deepest state if it's quirked
2455 * off.
2456 */
2457 if (state == ctrl->npss &&
2458 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2459 continue;
2460
2461 /*
2462 * Is this state a useful non-operational state for higher-power
2463 * states to autonomously transition to?
2464 */
2465 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2466 continue;
2467
2468 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2469 if (exit_latency_us > ctrl->ps_max_latency_us)
2470 continue;
2471
2472 total_latency_us = exit_latency_us +
2473 le32_to_cpu(ctrl->psd[state].entry_lat);
2474
2475 /*
2476 * This state is good. It can be used as the APST idle target
2477 * for higher power states.
2478 */
2479 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2480 if (!nvme_apst_get_transition_time(total_latency_us,
2481 &transition_ms, &last_lt_index))
2482 continue;
2483 } else {
2484 transition_ms = total_latency_us + 19;
2485 do_div(transition_ms, 20);
2486 if (transition_ms > (1 << 24) - 1)
2487 transition_ms = (1 << 24) - 1;
2488 }
2489
2490 target = cpu_to_le64((state << 3) | (transition_ms << 8));
2491 if (max_ps == -1)
2492 max_ps = state;
2493 if (total_latency_us > max_lat_us)
2494 max_lat_us = total_latency_us;
2495 }
2496
2497 if (max_ps == -1)
2498 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2499 else
2500 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2501 max_ps, max_lat_us, (int)sizeof(*table), table);
2502 apste = 1;
2503
2504 done:
2505 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2506 table, sizeof(*table), NULL);
2507 if (ret)
2508 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2509 kfree(table);
2510 return ret;
2511 }
2512
nvme_set_latency_tolerance(struct device * dev,s32 val)2513 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2514 {
2515 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2516 u64 latency;
2517
2518 switch (val) {
2519 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2520 case PM_QOS_LATENCY_ANY:
2521 latency = U64_MAX;
2522 break;
2523
2524 default:
2525 latency = val;
2526 }
2527
2528 if (ctrl->ps_max_latency_us != latency) {
2529 ctrl->ps_max_latency_us = latency;
2530 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2531 nvme_configure_apst(ctrl);
2532 }
2533 }
2534
2535 struct nvme_core_quirk_entry {
2536 /*
2537 * NVMe model and firmware strings are padded with spaces. For
2538 * simplicity, strings in the quirk table are padded with NULLs
2539 * instead.
2540 */
2541 u16 vid;
2542 const char *mn;
2543 const char *fr;
2544 unsigned long quirks;
2545 };
2546
2547 static const struct nvme_core_quirk_entry core_quirks[] = {
2548 {
2549 /*
2550 * This Toshiba device seems to die using any APST states. See:
2551 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2552 */
2553 .vid = 0x1179,
2554 .mn = "THNSF5256GPUK TOSHIBA",
2555 .quirks = NVME_QUIRK_NO_APST,
2556 },
2557 {
2558 /*
2559 * This LiteON CL1-3D*-Q11 firmware version has a race
2560 * condition associated with actions related to suspend to idle
2561 * LiteON has resolved the problem in future firmware
2562 */
2563 .vid = 0x14a4,
2564 .fr = "22301111",
2565 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2566 },
2567 {
2568 /*
2569 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2570 * aborts I/O during any load, but more easily reproducible
2571 * with discards (fstrim).
2572 *
2573 * The device is left in a state where it is also not possible
2574 * to use "nvme set-feature" to disable APST, but booting with
2575 * nvme_core.default_ps_max_latency=0 works.
2576 */
2577 .vid = 0x1e0f,
2578 .mn = "KCD6XVUL6T40",
2579 .quirks = NVME_QUIRK_NO_APST,
2580 },
2581 {
2582 /*
2583 * The external Samsung X5 SSD fails initialization without a
2584 * delay before checking if it is ready and has a whole set of
2585 * other problems. To make this even more interesting, it
2586 * shares the PCI ID with internal Samsung 970 Evo Plus that
2587 * does not need or want these quirks.
2588 */
2589 .vid = 0x144d,
2590 .mn = "Samsung Portable SSD X5",
2591 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2592 NVME_QUIRK_NO_DEEPEST_PS |
2593 NVME_QUIRK_IGNORE_DEV_SUBNQN,
2594 }
2595 };
2596
2597 /* match is null-terminated but idstr is space-padded. */
string_matches(const char * idstr,const char * match,size_t len)2598 static bool string_matches(const char *idstr, const char *match, size_t len)
2599 {
2600 size_t matchlen;
2601
2602 if (!match)
2603 return true;
2604
2605 matchlen = strlen(match);
2606 WARN_ON_ONCE(matchlen > len);
2607
2608 if (memcmp(idstr, match, matchlen))
2609 return false;
2610
2611 for (; matchlen < len; matchlen++)
2612 if (idstr[matchlen] != ' ')
2613 return false;
2614
2615 return true;
2616 }
2617
quirk_matches(const struct nvme_id_ctrl * id,const struct nvme_core_quirk_entry * q)2618 static bool quirk_matches(const struct nvme_id_ctrl *id,
2619 const struct nvme_core_quirk_entry *q)
2620 {
2621 return q->vid == le16_to_cpu(id->vid) &&
2622 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2623 string_matches(id->fr, q->fr, sizeof(id->fr));
2624 }
2625
nvme_init_subnqn(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2626 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2627 struct nvme_id_ctrl *id)
2628 {
2629 size_t nqnlen;
2630 int off;
2631
2632 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2633 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2634 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2635 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2636 return;
2637 }
2638
2639 if (ctrl->vs >= NVME_VS(1, 2, 1))
2640 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2641 }
2642
2643 /*
2644 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2645 * Base Specification 2.0. It is slightly different from the format
2646 * specified there due to historic reasons, and we can't change it now.
2647 */
2648 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2649 "nqn.2014.08.org.nvmexpress:%04x%04x",
2650 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2651 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2652 off += sizeof(id->sn);
2653 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2654 off += sizeof(id->mn);
2655 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2656 }
2657
nvme_release_subsystem(struct device * dev)2658 static void nvme_release_subsystem(struct device *dev)
2659 {
2660 struct nvme_subsystem *subsys =
2661 container_of(dev, struct nvme_subsystem, dev);
2662
2663 if (subsys->instance >= 0)
2664 ida_free(&nvme_instance_ida, subsys->instance);
2665 kfree(subsys);
2666 }
2667
nvme_destroy_subsystem(struct kref * ref)2668 static void nvme_destroy_subsystem(struct kref *ref)
2669 {
2670 struct nvme_subsystem *subsys =
2671 container_of(ref, struct nvme_subsystem, ref);
2672
2673 mutex_lock(&nvme_subsystems_lock);
2674 list_del(&subsys->entry);
2675 mutex_unlock(&nvme_subsystems_lock);
2676
2677 ida_destroy(&subsys->ns_ida);
2678 device_del(&subsys->dev);
2679 put_device(&subsys->dev);
2680 }
2681
nvme_put_subsystem(struct nvme_subsystem * subsys)2682 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2683 {
2684 kref_put(&subsys->ref, nvme_destroy_subsystem);
2685 }
2686
__nvme_find_get_subsystem(const char * subsysnqn)2687 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2688 {
2689 struct nvme_subsystem *subsys;
2690
2691 lockdep_assert_held(&nvme_subsystems_lock);
2692
2693 /*
2694 * Fail matches for discovery subsystems. This results
2695 * in each discovery controller bound to a unique subsystem.
2696 * This avoids issues with validating controller values
2697 * that can only be true when there is a single unique subsystem.
2698 * There may be multiple and completely independent entities
2699 * that provide discovery controllers.
2700 */
2701 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2702 return NULL;
2703
2704 list_for_each_entry(subsys, &nvme_subsystems, entry) {
2705 if (strcmp(subsys->subnqn, subsysnqn))
2706 continue;
2707 if (!kref_get_unless_zero(&subsys->ref))
2708 continue;
2709 return subsys;
2710 }
2711
2712 return NULL;
2713 }
2714
nvme_discovery_ctrl(struct nvme_ctrl * ctrl)2715 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2716 {
2717 return ctrl->opts && ctrl->opts->discovery_nqn;
2718 }
2719
nvme_validate_cntlid(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2720 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2721 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2722 {
2723 struct nvme_ctrl *tmp;
2724
2725 lockdep_assert_held(&nvme_subsystems_lock);
2726
2727 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2728 if (nvme_state_terminal(tmp))
2729 continue;
2730
2731 if (tmp->cntlid == ctrl->cntlid) {
2732 dev_err(ctrl->device,
2733 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2734 ctrl->cntlid, dev_name(tmp->device),
2735 subsys->subnqn);
2736 return false;
2737 }
2738
2739 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2740 nvme_discovery_ctrl(ctrl))
2741 continue;
2742
2743 dev_err(ctrl->device,
2744 "Subsystem does not support multiple controllers\n");
2745 return false;
2746 }
2747
2748 return true;
2749 }
2750
nvme_init_subsystem(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2751 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2752 {
2753 struct nvme_subsystem *subsys, *found;
2754 int ret;
2755
2756 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2757 if (!subsys)
2758 return -ENOMEM;
2759
2760 subsys->instance = -1;
2761 mutex_init(&subsys->lock);
2762 kref_init(&subsys->ref);
2763 INIT_LIST_HEAD(&subsys->ctrls);
2764 INIT_LIST_HEAD(&subsys->nsheads);
2765 nvme_init_subnqn(subsys, ctrl, id);
2766 memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2767 memcpy(subsys->model, id->mn, sizeof(subsys->model));
2768 subsys->vendor_id = le16_to_cpu(id->vid);
2769 subsys->cmic = id->cmic;
2770
2771 /* Versions prior to 1.4 don't necessarily report a valid type */
2772 if (id->cntrltype == NVME_CTRL_DISC ||
2773 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2774 subsys->subtype = NVME_NQN_DISC;
2775 else
2776 subsys->subtype = NVME_NQN_NVME;
2777
2778 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2779 dev_err(ctrl->device,
2780 "Subsystem %s is not a discovery controller",
2781 subsys->subnqn);
2782 kfree(subsys);
2783 return -EINVAL;
2784 }
2785 subsys->awupf = le16_to_cpu(id->awupf);
2786 nvme_mpath_default_iopolicy(subsys);
2787
2788 subsys->dev.class = nvme_subsys_class;
2789 subsys->dev.release = nvme_release_subsystem;
2790 subsys->dev.groups = nvme_subsys_attrs_groups;
2791 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2792 device_initialize(&subsys->dev);
2793
2794 mutex_lock(&nvme_subsystems_lock);
2795 found = __nvme_find_get_subsystem(subsys->subnqn);
2796 if (found) {
2797 put_device(&subsys->dev);
2798 subsys = found;
2799
2800 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2801 ret = -EINVAL;
2802 goto out_put_subsystem;
2803 }
2804 } else {
2805 ret = device_add(&subsys->dev);
2806 if (ret) {
2807 dev_err(ctrl->device,
2808 "failed to register subsystem device.\n");
2809 put_device(&subsys->dev);
2810 goto out_unlock;
2811 }
2812 ida_init(&subsys->ns_ida);
2813 list_add_tail(&subsys->entry, &nvme_subsystems);
2814 }
2815
2816 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2817 dev_name(ctrl->device));
2818 if (ret) {
2819 dev_err(ctrl->device,
2820 "failed to create sysfs link from subsystem.\n");
2821 goto out_put_subsystem;
2822 }
2823
2824 if (!found)
2825 subsys->instance = ctrl->instance;
2826 ctrl->subsys = subsys;
2827 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2828 mutex_unlock(&nvme_subsystems_lock);
2829 return 0;
2830
2831 out_put_subsystem:
2832 nvme_put_subsystem(subsys);
2833 out_unlock:
2834 mutex_unlock(&nvme_subsystems_lock);
2835 return ret;
2836 }
2837
nvme_get_log(struct nvme_ctrl * ctrl,u32 nsid,u8 log_page,u8 lsp,u8 csi,void * log,size_t size,u64 offset)2838 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2839 void *log, size_t size, u64 offset)
2840 {
2841 struct nvme_command c = { };
2842 u32 dwlen = nvme_bytes_to_numd(size);
2843
2844 c.get_log_page.opcode = nvme_admin_get_log_page;
2845 c.get_log_page.nsid = cpu_to_le32(nsid);
2846 c.get_log_page.lid = log_page;
2847 c.get_log_page.lsp = lsp;
2848 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2849 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2850 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2851 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2852 c.get_log_page.csi = csi;
2853
2854 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2855 }
2856
nvme_get_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)2857 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2858 struct nvme_effects_log **log)
2859 {
2860 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi);
2861 int ret;
2862
2863 if (cel)
2864 goto out;
2865
2866 cel = kzalloc(sizeof(*cel), GFP_KERNEL);
2867 if (!cel)
2868 return -ENOMEM;
2869
2870 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
2871 cel, sizeof(*cel), 0);
2872 if (ret) {
2873 kfree(cel);
2874 return ret;
2875 }
2876
2877 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
2878 out:
2879 *log = cel;
2880 return 0;
2881 }
2882
nvme_mps_to_sectors(struct nvme_ctrl * ctrl,u32 units)2883 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
2884 {
2885 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
2886
2887 if (check_shl_overflow(1U, units + page_shift - 9, &val))
2888 return UINT_MAX;
2889 return val;
2890 }
2891
nvme_init_non_mdts_limits(struct nvme_ctrl * ctrl)2892 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
2893 {
2894 struct nvme_command c = { };
2895 struct nvme_id_ctrl_nvm *id;
2896 int ret;
2897
2898 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
2899 ctrl->max_discard_sectors = UINT_MAX;
2900 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES;
2901 } else {
2902 ctrl->max_discard_sectors = 0;
2903 ctrl->max_discard_segments = 0;
2904 }
2905
2906 /*
2907 * Even though NVMe spec explicitly states that MDTS is not applicable
2908 * to the write-zeroes, we are cautious and limit the size to the
2909 * controllers max_hw_sectors value, which is based on the MDTS field
2910 * and possibly other limiting factors.
2911 */
2912 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
2913 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
2914 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
2915 else
2916 ctrl->max_zeroes_sectors = 0;
2917
2918 if (ctrl->subsys->subtype != NVME_NQN_NVME ||
2919 nvme_ctrl_limited_cns(ctrl) ||
2920 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
2921 return 0;
2922
2923 id = kzalloc(sizeof(*id), GFP_KERNEL);
2924 if (!id)
2925 return -ENOMEM;
2926
2927 c.identify.opcode = nvme_admin_identify;
2928 c.identify.cns = NVME_ID_CNS_CS_CTRL;
2929 c.identify.csi = NVME_CSI_NVM;
2930
2931 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
2932 if (ret)
2933 goto free_data;
2934
2935 if (id->dmrl)
2936 ctrl->max_discard_segments = id->dmrl;
2937 ctrl->dmrsl = le32_to_cpu(id->dmrsl);
2938 if (id->wzsl)
2939 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
2940
2941 free_data:
2942 if (ret > 0)
2943 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
2944 kfree(id);
2945 return ret;
2946 }
2947
nvme_init_known_nvm_effects(struct nvme_ctrl * ctrl)2948 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
2949 {
2950 struct nvme_effects_log *log = ctrl->effects;
2951
2952 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
2953 NVME_CMD_EFFECTS_NCC |
2954 NVME_CMD_EFFECTS_CSE_MASK);
2955 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
2956 NVME_CMD_EFFECTS_CSE_MASK);
2957
2958 /*
2959 * The spec says the result of a security receive command depends on
2960 * the previous security send command. As such, many vendors log this
2961 * command as one to submitted only when no other commands to the same
2962 * namespace are outstanding. The intention is to tell the host to
2963 * prevent mixing security send and receive.
2964 *
2965 * This driver can only enforce such exclusive access against IO
2966 * queues, though. We are not readily able to enforce such a rule for
2967 * two commands to the admin queue, which is the only queue that
2968 * matters for this command.
2969 *
2970 * Rather than blindly freezing the IO queues for this effect that
2971 * doesn't even apply to IO, mask it off.
2972 */
2973 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
2974
2975 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
2976 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
2977 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
2978 }
2979
nvme_init_effects(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2980 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2981 {
2982 int ret = 0;
2983
2984 if (ctrl->effects)
2985 return 0;
2986
2987 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
2988 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
2989 if (ret < 0)
2990 return ret;
2991 }
2992
2993 if (!ctrl->effects) {
2994 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
2995 if (!ctrl->effects)
2996 return -ENOMEM;
2997 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
2998 }
2999
3000 nvme_init_known_nvm_effects(ctrl);
3001 return 0;
3002 }
3003
nvme_init_identify(struct nvme_ctrl * ctrl)3004 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3005 {
3006 struct nvme_id_ctrl *id;
3007 u32 max_hw_sectors;
3008 bool prev_apst_enabled;
3009 int ret;
3010
3011 ret = nvme_identify_ctrl(ctrl, &id);
3012 if (ret) {
3013 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3014 return -EIO;
3015 }
3016
3017 if (!(ctrl->ops->flags & NVME_F_FABRICS))
3018 ctrl->cntlid = le16_to_cpu(id->cntlid);
3019
3020 if (!ctrl->identified) {
3021 unsigned int i;
3022
3023 /*
3024 * Check for quirks. Quirk can depend on firmware version,
3025 * so, in principle, the set of quirks present can change
3026 * across a reset. As a possible future enhancement, we
3027 * could re-scan for quirks every time we reinitialize
3028 * the device, but we'd have to make sure that the driver
3029 * behaves intelligently if the quirks change.
3030 */
3031 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3032 if (quirk_matches(id, &core_quirks[i]))
3033 ctrl->quirks |= core_quirks[i].quirks;
3034 }
3035
3036 ret = nvme_init_subsystem(ctrl, id);
3037 if (ret)
3038 goto out_free;
3039
3040 ret = nvme_init_effects(ctrl, id);
3041 if (ret)
3042 goto out_free;
3043 }
3044 memcpy(ctrl->subsys->firmware_rev, id->fr,
3045 sizeof(ctrl->subsys->firmware_rev));
3046
3047 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3048 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3049 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3050 }
3051
3052 ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3053 ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3054 ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3055
3056 ctrl->oacs = le16_to_cpu(id->oacs);
3057 ctrl->oncs = le16_to_cpu(id->oncs);
3058 ctrl->mtfa = le16_to_cpu(id->mtfa);
3059 ctrl->oaes = le32_to_cpu(id->oaes);
3060 ctrl->wctemp = le16_to_cpu(id->wctemp);
3061 ctrl->cctemp = le16_to_cpu(id->cctemp);
3062
3063 atomic_set(&ctrl->abort_limit, id->acl + 1);
3064 ctrl->vwc = id->vwc;
3065 if (id->mdts)
3066 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3067 else
3068 max_hw_sectors = UINT_MAX;
3069 ctrl->max_hw_sectors =
3070 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3071
3072 nvme_set_queue_limits(ctrl, ctrl->admin_q);
3073 ctrl->sgls = le32_to_cpu(id->sgls);
3074 ctrl->kas = le16_to_cpu(id->kas);
3075 ctrl->max_namespaces = le32_to_cpu(id->mnan);
3076 ctrl->ctratt = le32_to_cpu(id->ctratt);
3077
3078 ctrl->cntrltype = id->cntrltype;
3079 ctrl->dctype = id->dctype;
3080
3081 if (id->rtd3e) {
3082 /* us -> s */
3083 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3084
3085 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3086 shutdown_timeout, 60);
3087
3088 if (ctrl->shutdown_timeout != shutdown_timeout)
3089 dev_info(ctrl->device,
3090 "Shutdown timeout set to %u seconds\n",
3091 ctrl->shutdown_timeout);
3092 } else
3093 ctrl->shutdown_timeout = shutdown_timeout;
3094
3095 ctrl->npss = id->npss;
3096 ctrl->apsta = id->apsta;
3097 prev_apst_enabled = ctrl->apst_enabled;
3098 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3099 if (force_apst && id->apsta) {
3100 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3101 ctrl->apst_enabled = true;
3102 } else {
3103 ctrl->apst_enabled = false;
3104 }
3105 } else {
3106 ctrl->apst_enabled = id->apsta;
3107 }
3108 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3109
3110 if (ctrl->ops->flags & NVME_F_FABRICS) {
3111 ctrl->icdoff = le16_to_cpu(id->icdoff);
3112 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3113 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3114 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3115
3116 /*
3117 * In fabrics we need to verify the cntlid matches the
3118 * admin connect
3119 */
3120 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3121 dev_err(ctrl->device,
3122 "Mismatching cntlid: Connect %u vs Identify "
3123 "%u, rejecting\n",
3124 ctrl->cntlid, le16_to_cpu(id->cntlid));
3125 ret = -EINVAL;
3126 goto out_free;
3127 }
3128
3129 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3130 dev_err(ctrl->device,
3131 "keep-alive support is mandatory for fabrics\n");
3132 ret = -EINVAL;
3133 goto out_free;
3134 }
3135 } else {
3136 ctrl->hmpre = le32_to_cpu(id->hmpre);
3137 ctrl->hmmin = le32_to_cpu(id->hmmin);
3138 ctrl->hmminds = le32_to_cpu(id->hmminds);
3139 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3140 }
3141
3142 ret = nvme_mpath_init_identify(ctrl, id);
3143 if (ret < 0)
3144 goto out_free;
3145
3146 if (ctrl->apst_enabled && !prev_apst_enabled)
3147 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3148 else if (!ctrl->apst_enabled && prev_apst_enabled)
3149 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3150
3151 out_free:
3152 kfree(id);
3153 return ret;
3154 }
3155
3156 /*
3157 * Initialize the cached copies of the Identify data and various controller
3158 * register in our nvme_ctrl structure. This should be called as soon as
3159 * the admin queue is fully up and running.
3160 */
nvme_init_ctrl_finish(struct nvme_ctrl * ctrl,bool was_suspended)3161 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3162 {
3163 int ret;
3164
3165 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3166 if (ret) {
3167 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3168 return ret;
3169 }
3170
3171 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3172
3173 if (ctrl->vs >= NVME_VS(1, 1, 0))
3174 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3175
3176 ret = nvme_init_identify(ctrl);
3177 if (ret)
3178 return ret;
3179
3180 ret = nvme_configure_apst(ctrl);
3181 if (ret < 0)
3182 return ret;
3183
3184 ret = nvme_configure_timestamp(ctrl);
3185 if (ret < 0)
3186 return ret;
3187
3188 ret = nvme_configure_host_options(ctrl);
3189 if (ret < 0)
3190 return ret;
3191
3192 nvme_configure_opal(ctrl, was_suspended);
3193
3194 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3195 /*
3196 * Do not return errors unless we are in a controller reset,
3197 * the controller works perfectly fine without hwmon.
3198 */
3199 ret = nvme_hwmon_init(ctrl);
3200 if (ret == -EINTR)
3201 return ret;
3202 }
3203
3204 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3205 ctrl->identified = true;
3206
3207 return 0;
3208 }
3209 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3210
nvme_dev_open(struct inode * inode,struct file * file)3211 static int nvme_dev_open(struct inode *inode, struct file *file)
3212 {
3213 struct nvme_ctrl *ctrl =
3214 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3215
3216 switch (nvme_ctrl_state(ctrl)) {
3217 case NVME_CTRL_LIVE:
3218 break;
3219 default:
3220 return -EWOULDBLOCK;
3221 }
3222
3223 nvme_get_ctrl(ctrl);
3224 if (!try_module_get(ctrl->ops->module)) {
3225 nvme_put_ctrl(ctrl);
3226 return -EINVAL;
3227 }
3228
3229 file->private_data = ctrl;
3230 return 0;
3231 }
3232
nvme_dev_release(struct inode * inode,struct file * file)3233 static int nvme_dev_release(struct inode *inode, struct file *file)
3234 {
3235 struct nvme_ctrl *ctrl =
3236 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3237
3238 module_put(ctrl->ops->module);
3239 nvme_put_ctrl(ctrl);
3240 return 0;
3241 }
3242
3243 static const struct file_operations nvme_dev_fops = {
3244 .owner = THIS_MODULE,
3245 .open = nvme_dev_open,
3246 .release = nvme_dev_release,
3247 .unlocked_ioctl = nvme_dev_ioctl,
3248 .compat_ioctl = compat_ptr_ioctl,
3249 .uring_cmd = nvme_dev_uring_cmd,
3250 };
3251
nvme_find_ns_head(struct nvme_ctrl * ctrl,unsigned nsid)3252 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3253 unsigned nsid)
3254 {
3255 struct nvme_ns_head *h;
3256
3257 lockdep_assert_held(&ctrl->subsys->lock);
3258
3259 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3260 /*
3261 * Private namespaces can share NSIDs under some conditions.
3262 * In that case we can't use the same ns_head for namespaces
3263 * with the same NSID.
3264 */
3265 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3266 continue;
3267 if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3268 return h;
3269 }
3270
3271 return NULL;
3272 }
3273
nvme_subsys_check_duplicate_ids(struct nvme_subsystem * subsys,struct nvme_ns_ids * ids)3274 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3275 struct nvme_ns_ids *ids)
3276 {
3277 bool has_uuid = !uuid_is_null(&ids->uuid);
3278 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3279 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3280 struct nvme_ns_head *h;
3281
3282 lockdep_assert_held(&subsys->lock);
3283
3284 list_for_each_entry(h, &subsys->nsheads, entry) {
3285 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3286 return -EINVAL;
3287 if (has_nguid &&
3288 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3289 return -EINVAL;
3290 if (has_eui64 &&
3291 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3292 return -EINVAL;
3293 }
3294
3295 return 0;
3296 }
3297
nvme_cdev_rel(struct device * dev)3298 static void nvme_cdev_rel(struct device *dev)
3299 {
3300 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3301 }
3302
nvme_cdev_del(struct cdev * cdev,struct device * cdev_device)3303 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3304 {
3305 cdev_device_del(cdev, cdev_device);
3306 put_device(cdev_device);
3307 }
3308
nvme_cdev_add(struct cdev * cdev,struct device * cdev_device,const struct file_operations * fops,struct module * owner)3309 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3310 const struct file_operations *fops, struct module *owner)
3311 {
3312 int minor, ret;
3313
3314 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3315 if (minor < 0)
3316 return minor;
3317 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3318 cdev_device->class = nvme_ns_chr_class;
3319 cdev_device->release = nvme_cdev_rel;
3320 device_initialize(cdev_device);
3321 cdev_init(cdev, fops);
3322 cdev->owner = owner;
3323 ret = cdev_device_add(cdev, cdev_device);
3324 if (ret)
3325 put_device(cdev_device);
3326
3327 return ret;
3328 }
3329
nvme_ns_chr_open(struct inode * inode,struct file * file)3330 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3331 {
3332 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3333 }
3334
nvme_ns_chr_release(struct inode * inode,struct file * file)3335 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3336 {
3337 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3338 return 0;
3339 }
3340
3341 static const struct file_operations nvme_ns_chr_fops = {
3342 .owner = THIS_MODULE,
3343 .open = nvme_ns_chr_open,
3344 .release = nvme_ns_chr_release,
3345 .unlocked_ioctl = nvme_ns_chr_ioctl,
3346 .compat_ioctl = compat_ptr_ioctl,
3347 .uring_cmd = nvme_ns_chr_uring_cmd,
3348 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3349 };
3350
nvme_add_ns_cdev(struct nvme_ns * ns)3351 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3352 {
3353 int ret;
3354
3355 ns->cdev_device.parent = ns->ctrl->device;
3356 ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3357 ns->ctrl->instance, ns->head->instance);
3358 if (ret)
3359 return ret;
3360
3361 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3362 ns->ctrl->ops->module);
3363 }
3364
nvme_alloc_ns_head(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3365 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3366 struct nvme_ns_info *info)
3367 {
3368 struct nvme_ns_head *head;
3369 size_t size = sizeof(*head);
3370 int ret = -ENOMEM;
3371
3372 #ifdef CONFIG_NVME_MULTIPATH
3373 size += num_possible_nodes() * sizeof(struct nvme_ns *);
3374 #endif
3375
3376 head = kzalloc(size, GFP_KERNEL);
3377 if (!head)
3378 goto out;
3379 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3380 if (ret < 0)
3381 goto out_free_head;
3382 head->instance = ret;
3383 INIT_LIST_HEAD(&head->list);
3384 ret = init_srcu_struct(&head->srcu);
3385 if (ret)
3386 goto out_ida_remove;
3387 head->subsys = ctrl->subsys;
3388 head->ns_id = info->nsid;
3389 head->ids = info->ids;
3390 head->shared = info->is_shared;
3391 kref_init(&head->ref);
3392
3393 if (head->ids.csi) {
3394 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3395 if (ret)
3396 goto out_cleanup_srcu;
3397 } else
3398 head->effects = ctrl->effects;
3399
3400 ret = nvme_mpath_alloc_disk(ctrl, head);
3401 if (ret)
3402 goto out_cleanup_srcu;
3403
3404 list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3405
3406 kref_get(&ctrl->subsys->ref);
3407
3408 return head;
3409 out_cleanup_srcu:
3410 cleanup_srcu_struct(&head->srcu);
3411 out_ida_remove:
3412 ida_free(&ctrl->subsys->ns_ida, head->instance);
3413 out_free_head:
3414 kfree(head);
3415 out:
3416 if (ret > 0)
3417 ret = blk_status_to_errno(nvme_error_status(ret));
3418 return ERR_PTR(ret);
3419 }
3420
nvme_global_check_duplicate_ids(struct nvme_subsystem * this,struct nvme_ns_ids * ids)3421 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3422 struct nvme_ns_ids *ids)
3423 {
3424 struct nvme_subsystem *s;
3425 int ret = 0;
3426
3427 /*
3428 * Note that this check is racy as we try to avoid holding the global
3429 * lock over the whole ns_head creation. But it is only intended as
3430 * a sanity check anyway.
3431 */
3432 mutex_lock(&nvme_subsystems_lock);
3433 list_for_each_entry(s, &nvme_subsystems, entry) {
3434 if (s == this)
3435 continue;
3436 mutex_lock(&s->lock);
3437 ret = nvme_subsys_check_duplicate_ids(s, ids);
3438 mutex_unlock(&s->lock);
3439 if (ret)
3440 break;
3441 }
3442 mutex_unlock(&nvme_subsystems_lock);
3443
3444 return ret;
3445 }
3446
nvme_init_ns_head(struct nvme_ns * ns,struct nvme_ns_info * info)3447 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3448 {
3449 struct nvme_ctrl *ctrl = ns->ctrl;
3450 struct nvme_ns_head *head = NULL;
3451 int ret;
3452
3453 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3454 if (ret) {
3455 /*
3456 * We've found two different namespaces on two different
3457 * subsystems that report the same ID. This is pretty nasty
3458 * for anything that actually requires unique device
3459 * identification. In the kernel we need this for multipathing,
3460 * and in user space the /dev/disk/by-id/ links rely on it.
3461 *
3462 * If the device also claims to be multi-path capable back off
3463 * here now and refuse the probe the second device as this is a
3464 * recipe for data corruption. If not this is probably a
3465 * cheap consumer device if on the PCIe bus, so let the user
3466 * proceed and use the shiny toy, but warn that with changing
3467 * probing order (which due to our async probing could just be
3468 * device taking longer to startup) the other device could show
3469 * up at any time.
3470 */
3471 nvme_print_device_info(ctrl);
3472 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3473 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3474 info->is_shared)) {
3475 dev_err(ctrl->device,
3476 "ignoring nsid %d because of duplicate IDs\n",
3477 info->nsid);
3478 return ret;
3479 }
3480
3481 dev_err(ctrl->device,
3482 "clearing duplicate IDs for nsid %d\n", info->nsid);
3483 dev_err(ctrl->device,
3484 "use of /dev/disk/by-id/ may cause data corruption\n");
3485 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3486 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3487 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3488 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3489 }
3490
3491 mutex_lock(&ctrl->subsys->lock);
3492 head = nvme_find_ns_head(ctrl, info->nsid);
3493 if (!head) {
3494 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3495 if (ret) {
3496 dev_err(ctrl->device,
3497 "duplicate IDs in subsystem for nsid %d\n",
3498 info->nsid);
3499 goto out_unlock;
3500 }
3501 head = nvme_alloc_ns_head(ctrl, info);
3502 if (IS_ERR(head)) {
3503 ret = PTR_ERR(head);
3504 goto out_unlock;
3505 }
3506 } else {
3507 ret = -EINVAL;
3508 if (!info->is_shared || !head->shared) {
3509 dev_err(ctrl->device,
3510 "Duplicate unshared namespace %d\n",
3511 info->nsid);
3512 goto out_put_ns_head;
3513 }
3514 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3515 dev_err(ctrl->device,
3516 "IDs don't match for shared namespace %d\n",
3517 info->nsid);
3518 goto out_put_ns_head;
3519 }
3520
3521 if (!multipath) {
3522 dev_warn(ctrl->device,
3523 "Found shared namespace %d, but multipathing not supported.\n",
3524 info->nsid);
3525 dev_warn_once(ctrl->device,
3526 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n");
3527 }
3528 }
3529
3530 list_add_tail_rcu(&ns->siblings, &head->list);
3531 ns->head = head;
3532 mutex_unlock(&ctrl->subsys->lock);
3533 return 0;
3534
3535 out_put_ns_head:
3536 nvme_put_ns_head(head);
3537 out_unlock:
3538 mutex_unlock(&ctrl->subsys->lock);
3539 return ret;
3540 }
3541
nvme_find_get_ns(struct nvme_ctrl * ctrl,unsigned nsid)3542 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3543 {
3544 struct nvme_ns *ns, *ret = NULL;
3545 int srcu_idx;
3546
3547 srcu_idx = srcu_read_lock(&ctrl->srcu);
3548 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
3549 if (ns->head->ns_id == nsid) {
3550 if (!nvme_get_ns(ns))
3551 continue;
3552 ret = ns;
3553 break;
3554 }
3555 if (ns->head->ns_id > nsid)
3556 break;
3557 }
3558 srcu_read_unlock(&ctrl->srcu, srcu_idx);
3559 return ret;
3560 }
3561 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3562
3563 /*
3564 * Add the namespace to the controller list while keeping the list ordered.
3565 */
nvme_ns_add_to_ctrl_list(struct nvme_ns * ns)3566 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3567 {
3568 struct nvme_ns *tmp;
3569
3570 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3571 if (tmp->head->ns_id < ns->head->ns_id) {
3572 list_add_rcu(&ns->list, &tmp->list);
3573 return;
3574 }
3575 }
3576 list_add(&ns->list, &ns->ctrl->namespaces);
3577 }
3578
nvme_alloc_ns(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3579 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3580 {
3581 struct nvme_ns *ns;
3582 struct gendisk *disk;
3583 int node = ctrl->numa_node;
3584
3585 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3586 if (!ns)
3587 return;
3588
3589 disk = blk_mq_alloc_disk(ctrl->tagset, ns);
3590 if (IS_ERR(disk))
3591 goto out_free_ns;
3592 disk->fops = &nvme_bdev_ops;
3593 disk->private_data = ns;
3594
3595 ns->disk = disk;
3596 ns->queue = disk->queue;
3597
3598 if (ctrl->opts && ctrl->opts->data_digest)
3599 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
3600
3601 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
3602 if (ctrl->ops->supports_pci_p2pdma &&
3603 ctrl->ops->supports_pci_p2pdma(ctrl))
3604 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
3605
3606 ns->ctrl = ctrl;
3607 kref_init(&ns->kref);
3608
3609 if (nvme_init_ns_head(ns, info))
3610 goto out_cleanup_disk;
3611
3612 /*
3613 * If multipathing is enabled, the device name for all disks and not
3614 * just those that represent shared namespaces needs to be based on the
3615 * subsystem instance. Using the controller instance for private
3616 * namespaces could lead to naming collisions between shared and private
3617 * namespaces if they don't use a common numbering scheme.
3618 *
3619 * If multipathing is not enabled, disk names must use the controller
3620 * instance as shared namespaces will show up as multiple block
3621 * devices.
3622 */
3623 if (nvme_ns_head_multipath(ns->head)) {
3624 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3625 ctrl->instance, ns->head->instance);
3626 disk->flags |= GENHD_FL_HIDDEN;
3627 } else if (multipath) {
3628 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3629 ns->head->instance);
3630 } else {
3631 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3632 ns->head->instance);
3633 }
3634
3635 if (nvme_update_ns_info(ns, info))
3636 goto out_unlink_ns;
3637
3638 mutex_lock(&ctrl->namespaces_lock);
3639 /*
3640 * Ensure that no namespaces are added to the ctrl list after the queues
3641 * are frozen, thereby avoiding a deadlock between scan and reset.
3642 */
3643 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3644 mutex_unlock(&ctrl->namespaces_lock);
3645 goto out_unlink_ns;
3646 }
3647 nvme_ns_add_to_ctrl_list(ns);
3648 mutex_unlock(&ctrl->namespaces_lock);
3649 synchronize_srcu(&ctrl->srcu);
3650 nvme_get_ctrl(ctrl);
3651
3652 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups))
3653 goto out_cleanup_ns_from_list;
3654
3655 if (!nvme_ns_head_multipath(ns->head))
3656 nvme_add_ns_cdev(ns);
3657
3658 nvme_mpath_add_disk(ns, info->anagrpid);
3659 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3660
3661 return;
3662
3663 out_cleanup_ns_from_list:
3664 nvme_put_ctrl(ctrl);
3665 mutex_lock(&ctrl->namespaces_lock);
3666 list_del_rcu(&ns->list);
3667 mutex_unlock(&ctrl->namespaces_lock);
3668 synchronize_srcu(&ctrl->srcu);
3669 out_unlink_ns:
3670 mutex_lock(&ctrl->subsys->lock);
3671 list_del_rcu(&ns->siblings);
3672 if (list_empty(&ns->head->list))
3673 list_del_init(&ns->head->entry);
3674 mutex_unlock(&ctrl->subsys->lock);
3675 nvme_put_ns_head(ns->head);
3676 out_cleanup_disk:
3677 put_disk(disk);
3678 out_free_ns:
3679 kfree(ns);
3680 }
3681
nvme_ns_remove(struct nvme_ns * ns)3682 static void nvme_ns_remove(struct nvme_ns *ns)
3683 {
3684 bool last_path = false;
3685
3686 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3687 return;
3688
3689 clear_bit(NVME_NS_READY, &ns->flags);
3690 set_capacity(ns->disk, 0);
3691 nvme_fault_inject_fini(&ns->fault_inject);
3692
3693 /*
3694 * Ensure that !NVME_NS_READY is seen by other threads to prevent
3695 * this ns going back into current_path.
3696 */
3697 synchronize_srcu(&ns->head->srcu);
3698
3699 /* wait for concurrent submissions */
3700 if (nvme_mpath_clear_current_path(ns))
3701 synchronize_srcu(&ns->head->srcu);
3702
3703 mutex_lock(&ns->ctrl->subsys->lock);
3704 list_del_rcu(&ns->siblings);
3705 if (list_empty(&ns->head->list)) {
3706 list_del_init(&ns->head->entry);
3707 last_path = true;
3708 }
3709 mutex_unlock(&ns->ctrl->subsys->lock);
3710
3711 /* guarantee not available in head->list */
3712 synchronize_srcu(&ns->head->srcu);
3713
3714 if (!nvme_ns_head_multipath(ns->head))
3715 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3716 del_gendisk(ns->disk);
3717
3718 mutex_lock(&ns->ctrl->namespaces_lock);
3719 list_del_rcu(&ns->list);
3720 mutex_unlock(&ns->ctrl->namespaces_lock);
3721 synchronize_srcu(&ns->ctrl->srcu);
3722
3723 if (last_path)
3724 nvme_mpath_shutdown_disk(ns->head);
3725 nvme_put_ns(ns);
3726 }
3727
nvme_ns_remove_by_nsid(struct nvme_ctrl * ctrl,u32 nsid)3728 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3729 {
3730 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3731
3732 if (ns) {
3733 nvme_ns_remove(ns);
3734 nvme_put_ns(ns);
3735 }
3736 }
3737
nvme_validate_ns(struct nvme_ns * ns,struct nvme_ns_info * info)3738 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3739 {
3740 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
3741
3742 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3743 dev_err(ns->ctrl->device,
3744 "identifiers changed for nsid %d\n", ns->head->ns_id);
3745 goto out;
3746 }
3747
3748 ret = nvme_update_ns_info(ns, info);
3749 out:
3750 /*
3751 * Only remove the namespace if we got a fatal error back from the
3752 * device, otherwise ignore the error and just move on.
3753 *
3754 * TODO: we should probably schedule a delayed retry here.
3755 */
3756 if (ret > 0 && (ret & NVME_SC_DNR))
3757 nvme_ns_remove(ns);
3758 }
3759
nvme_scan_ns(struct nvme_ctrl * ctrl,unsigned nsid)3760 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3761 {
3762 struct nvme_ns_info info = { .nsid = nsid };
3763 struct nvme_ns *ns;
3764 int ret;
3765
3766 if (nvme_identify_ns_descs(ctrl, &info))
3767 return;
3768
3769 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3770 dev_warn(ctrl->device,
3771 "command set not reported for nsid: %d\n", nsid);
3772 return;
3773 }
3774
3775 /*
3776 * If available try to use the Command Set Idependent Identify Namespace
3777 * data structure to find all the generic information that is needed to
3778 * set up a namespace. If not fall back to the legacy version.
3779 */
3780 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
3781 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
3782 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
3783 else
3784 ret = nvme_ns_info_from_identify(ctrl, &info);
3785
3786 if (info.is_removed)
3787 nvme_ns_remove_by_nsid(ctrl, nsid);
3788
3789 /*
3790 * Ignore the namespace if it is not ready. We will get an AEN once it
3791 * becomes ready and restart the scan.
3792 */
3793 if (ret || !info.is_ready)
3794 return;
3795
3796 ns = nvme_find_get_ns(ctrl, nsid);
3797 if (ns) {
3798 nvme_validate_ns(ns, &info);
3799 nvme_put_ns(ns);
3800 } else {
3801 nvme_alloc_ns(ctrl, &info);
3802 }
3803 }
3804
nvme_remove_invalid_namespaces(struct nvme_ctrl * ctrl,unsigned nsid)3805 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
3806 unsigned nsid)
3807 {
3808 struct nvme_ns *ns, *next;
3809 LIST_HEAD(rm_list);
3810
3811 mutex_lock(&ctrl->namespaces_lock);
3812 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
3813 if (ns->head->ns_id > nsid) {
3814 list_del_rcu(&ns->list);
3815 synchronize_srcu(&ctrl->srcu);
3816 list_add_tail_rcu(&ns->list, &rm_list);
3817 }
3818 }
3819 mutex_unlock(&ctrl->namespaces_lock);
3820
3821 list_for_each_entry_safe(ns, next, &rm_list, list)
3822 nvme_ns_remove(ns);
3823 }
3824
nvme_scan_ns_list(struct nvme_ctrl * ctrl)3825 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
3826 {
3827 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
3828 __le32 *ns_list;
3829 u32 prev = 0;
3830 int ret = 0, i;
3831
3832 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
3833 if (!ns_list)
3834 return -ENOMEM;
3835
3836 for (;;) {
3837 struct nvme_command cmd = {
3838 .identify.opcode = nvme_admin_identify,
3839 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST,
3840 .identify.nsid = cpu_to_le32(prev),
3841 };
3842
3843 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
3844 NVME_IDENTIFY_DATA_SIZE);
3845 if (ret) {
3846 dev_warn(ctrl->device,
3847 "Identify NS List failed (status=0x%x)\n", ret);
3848 goto free;
3849 }
3850
3851 for (i = 0; i < nr_entries; i++) {
3852 u32 nsid = le32_to_cpu(ns_list[i]);
3853
3854 if (!nsid) /* end of the list? */
3855 goto out;
3856 nvme_scan_ns(ctrl, nsid);
3857 while (++prev < nsid)
3858 nvme_ns_remove_by_nsid(ctrl, prev);
3859 }
3860 }
3861 out:
3862 nvme_remove_invalid_namespaces(ctrl, prev);
3863 free:
3864 kfree(ns_list);
3865 return ret;
3866 }
3867
nvme_scan_ns_sequential(struct nvme_ctrl * ctrl)3868 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
3869 {
3870 struct nvme_id_ctrl *id;
3871 u32 nn, i;
3872
3873 if (nvme_identify_ctrl(ctrl, &id))
3874 return;
3875 nn = le32_to_cpu(id->nn);
3876 kfree(id);
3877
3878 for (i = 1; i <= nn; i++)
3879 nvme_scan_ns(ctrl, i);
3880
3881 nvme_remove_invalid_namespaces(ctrl, nn);
3882 }
3883
nvme_clear_changed_ns_log(struct nvme_ctrl * ctrl)3884 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
3885 {
3886 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
3887 __le32 *log;
3888 int error;
3889
3890 log = kzalloc(log_size, GFP_KERNEL);
3891 if (!log)
3892 return;
3893
3894 /*
3895 * We need to read the log to clear the AEN, but we don't want to rely
3896 * on it for the changed namespace information as userspace could have
3897 * raced with us in reading the log page, which could cause us to miss
3898 * updates.
3899 */
3900 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
3901 NVME_CSI_NVM, log, log_size, 0);
3902 if (error)
3903 dev_warn(ctrl->device,
3904 "reading changed ns log failed: %d\n", error);
3905
3906 kfree(log);
3907 }
3908
nvme_scan_work(struct work_struct * work)3909 static void nvme_scan_work(struct work_struct *work)
3910 {
3911 struct nvme_ctrl *ctrl =
3912 container_of(work, struct nvme_ctrl, scan_work);
3913 int ret;
3914
3915 /* No tagset on a live ctrl means IO queues could not created */
3916 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
3917 return;
3918
3919 /*
3920 * Identify controller limits can change at controller reset due to
3921 * new firmware download, even though it is not common we cannot ignore
3922 * such scenario. Controller's non-mdts limits are reported in the unit
3923 * of logical blocks that is dependent on the format of attached
3924 * namespace. Hence re-read the limits at the time of ns allocation.
3925 */
3926 ret = nvme_init_non_mdts_limits(ctrl);
3927 if (ret < 0) {
3928 dev_warn(ctrl->device,
3929 "reading non-mdts-limits failed: %d\n", ret);
3930 return;
3931 }
3932
3933 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
3934 dev_info(ctrl->device, "rescanning namespaces.\n");
3935 nvme_clear_changed_ns_log(ctrl);
3936 }
3937
3938 mutex_lock(&ctrl->scan_lock);
3939 if (nvme_ctrl_limited_cns(ctrl)) {
3940 nvme_scan_ns_sequential(ctrl);
3941 } else {
3942 /*
3943 * Fall back to sequential scan if DNR is set to handle broken
3944 * devices which should support Identify NS List (as per the VS
3945 * they report) but don't actually support it.
3946 */
3947 ret = nvme_scan_ns_list(ctrl);
3948 if (ret > 0 && ret & NVME_SC_DNR)
3949 nvme_scan_ns_sequential(ctrl);
3950 }
3951 mutex_unlock(&ctrl->scan_lock);
3952 }
3953
3954 /*
3955 * This function iterates the namespace list unlocked to allow recovery from
3956 * controller failure. It is up to the caller to ensure the namespace list is
3957 * not modified by scan work while this function is executing.
3958 */
nvme_remove_namespaces(struct nvme_ctrl * ctrl)3959 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
3960 {
3961 struct nvme_ns *ns, *next;
3962 LIST_HEAD(ns_list);
3963
3964 /*
3965 * make sure to requeue I/O to all namespaces as these
3966 * might result from the scan itself and must complete
3967 * for the scan_work to make progress
3968 */
3969 nvme_mpath_clear_ctrl_paths(ctrl);
3970
3971 /*
3972 * Unquiesce io queues so any pending IO won't hang, especially
3973 * those submitted from scan work
3974 */
3975 nvme_unquiesce_io_queues(ctrl);
3976
3977 /* prevent racing with ns scanning */
3978 flush_work(&ctrl->scan_work);
3979
3980 /*
3981 * The dead states indicates the controller was not gracefully
3982 * disconnected. In that case, we won't be able to flush any data while
3983 * removing the namespaces' disks; fail all the queues now to avoid
3984 * potentially having to clean up the failed sync later.
3985 */
3986 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
3987 nvme_mark_namespaces_dead(ctrl);
3988
3989 /* this is a no-op when called from the controller reset handler */
3990 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
3991
3992 mutex_lock(&ctrl->namespaces_lock);
3993 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu);
3994 mutex_unlock(&ctrl->namespaces_lock);
3995 synchronize_srcu(&ctrl->srcu);
3996
3997 list_for_each_entry_safe(ns, next, &ns_list, list)
3998 nvme_ns_remove(ns);
3999 }
4000 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4001
nvme_class_uevent(const struct device * dev,struct kobj_uevent_env * env)4002 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4003 {
4004 const struct nvme_ctrl *ctrl =
4005 container_of(dev, struct nvme_ctrl, ctrl_device);
4006 struct nvmf_ctrl_options *opts = ctrl->opts;
4007 int ret;
4008
4009 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4010 if (ret)
4011 return ret;
4012
4013 if (opts) {
4014 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4015 if (ret)
4016 return ret;
4017
4018 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4019 opts->trsvcid ?: "none");
4020 if (ret)
4021 return ret;
4022
4023 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4024 opts->host_traddr ?: "none");
4025 if (ret)
4026 return ret;
4027
4028 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4029 opts->host_iface ?: "none");
4030 }
4031 return ret;
4032 }
4033
nvme_change_uevent(struct nvme_ctrl * ctrl,char * envdata)4034 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4035 {
4036 char *envp[2] = { envdata, NULL };
4037
4038 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4039 }
4040
nvme_aen_uevent(struct nvme_ctrl * ctrl)4041 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4042 {
4043 char *envp[2] = { NULL, NULL };
4044 u32 aen_result = ctrl->aen_result;
4045
4046 ctrl->aen_result = 0;
4047 if (!aen_result)
4048 return;
4049
4050 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4051 if (!envp[0])
4052 return;
4053 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4054 kfree(envp[0]);
4055 }
4056
nvme_async_event_work(struct work_struct * work)4057 static void nvme_async_event_work(struct work_struct *work)
4058 {
4059 struct nvme_ctrl *ctrl =
4060 container_of(work, struct nvme_ctrl, async_event_work);
4061
4062 nvme_aen_uevent(ctrl);
4063
4064 /*
4065 * The transport drivers must guarantee AER submission here is safe by
4066 * flushing ctrl async_event_work after changing the controller state
4067 * from LIVE and before freeing the admin queue.
4068 */
4069 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4070 ctrl->ops->submit_async_event(ctrl);
4071 }
4072
nvme_ctrl_pp_status(struct nvme_ctrl * ctrl)4073 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4074 {
4075
4076 u32 csts;
4077
4078 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4079 return false;
4080
4081 if (csts == ~0)
4082 return false;
4083
4084 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4085 }
4086
nvme_get_fw_slot_info(struct nvme_ctrl * ctrl)4087 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4088 {
4089 struct nvme_fw_slot_info_log *log;
4090
4091 log = kmalloc(sizeof(*log), GFP_KERNEL);
4092 if (!log)
4093 return;
4094
4095 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4096 log, sizeof(*log), 0))
4097 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4098 kfree(log);
4099 }
4100
nvme_fw_act_work(struct work_struct * work)4101 static void nvme_fw_act_work(struct work_struct *work)
4102 {
4103 struct nvme_ctrl *ctrl = container_of(work,
4104 struct nvme_ctrl, fw_act_work);
4105 unsigned long fw_act_timeout;
4106
4107 nvme_auth_stop(ctrl);
4108
4109 if (ctrl->mtfa)
4110 fw_act_timeout = jiffies +
4111 msecs_to_jiffies(ctrl->mtfa * 100);
4112 else
4113 fw_act_timeout = jiffies +
4114 msecs_to_jiffies(admin_timeout * 1000);
4115
4116 nvme_quiesce_io_queues(ctrl);
4117 while (nvme_ctrl_pp_status(ctrl)) {
4118 if (time_after(jiffies, fw_act_timeout)) {
4119 dev_warn(ctrl->device,
4120 "Fw activation timeout, reset controller\n");
4121 nvme_try_sched_reset(ctrl);
4122 return;
4123 }
4124 msleep(100);
4125 }
4126
4127 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4128 return;
4129
4130 nvme_unquiesce_io_queues(ctrl);
4131 /* read FW slot information to clear the AER */
4132 nvme_get_fw_slot_info(ctrl);
4133
4134 queue_work(nvme_wq, &ctrl->async_event_work);
4135 }
4136
nvme_aer_type(u32 result)4137 static u32 nvme_aer_type(u32 result)
4138 {
4139 return result & 0x7;
4140 }
4141
nvme_aer_subtype(u32 result)4142 static u32 nvme_aer_subtype(u32 result)
4143 {
4144 return (result & 0xff00) >> 8;
4145 }
4146
nvme_handle_aen_notice(struct nvme_ctrl * ctrl,u32 result)4147 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4148 {
4149 u32 aer_notice_type = nvme_aer_subtype(result);
4150 bool requeue = true;
4151
4152 switch (aer_notice_type) {
4153 case NVME_AER_NOTICE_NS_CHANGED:
4154 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4155 nvme_queue_scan(ctrl);
4156 break;
4157 case NVME_AER_NOTICE_FW_ACT_STARTING:
4158 /*
4159 * We are (ab)using the RESETTING state to prevent subsequent
4160 * recovery actions from interfering with the controller's
4161 * firmware activation.
4162 */
4163 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4164 requeue = false;
4165 queue_work(nvme_wq, &ctrl->fw_act_work);
4166 }
4167 break;
4168 #ifdef CONFIG_NVME_MULTIPATH
4169 case NVME_AER_NOTICE_ANA:
4170 if (!ctrl->ana_log_buf)
4171 break;
4172 queue_work(nvme_wq, &ctrl->ana_work);
4173 break;
4174 #endif
4175 case NVME_AER_NOTICE_DISC_CHANGED:
4176 ctrl->aen_result = result;
4177 break;
4178 default:
4179 dev_warn(ctrl->device, "async event result %08x\n", result);
4180 }
4181 return requeue;
4182 }
4183
nvme_handle_aer_persistent_error(struct nvme_ctrl * ctrl)4184 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4185 {
4186 dev_warn(ctrl->device, "resetting controller due to AER\n");
4187 nvme_reset_ctrl(ctrl);
4188 }
4189
nvme_complete_async_event(struct nvme_ctrl * ctrl,__le16 status,volatile union nvme_result * res)4190 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4191 volatile union nvme_result *res)
4192 {
4193 u32 result = le32_to_cpu(res->u32);
4194 u32 aer_type = nvme_aer_type(result);
4195 u32 aer_subtype = nvme_aer_subtype(result);
4196 bool requeue = true;
4197
4198 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4199 return;
4200
4201 trace_nvme_async_event(ctrl, result);
4202 switch (aer_type) {
4203 case NVME_AER_NOTICE:
4204 requeue = nvme_handle_aen_notice(ctrl, result);
4205 break;
4206 case NVME_AER_ERROR:
4207 /*
4208 * For a persistent internal error, don't run async_event_work
4209 * to submit a new AER. The controller reset will do it.
4210 */
4211 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4212 nvme_handle_aer_persistent_error(ctrl);
4213 return;
4214 }
4215 fallthrough;
4216 case NVME_AER_SMART:
4217 case NVME_AER_CSS:
4218 case NVME_AER_VS:
4219 ctrl->aen_result = result;
4220 break;
4221 default:
4222 break;
4223 }
4224
4225 if (requeue)
4226 queue_work(nvme_wq, &ctrl->async_event_work);
4227 }
4228 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4229
nvme_alloc_admin_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int cmd_size)4230 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4231 const struct blk_mq_ops *ops, unsigned int cmd_size)
4232 {
4233 int ret;
4234
4235 memset(set, 0, sizeof(*set));
4236 set->ops = ops;
4237 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4238 if (ctrl->ops->flags & NVME_F_FABRICS)
4239 /* Reserved for fabric connect and keep alive */
4240 set->reserved_tags = 2;
4241 set->numa_node = ctrl->numa_node;
4242 set->flags = BLK_MQ_F_NO_SCHED;
4243 if (ctrl->ops->flags & NVME_F_BLOCKING)
4244 set->flags |= BLK_MQ_F_BLOCKING;
4245 set->cmd_size = cmd_size;
4246 set->driver_data = ctrl;
4247 set->nr_hw_queues = 1;
4248 set->timeout = NVME_ADMIN_TIMEOUT;
4249 ret = blk_mq_alloc_tag_set(set);
4250 if (ret)
4251 return ret;
4252
4253 ctrl->admin_q = blk_mq_init_queue(set);
4254 if (IS_ERR(ctrl->admin_q)) {
4255 ret = PTR_ERR(ctrl->admin_q);
4256 goto out_free_tagset;
4257 }
4258
4259 if (ctrl->ops->flags & NVME_F_FABRICS) {
4260 ctrl->fabrics_q = blk_mq_init_queue(set);
4261 if (IS_ERR(ctrl->fabrics_q)) {
4262 ret = PTR_ERR(ctrl->fabrics_q);
4263 goto out_cleanup_admin_q;
4264 }
4265 }
4266
4267 ctrl->admin_tagset = set;
4268 return 0;
4269
4270 out_cleanup_admin_q:
4271 blk_mq_destroy_queue(ctrl->admin_q);
4272 blk_put_queue(ctrl->admin_q);
4273 out_free_tagset:
4274 blk_mq_free_tag_set(set);
4275 ctrl->admin_q = NULL;
4276 ctrl->fabrics_q = NULL;
4277 return ret;
4278 }
4279 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4280
nvme_remove_admin_tag_set(struct nvme_ctrl * ctrl)4281 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4282 {
4283 blk_mq_destroy_queue(ctrl->admin_q);
4284 blk_put_queue(ctrl->admin_q);
4285 if (ctrl->ops->flags & NVME_F_FABRICS) {
4286 blk_mq_destroy_queue(ctrl->fabrics_q);
4287 blk_put_queue(ctrl->fabrics_q);
4288 }
4289 blk_mq_free_tag_set(ctrl->admin_tagset);
4290 }
4291 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4292
nvme_alloc_io_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int nr_maps,unsigned int cmd_size)4293 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4294 const struct blk_mq_ops *ops, unsigned int nr_maps,
4295 unsigned int cmd_size)
4296 {
4297 int ret;
4298
4299 memset(set, 0, sizeof(*set));
4300 set->ops = ops;
4301 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4302 /*
4303 * Some Apple controllers requires tags to be unique across admin and
4304 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4305 */
4306 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4307 set->reserved_tags = NVME_AQ_DEPTH;
4308 else if (ctrl->ops->flags & NVME_F_FABRICS)
4309 /* Reserved for fabric connect */
4310 set->reserved_tags = 1;
4311 set->numa_node = ctrl->numa_node;
4312 set->flags = BLK_MQ_F_SHOULD_MERGE;
4313 if (ctrl->ops->flags & NVME_F_BLOCKING)
4314 set->flags |= BLK_MQ_F_BLOCKING;
4315 set->cmd_size = cmd_size,
4316 set->driver_data = ctrl;
4317 set->nr_hw_queues = ctrl->queue_count - 1;
4318 set->timeout = NVME_IO_TIMEOUT;
4319 set->nr_maps = nr_maps;
4320 ret = blk_mq_alloc_tag_set(set);
4321 if (ret)
4322 return ret;
4323
4324 if (ctrl->ops->flags & NVME_F_FABRICS) {
4325 ctrl->connect_q = blk_mq_init_queue(set);
4326 if (IS_ERR(ctrl->connect_q)) {
4327 ret = PTR_ERR(ctrl->connect_q);
4328 goto out_free_tag_set;
4329 }
4330 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4331 ctrl->connect_q);
4332 }
4333
4334 ctrl->tagset = set;
4335 return 0;
4336
4337 out_free_tag_set:
4338 blk_mq_free_tag_set(set);
4339 ctrl->connect_q = NULL;
4340 return ret;
4341 }
4342 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4343
nvme_remove_io_tag_set(struct nvme_ctrl * ctrl)4344 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4345 {
4346 if (ctrl->ops->flags & NVME_F_FABRICS) {
4347 blk_mq_destroy_queue(ctrl->connect_q);
4348 blk_put_queue(ctrl->connect_q);
4349 }
4350 blk_mq_free_tag_set(ctrl->tagset);
4351 }
4352 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4353
nvme_stop_ctrl(struct nvme_ctrl * ctrl)4354 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4355 {
4356 nvme_mpath_stop(ctrl);
4357 nvme_auth_stop(ctrl);
4358 nvme_stop_keep_alive(ctrl);
4359 nvme_stop_failfast_work(ctrl);
4360 flush_work(&ctrl->async_event_work);
4361 cancel_work_sync(&ctrl->fw_act_work);
4362 if (ctrl->ops->stop_ctrl)
4363 ctrl->ops->stop_ctrl(ctrl);
4364 }
4365 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4366
nvme_start_ctrl(struct nvme_ctrl * ctrl)4367 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4368 {
4369 nvme_start_keep_alive(ctrl);
4370
4371 nvme_enable_aen(ctrl);
4372
4373 /*
4374 * persistent discovery controllers need to send indication to userspace
4375 * to re-read the discovery log page to learn about possible changes
4376 * that were missed. We identify persistent discovery controllers by
4377 * checking that they started once before, hence are reconnecting back.
4378 */
4379 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4380 nvme_discovery_ctrl(ctrl))
4381 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4382
4383 if (ctrl->queue_count > 1) {
4384 nvme_queue_scan(ctrl);
4385 nvme_unquiesce_io_queues(ctrl);
4386 nvme_mpath_update(ctrl);
4387 }
4388
4389 nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4390 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4391 }
4392 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4393
nvme_uninit_ctrl(struct nvme_ctrl * ctrl)4394 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4395 {
4396 nvme_hwmon_exit(ctrl);
4397 nvme_fault_inject_fini(&ctrl->fault_inject);
4398 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4399 cdev_device_del(&ctrl->cdev, ctrl->device);
4400 nvme_put_ctrl(ctrl);
4401 }
4402 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4403
nvme_free_cels(struct nvme_ctrl * ctrl)4404 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4405 {
4406 struct nvme_effects_log *cel;
4407 unsigned long i;
4408
4409 xa_for_each(&ctrl->cels, i, cel) {
4410 xa_erase(&ctrl->cels, i);
4411 kfree(cel);
4412 }
4413
4414 xa_destroy(&ctrl->cels);
4415 }
4416
nvme_free_ctrl(struct device * dev)4417 static void nvme_free_ctrl(struct device *dev)
4418 {
4419 struct nvme_ctrl *ctrl =
4420 container_of(dev, struct nvme_ctrl, ctrl_device);
4421 struct nvme_subsystem *subsys = ctrl->subsys;
4422
4423 if (!subsys || ctrl->instance != subsys->instance)
4424 ida_free(&nvme_instance_ida, ctrl->instance);
4425
4426 nvme_free_cels(ctrl);
4427 nvme_mpath_uninit(ctrl);
4428 cleanup_srcu_struct(&ctrl->srcu);
4429 nvme_auth_stop(ctrl);
4430 nvme_auth_free(ctrl);
4431 __free_page(ctrl->discard_page);
4432 free_opal_dev(ctrl->opal_dev);
4433
4434 if (subsys) {
4435 mutex_lock(&nvme_subsystems_lock);
4436 list_del(&ctrl->subsys_entry);
4437 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4438 mutex_unlock(&nvme_subsystems_lock);
4439 }
4440
4441 ctrl->ops->free_ctrl(ctrl);
4442
4443 if (subsys)
4444 nvme_put_subsystem(subsys);
4445 }
4446
4447 /*
4448 * Initialize a NVMe controller structures. This needs to be called during
4449 * earliest initialization so that we have the initialized structured around
4450 * during probing.
4451 */
nvme_init_ctrl(struct nvme_ctrl * ctrl,struct device * dev,const struct nvme_ctrl_ops * ops,unsigned long quirks)4452 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4453 const struct nvme_ctrl_ops *ops, unsigned long quirks)
4454 {
4455 int ret;
4456
4457 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4458 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4459 spin_lock_init(&ctrl->lock);
4460 mutex_init(&ctrl->namespaces_lock);
4461
4462 ret = init_srcu_struct(&ctrl->srcu);
4463 if (ret)
4464 return ret;
4465
4466 mutex_init(&ctrl->scan_lock);
4467 INIT_LIST_HEAD(&ctrl->namespaces);
4468 xa_init(&ctrl->cels);
4469 ctrl->dev = dev;
4470 ctrl->ops = ops;
4471 ctrl->quirks = quirks;
4472 ctrl->numa_node = NUMA_NO_NODE;
4473 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4474 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4475 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4476 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4477 init_waitqueue_head(&ctrl->state_wq);
4478
4479 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4480 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4481 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4482 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4483
4484 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4485 PAGE_SIZE);
4486 ctrl->discard_page = alloc_page(GFP_KERNEL);
4487 if (!ctrl->discard_page) {
4488 ret = -ENOMEM;
4489 goto out;
4490 }
4491
4492 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4493 if (ret < 0)
4494 goto out;
4495 ctrl->instance = ret;
4496
4497 device_initialize(&ctrl->ctrl_device);
4498 ctrl->device = &ctrl->ctrl_device;
4499 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4500 ctrl->instance);
4501 ctrl->device->class = nvme_class;
4502 ctrl->device->parent = ctrl->dev;
4503 if (ops->dev_attr_groups)
4504 ctrl->device->groups = ops->dev_attr_groups;
4505 else
4506 ctrl->device->groups = nvme_dev_attr_groups;
4507 ctrl->device->release = nvme_free_ctrl;
4508 dev_set_drvdata(ctrl->device, ctrl);
4509 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4510 if (ret)
4511 goto out_release_instance;
4512
4513 nvme_get_ctrl(ctrl);
4514 cdev_init(&ctrl->cdev, &nvme_dev_fops);
4515 ctrl->cdev.owner = ops->module;
4516 ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4517 if (ret)
4518 goto out_free_name;
4519
4520 /*
4521 * Initialize latency tolerance controls. The sysfs files won't
4522 * be visible to userspace unless the device actually supports APST.
4523 */
4524 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4525 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4526 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4527
4528 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4529 nvme_mpath_init_ctrl(ctrl);
4530 ret = nvme_auth_init_ctrl(ctrl);
4531 if (ret)
4532 goto out_free_cdev;
4533
4534 return 0;
4535 out_free_cdev:
4536 nvme_fault_inject_fini(&ctrl->fault_inject);
4537 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4538 cdev_device_del(&ctrl->cdev, ctrl->device);
4539 out_free_name:
4540 nvme_put_ctrl(ctrl);
4541 kfree_const(ctrl->device->kobj.name);
4542 out_release_instance:
4543 ida_free(&nvme_instance_ida, ctrl->instance);
4544 out:
4545 if (ctrl->discard_page)
4546 __free_page(ctrl->discard_page);
4547 cleanup_srcu_struct(&ctrl->srcu);
4548 return ret;
4549 }
4550 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4551
4552 /* let I/O to all namespaces fail in preparation for surprise removal */
nvme_mark_namespaces_dead(struct nvme_ctrl * ctrl)4553 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4554 {
4555 struct nvme_ns *ns;
4556 int srcu_idx;
4557
4558 srcu_idx = srcu_read_lock(&ctrl->srcu);
4559 list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4560 blk_mark_disk_dead(ns->disk);
4561 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4562 }
4563 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4564
nvme_unfreeze(struct nvme_ctrl * ctrl)4565 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4566 {
4567 struct nvme_ns *ns;
4568 int srcu_idx;
4569
4570 srcu_idx = srcu_read_lock(&ctrl->srcu);
4571 list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4572 blk_mq_unfreeze_queue(ns->queue);
4573 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4574 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4575 }
4576 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4577
nvme_wait_freeze_timeout(struct nvme_ctrl * ctrl,long timeout)4578 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4579 {
4580 struct nvme_ns *ns;
4581 int srcu_idx;
4582
4583 srcu_idx = srcu_read_lock(&ctrl->srcu);
4584 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
4585 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4586 if (timeout <= 0)
4587 break;
4588 }
4589 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4590 return timeout;
4591 }
4592 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4593
nvme_wait_freeze(struct nvme_ctrl * ctrl)4594 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4595 {
4596 struct nvme_ns *ns;
4597 int srcu_idx;
4598
4599 srcu_idx = srcu_read_lock(&ctrl->srcu);
4600 list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4601 blk_mq_freeze_queue_wait(ns->queue);
4602 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4603 }
4604 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4605
nvme_start_freeze(struct nvme_ctrl * ctrl)4606 void nvme_start_freeze(struct nvme_ctrl *ctrl)
4607 {
4608 struct nvme_ns *ns;
4609 int srcu_idx;
4610
4611 set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4612 srcu_idx = srcu_read_lock(&ctrl->srcu);
4613 list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4614 blk_freeze_queue_start(ns->queue);
4615 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4616 }
4617 EXPORT_SYMBOL_GPL(nvme_start_freeze);
4618
nvme_quiesce_io_queues(struct nvme_ctrl * ctrl)4619 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4620 {
4621 if (!ctrl->tagset)
4622 return;
4623 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4624 blk_mq_quiesce_tagset(ctrl->tagset);
4625 else
4626 blk_mq_wait_quiesce_done(ctrl->tagset);
4627 }
4628 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4629
nvme_unquiesce_io_queues(struct nvme_ctrl * ctrl)4630 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4631 {
4632 if (!ctrl->tagset)
4633 return;
4634 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4635 blk_mq_unquiesce_tagset(ctrl->tagset);
4636 }
4637 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4638
nvme_quiesce_admin_queue(struct nvme_ctrl * ctrl)4639 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4640 {
4641 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4642 blk_mq_quiesce_queue(ctrl->admin_q);
4643 else
4644 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4645 }
4646 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4647
nvme_unquiesce_admin_queue(struct nvme_ctrl * ctrl)4648 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4649 {
4650 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4651 blk_mq_unquiesce_queue(ctrl->admin_q);
4652 }
4653 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4654
nvme_sync_io_queues(struct nvme_ctrl * ctrl)4655 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4656 {
4657 struct nvme_ns *ns;
4658 int srcu_idx;
4659
4660 srcu_idx = srcu_read_lock(&ctrl->srcu);
4661 list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4662 blk_sync_queue(ns->queue);
4663 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4664 }
4665 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4666
nvme_sync_queues(struct nvme_ctrl * ctrl)4667 void nvme_sync_queues(struct nvme_ctrl *ctrl)
4668 {
4669 nvme_sync_io_queues(ctrl);
4670 if (ctrl->admin_q)
4671 blk_sync_queue(ctrl->admin_q);
4672 }
4673 EXPORT_SYMBOL_GPL(nvme_sync_queues);
4674
nvme_ctrl_from_file(struct file * file)4675 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4676 {
4677 if (file->f_op != &nvme_dev_fops)
4678 return NULL;
4679 return file->private_data;
4680 }
4681 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4682
4683 /*
4684 * Check we didn't inadvertently grow the command structure sizes:
4685 */
_nvme_check_size(void)4686 static inline void _nvme_check_size(void)
4687 {
4688 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4689 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4690 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4691 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4692 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4693 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4694 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4695 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4696 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4697 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4698 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4699 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4700 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4701 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4702 NVME_IDENTIFY_DATA_SIZE);
4703 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4704 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
4705 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
4706 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
4707 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
4708 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
4709 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
4710 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
4711 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
4712 }
4713
4714
nvme_core_init(void)4715 static int __init nvme_core_init(void)
4716 {
4717 int result = -ENOMEM;
4718
4719 _nvme_check_size();
4720
4721 nvme_wq = alloc_workqueue("nvme-wq",
4722 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4723 if (!nvme_wq)
4724 goto out;
4725
4726 nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
4727 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4728 if (!nvme_reset_wq)
4729 goto destroy_wq;
4730
4731 nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
4732 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4733 if (!nvme_delete_wq)
4734 goto destroy_reset_wq;
4735
4736 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
4737 NVME_MINORS, "nvme");
4738 if (result < 0)
4739 goto destroy_delete_wq;
4740
4741 nvme_class = class_create("nvme");
4742 if (IS_ERR(nvme_class)) {
4743 result = PTR_ERR(nvme_class);
4744 goto unregister_chrdev;
4745 }
4746 nvme_class->dev_uevent = nvme_class_uevent;
4747
4748 nvme_subsys_class = class_create("nvme-subsystem");
4749 if (IS_ERR(nvme_subsys_class)) {
4750 result = PTR_ERR(nvme_subsys_class);
4751 goto destroy_class;
4752 }
4753
4754 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
4755 "nvme-generic");
4756 if (result < 0)
4757 goto destroy_subsys_class;
4758
4759 nvme_ns_chr_class = class_create("nvme-generic");
4760 if (IS_ERR(nvme_ns_chr_class)) {
4761 result = PTR_ERR(nvme_ns_chr_class);
4762 goto unregister_generic_ns;
4763 }
4764
4765 result = nvme_init_auth();
4766 if (result)
4767 goto destroy_ns_chr;
4768 return 0;
4769
4770 destroy_ns_chr:
4771 class_destroy(nvme_ns_chr_class);
4772 unregister_generic_ns:
4773 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4774 destroy_subsys_class:
4775 class_destroy(nvme_subsys_class);
4776 destroy_class:
4777 class_destroy(nvme_class);
4778 unregister_chrdev:
4779 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4780 destroy_delete_wq:
4781 destroy_workqueue(nvme_delete_wq);
4782 destroy_reset_wq:
4783 destroy_workqueue(nvme_reset_wq);
4784 destroy_wq:
4785 destroy_workqueue(nvme_wq);
4786 out:
4787 return result;
4788 }
4789
nvme_core_exit(void)4790 static void __exit nvme_core_exit(void)
4791 {
4792 nvme_exit_auth();
4793 class_destroy(nvme_ns_chr_class);
4794 class_destroy(nvme_subsys_class);
4795 class_destroy(nvme_class);
4796 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4797 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4798 destroy_workqueue(nvme_delete_wq);
4799 destroy_workqueue(nvme_reset_wq);
4800 destroy_workqueue(nvme_wq);
4801 ida_destroy(&nvme_ns_chr_minor_ida);
4802 ida_destroy(&nvme_instance_ida);
4803 }
4804
4805 MODULE_LICENSE("GPL");
4806 MODULE_VERSION("1.0");
4807 module_init(nvme_core_init);
4808 module_exit(nvme_core_exit);
4809