1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
3
4 /* The driver transmit and receive code */
5
6 #include <linux/mm.h>
7 #include <linux/netdevice.h>
8 #include <linux/prefetch.h>
9 #include <linux/bpf_trace.h>
10 #include <net/dsfield.h>
11 #include <net/mpls.h>
12 #include <net/xdp.h>
13 #include "ice_txrx_lib.h"
14 #include "ice_lib.h"
15 #include "ice.h"
16 #include "ice_trace.h"
17 #include "ice_dcb_lib.h"
18 #include "ice_xsk.h"
19 #include "ice_eswitch.h"
20
21 #define ICE_RX_HDR_SIZE 256
22
23 #define FDIR_DESC_RXDID 0x40
24 #define ICE_FDIR_CLEAN_DELAY 10
25
26 /**
27 * ice_prgm_fdir_fltr - Program a Flow Director filter
28 * @vsi: VSI to send dummy packet
29 * @fdir_desc: flow director descriptor
30 * @raw_packet: allocated buffer for flow director
31 */
32 int
ice_prgm_fdir_fltr(struct ice_vsi * vsi,struct ice_fltr_desc * fdir_desc,u8 * raw_packet)33 ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34 u8 *raw_packet)
35 {
36 struct ice_tx_buf *tx_buf, *first;
37 struct ice_fltr_desc *f_desc;
38 struct ice_tx_desc *tx_desc;
39 struct ice_tx_ring *tx_ring;
40 struct device *dev;
41 dma_addr_t dma;
42 u32 td_cmd;
43 u16 i;
44
45 /* VSI and Tx ring */
46 if (!vsi)
47 return -ENOENT;
48 tx_ring = vsi->tx_rings[0];
49 if (!tx_ring || !tx_ring->desc)
50 return -ENOENT;
51 dev = tx_ring->dev;
52
53 /* we are using two descriptors to add/del a filter and we can wait */
54 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55 if (!i)
56 return -EAGAIN;
57 msleep_interruptible(1);
58 }
59
60 dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61 DMA_TO_DEVICE);
62
63 if (dma_mapping_error(dev, dma))
64 return -EINVAL;
65
66 /* grab the next descriptor */
67 i = tx_ring->next_to_use;
68 first = &tx_ring->tx_buf[i];
69 f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71
72 i++;
73 i = (i < tx_ring->count) ? i : 0;
74 tx_desc = ICE_TX_DESC(tx_ring, i);
75 tx_buf = &tx_ring->tx_buf[i];
76
77 i++;
78 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79
80 memset(tx_buf, 0, sizeof(*tx_buf));
81 dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 dma_unmap_addr_set(tx_buf, dma, dma);
83
84 tx_desc->buf_addr = cpu_to_le64(dma);
85 td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86 ICE_TX_DESC_CMD_RE;
87
88 tx_buf->type = ICE_TX_BUF_DUMMY;
89 tx_buf->raw_buf = raw_packet;
90
91 tx_desc->cmd_type_offset_bsz =
92 ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93
94 /* Force memory write to complete before letting h/w know
95 * there are new descriptors to fetch.
96 */
97 wmb();
98
99 /* mark the data descriptor to be watched */
100 first->next_to_watch = tx_desc;
101
102 writel(tx_ring->next_to_use, tx_ring->tail);
103
104 return 0;
105 }
106
107 /**
108 * ice_unmap_and_free_tx_buf - Release a Tx buffer
109 * @ring: the ring that owns the buffer
110 * @tx_buf: the buffer to free
111 */
112 static void
ice_unmap_and_free_tx_buf(struct ice_tx_ring * ring,struct ice_tx_buf * tx_buf)113 ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114 {
115 if (dma_unmap_len(tx_buf, len))
116 dma_unmap_page(ring->dev,
117 dma_unmap_addr(tx_buf, dma),
118 dma_unmap_len(tx_buf, len),
119 DMA_TO_DEVICE);
120
121 switch (tx_buf->type) {
122 case ICE_TX_BUF_DUMMY:
123 devm_kfree(ring->dev, tx_buf->raw_buf);
124 break;
125 case ICE_TX_BUF_SKB:
126 dev_kfree_skb_any(tx_buf->skb);
127 break;
128 case ICE_TX_BUF_XDP_TX:
129 page_frag_free(tx_buf->raw_buf);
130 break;
131 case ICE_TX_BUF_XDP_XMIT:
132 xdp_return_frame(tx_buf->xdpf);
133 break;
134 }
135
136 tx_buf->next_to_watch = NULL;
137 tx_buf->type = ICE_TX_BUF_EMPTY;
138 dma_unmap_len_set(tx_buf, len, 0);
139 /* tx_buf must be completely set up in the transmit path */
140 }
141
txring_txq(const struct ice_tx_ring * ring)142 static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
143 {
144 return netdev_get_tx_queue(ring->netdev, ring->q_index);
145 }
146
147 /**
148 * ice_clean_tx_ring - Free any empty Tx buffers
149 * @tx_ring: ring to be cleaned
150 */
ice_clean_tx_ring(struct ice_tx_ring * tx_ring)151 void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
152 {
153 u32 size;
154 u16 i;
155
156 if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
157 ice_xsk_clean_xdp_ring(tx_ring);
158 goto tx_skip_free;
159 }
160
161 /* ring already cleared, nothing to do */
162 if (!tx_ring->tx_buf)
163 return;
164
165 /* Free all the Tx ring sk_buffs */
166 for (i = 0; i < tx_ring->count; i++)
167 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
168
169 tx_skip_free:
170 memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
171
172 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
173 PAGE_SIZE);
174 /* Zero out the descriptor ring */
175 memset(tx_ring->desc, 0, size);
176
177 tx_ring->next_to_use = 0;
178 tx_ring->next_to_clean = 0;
179
180 if (!tx_ring->netdev)
181 return;
182
183 /* cleanup Tx queue statistics */
184 netdev_tx_reset_queue(txring_txq(tx_ring));
185 }
186
187 /**
188 * ice_free_tx_ring - Free Tx resources per queue
189 * @tx_ring: Tx descriptor ring for a specific queue
190 *
191 * Free all transmit software resources
192 */
ice_free_tx_ring(struct ice_tx_ring * tx_ring)193 void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
194 {
195 u32 size;
196
197 ice_clean_tx_ring(tx_ring);
198 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 tx_ring->tx_buf = NULL;
200
201 if (tx_ring->desc) {
202 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
203 PAGE_SIZE);
204 dmam_free_coherent(tx_ring->dev, size,
205 tx_ring->desc, tx_ring->dma);
206 tx_ring->desc = NULL;
207 }
208 }
209
210 /**
211 * ice_clean_tx_irq - Reclaim resources after transmit completes
212 * @tx_ring: Tx ring to clean
213 * @napi_budget: Used to determine if we are in netpoll
214 *
215 * Returns true if there's any budget left (e.g. the clean is finished)
216 */
ice_clean_tx_irq(struct ice_tx_ring * tx_ring,int napi_budget)217 static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
218 {
219 unsigned int total_bytes = 0, total_pkts = 0;
220 unsigned int budget = ICE_DFLT_IRQ_WORK;
221 struct ice_vsi *vsi = tx_ring->vsi;
222 s16 i = tx_ring->next_to_clean;
223 struct ice_tx_desc *tx_desc;
224 struct ice_tx_buf *tx_buf;
225
226 /* get the bql data ready */
227 netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
228
229 tx_buf = &tx_ring->tx_buf[i];
230 tx_desc = ICE_TX_DESC(tx_ring, i);
231 i -= tx_ring->count;
232
233 prefetch(&vsi->state);
234
235 do {
236 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
237
238 /* if next_to_watch is not set then there is no work pending */
239 if (!eop_desc)
240 break;
241
242 /* follow the guidelines of other drivers */
243 prefetchw(&tx_buf->skb->users);
244
245 smp_rmb(); /* prevent any other reads prior to eop_desc */
246
247 ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 /* if the descriptor isn't done, no work yet to do */
249 if (!(eop_desc->cmd_type_offset_bsz &
250 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
251 break;
252
253 /* clear next_to_watch to prevent false hangs */
254 tx_buf->next_to_watch = NULL;
255
256 /* update the statistics for this packet */
257 total_bytes += tx_buf->bytecount;
258 total_pkts += tx_buf->gso_segs;
259
260 /* free the skb */
261 napi_consume_skb(tx_buf->skb, napi_budget);
262
263 /* unmap skb header data */
264 dma_unmap_single(tx_ring->dev,
265 dma_unmap_addr(tx_buf, dma),
266 dma_unmap_len(tx_buf, len),
267 DMA_TO_DEVICE);
268
269 /* clear tx_buf data */
270 tx_buf->type = ICE_TX_BUF_EMPTY;
271 dma_unmap_len_set(tx_buf, len, 0);
272
273 /* unmap remaining buffers */
274 while (tx_desc != eop_desc) {
275 ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
276 tx_buf++;
277 tx_desc++;
278 i++;
279 if (unlikely(!i)) {
280 i -= tx_ring->count;
281 tx_buf = tx_ring->tx_buf;
282 tx_desc = ICE_TX_DESC(tx_ring, 0);
283 }
284
285 /* unmap any remaining paged data */
286 if (dma_unmap_len(tx_buf, len)) {
287 dma_unmap_page(tx_ring->dev,
288 dma_unmap_addr(tx_buf, dma),
289 dma_unmap_len(tx_buf, len),
290 DMA_TO_DEVICE);
291 dma_unmap_len_set(tx_buf, len, 0);
292 }
293 }
294 ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
295
296 /* move us one more past the eop_desc for start of next pkt */
297 tx_buf++;
298 tx_desc++;
299 i++;
300 if (unlikely(!i)) {
301 i -= tx_ring->count;
302 tx_buf = tx_ring->tx_buf;
303 tx_desc = ICE_TX_DESC(tx_ring, 0);
304 }
305
306 prefetch(tx_desc);
307
308 /* update budget accounting */
309 budget--;
310 } while (likely(budget));
311
312 i += tx_ring->count;
313 tx_ring->next_to_clean = i;
314
315 ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
317
318 #define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 /* Make sure that anybody stopping the queue after this
322 * sees the new next_to_clean.
323 */
324 smp_mb();
325 if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 netif_tx_wake_queue(txring_txq(tx_ring));
328 ++tx_ring->ring_stats->tx_stats.restart_q;
329 }
330 }
331
332 return !!budget;
333 }
334
335 /**
336 * ice_setup_tx_ring - Allocate the Tx descriptors
337 * @tx_ring: the Tx ring to set up
338 *
339 * Return 0 on success, negative on error
340 */
ice_setup_tx_ring(struct ice_tx_ring * tx_ring)341 int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
342 {
343 struct device *dev = tx_ring->dev;
344 u32 size;
345
346 if (!dev)
347 return -ENOMEM;
348
349 /* warn if we are about to overwrite the pointer */
350 WARN_ON(tx_ring->tx_buf);
351 tx_ring->tx_buf =
352 devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
353 GFP_KERNEL);
354 if (!tx_ring->tx_buf)
355 return -ENOMEM;
356
357 /* round up to nearest page */
358 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
359 PAGE_SIZE);
360 tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
361 GFP_KERNEL);
362 if (!tx_ring->desc) {
363 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
364 size);
365 goto err;
366 }
367
368 tx_ring->next_to_use = 0;
369 tx_ring->next_to_clean = 0;
370 tx_ring->ring_stats->tx_stats.prev_pkt = -1;
371 return 0;
372
373 err:
374 devm_kfree(dev, tx_ring->tx_buf);
375 tx_ring->tx_buf = NULL;
376 return -ENOMEM;
377 }
378
379 /**
380 * ice_clean_rx_ring - Free Rx buffers
381 * @rx_ring: ring to be cleaned
382 */
ice_clean_rx_ring(struct ice_rx_ring * rx_ring)383 void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
384 {
385 struct xdp_buff *xdp = &rx_ring->xdp;
386 struct device *dev = rx_ring->dev;
387 u32 size;
388 u16 i;
389
390 /* ring already cleared, nothing to do */
391 if (!rx_ring->rx_buf)
392 return;
393
394 if (rx_ring->xsk_pool) {
395 ice_xsk_clean_rx_ring(rx_ring);
396 goto rx_skip_free;
397 }
398
399 if (xdp->data) {
400 xdp_return_buff(xdp);
401 xdp->data = NULL;
402 }
403
404 /* Free all the Rx ring sk_buffs */
405 for (i = 0; i < rx_ring->count; i++) {
406 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
407
408 if (!rx_buf->page)
409 continue;
410
411 /* Invalidate cache lines that may have been written to by
412 * device so that we avoid corrupting memory.
413 */
414 dma_sync_single_range_for_cpu(dev, rx_buf->dma,
415 rx_buf->page_offset,
416 rx_ring->rx_buf_len,
417 DMA_FROM_DEVICE);
418
419 /* free resources associated with mapping */
420 dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
421 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
422 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
423
424 rx_buf->page = NULL;
425 rx_buf->page_offset = 0;
426 }
427
428 rx_skip_free:
429 if (rx_ring->xsk_pool)
430 memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
431 else
432 memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
433
434 /* Zero out the descriptor ring */
435 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
436 PAGE_SIZE);
437 memset(rx_ring->desc, 0, size);
438
439 rx_ring->next_to_alloc = 0;
440 rx_ring->next_to_clean = 0;
441 rx_ring->first_desc = 0;
442 rx_ring->next_to_use = 0;
443 }
444
445 /**
446 * ice_free_rx_ring - Free Rx resources
447 * @rx_ring: ring to clean the resources from
448 *
449 * Free all receive software resources
450 */
ice_free_rx_ring(struct ice_rx_ring * rx_ring)451 void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
452 {
453 u32 size;
454
455 ice_clean_rx_ring(rx_ring);
456 if (rx_ring->vsi->type == ICE_VSI_PF)
457 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
458 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
459 WRITE_ONCE(rx_ring->xdp_prog, NULL);
460 if (rx_ring->xsk_pool) {
461 kfree(rx_ring->xdp_buf);
462 rx_ring->xdp_buf = NULL;
463 } else {
464 kfree(rx_ring->rx_buf);
465 rx_ring->rx_buf = NULL;
466 }
467
468 if (rx_ring->desc) {
469 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
470 PAGE_SIZE);
471 dmam_free_coherent(rx_ring->dev, size,
472 rx_ring->desc, rx_ring->dma);
473 rx_ring->desc = NULL;
474 }
475 }
476
477 /**
478 * ice_setup_rx_ring - Allocate the Rx descriptors
479 * @rx_ring: the Rx ring to set up
480 *
481 * Return 0 on success, negative on error
482 */
ice_setup_rx_ring(struct ice_rx_ring * rx_ring)483 int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
484 {
485 struct device *dev = rx_ring->dev;
486 u32 size;
487
488 if (!dev)
489 return -ENOMEM;
490
491 /* warn if we are about to overwrite the pointer */
492 WARN_ON(rx_ring->rx_buf);
493 rx_ring->rx_buf =
494 kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
495 if (!rx_ring->rx_buf)
496 return -ENOMEM;
497
498 /* round up to nearest page */
499 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
500 PAGE_SIZE);
501 rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
502 GFP_KERNEL);
503 if (!rx_ring->desc) {
504 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
505 size);
506 goto err;
507 }
508
509 rx_ring->next_to_use = 0;
510 rx_ring->next_to_clean = 0;
511 rx_ring->first_desc = 0;
512
513 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
514 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
515
516 return 0;
517
518 err:
519 kfree(rx_ring->rx_buf);
520 rx_ring->rx_buf = NULL;
521 return -ENOMEM;
522 }
523
524 /**
525 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
526 * @rx_ring: Rx ring
527 * @xdp: xdp_buff used as input to the XDP program
528 * @xdp_prog: XDP program to run
529 * @xdp_ring: ring to be used for XDP_TX action
530 * @rx_buf: Rx buffer to store the XDP action
531 *
532 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
533 */
534 static void
ice_run_xdp(struct ice_rx_ring * rx_ring,struct xdp_buff * xdp,struct bpf_prog * xdp_prog,struct ice_tx_ring * xdp_ring,struct ice_rx_buf * rx_buf)535 ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
536 struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
537 struct ice_rx_buf *rx_buf)
538 {
539 unsigned int ret = ICE_XDP_PASS;
540 u32 act;
541
542 if (!xdp_prog)
543 goto exit;
544
545 act = bpf_prog_run_xdp(xdp_prog, xdp);
546 switch (act) {
547 case XDP_PASS:
548 break;
549 case XDP_TX:
550 if (static_branch_unlikely(&ice_xdp_locking_key))
551 spin_lock(&xdp_ring->tx_lock);
552 ret = __ice_xmit_xdp_ring(xdp, xdp_ring, false);
553 if (static_branch_unlikely(&ice_xdp_locking_key))
554 spin_unlock(&xdp_ring->tx_lock);
555 if (ret == ICE_XDP_CONSUMED)
556 goto out_failure;
557 break;
558 case XDP_REDIRECT:
559 if (xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))
560 goto out_failure;
561 ret = ICE_XDP_REDIR;
562 break;
563 default:
564 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
565 fallthrough;
566 case XDP_ABORTED:
567 out_failure:
568 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
569 fallthrough;
570 case XDP_DROP:
571 ret = ICE_XDP_CONSUMED;
572 }
573 exit:
574 ice_set_rx_bufs_act(xdp, rx_ring, ret);
575 }
576
577 /**
578 * ice_xmit_xdp_ring - submit frame to XDP ring for transmission
579 * @xdpf: XDP frame that will be converted to XDP buff
580 * @xdp_ring: XDP ring for transmission
581 */
ice_xmit_xdp_ring(const struct xdp_frame * xdpf,struct ice_tx_ring * xdp_ring)582 static int ice_xmit_xdp_ring(const struct xdp_frame *xdpf,
583 struct ice_tx_ring *xdp_ring)
584 {
585 struct xdp_buff xdp;
586
587 xdp.data_hard_start = (void *)xdpf;
588 xdp.data = xdpf->data;
589 xdp.data_end = xdp.data + xdpf->len;
590 xdp.frame_sz = xdpf->frame_sz;
591 xdp.flags = xdpf->flags;
592
593 return __ice_xmit_xdp_ring(&xdp, xdp_ring, true);
594 }
595
596 /**
597 * ice_xdp_xmit - submit packets to XDP ring for transmission
598 * @dev: netdev
599 * @n: number of XDP frames to be transmitted
600 * @frames: XDP frames to be transmitted
601 * @flags: transmit flags
602 *
603 * Returns number of frames successfully sent. Failed frames
604 * will be free'ed by XDP core.
605 * For error cases, a negative errno code is returned and no-frames
606 * are transmitted (caller must handle freeing frames).
607 */
608 int
ice_xdp_xmit(struct net_device * dev,int n,struct xdp_frame ** frames,u32 flags)609 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
610 u32 flags)
611 {
612 struct ice_netdev_priv *np = netdev_priv(dev);
613 unsigned int queue_index = smp_processor_id();
614 struct ice_vsi *vsi = np->vsi;
615 struct ice_tx_ring *xdp_ring;
616 struct ice_tx_buf *tx_buf;
617 int nxmit = 0, i;
618
619 if (test_bit(ICE_VSI_DOWN, vsi->state))
620 return -ENETDOWN;
621
622 if (!ice_is_xdp_ena_vsi(vsi))
623 return -ENXIO;
624
625 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
626 return -EINVAL;
627
628 if (static_branch_unlikely(&ice_xdp_locking_key)) {
629 queue_index %= vsi->num_xdp_txq;
630 xdp_ring = vsi->xdp_rings[queue_index];
631 spin_lock(&xdp_ring->tx_lock);
632 } else {
633 /* Generally, should not happen */
634 if (unlikely(queue_index >= vsi->num_xdp_txq))
635 return -ENXIO;
636 xdp_ring = vsi->xdp_rings[queue_index];
637 }
638
639 tx_buf = &xdp_ring->tx_buf[xdp_ring->next_to_use];
640 for (i = 0; i < n; i++) {
641 const struct xdp_frame *xdpf = frames[i];
642 int err;
643
644 err = ice_xmit_xdp_ring(xdpf, xdp_ring);
645 if (err != ICE_XDP_TX)
646 break;
647 nxmit++;
648 }
649
650 tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
651 if (unlikely(flags & XDP_XMIT_FLUSH))
652 ice_xdp_ring_update_tail(xdp_ring);
653
654 if (static_branch_unlikely(&ice_xdp_locking_key))
655 spin_unlock(&xdp_ring->tx_lock);
656
657 return nxmit;
658 }
659
660 /**
661 * ice_alloc_mapped_page - recycle or make a new page
662 * @rx_ring: ring to use
663 * @bi: rx_buf struct to modify
664 *
665 * Returns true if the page was successfully allocated or
666 * reused.
667 */
668 static bool
ice_alloc_mapped_page(struct ice_rx_ring * rx_ring,struct ice_rx_buf * bi)669 ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
670 {
671 struct page *page = bi->page;
672 dma_addr_t dma;
673
674 /* since we are recycling buffers we should seldom need to alloc */
675 if (likely(page))
676 return true;
677
678 /* alloc new page for storage */
679 page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
680 if (unlikely(!page)) {
681 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
682 return false;
683 }
684
685 /* map page for use */
686 dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
687 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
688
689 /* if mapping failed free memory back to system since
690 * there isn't much point in holding memory we can't use
691 */
692 if (dma_mapping_error(rx_ring->dev, dma)) {
693 __free_pages(page, ice_rx_pg_order(rx_ring));
694 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
695 return false;
696 }
697
698 bi->dma = dma;
699 bi->page = page;
700 bi->page_offset = rx_ring->rx_offset;
701 page_ref_add(page, USHRT_MAX - 1);
702 bi->pagecnt_bias = USHRT_MAX;
703
704 return true;
705 }
706
707 /**
708 * ice_alloc_rx_bufs - Replace used receive buffers
709 * @rx_ring: ring to place buffers on
710 * @cleaned_count: number of buffers to replace
711 *
712 * Returns false if all allocations were successful, true if any fail. Returning
713 * true signals to the caller that we didn't replace cleaned_count buffers and
714 * there is more work to do.
715 *
716 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
717 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
718 * multiple tail writes per call.
719 */
ice_alloc_rx_bufs(struct ice_rx_ring * rx_ring,unsigned int cleaned_count)720 bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)
721 {
722 union ice_32b_rx_flex_desc *rx_desc;
723 u16 ntu = rx_ring->next_to_use;
724 struct ice_rx_buf *bi;
725
726 /* do nothing if no valid netdev defined */
727 if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
728 !cleaned_count)
729 return false;
730
731 /* get the Rx descriptor and buffer based on next_to_use */
732 rx_desc = ICE_RX_DESC(rx_ring, ntu);
733 bi = &rx_ring->rx_buf[ntu];
734
735 do {
736 /* if we fail here, we have work remaining */
737 if (!ice_alloc_mapped_page(rx_ring, bi))
738 break;
739
740 /* sync the buffer for use by the device */
741 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
742 bi->page_offset,
743 rx_ring->rx_buf_len,
744 DMA_FROM_DEVICE);
745
746 /* Refresh the desc even if buffer_addrs didn't change
747 * because each write-back erases this info.
748 */
749 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
750
751 rx_desc++;
752 bi++;
753 ntu++;
754 if (unlikely(ntu == rx_ring->count)) {
755 rx_desc = ICE_RX_DESC(rx_ring, 0);
756 bi = rx_ring->rx_buf;
757 ntu = 0;
758 }
759
760 /* clear the status bits for the next_to_use descriptor */
761 rx_desc->wb.status_error0 = 0;
762
763 cleaned_count--;
764 } while (cleaned_count);
765
766 if (rx_ring->next_to_use != ntu)
767 ice_release_rx_desc(rx_ring, ntu);
768
769 return !!cleaned_count;
770 }
771
772 /**
773 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
774 * @rx_buf: Rx buffer to adjust
775 * @size: Size of adjustment
776 *
777 * Update the offset within page so that Rx buf will be ready to be reused.
778 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
779 * so the second half of page assigned to Rx buffer will be used, otherwise
780 * the offset is moved by "size" bytes
781 */
782 static void
ice_rx_buf_adjust_pg_offset(struct ice_rx_buf * rx_buf,unsigned int size)783 ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
784 {
785 #if (PAGE_SIZE < 8192)
786 /* flip page offset to other buffer */
787 rx_buf->page_offset ^= size;
788 #else
789 /* move offset up to the next cache line */
790 rx_buf->page_offset += size;
791 #endif
792 }
793
794 /**
795 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
796 * @rx_buf: buffer containing the page
797 *
798 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
799 * which will assign the current buffer to the buffer that next_to_alloc is
800 * pointing to; otherwise, the DMA mapping needs to be destroyed and
801 * page freed
802 */
803 static bool
ice_can_reuse_rx_page(struct ice_rx_buf * rx_buf)804 ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)
805 {
806 unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
807 struct page *page = rx_buf->page;
808
809 /* avoid re-using remote and pfmemalloc pages */
810 if (!dev_page_is_reusable(page))
811 return false;
812
813 /* if we are only owner of page we can reuse it */
814 if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
815 return false;
816 #if (PAGE_SIZE >= 8192)
817 #define ICE_LAST_OFFSET \
818 (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_3072)
819 if (rx_buf->page_offset > ICE_LAST_OFFSET)
820 return false;
821 #endif /* PAGE_SIZE >= 8192) */
822
823 /* If we have drained the page fragment pool we need to update
824 * the pagecnt_bias and page count so that we fully restock the
825 * number of references the driver holds.
826 */
827 if (unlikely(pagecnt_bias == 1)) {
828 page_ref_add(page, USHRT_MAX - 1);
829 rx_buf->pagecnt_bias = USHRT_MAX;
830 }
831
832 return true;
833 }
834
835 /**
836 * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag
837 * @rx_ring: Rx descriptor ring to transact packets on
838 * @xdp: xdp buff to place the data into
839 * @rx_buf: buffer containing page to add
840 * @size: packet length from rx_desc
841 *
842 * This function will add the data contained in rx_buf->page to the xdp buf.
843 * It will just attach the page as a frag.
844 */
845 static int
ice_add_xdp_frag(struct ice_rx_ring * rx_ring,struct xdp_buff * xdp,struct ice_rx_buf * rx_buf,const unsigned int size)846 ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
847 struct ice_rx_buf *rx_buf, const unsigned int size)
848 {
849 struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
850
851 if (!size)
852 return 0;
853
854 if (!xdp_buff_has_frags(xdp)) {
855 sinfo->nr_frags = 0;
856 sinfo->xdp_frags_size = 0;
857 xdp_buff_set_frags_flag(xdp);
858 }
859
860 if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS)) {
861 ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
862 return -ENOMEM;
863 }
864
865 __skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
866 rx_buf->page_offset, size);
867 sinfo->xdp_frags_size += size;
868 /* remember frag count before XDP prog execution; bpf_xdp_adjust_tail()
869 * can pop off frags but driver has to handle it on its own
870 */
871 rx_ring->nr_frags = sinfo->nr_frags;
872
873 if (page_is_pfmemalloc(rx_buf->page))
874 xdp_buff_set_frag_pfmemalloc(xdp);
875
876 return 0;
877 }
878
879 /**
880 * ice_reuse_rx_page - page flip buffer and store it back on the ring
881 * @rx_ring: Rx descriptor ring to store buffers on
882 * @old_buf: donor buffer to have page reused
883 *
884 * Synchronizes page for reuse by the adapter
885 */
886 static void
ice_reuse_rx_page(struct ice_rx_ring * rx_ring,struct ice_rx_buf * old_buf)887 ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
888 {
889 u16 nta = rx_ring->next_to_alloc;
890 struct ice_rx_buf *new_buf;
891
892 new_buf = &rx_ring->rx_buf[nta];
893
894 /* update, and store next to alloc */
895 nta++;
896 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
897
898 /* Transfer page from old buffer to new buffer.
899 * Move each member individually to avoid possible store
900 * forwarding stalls and unnecessary copy of skb.
901 */
902 new_buf->dma = old_buf->dma;
903 new_buf->page = old_buf->page;
904 new_buf->page_offset = old_buf->page_offset;
905 new_buf->pagecnt_bias = old_buf->pagecnt_bias;
906 }
907
908 /**
909 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
910 * @rx_ring: Rx descriptor ring to transact packets on
911 * @size: size of buffer to add to skb
912 * @ntc: index of next to clean element
913 *
914 * This function will pull an Rx buffer from the ring and synchronize it
915 * for use by the CPU.
916 */
917 static struct ice_rx_buf *
ice_get_rx_buf(struct ice_rx_ring * rx_ring,const unsigned int size,const unsigned int ntc)918 ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
919 const unsigned int ntc)
920 {
921 struct ice_rx_buf *rx_buf;
922
923 rx_buf = &rx_ring->rx_buf[ntc];
924 rx_buf->pgcnt = page_count(rx_buf->page);
925 prefetchw(rx_buf->page);
926
927 if (!size)
928 return rx_buf;
929 /* we are reusing so sync this buffer for CPU use */
930 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
931 rx_buf->page_offset, size,
932 DMA_FROM_DEVICE);
933
934 /* We have pulled a buffer for use, so decrement pagecnt_bias */
935 rx_buf->pagecnt_bias--;
936
937 return rx_buf;
938 }
939
940 /**
941 * ice_build_skb - Build skb around an existing buffer
942 * @rx_ring: Rx descriptor ring to transact packets on
943 * @xdp: xdp_buff pointing to the data
944 *
945 * This function builds an skb around an existing XDP buffer, taking care
946 * to set up the skb correctly and avoid any memcpy overhead. Driver has
947 * already combined frags (if any) to skb_shared_info.
948 */
949 static struct sk_buff *
ice_build_skb(struct ice_rx_ring * rx_ring,struct xdp_buff * xdp)950 ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
951 {
952 u8 metasize = xdp->data - xdp->data_meta;
953 struct skb_shared_info *sinfo = NULL;
954 unsigned int nr_frags;
955 struct sk_buff *skb;
956
957 if (unlikely(xdp_buff_has_frags(xdp))) {
958 sinfo = xdp_get_shared_info_from_buff(xdp);
959 nr_frags = sinfo->nr_frags;
960 }
961
962 /* Prefetch first cache line of first page. If xdp->data_meta
963 * is unused, this points exactly as xdp->data, otherwise we
964 * likely have a consumer accessing first few bytes of meta
965 * data, and then actual data.
966 */
967 net_prefetch(xdp->data_meta);
968 /* build an skb around the page buffer */
969 skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
970 if (unlikely(!skb))
971 return NULL;
972
973 /* must to record Rx queue, otherwise OS features such as
974 * symmetric queue won't work
975 */
976 skb_record_rx_queue(skb, rx_ring->q_index);
977
978 /* update pointers within the skb to store the data */
979 skb_reserve(skb, xdp->data - xdp->data_hard_start);
980 __skb_put(skb, xdp->data_end - xdp->data);
981 if (metasize)
982 skb_metadata_set(skb, metasize);
983
984 if (unlikely(xdp_buff_has_frags(xdp)))
985 xdp_update_skb_shared_info(skb, nr_frags,
986 sinfo->xdp_frags_size,
987 nr_frags * xdp->frame_sz,
988 xdp_buff_is_frag_pfmemalloc(xdp));
989
990 return skb;
991 }
992
993 /**
994 * ice_construct_skb - Allocate skb and populate it
995 * @rx_ring: Rx descriptor ring to transact packets on
996 * @xdp: xdp_buff pointing to the data
997 *
998 * This function allocates an skb. It then populates it with the page
999 * data from the current receive descriptor, taking care to set up the
1000 * skb correctly.
1001 */
1002 static struct sk_buff *
ice_construct_skb(struct ice_rx_ring * rx_ring,struct xdp_buff * xdp)1003 ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
1004 {
1005 unsigned int size = xdp->data_end - xdp->data;
1006 struct skb_shared_info *sinfo = NULL;
1007 struct ice_rx_buf *rx_buf;
1008 unsigned int nr_frags = 0;
1009 unsigned int headlen;
1010 struct sk_buff *skb;
1011
1012 /* prefetch first cache line of first page */
1013 net_prefetch(xdp->data);
1014
1015 if (unlikely(xdp_buff_has_frags(xdp))) {
1016 sinfo = xdp_get_shared_info_from_buff(xdp);
1017 nr_frags = sinfo->nr_frags;
1018 }
1019
1020 /* allocate a skb to store the frags */
1021 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,
1022 GFP_ATOMIC | __GFP_NOWARN);
1023 if (unlikely(!skb))
1024 return NULL;
1025
1026 rx_buf = &rx_ring->rx_buf[rx_ring->first_desc];
1027 skb_record_rx_queue(skb, rx_ring->q_index);
1028 /* Determine available headroom for copy */
1029 headlen = size;
1030 if (headlen > ICE_RX_HDR_SIZE)
1031 headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1032
1033 /* align pull length to size of long to optimize memcpy performance */
1034 memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
1035 sizeof(long)));
1036
1037 /* if we exhaust the linear part then add what is left as a frag */
1038 size -= headlen;
1039 if (size) {
1040 /* besides adding here a partial frag, we are going to add
1041 * frags from xdp_buff, make sure there is enough space for
1042 * them
1043 */
1044 if (unlikely(nr_frags >= MAX_SKB_FRAGS - 1)) {
1045 dev_kfree_skb(skb);
1046 return NULL;
1047 }
1048 skb_add_rx_frag(skb, 0, rx_buf->page,
1049 rx_buf->page_offset + headlen, size,
1050 xdp->frame_sz);
1051 } else {
1052 /* buffer is unused, change the act that should be taken later
1053 * on; data was copied onto skb's linear part so there's no
1054 * need for adjusting page offset and we can reuse this buffer
1055 * as-is
1056 */
1057 rx_buf->act = ICE_SKB_CONSUMED;
1058 }
1059
1060 if (unlikely(xdp_buff_has_frags(xdp))) {
1061 struct skb_shared_info *skinfo = skb_shinfo(skb);
1062
1063 memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
1064 sizeof(skb_frag_t) * nr_frags);
1065
1066 xdp_update_skb_shared_info(skb, skinfo->nr_frags + nr_frags,
1067 sinfo->xdp_frags_size,
1068 nr_frags * xdp->frame_sz,
1069 xdp_buff_is_frag_pfmemalloc(xdp));
1070 }
1071
1072 return skb;
1073 }
1074
1075 /**
1076 * ice_put_rx_buf - Clean up used buffer and either recycle or free
1077 * @rx_ring: Rx descriptor ring to transact packets on
1078 * @rx_buf: Rx buffer to pull data from
1079 *
1080 * This function will clean up the contents of the rx_buf. It will either
1081 * recycle the buffer or unmap it and free the associated resources.
1082 */
1083 static void
ice_put_rx_buf(struct ice_rx_ring * rx_ring,struct ice_rx_buf * rx_buf)1084 ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)
1085 {
1086 if (!rx_buf)
1087 return;
1088
1089 if (ice_can_reuse_rx_page(rx_buf)) {
1090 /* hand second half of page back to the ring */
1091 ice_reuse_rx_page(rx_ring, rx_buf);
1092 } else {
1093 /* we are not reusing the buffer so unmap it */
1094 dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1095 ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1096 ICE_RX_DMA_ATTR);
1097 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1098 }
1099
1100 /* clear contents of buffer_info */
1101 rx_buf->page = NULL;
1102 }
1103
1104 /**
1105 * ice_put_rx_mbuf - ice_put_rx_buf() caller, for all frame frags
1106 * @rx_ring: Rx ring with all the auxiliary data
1107 * @xdp: XDP buffer carrying linear + frags part
1108 * @xdp_xmit: XDP_TX/XDP_REDIRECT verdict storage
1109 * @ntc: a current next_to_clean value to be stored at rx_ring
1110 *
1111 * Walk through gathered fragments and satisfy internal page
1112 * recycle mechanism; we take here an action related to verdict
1113 * returned by XDP program;
1114 */
ice_put_rx_mbuf(struct ice_rx_ring * rx_ring,struct xdp_buff * xdp,u32 * xdp_xmit,u32 ntc)1115 static void ice_put_rx_mbuf(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
1116 u32 *xdp_xmit, u32 ntc)
1117 {
1118 u32 nr_frags = rx_ring->nr_frags + 1;
1119 u32 idx = rx_ring->first_desc;
1120 u32 cnt = rx_ring->count;
1121 struct ice_rx_buf *buf;
1122 int i;
1123
1124 for (i = 0; i < nr_frags; i++) {
1125 buf = &rx_ring->rx_buf[idx];
1126
1127 if (buf->act & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1128 ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1129 *xdp_xmit |= buf->act;
1130 } else if (buf->act & ICE_XDP_CONSUMED) {
1131 buf->pagecnt_bias++;
1132 } else if (buf->act == ICE_XDP_PASS) {
1133 ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1134 }
1135
1136 ice_put_rx_buf(rx_ring, buf);
1137
1138 if (++idx == cnt)
1139 idx = 0;
1140 }
1141
1142 xdp->data = NULL;
1143 rx_ring->first_desc = ntc;
1144 rx_ring->nr_frags = 0;
1145 }
1146
1147 /**
1148 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1149 * @rx_ring: Rx descriptor ring to transact packets on
1150 * @budget: Total limit on number of packets to process
1151 *
1152 * This function provides a "bounce buffer" approach to Rx interrupt
1153 * processing. The advantage to this is that on systems that have
1154 * expensive overhead for IOMMU access this provides a means of avoiding
1155 * it by maintaining the mapping of the page to the system.
1156 *
1157 * Returns amount of work completed
1158 */
ice_clean_rx_irq(struct ice_rx_ring * rx_ring,int budget)1159 int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1160 {
1161 unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
1162 unsigned int offset = rx_ring->rx_offset;
1163 struct xdp_buff *xdp = &rx_ring->xdp;
1164 struct ice_tx_ring *xdp_ring = NULL;
1165 struct bpf_prog *xdp_prog = NULL;
1166 u32 ntc = rx_ring->next_to_clean;
1167 u32 cnt = rx_ring->count;
1168 u32 xdp_xmit = 0;
1169 u32 cached_ntu;
1170 bool failure;
1171
1172 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1173 if (xdp_prog) {
1174 xdp_ring = rx_ring->xdp_ring;
1175 cached_ntu = xdp_ring->next_to_use;
1176 }
1177
1178 /* start the loop to process Rx packets bounded by 'budget' */
1179 while (likely(total_rx_pkts < (unsigned int)budget)) {
1180 union ice_32b_rx_flex_desc *rx_desc;
1181 struct ice_rx_buf *rx_buf;
1182 struct sk_buff *skb;
1183 unsigned int size;
1184 u16 stat_err_bits;
1185 u16 vlan_tag = 0;
1186 u16 rx_ptype;
1187
1188 /* get the Rx desc from Rx ring based on 'next_to_clean' */
1189 rx_desc = ICE_RX_DESC(rx_ring, ntc);
1190
1191 /* status_error_len will always be zero for unused descriptors
1192 * because it's cleared in cleanup, and overlaps with hdr_addr
1193 * which is always zero because packet split isn't used, if the
1194 * hardware wrote DD then it will be non-zero
1195 */
1196 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1197 if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1198 break;
1199
1200 /* This memory barrier is needed to keep us from reading
1201 * any other fields out of the rx_desc until we know the
1202 * DD bit is set.
1203 */
1204 dma_rmb();
1205
1206 ice_trace(clean_rx_irq, rx_ring, rx_desc);
1207 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1208 struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1209
1210 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1211 ctrl_vsi->vf)
1212 ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1213 if (++ntc == cnt)
1214 ntc = 0;
1215 rx_ring->first_desc = ntc;
1216 continue;
1217 }
1218
1219 size = le16_to_cpu(rx_desc->wb.pkt_len) &
1220 ICE_RX_FLX_DESC_PKT_LEN_M;
1221
1222 /* retrieve a buffer from the ring */
1223 rx_buf = ice_get_rx_buf(rx_ring, size, ntc);
1224
1225 if (!xdp->data) {
1226 void *hard_start;
1227
1228 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1229 offset;
1230 xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1231 xdp_buff_clear_frags_flag(xdp);
1232 } else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
1233 ice_put_rx_mbuf(rx_ring, xdp, NULL, ntc);
1234 break;
1235 }
1236 if (++ntc == cnt)
1237 ntc = 0;
1238
1239 /* skip if it is NOP desc */
1240 if (ice_is_non_eop(rx_ring, rx_desc))
1241 continue;
1242
1243 ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_buf);
1244 if (rx_buf->act == ICE_XDP_PASS)
1245 goto construct_skb;
1246 total_rx_bytes += xdp_get_buff_len(xdp);
1247 total_rx_pkts++;
1248
1249 ice_put_rx_mbuf(rx_ring, xdp, &xdp_xmit, ntc);
1250
1251 continue;
1252 construct_skb:
1253 if (likely(ice_ring_uses_build_skb(rx_ring)))
1254 skb = ice_build_skb(rx_ring, xdp);
1255 else
1256 skb = ice_construct_skb(rx_ring, xdp);
1257 /* exit if we failed to retrieve a buffer */
1258 if (!skb) {
1259 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
1260 rx_buf->act = ICE_XDP_CONSUMED;
1261 if (unlikely(xdp_buff_has_frags(xdp)))
1262 ice_set_rx_bufs_act(xdp, rx_ring,
1263 ICE_XDP_CONSUMED);
1264 }
1265 ice_put_rx_mbuf(rx_ring, xdp, &xdp_xmit, ntc);
1266
1267 if (!skb)
1268 break;
1269
1270 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1271 if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1272 stat_err_bits))) {
1273 dev_kfree_skb_any(skb);
1274 continue;
1275 }
1276
1277 vlan_tag = ice_get_vlan_tag_from_rx_desc(rx_desc);
1278
1279 /* pad the skb if needed, to make a valid ethernet frame */
1280 if (eth_skb_pad(skb))
1281 continue;
1282
1283 /* probably a little skewed due to removing CRC */
1284 total_rx_bytes += skb->len;
1285
1286 /* populate checksum, VLAN, and protocol */
1287 rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1288 ICE_RX_FLEX_DESC_PTYPE_M;
1289
1290 ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1291
1292 ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1293 /* send completed skb up the stack */
1294 ice_receive_skb(rx_ring, skb, vlan_tag);
1295
1296 /* update budget accounting */
1297 total_rx_pkts++;
1298 }
1299
1300 rx_ring->next_to_clean = ntc;
1301 /* return up to cleaned_count buffers to hardware */
1302 failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));
1303
1304 if (xdp_xmit)
1305 ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);
1306
1307 if (rx_ring->ring_stats)
1308 ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1309 total_rx_bytes);
1310
1311 /* guarantee a trip back through this routine if there was a failure */
1312 return failure ? budget : (int)total_rx_pkts;
1313 }
1314
__ice_update_sample(struct ice_q_vector * q_vector,struct ice_ring_container * rc,struct dim_sample * sample,bool is_tx)1315 static void __ice_update_sample(struct ice_q_vector *q_vector,
1316 struct ice_ring_container *rc,
1317 struct dim_sample *sample,
1318 bool is_tx)
1319 {
1320 u64 packets = 0, bytes = 0;
1321
1322 if (is_tx) {
1323 struct ice_tx_ring *tx_ring;
1324
1325 ice_for_each_tx_ring(tx_ring, *rc) {
1326 struct ice_ring_stats *ring_stats;
1327
1328 ring_stats = tx_ring->ring_stats;
1329 if (!ring_stats)
1330 continue;
1331 packets += ring_stats->stats.pkts;
1332 bytes += ring_stats->stats.bytes;
1333 }
1334 } else {
1335 struct ice_rx_ring *rx_ring;
1336
1337 ice_for_each_rx_ring(rx_ring, *rc) {
1338 struct ice_ring_stats *ring_stats;
1339
1340 ring_stats = rx_ring->ring_stats;
1341 if (!ring_stats)
1342 continue;
1343 packets += ring_stats->stats.pkts;
1344 bytes += ring_stats->stats.bytes;
1345 }
1346 }
1347
1348 dim_update_sample(q_vector->total_events, packets, bytes, sample);
1349 sample->comp_ctr = 0;
1350
1351 /* if dim settings get stale, like when not updated for 1
1352 * second or longer, force it to start again. This addresses the
1353 * frequent case of an idle queue being switched to by the
1354 * scheduler. The 1,000 here means 1,000 milliseconds.
1355 */
1356 if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1357 rc->dim.state = DIM_START_MEASURE;
1358 }
1359
1360 /**
1361 * ice_net_dim - Update net DIM algorithm
1362 * @q_vector: the vector associated with the interrupt
1363 *
1364 * Create a DIM sample and notify net_dim() so that it can possibly decide
1365 * a new ITR value based on incoming packets, bytes, and interrupts.
1366 *
1367 * This function is a no-op if the ring is not configured to dynamic ITR.
1368 */
ice_net_dim(struct ice_q_vector * q_vector)1369 static void ice_net_dim(struct ice_q_vector *q_vector)
1370 {
1371 struct ice_ring_container *tx = &q_vector->tx;
1372 struct ice_ring_container *rx = &q_vector->rx;
1373
1374 if (ITR_IS_DYNAMIC(tx)) {
1375 struct dim_sample dim_sample;
1376
1377 __ice_update_sample(q_vector, tx, &dim_sample, true);
1378 net_dim(&tx->dim, dim_sample);
1379 }
1380
1381 if (ITR_IS_DYNAMIC(rx)) {
1382 struct dim_sample dim_sample;
1383
1384 __ice_update_sample(q_vector, rx, &dim_sample, false);
1385 net_dim(&rx->dim, dim_sample);
1386 }
1387 }
1388
1389 /**
1390 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1391 * @itr_idx: interrupt throttling index
1392 * @itr: interrupt throttling value in usecs
1393 */
ice_buildreg_itr(u16 itr_idx,u16 itr)1394 static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1395 {
1396 /* The ITR value is reported in microseconds, and the register value is
1397 * recorded in 2 microsecond units. For this reason we only need to
1398 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1399 * granularity as a shift instead of division. The mask makes sure the
1400 * ITR value is never odd so we don't accidentally write into the field
1401 * prior to the ITR field.
1402 */
1403 itr &= ICE_ITR_MASK;
1404
1405 return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1406 (itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1407 (itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1408 }
1409
1410 /**
1411 * ice_enable_interrupt - re-enable MSI-X interrupt
1412 * @q_vector: the vector associated with the interrupt to enable
1413 *
1414 * If the VSI is down, the interrupt will not be re-enabled. Also,
1415 * when enabling the interrupt always reset the wb_on_itr to false
1416 * and trigger a software interrupt to clean out internal state.
1417 */
ice_enable_interrupt(struct ice_q_vector * q_vector)1418 static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1419 {
1420 struct ice_vsi *vsi = q_vector->vsi;
1421 bool wb_en = q_vector->wb_on_itr;
1422 u32 itr_val;
1423
1424 if (test_bit(ICE_DOWN, vsi->state))
1425 return;
1426
1427 /* trigger an ITR delayed software interrupt when exiting busy poll, to
1428 * make sure to catch any pending cleanups that might have been missed
1429 * due to interrupt state transition. If busy poll or poll isn't
1430 * enabled, then don't update ITR, and just enable the interrupt.
1431 */
1432 if (!wb_en) {
1433 itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1434 } else {
1435 q_vector->wb_on_itr = false;
1436
1437 /* do two things here with a single write. Set up the third ITR
1438 * index to be used for software interrupt moderation, and then
1439 * trigger a software interrupt with a rate limit of 20K on
1440 * software interrupts, this will help avoid high interrupt
1441 * loads due to frequently polling and exiting polling.
1442 */
1443 itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1444 itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1445 ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1446 GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1447 }
1448 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1449 }
1450
1451 /**
1452 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1453 * @q_vector: q_vector to set WB_ON_ITR on
1454 *
1455 * We need to tell hardware to write-back completed descriptors even when
1456 * interrupts are disabled. Descriptors will be written back on cache line
1457 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1458 * descriptors may not be written back if they don't fill a cache line until
1459 * the next interrupt.
1460 *
1461 * This sets the write-back frequency to whatever was set previously for the
1462 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1463 * aren't meddling with the INTENA_M bit.
1464 */
ice_set_wb_on_itr(struct ice_q_vector * q_vector)1465 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1466 {
1467 struct ice_vsi *vsi = q_vector->vsi;
1468
1469 /* already in wb_on_itr mode no need to change it */
1470 if (q_vector->wb_on_itr)
1471 return;
1472
1473 /* use previously set ITR values for all of the ITR indices by
1474 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1475 * be static in non-adaptive mode (user configured)
1476 */
1477 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1478 ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1479 GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1480 GLINT_DYN_CTL_WB_ON_ITR_M);
1481
1482 q_vector->wb_on_itr = true;
1483 }
1484
1485 /**
1486 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1487 * @napi: napi struct with our devices info in it
1488 * @budget: amount of work driver is allowed to do this pass, in packets
1489 *
1490 * This function will clean all queues associated with a q_vector.
1491 *
1492 * Returns the amount of work done
1493 */
ice_napi_poll(struct napi_struct * napi,int budget)1494 int ice_napi_poll(struct napi_struct *napi, int budget)
1495 {
1496 struct ice_q_vector *q_vector =
1497 container_of(napi, struct ice_q_vector, napi);
1498 struct ice_tx_ring *tx_ring;
1499 struct ice_rx_ring *rx_ring;
1500 bool clean_complete = true;
1501 int budget_per_ring;
1502 int work_done = 0;
1503
1504 /* Since the actual Tx work is minimal, we can give the Tx a larger
1505 * budget and be more aggressive about cleaning up the Tx descriptors.
1506 */
1507 ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1508 bool wd;
1509
1510 if (tx_ring->xsk_pool)
1511 wd = ice_xmit_zc(tx_ring);
1512 else if (ice_ring_is_xdp(tx_ring))
1513 wd = true;
1514 else
1515 wd = ice_clean_tx_irq(tx_ring, budget);
1516
1517 if (!wd)
1518 clean_complete = false;
1519 }
1520
1521 /* Handle case where we are called by netpoll with a budget of 0 */
1522 if (unlikely(budget <= 0))
1523 return budget;
1524
1525 /* normally we have 1 Rx ring per q_vector */
1526 if (unlikely(q_vector->num_ring_rx > 1))
1527 /* We attempt to distribute budget to each Rx queue fairly, but
1528 * don't allow the budget to go below 1 because that would exit
1529 * polling early.
1530 */
1531 budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1532 else
1533 /* Max of 1 Rx ring in this q_vector so give it the budget */
1534 budget_per_ring = budget;
1535
1536 ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1537 int cleaned;
1538
1539 /* A dedicated path for zero-copy allows making a single
1540 * comparison in the irq context instead of many inside the
1541 * ice_clean_rx_irq function and makes the codebase cleaner.
1542 */
1543 cleaned = rx_ring->xsk_pool ?
1544 ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1545 ice_clean_rx_irq(rx_ring, budget_per_ring);
1546 work_done += cleaned;
1547 /* if we clean as many as budgeted, we must not be done */
1548 if (cleaned >= budget_per_ring)
1549 clean_complete = false;
1550 }
1551
1552 /* If work not completed, return budget and polling will return */
1553 if (!clean_complete) {
1554 /* Set the writeback on ITR so partial completions of
1555 * cache-lines will still continue even if we're polling.
1556 */
1557 ice_set_wb_on_itr(q_vector);
1558 return budget;
1559 }
1560
1561 /* Exit the polling mode, but don't re-enable interrupts if stack might
1562 * poll us due to busy-polling
1563 */
1564 if (napi_complete_done(napi, work_done)) {
1565 ice_net_dim(q_vector);
1566 ice_enable_interrupt(q_vector);
1567 } else {
1568 ice_set_wb_on_itr(q_vector);
1569 }
1570
1571 return min_t(int, work_done, budget - 1);
1572 }
1573
1574 /**
1575 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1576 * @tx_ring: the ring to be checked
1577 * @size: the size buffer we want to assure is available
1578 *
1579 * Returns -EBUSY if a stop is needed, else 0
1580 */
__ice_maybe_stop_tx(struct ice_tx_ring * tx_ring,unsigned int size)1581 static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1582 {
1583 netif_tx_stop_queue(txring_txq(tx_ring));
1584 /* Memory barrier before checking head and tail */
1585 smp_mb();
1586
1587 /* Check again in a case another CPU has just made room available. */
1588 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1589 return -EBUSY;
1590
1591 /* A reprieve! - use start_queue because it doesn't call schedule */
1592 netif_tx_start_queue(txring_txq(tx_ring));
1593 ++tx_ring->ring_stats->tx_stats.restart_q;
1594 return 0;
1595 }
1596
1597 /**
1598 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1599 * @tx_ring: the ring to be checked
1600 * @size: the size buffer we want to assure is available
1601 *
1602 * Returns 0 if stop is not needed
1603 */
ice_maybe_stop_tx(struct ice_tx_ring * tx_ring,unsigned int size)1604 static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1605 {
1606 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1607 return 0;
1608
1609 return __ice_maybe_stop_tx(tx_ring, size);
1610 }
1611
1612 /**
1613 * ice_tx_map - Build the Tx descriptor
1614 * @tx_ring: ring to send buffer on
1615 * @first: first buffer info buffer to use
1616 * @off: pointer to struct that holds offload parameters
1617 *
1618 * This function loops over the skb data pointed to by *first
1619 * and gets a physical address for each memory location and programs
1620 * it and the length into the transmit descriptor.
1621 */
1622 static void
ice_tx_map(struct ice_tx_ring * tx_ring,struct ice_tx_buf * first,struct ice_tx_offload_params * off)1623 ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1624 struct ice_tx_offload_params *off)
1625 {
1626 u64 td_offset, td_tag, td_cmd;
1627 u16 i = tx_ring->next_to_use;
1628 unsigned int data_len, size;
1629 struct ice_tx_desc *tx_desc;
1630 struct ice_tx_buf *tx_buf;
1631 struct sk_buff *skb;
1632 skb_frag_t *frag;
1633 dma_addr_t dma;
1634 bool kick;
1635
1636 td_tag = off->td_l2tag1;
1637 td_cmd = off->td_cmd;
1638 td_offset = off->td_offset;
1639 skb = first->skb;
1640
1641 data_len = skb->data_len;
1642 size = skb_headlen(skb);
1643
1644 tx_desc = ICE_TX_DESC(tx_ring, i);
1645
1646 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1647 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1648 td_tag = first->vid;
1649 }
1650
1651 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1652
1653 tx_buf = first;
1654
1655 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1656 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1657
1658 if (dma_mapping_error(tx_ring->dev, dma))
1659 goto dma_error;
1660
1661 /* record length, and DMA address */
1662 dma_unmap_len_set(tx_buf, len, size);
1663 dma_unmap_addr_set(tx_buf, dma, dma);
1664
1665 /* align size to end of page */
1666 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1667 tx_desc->buf_addr = cpu_to_le64(dma);
1668
1669 /* account for data chunks larger than the hardware
1670 * can handle
1671 */
1672 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1673 tx_desc->cmd_type_offset_bsz =
1674 ice_build_ctob(td_cmd, td_offset, max_data,
1675 td_tag);
1676
1677 tx_desc++;
1678 i++;
1679
1680 if (i == tx_ring->count) {
1681 tx_desc = ICE_TX_DESC(tx_ring, 0);
1682 i = 0;
1683 }
1684
1685 dma += max_data;
1686 size -= max_data;
1687
1688 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1689 tx_desc->buf_addr = cpu_to_le64(dma);
1690 }
1691
1692 if (likely(!data_len))
1693 break;
1694
1695 tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1696 size, td_tag);
1697
1698 tx_desc++;
1699 i++;
1700
1701 if (i == tx_ring->count) {
1702 tx_desc = ICE_TX_DESC(tx_ring, 0);
1703 i = 0;
1704 }
1705
1706 size = skb_frag_size(frag);
1707 data_len -= size;
1708
1709 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1710 DMA_TO_DEVICE);
1711
1712 tx_buf = &tx_ring->tx_buf[i];
1713 tx_buf->type = ICE_TX_BUF_FRAG;
1714 }
1715
1716 /* record SW timestamp if HW timestamp is not available */
1717 skb_tx_timestamp(first->skb);
1718
1719 i++;
1720 if (i == tx_ring->count)
1721 i = 0;
1722
1723 /* write last descriptor with RS and EOP bits */
1724 td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1725 tx_desc->cmd_type_offset_bsz =
1726 ice_build_ctob(td_cmd, td_offset, size, td_tag);
1727
1728 /* Force memory writes to complete before letting h/w know there
1729 * are new descriptors to fetch.
1730 *
1731 * We also use this memory barrier to make certain all of the
1732 * status bits have been updated before next_to_watch is written.
1733 */
1734 wmb();
1735
1736 /* set next_to_watch value indicating a packet is present */
1737 first->next_to_watch = tx_desc;
1738
1739 tx_ring->next_to_use = i;
1740
1741 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1742
1743 /* notify HW of packet */
1744 kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1745 netdev_xmit_more());
1746 if (kick)
1747 /* notify HW of packet */
1748 writel(i, tx_ring->tail);
1749
1750 return;
1751
1752 dma_error:
1753 /* clear DMA mappings for failed tx_buf map */
1754 for (;;) {
1755 tx_buf = &tx_ring->tx_buf[i];
1756 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1757 if (tx_buf == first)
1758 break;
1759 if (i == 0)
1760 i = tx_ring->count;
1761 i--;
1762 }
1763
1764 tx_ring->next_to_use = i;
1765 }
1766
1767 /**
1768 * ice_tx_csum - Enable Tx checksum offloads
1769 * @first: pointer to the first descriptor
1770 * @off: pointer to struct that holds offload parameters
1771 *
1772 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1773 */
1774 static
ice_tx_csum(struct ice_tx_buf * first,struct ice_tx_offload_params * off)1775 int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1776 {
1777 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1778 struct sk_buff *skb = first->skb;
1779 union {
1780 struct iphdr *v4;
1781 struct ipv6hdr *v6;
1782 unsigned char *hdr;
1783 } ip;
1784 union {
1785 struct tcphdr *tcp;
1786 unsigned char *hdr;
1787 } l4;
1788 __be16 frag_off, protocol;
1789 unsigned char *exthdr;
1790 u32 offset, cmd = 0;
1791 u8 l4_proto = 0;
1792
1793 if (skb->ip_summed != CHECKSUM_PARTIAL)
1794 return 0;
1795
1796 protocol = vlan_get_protocol(skb);
1797
1798 if (eth_p_mpls(protocol)) {
1799 ip.hdr = skb_inner_network_header(skb);
1800 l4.hdr = skb_checksum_start(skb);
1801 } else {
1802 ip.hdr = skb_network_header(skb);
1803 l4.hdr = skb_transport_header(skb);
1804 }
1805
1806 /* compute outer L2 header size */
1807 l2_len = ip.hdr - skb->data;
1808 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1809
1810 /* set the tx_flags to indicate the IP protocol type. this is
1811 * required so that checksum header computation below is accurate.
1812 */
1813 if (ip.v4->version == 4)
1814 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1815 else if (ip.v6->version == 6)
1816 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1817
1818 if (skb->encapsulation) {
1819 bool gso_ena = false;
1820 u32 tunnel = 0;
1821
1822 /* define outer network header type */
1823 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1824 tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1825 ICE_TX_CTX_EIPT_IPV4 :
1826 ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1827 l4_proto = ip.v4->protocol;
1828 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1829 int ret;
1830
1831 tunnel |= ICE_TX_CTX_EIPT_IPV6;
1832 exthdr = ip.hdr + sizeof(*ip.v6);
1833 l4_proto = ip.v6->nexthdr;
1834 ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1835 &l4_proto, &frag_off);
1836 if (ret < 0)
1837 return -1;
1838 }
1839
1840 /* define outer transport */
1841 switch (l4_proto) {
1842 case IPPROTO_UDP:
1843 tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1844 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1845 break;
1846 case IPPROTO_GRE:
1847 tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1848 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1849 break;
1850 case IPPROTO_IPIP:
1851 case IPPROTO_IPV6:
1852 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1853 l4.hdr = skb_inner_network_header(skb);
1854 break;
1855 default:
1856 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1857 return -1;
1858
1859 skb_checksum_help(skb);
1860 return 0;
1861 }
1862
1863 /* compute outer L3 header size */
1864 tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1865 ICE_TXD_CTX_QW0_EIPLEN_S;
1866
1867 /* switch IP header pointer from outer to inner header */
1868 ip.hdr = skb_inner_network_header(skb);
1869
1870 /* compute tunnel header size */
1871 tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1872 ICE_TXD_CTX_QW0_NATLEN_S;
1873
1874 gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1875 /* indicate if we need to offload outer UDP header */
1876 if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1877 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1878 tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1879
1880 /* record tunnel offload values */
1881 off->cd_tunnel_params |= tunnel;
1882
1883 /* set DTYP=1 to indicate that it's an Tx context descriptor
1884 * in IPsec tunnel mode with Tx offloads in Quad word 1
1885 */
1886 off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1887
1888 /* switch L4 header pointer from outer to inner */
1889 l4.hdr = skb_inner_transport_header(skb);
1890 l4_proto = 0;
1891
1892 /* reset type as we transition from outer to inner headers */
1893 first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1894 if (ip.v4->version == 4)
1895 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1896 if (ip.v6->version == 6)
1897 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1898 }
1899
1900 /* Enable IP checksum offloads */
1901 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1902 l4_proto = ip.v4->protocol;
1903 /* the stack computes the IP header already, the only time we
1904 * need the hardware to recompute it is in the case of TSO.
1905 */
1906 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1907 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1908 else
1909 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1910
1911 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1912 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1913 exthdr = ip.hdr + sizeof(*ip.v6);
1914 l4_proto = ip.v6->nexthdr;
1915 if (l4.hdr != exthdr)
1916 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1917 &frag_off);
1918 } else {
1919 return -1;
1920 }
1921
1922 /* compute inner L3 header size */
1923 l3_len = l4.hdr - ip.hdr;
1924 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1925
1926 /* Enable L4 checksum offloads */
1927 switch (l4_proto) {
1928 case IPPROTO_TCP:
1929 /* enable checksum offloads */
1930 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1931 l4_len = l4.tcp->doff;
1932 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1933 break;
1934 case IPPROTO_UDP:
1935 /* enable UDP checksum offload */
1936 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1937 l4_len = (sizeof(struct udphdr) >> 2);
1938 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1939 break;
1940 case IPPROTO_SCTP:
1941 /* enable SCTP checksum offload */
1942 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1943 l4_len = sizeof(struct sctphdr) >> 2;
1944 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1945 break;
1946
1947 default:
1948 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1949 return -1;
1950 skb_checksum_help(skb);
1951 return 0;
1952 }
1953
1954 off->td_cmd |= cmd;
1955 off->td_offset |= offset;
1956 return 1;
1957 }
1958
1959 /**
1960 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1961 * @tx_ring: ring to send buffer on
1962 * @first: pointer to struct ice_tx_buf
1963 *
1964 * Checks the skb and set up correspondingly several generic transmit flags
1965 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1966 */
1967 static void
ice_tx_prepare_vlan_flags(struct ice_tx_ring * tx_ring,struct ice_tx_buf * first)1968 ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1969 {
1970 struct sk_buff *skb = first->skb;
1971
1972 /* nothing left to do, software offloaded VLAN */
1973 if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1974 return;
1975
1976 /* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1977 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1978 * VLAN offloads exclusively so we only care about the VLAN ID here
1979 */
1980 if (skb_vlan_tag_present(skb)) {
1981 first->vid = skb_vlan_tag_get(skb);
1982 if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
1983 first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
1984 else
1985 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
1986 }
1987
1988 ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
1989 }
1990
1991 /**
1992 * ice_tso - computes mss and TSO length to prepare for TSO
1993 * @first: pointer to struct ice_tx_buf
1994 * @off: pointer to struct that holds offload parameters
1995 *
1996 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
1997 */
1998 static
ice_tso(struct ice_tx_buf * first,struct ice_tx_offload_params * off)1999 int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2000 {
2001 struct sk_buff *skb = first->skb;
2002 union {
2003 struct iphdr *v4;
2004 struct ipv6hdr *v6;
2005 unsigned char *hdr;
2006 } ip;
2007 union {
2008 struct tcphdr *tcp;
2009 struct udphdr *udp;
2010 unsigned char *hdr;
2011 } l4;
2012 u64 cd_mss, cd_tso_len;
2013 __be16 protocol;
2014 u32 paylen;
2015 u8 l4_start;
2016 int err;
2017
2018 if (skb->ip_summed != CHECKSUM_PARTIAL)
2019 return 0;
2020
2021 if (!skb_is_gso(skb))
2022 return 0;
2023
2024 err = skb_cow_head(skb, 0);
2025 if (err < 0)
2026 return err;
2027
2028 protocol = vlan_get_protocol(skb);
2029
2030 if (eth_p_mpls(protocol))
2031 ip.hdr = skb_inner_network_header(skb);
2032 else
2033 ip.hdr = skb_network_header(skb);
2034 l4.hdr = skb_checksum_start(skb);
2035
2036 /* initialize outer IP header fields */
2037 if (ip.v4->version == 4) {
2038 ip.v4->tot_len = 0;
2039 ip.v4->check = 0;
2040 } else {
2041 ip.v6->payload_len = 0;
2042 }
2043
2044 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2045 SKB_GSO_GRE_CSUM |
2046 SKB_GSO_IPXIP4 |
2047 SKB_GSO_IPXIP6 |
2048 SKB_GSO_UDP_TUNNEL |
2049 SKB_GSO_UDP_TUNNEL_CSUM)) {
2050 if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2051 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2052 l4.udp->len = 0;
2053
2054 /* determine offset of outer transport header */
2055 l4_start = (u8)(l4.hdr - skb->data);
2056
2057 /* remove payload length from outer checksum */
2058 paylen = skb->len - l4_start;
2059 csum_replace_by_diff(&l4.udp->check,
2060 (__force __wsum)htonl(paylen));
2061 }
2062
2063 /* reset pointers to inner headers */
2064 ip.hdr = skb_inner_network_header(skb);
2065 l4.hdr = skb_inner_transport_header(skb);
2066
2067 /* initialize inner IP header fields */
2068 if (ip.v4->version == 4) {
2069 ip.v4->tot_len = 0;
2070 ip.v4->check = 0;
2071 } else {
2072 ip.v6->payload_len = 0;
2073 }
2074 }
2075
2076 /* determine offset of transport header */
2077 l4_start = (u8)(l4.hdr - skb->data);
2078
2079 /* remove payload length from checksum */
2080 paylen = skb->len - l4_start;
2081
2082 if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2083 csum_replace_by_diff(&l4.udp->check,
2084 (__force __wsum)htonl(paylen));
2085 /* compute length of UDP segmentation header */
2086 off->header_len = (u8)sizeof(l4.udp) + l4_start;
2087 } else {
2088 csum_replace_by_diff(&l4.tcp->check,
2089 (__force __wsum)htonl(paylen));
2090 /* compute length of TCP segmentation header */
2091 off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2092 }
2093
2094 /* update gso_segs and bytecount */
2095 first->gso_segs = skb_shinfo(skb)->gso_segs;
2096 first->bytecount += (first->gso_segs - 1) * off->header_len;
2097
2098 cd_tso_len = skb->len - off->header_len;
2099 cd_mss = skb_shinfo(skb)->gso_size;
2100
2101 /* record cdesc_qw1 with TSO parameters */
2102 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2103 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2104 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2105 (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2106 first->tx_flags |= ICE_TX_FLAGS_TSO;
2107 return 1;
2108 }
2109
2110 /**
2111 * ice_txd_use_count - estimate the number of descriptors needed for Tx
2112 * @size: transmit request size in bytes
2113 *
2114 * Due to hardware alignment restrictions (4K alignment), we need to
2115 * assume that we can have no more than 12K of data per descriptor, even
2116 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2117 * Thus, we need to divide by 12K. But division is slow! Instead,
2118 * we decompose the operation into shifts and one relatively cheap
2119 * multiply operation.
2120 *
2121 * To divide by 12K, we first divide by 4K, then divide by 3:
2122 * To divide by 4K, shift right by 12 bits
2123 * To divide by 3, multiply by 85, then divide by 256
2124 * (Divide by 256 is done by shifting right by 8 bits)
2125 * Finally, we add one to round up. Because 256 isn't an exact multiple of
2126 * 3, we'll underestimate near each multiple of 12K. This is actually more
2127 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2128 * segment. For our purposes this is accurate out to 1M which is orders of
2129 * magnitude greater than our largest possible GSO size.
2130 *
2131 * This would then be implemented as:
2132 * return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2133 *
2134 * Since multiplication and division are commutative, we can reorder
2135 * operations into:
2136 * return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2137 */
ice_txd_use_count(unsigned int size)2138 static unsigned int ice_txd_use_count(unsigned int size)
2139 {
2140 return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2141 }
2142
2143 /**
2144 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2145 * @skb: send buffer
2146 *
2147 * Returns number of data descriptors needed for this skb.
2148 */
ice_xmit_desc_count(struct sk_buff * skb)2149 static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2150 {
2151 const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2152 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2153 unsigned int count = 0, size = skb_headlen(skb);
2154
2155 for (;;) {
2156 count += ice_txd_use_count(size);
2157
2158 if (!nr_frags--)
2159 break;
2160
2161 size = skb_frag_size(frag++);
2162 }
2163
2164 return count;
2165 }
2166
2167 /**
2168 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2169 * @skb: send buffer
2170 *
2171 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2172 * and so we need to figure out the cases where we need to linearize the skb.
2173 *
2174 * For TSO we need to count the TSO header and segment payload separately.
2175 * As such we need to check cases where we have 7 fragments or more as we
2176 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2177 * the segment payload in the first descriptor, and another 7 for the
2178 * fragments.
2179 */
__ice_chk_linearize(struct sk_buff * skb)2180 static bool __ice_chk_linearize(struct sk_buff *skb)
2181 {
2182 const skb_frag_t *frag, *stale;
2183 int nr_frags, sum;
2184
2185 /* no need to check if number of frags is less than 7 */
2186 nr_frags = skb_shinfo(skb)->nr_frags;
2187 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2188 return false;
2189
2190 /* We need to walk through the list and validate that each group
2191 * of 6 fragments totals at least gso_size.
2192 */
2193 nr_frags -= ICE_MAX_BUF_TXD - 2;
2194 frag = &skb_shinfo(skb)->frags[0];
2195
2196 /* Initialize size to the negative value of gso_size minus 1. We
2197 * use this as the worst case scenario in which the frag ahead
2198 * of us only provides one byte which is why we are limited to 6
2199 * descriptors for a single transmit as the header and previous
2200 * fragment are already consuming 2 descriptors.
2201 */
2202 sum = 1 - skb_shinfo(skb)->gso_size;
2203
2204 /* Add size of frags 0 through 4 to create our initial sum */
2205 sum += skb_frag_size(frag++);
2206 sum += skb_frag_size(frag++);
2207 sum += skb_frag_size(frag++);
2208 sum += skb_frag_size(frag++);
2209 sum += skb_frag_size(frag++);
2210
2211 /* Walk through fragments adding latest fragment, testing it, and
2212 * then removing stale fragments from the sum.
2213 */
2214 for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2215 int stale_size = skb_frag_size(stale);
2216
2217 sum += skb_frag_size(frag++);
2218
2219 /* The stale fragment may present us with a smaller
2220 * descriptor than the actual fragment size. To account
2221 * for that we need to remove all the data on the front and
2222 * figure out what the remainder would be in the last
2223 * descriptor associated with the fragment.
2224 */
2225 if (stale_size > ICE_MAX_DATA_PER_TXD) {
2226 int align_pad = -(skb_frag_off(stale)) &
2227 (ICE_MAX_READ_REQ_SIZE - 1);
2228
2229 sum -= align_pad;
2230 stale_size -= align_pad;
2231
2232 do {
2233 sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2234 stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2235 } while (stale_size > ICE_MAX_DATA_PER_TXD);
2236 }
2237
2238 /* if sum is negative we failed to make sufficient progress */
2239 if (sum < 0)
2240 return true;
2241
2242 if (!nr_frags--)
2243 break;
2244
2245 sum -= stale_size;
2246 }
2247
2248 return false;
2249 }
2250
2251 /**
2252 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2253 * @skb: send buffer
2254 * @count: number of buffers used
2255 *
2256 * Note: Our HW can't scatter-gather more than 8 fragments to build
2257 * a packet on the wire and so we need to figure out the cases where we
2258 * need to linearize the skb.
2259 */
ice_chk_linearize(struct sk_buff * skb,unsigned int count)2260 static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2261 {
2262 /* Both TSO and single send will work if count is less than 8 */
2263 if (likely(count < ICE_MAX_BUF_TXD))
2264 return false;
2265
2266 if (skb_is_gso(skb))
2267 return __ice_chk_linearize(skb);
2268
2269 /* we can support up to 8 data buffers for a single send */
2270 return count != ICE_MAX_BUF_TXD;
2271 }
2272
2273 /**
2274 * ice_tstamp - set up context descriptor for hardware timestamp
2275 * @tx_ring: pointer to the Tx ring to send buffer on
2276 * @skb: pointer to the SKB we're sending
2277 * @first: Tx buffer
2278 * @off: Tx offload parameters
2279 */
2280 static void
ice_tstamp(struct ice_tx_ring * tx_ring,struct sk_buff * skb,struct ice_tx_buf * first,struct ice_tx_offload_params * off)2281 ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2282 struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2283 {
2284 s8 idx;
2285
2286 /* only timestamp the outbound packet if the user has requested it */
2287 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2288 return;
2289
2290 if (!tx_ring->ptp_tx)
2291 return;
2292
2293 /* Tx timestamps cannot be sampled when doing TSO */
2294 if (first->tx_flags & ICE_TX_FLAGS_TSO)
2295 return;
2296
2297 /* Grab an open timestamp slot */
2298 idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2299 if (idx < 0) {
2300 tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2301 return;
2302 }
2303
2304 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2305 (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2306 ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2307 first->tx_flags |= ICE_TX_FLAGS_TSYN;
2308 }
2309
2310 /**
2311 * ice_xmit_frame_ring - Sends buffer on Tx ring
2312 * @skb: send buffer
2313 * @tx_ring: ring to send buffer on
2314 *
2315 * Returns NETDEV_TX_OK if sent, else an error code
2316 */
2317 static netdev_tx_t
ice_xmit_frame_ring(struct sk_buff * skb,struct ice_tx_ring * tx_ring)2318 ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2319 {
2320 struct ice_tx_offload_params offload = { 0 };
2321 struct ice_vsi *vsi = tx_ring->vsi;
2322 struct ice_tx_buf *first;
2323 struct ethhdr *eth;
2324 unsigned int count;
2325 int tso, csum;
2326
2327 ice_trace(xmit_frame_ring, tx_ring, skb);
2328
2329 if (unlikely(ipv6_hopopt_jumbo_remove(skb)))
2330 goto out_drop;
2331
2332 count = ice_xmit_desc_count(skb);
2333 if (ice_chk_linearize(skb, count)) {
2334 if (__skb_linearize(skb))
2335 goto out_drop;
2336 count = ice_txd_use_count(skb->len);
2337 tx_ring->ring_stats->tx_stats.tx_linearize++;
2338 }
2339
2340 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2341 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2342 * + 4 desc gap to avoid the cache line where head is,
2343 * + 1 desc for context descriptor,
2344 * otherwise try next time
2345 */
2346 if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2347 ICE_DESCS_FOR_CTX_DESC)) {
2348 tx_ring->ring_stats->tx_stats.tx_busy++;
2349 return NETDEV_TX_BUSY;
2350 }
2351
2352 /* prefetch for bql data which is infrequently used */
2353 netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2354
2355 offload.tx_ring = tx_ring;
2356
2357 /* record the location of the first descriptor for this packet */
2358 first = &tx_ring->tx_buf[tx_ring->next_to_use];
2359 first->skb = skb;
2360 first->type = ICE_TX_BUF_SKB;
2361 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2362 first->gso_segs = 1;
2363 first->tx_flags = 0;
2364
2365 /* prepare the VLAN tagging flags for Tx */
2366 ice_tx_prepare_vlan_flags(tx_ring, first);
2367 if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2368 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2369 (ICE_TX_CTX_DESC_IL2TAG2 <<
2370 ICE_TXD_CTX_QW1_CMD_S));
2371 offload.cd_l2tag2 = first->vid;
2372 }
2373
2374 /* set up TSO offload */
2375 tso = ice_tso(first, &offload);
2376 if (tso < 0)
2377 goto out_drop;
2378
2379 /* always set up Tx checksum offload */
2380 csum = ice_tx_csum(first, &offload);
2381 if (csum < 0)
2382 goto out_drop;
2383
2384 /* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2385 eth = (struct ethhdr *)skb_mac_header(skb);
2386 if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2387 eth->h_proto == htons(ETH_P_LLDP)) &&
2388 vsi->type == ICE_VSI_PF &&
2389 vsi->port_info->qos_cfg.is_sw_lldp))
2390 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2391 ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2392 ICE_TXD_CTX_QW1_CMD_S);
2393
2394 ice_tstamp(tx_ring, skb, first, &offload);
2395 if (ice_is_switchdev_running(vsi->back))
2396 ice_eswitch_set_target_vsi(skb, &offload);
2397
2398 if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2399 struct ice_tx_ctx_desc *cdesc;
2400 u16 i = tx_ring->next_to_use;
2401
2402 /* grab the next descriptor */
2403 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2404 i++;
2405 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2406
2407 /* setup context descriptor */
2408 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2409 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2410 cdesc->rsvd = cpu_to_le16(0);
2411 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2412 }
2413
2414 ice_tx_map(tx_ring, first, &offload);
2415 return NETDEV_TX_OK;
2416
2417 out_drop:
2418 ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2419 dev_kfree_skb_any(skb);
2420 return NETDEV_TX_OK;
2421 }
2422
2423 /**
2424 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2425 * @skb: send buffer
2426 * @netdev: network interface device structure
2427 *
2428 * Returns NETDEV_TX_OK if sent, else an error code
2429 */
ice_start_xmit(struct sk_buff * skb,struct net_device * netdev)2430 netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2431 {
2432 struct ice_netdev_priv *np = netdev_priv(netdev);
2433 struct ice_vsi *vsi = np->vsi;
2434 struct ice_tx_ring *tx_ring;
2435
2436 tx_ring = vsi->tx_rings[skb->queue_mapping];
2437
2438 /* hardware can't handle really short frames, hardware padding works
2439 * beyond this point
2440 */
2441 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2442 return NETDEV_TX_OK;
2443
2444 return ice_xmit_frame_ring(skb, tx_ring);
2445 }
2446
2447 /**
2448 * ice_get_dscp_up - return the UP/TC value for a SKB
2449 * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2450 * @skb: SKB to query for info to determine UP/TC
2451 *
2452 * This function is to only be called when the PF is in L3 DSCP PFC mode
2453 */
ice_get_dscp_up(struct ice_dcbx_cfg * dcbcfg,struct sk_buff * skb)2454 static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2455 {
2456 u8 dscp = 0;
2457
2458 if (skb->protocol == htons(ETH_P_IP))
2459 dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2460 else if (skb->protocol == htons(ETH_P_IPV6))
2461 dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2462
2463 return dcbcfg->dscp_map[dscp];
2464 }
2465
2466 u16
ice_select_queue(struct net_device * netdev,struct sk_buff * skb,struct net_device * sb_dev)2467 ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2468 struct net_device *sb_dev)
2469 {
2470 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2471 struct ice_dcbx_cfg *dcbcfg;
2472
2473 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2474 if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2475 skb->priority = ice_get_dscp_up(dcbcfg, skb);
2476
2477 return netdev_pick_tx(netdev, skb, sb_dev);
2478 }
2479
2480 /**
2481 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2482 * @tx_ring: tx_ring to clean
2483 */
ice_clean_ctrl_tx_irq(struct ice_tx_ring * tx_ring)2484 void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2485 {
2486 struct ice_vsi *vsi = tx_ring->vsi;
2487 s16 i = tx_ring->next_to_clean;
2488 int budget = ICE_DFLT_IRQ_WORK;
2489 struct ice_tx_desc *tx_desc;
2490 struct ice_tx_buf *tx_buf;
2491
2492 tx_buf = &tx_ring->tx_buf[i];
2493 tx_desc = ICE_TX_DESC(tx_ring, i);
2494 i -= tx_ring->count;
2495
2496 do {
2497 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2498
2499 /* if next_to_watch is not set then there is no pending work */
2500 if (!eop_desc)
2501 break;
2502
2503 /* prevent any other reads prior to eop_desc */
2504 smp_rmb();
2505
2506 /* if the descriptor isn't done, no work to do */
2507 if (!(eop_desc->cmd_type_offset_bsz &
2508 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2509 break;
2510
2511 /* clear next_to_watch to prevent false hangs */
2512 tx_buf->next_to_watch = NULL;
2513 tx_desc->buf_addr = 0;
2514 tx_desc->cmd_type_offset_bsz = 0;
2515
2516 /* move past filter desc */
2517 tx_buf++;
2518 tx_desc++;
2519 i++;
2520 if (unlikely(!i)) {
2521 i -= tx_ring->count;
2522 tx_buf = tx_ring->tx_buf;
2523 tx_desc = ICE_TX_DESC(tx_ring, 0);
2524 }
2525
2526 /* unmap the data header */
2527 if (dma_unmap_len(tx_buf, len))
2528 dma_unmap_single(tx_ring->dev,
2529 dma_unmap_addr(tx_buf, dma),
2530 dma_unmap_len(tx_buf, len),
2531 DMA_TO_DEVICE);
2532 if (tx_buf->type == ICE_TX_BUF_DUMMY)
2533 devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2534
2535 /* clear next_to_watch to prevent false hangs */
2536 tx_buf->type = ICE_TX_BUF_EMPTY;
2537 tx_buf->tx_flags = 0;
2538 tx_buf->next_to_watch = NULL;
2539 dma_unmap_len_set(tx_buf, len, 0);
2540 tx_desc->buf_addr = 0;
2541 tx_desc->cmd_type_offset_bsz = 0;
2542
2543 /* move past eop_desc for start of next FD desc */
2544 tx_buf++;
2545 tx_desc++;
2546 i++;
2547 if (unlikely(!i)) {
2548 i -= tx_ring->count;
2549 tx_buf = tx_ring->tx_buf;
2550 tx_desc = ICE_TX_DESC(tx_ring, 0);
2551 }
2552
2553 budget--;
2554 } while (likely(budget));
2555
2556 i += tx_ring->count;
2557 tx_ring->next_to_clean = i;
2558
2559 /* re-enable interrupt if needed */
2560 ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2561 }
2562