xref: /openbmc/linux/drivers/gpu/drm/i915/display/intel_display_debugfs.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
1  // SPDX-License-Identifier: MIT
2  /*
3   * Copyright © 2020 Intel Corporation
4   */
5  
6  #include <linux/string_helpers.h>
7  
8  #include <drm/drm_debugfs.h>
9  #include <drm/drm_edid.h>
10  #include <drm/drm_fourcc.h>
11  
12  #include "hsw_ips.h"
13  #include "i915_debugfs.h"
14  #include "i915_irq.h"
15  #include "i915_reg.h"
16  #include "intel_crtc.h"
17  #include "intel_de.h"
18  #include "intel_crtc_state_dump.h"
19  #include "intel_display_debugfs.h"
20  #include "intel_display_power.h"
21  #include "intel_display_power_well.h"
22  #include "intel_display_types.h"
23  #include "intel_dmc.h"
24  #include "intel_dp.h"
25  #include "intel_dp_mst.h"
26  #include "intel_drrs.h"
27  #include "intel_fbc.h"
28  #include "intel_fbdev.h"
29  #include "intel_hdcp.h"
30  #include "intel_hdmi.h"
31  #include "intel_hotplug.h"
32  #include "intel_panel.h"
33  #include "intel_psr.h"
34  #include "intel_psr_regs.h"
35  #include "intel_wm.h"
36  
node_to_i915(struct drm_info_node * node)37  static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
38  {
39  	return to_i915(node->minor->dev);
40  }
41  
i915_frontbuffer_tracking(struct seq_file * m,void * unused)42  static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
43  {
44  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
45  
46  	seq_printf(m, "FB tracking busy bits: 0x%08x\n",
47  		   dev_priv->display.fb_tracking.busy_bits);
48  
49  	seq_printf(m, "FB tracking flip bits: 0x%08x\n",
50  		   dev_priv->display.fb_tracking.flip_bits);
51  
52  	return 0;
53  }
54  
i915_sr_status(struct seq_file * m,void * unused)55  static int i915_sr_status(struct seq_file *m, void *unused)
56  {
57  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
58  	intel_wakeref_t wakeref;
59  	bool sr_enabled = false;
60  
61  	wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
62  
63  	if (DISPLAY_VER(dev_priv) >= 9)
64  		/* no global SR status; inspect per-plane WM */;
65  	else if (HAS_PCH_SPLIT(dev_priv))
66  		sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE;
67  	else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
68  		 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
69  		sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
70  	else if (IS_I915GM(dev_priv))
71  		sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN;
72  	else if (IS_PINEVIEW(dev_priv))
73  		sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
74  	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
75  		sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
76  
77  	intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
78  
79  	seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
80  
81  	return 0;
82  }
83  
i915_opregion(struct seq_file * m,void * unused)84  static int i915_opregion(struct seq_file *m, void *unused)
85  {
86  	struct drm_i915_private *i915 = node_to_i915(m->private);
87  	struct intel_opregion *opregion = &i915->display.opregion;
88  
89  	if (opregion->header)
90  		seq_write(m, opregion->header, OPREGION_SIZE);
91  
92  	return 0;
93  }
94  
i915_vbt(struct seq_file * m,void * unused)95  static int i915_vbt(struct seq_file *m, void *unused)
96  {
97  	struct drm_i915_private *i915 = node_to_i915(m->private);
98  	struct intel_opregion *opregion = &i915->display.opregion;
99  
100  	if (opregion->vbt)
101  		seq_write(m, opregion->vbt, opregion->vbt_size);
102  
103  	return 0;
104  }
105  
i915_gem_framebuffer_info(struct seq_file * m,void * data)106  static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
107  {
108  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
109  	struct intel_framebuffer *fbdev_fb = NULL;
110  	struct drm_framebuffer *drm_fb;
111  
112  #ifdef CONFIG_DRM_FBDEV_EMULATION
113  	fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev);
114  	if (fbdev_fb) {
115  		seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
116  			   fbdev_fb->base.width,
117  			   fbdev_fb->base.height,
118  			   fbdev_fb->base.format->depth,
119  			   fbdev_fb->base.format->cpp[0] * 8,
120  			   fbdev_fb->base.modifier,
121  			   drm_framebuffer_read_refcount(&fbdev_fb->base));
122  		i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base));
123  		seq_putc(m, '\n');
124  	}
125  #endif
126  
127  	mutex_lock(&dev_priv->drm.mode_config.fb_lock);
128  	drm_for_each_fb(drm_fb, &dev_priv->drm) {
129  		struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
130  		if (fb == fbdev_fb)
131  			continue;
132  
133  		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
134  			   fb->base.width,
135  			   fb->base.height,
136  			   fb->base.format->depth,
137  			   fb->base.format->cpp[0] * 8,
138  			   fb->base.modifier,
139  			   drm_framebuffer_read_refcount(&fb->base));
140  		i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base));
141  		seq_putc(m, '\n');
142  	}
143  	mutex_unlock(&dev_priv->drm.mode_config.fb_lock);
144  
145  	return 0;
146  }
147  
i915_power_domain_info(struct seq_file * m,void * unused)148  static int i915_power_domain_info(struct seq_file *m, void *unused)
149  {
150  	struct drm_i915_private *i915 = node_to_i915(m->private);
151  
152  	intel_display_power_debug(i915, m);
153  
154  	return 0;
155  }
156  
intel_seq_print_mode(struct seq_file * m,int tabs,const struct drm_display_mode * mode)157  static void intel_seq_print_mode(struct seq_file *m, int tabs,
158  				 const struct drm_display_mode *mode)
159  {
160  	int i;
161  
162  	for (i = 0; i < tabs; i++)
163  		seq_putc(m, '\t');
164  
165  	seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
166  }
167  
intel_encoder_info(struct seq_file * m,struct intel_crtc * crtc,struct intel_encoder * encoder)168  static void intel_encoder_info(struct seq_file *m,
169  			       struct intel_crtc *crtc,
170  			       struct intel_encoder *encoder)
171  {
172  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
173  	struct drm_connector_list_iter conn_iter;
174  	struct drm_connector *connector;
175  
176  	seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
177  		   encoder->base.base.id, encoder->base.name);
178  
179  	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
180  	drm_for_each_connector_iter(connector, &conn_iter) {
181  		const struct drm_connector_state *conn_state =
182  			connector->state;
183  
184  		if (conn_state->best_encoder != &encoder->base)
185  			continue;
186  
187  		seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
188  			   connector->base.id, connector->name);
189  	}
190  	drm_connector_list_iter_end(&conn_iter);
191  }
192  
intel_panel_info(struct seq_file * m,struct intel_connector * connector)193  static void intel_panel_info(struct seq_file *m,
194  			     struct intel_connector *connector)
195  {
196  	const struct drm_display_mode *fixed_mode;
197  
198  	if (list_empty(&connector->panel.fixed_modes))
199  		return;
200  
201  	seq_puts(m, "\tfixed modes:\n");
202  
203  	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
204  		intel_seq_print_mode(m, 2, fixed_mode);
205  }
206  
intel_hdcp_info(struct seq_file * m,struct intel_connector * intel_connector)207  static void intel_hdcp_info(struct seq_file *m,
208  			    struct intel_connector *intel_connector)
209  {
210  	bool hdcp_cap, hdcp2_cap;
211  
212  	if (!intel_connector->hdcp.shim) {
213  		seq_puts(m, "No Connector Support");
214  		goto out;
215  	}
216  
217  	hdcp_cap = intel_hdcp_capable(intel_connector);
218  	hdcp2_cap = intel_hdcp2_capable(intel_connector);
219  
220  	if (hdcp_cap)
221  		seq_puts(m, "HDCP1.4 ");
222  	if (hdcp2_cap)
223  		seq_puts(m, "HDCP2.2 ");
224  
225  	if (!hdcp_cap && !hdcp2_cap)
226  		seq_puts(m, "None");
227  
228  out:
229  	seq_puts(m, "\n");
230  }
231  
intel_dp_info(struct seq_file * m,struct intel_connector * connector)232  static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
233  {
234  	struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
235  	struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
236  	const struct edid *edid = drm_edid_raw(connector->detect_edid);
237  
238  	seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
239  	seq_printf(m, "\taudio support: %s\n",
240  		   str_yes_no(connector->base.display_info.has_audio));
241  
242  	drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
243  				edid, &intel_dp->aux);
244  }
245  
intel_dp_mst_info(struct seq_file * m,struct intel_connector * connector)246  static void intel_dp_mst_info(struct seq_file *m,
247  			      struct intel_connector *connector)
248  {
249  	bool has_audio = connector->base.display_info.has_audio;
250  
251  	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
252  }
253  
intel_hdmi_info(struct seq_file * m,struct intel_connector * connector)254  static void intel_hdmi_info(struct seq_file *m,
255  			    struct intel_connector *connector)
256  {
257  	bool has_audio = connector->base.display_info.has_audio;
258  
259  	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
260  }
261  
intel_connector_info(struct seq_file * m,struct drm_connector * connector)262  static void intel_connector_info(struct seq_file *m,
263  				 struct drm_connector *connector)
264  {
265  	struct intel_connector *intel_connector = to_intel_connector(connector);
266  	const struct drm_connector_state *conn_state = connector->state;
267  	struct intel_encoder *encoder =
268  		to_intel_encoder(conn_state->best_encoder);
269  	const struct drm_display_mode *mode;
270  
271  	seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
272  		   connector->base.id, connector->name,
273  		   drm_get_connector_status_name(connector->status));
274  
275  	if (connector->status == connector_status_disconnected)
276  		return;
277  
278  	seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
279  		   connector->display_info.width_mm,
280  		   connector->display_info.height_mm);
281  	seq_printf(m, "\tsubpixel order: %s\n",
282  		   drm_get_subpixel_order_name(connector->display_info.subpixel_order));
283  	seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
284  
285  	if (!encoder)
286  		return;
287  
288  	switch (connector->connector_type) {
289  	case DRM_MODE_CONNECTOR_DisplayPort:
290  	case DRM_MODE_CONNECTOR_eDP:
291  		if (encoder->type == INTEL_OUTPUT_DP_MST)
292  			intel_dp_mst_info(m, intel_connector);
293  		else
294  			intel_dp_info(m, intel_connector);
295  		break;
296  	case DRM_MODE_CONNECTOR_HDMIA:
297  		if (encoder->type == INTEL_OUTPUT_HDMI ||
298  		    encoder->type == INTEL_OUTPUT_DDI)
299  			intel_hdmi_info(m, intel_connector);
300  		break;
301  	default:
302  		break;
303  	}
304  
305  	seq_puts(m, "\tHDCP version: ");
306  	intel_hdcp_info(m, intel_connector);
307  
308  	seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
309  
310  	intel_panel_info(m, intel_connector);
311  
312  	seq_printf(m, "\tmodes:\n");
313  	list_for_each_entry(mode, &connector->modes, head)
314  		intel_seq_print_mode(m, 2, mode);
315  }
316  
plane_type(enum drm_plane_type type)317  static const char *plane_type(enum drm_plane_type type)
318  {
319  	switch (type) {
320  	case DRM_PLANE_TYPE_OVERLAY:
321  		return "OVL";
322  	case DRM_PLANE_TYPE_PRIMARY:
323  		return "PRI";
324  	case DRM_PLANE_TYPE_CURSOR:
325  		return "CUR";
326  	/*
327  	 * Deliberately omitting default: to generate compiler warnings
328  	 * when a new drm_plane_type gets added.
329  	 */
330  	}
331  
332  	return "unknown";
333  }
334  
plane_rotation(char * buf,size_t bufsize,unsigned int rotation)335  static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
336  {
337  	/*
338  	 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
339  	 * will print them all to visualize if the values are misused
340  	 */
341  	snprintf(buf, bufsize,
342  		 "%s%s%s%s%s%s(0x%08x)",
343  		 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
344  		 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
345  		 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
346  		 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
347  		 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
348  		 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
349  		 rotation);
350  }
351  
plane_visibility(const struct intel_plane_state * plane_state)352  static const char *plane_visibility(const struct intel_plane_state *plane_state)
353  {
354  	if (plane_state->uapi.visible)
355  		return "visible";
356  
357  	if (plane_state->planar_slave)
358  		return "planar-slave";
359  
360  	return "hidden";
361  }
362  
intel_plane_uapi_info(struct seq_file * m,struct intel_plane * plane)363  static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
364  {
365  	const struct intel_plane_state *plane_state =
366  		to_intel_plane_state(plane->base.state);
367  	const struct drm_framebuffer *fb = plane_state->uapi.fb;
368  	struct drm_rect src, dst;
369  	char rot_str[48];
370  
371  	src = drm_plane_state_src(&plane_state->uapi);
372  	dst = drm_plane_state_dest(&plane_state->uapi);
373  
374  	plane_rotation(rot_str, sizeof(rot_str),
375  		       plane_state->uapi.rotation);
376  
377  	seq_puts(m, "\t\tuapi: [FB:");
378  	if (fb)
379  		seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
380  			   &fb->format->format, fb->modifier, fb->width,
381  			   fb->height);
382  	else
383  		seq_puts(m, "0] n/a,0x0,0x0,");
384  	seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
385  		   ", rotation=%s\n", plane_visibility(plane_state),
386  		   DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
387  
388  	if (plane_state->planar_linked_plane)
389  		seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
390  			   plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
391  			   plane_state->planar_slave ? "slave" : "master");
392  }
393  
intel_plane_hw_info(struct seq_file * m,struct intel_plane * plane)394  static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
395  {
396  	const struct intel_plane_state *plane_state =
397  		to_intel_plane_state(plane->base.state);
398  	const struct drm_framebuffer *fb = plane_state->hw.fb;
399  	char rot_str[48];
400  
401  	if (!fb)
402  		return;
403  
404  	plane_rotation(rot_str, sizeof(rot_str),
405  		       plane_state->hw.rotation);
406  
407  	seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
408  		   DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
409  		   fb->base.id, &fb->format->format,
410  		   fb->modifier, fb->width, fb->height,
411  		   str_yes_no(plane_state->uapi.visible),
412  		   DRM_RECT_FP_ARG(&plane_state->uapi.src),
413  		   DRM_RECT_ARG(&plane_state->uapi.dst),
414  		   rot_str);
415  }
416  
intel_plane_info(struct seq_file * m,struct intel_crtc * crtc)417  static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
418  {
419  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
420  	struct intel_plane *plane;
421  
422  	for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
423  		seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
424  			   plane->base.base.id, plane->base.name,
425  			   plane_type(plane->base.type));
426  		intel_plane_uapi_info(m, plane);
427  		intel_plane_hw_info(m, plane);
428  	}
429  }
430  
intel_scaler_info(struct seq_file * m,struct intel_crtc * crtc)431  static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
432  {
433  	const struct intel_crtc_state *crtc_state =
434  		to_intel_crtc_state(crtc->base.state);
435  	int num_scalers = crtc->num_scalers;
436  	int i;
437  
438  	/* Not all platformas have a scaler */
439  	if (num_scalers) {
440  		seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
441  			   num_scalers,
442  			   crtc_state->scaler_state.scaler_users,
443  			   crtc_state->scaler_state.scaler_id,
444  			   crtc_state->hw.scaling_filter);
445  
446  		for (i = 0; i < num_scalers; i++) {
447  			const struct intel_scaler *sc =
448  				&crtc_state->scaler_state.scalers[i];
449  
450  			seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
451  				   i, str_yes_no(sc->in_use), sc->mode);
452  		}
453  		seq_puts(m, "\n");
454  	} else {
455  		seq_puts(m, "\tNo scalers available on this platform\n");
456  	}
457  }
458  
459  #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
crtc_updates_info(struct seq_file * m,struct intel_crtc * crtc,const char * hdr)460  static void crtc_updates_info(struct seq_file *m,
461  			      struct intel_crtc *crtc,
462  			      const char *hdr)
463  {
464  	u64 count;
465  	int row;
466  
467  	count = 0;
468  	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
469  		count += crtc->debug.vbl.times[row];
470  	seq_printf(m, "%sUpdates: %llu\n", hdr, count);
471  	if (!count)
472  		return;
473  
474  	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
475  		char columns[80] = "       |";
476  		unsigned int x;
477  
478  		if (row & 1) {
479  			const char *units;
480  
481  			if (row > 10) {
482  				x = 1000000;
483  				units = "ms";
484  			} else {
485  				x = 1000;
486  				units = "us";
487  			}
488  
489  			snprintf(columns, sizeof(columns), "%4ld%s |",
490  				 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
491  		}
492  
493  		if (crtc->debug.vbl.times[row]) {
494  			x = ilog2(crtc->debug.vbl.times[row]);
495  			memset(columns + 8, '*', x);
496  			columns[8 + x] = '\0';
497  		}
498  
499  		seq_printf(m, "%s%s\n", hdr, columns);
500  	}
501  
502  	seq_printf(m, "%sMin update: %lluns\n",
503  		   hdr, crtc->debug.vbl.min);
504  	seq_printf(m, "%sMax update: %lluns\n",
505  		   hdr, crtc->debug.vbl.max);
506  	seq_printf(m, "%sAverage update: %lluns\n",
507  		   hdr, div64_u64(crtc->debug.vbl.sum,  count));
508  	seq_printf(m, "%sOverruns > %uus: %u\n",
509  		   hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
510  }
511  
crtc_updates_show(struct seq_file * m,void * data)512  static int crtc_updates_show(struct seq_file *m, void *data)
513  {
514  	crtc_updates_info(m, m->private, "");
515  	return 0;
516  }
517  
crtc_updates_open(struct inode * inode,struct file * file)518  static int crtc_updates_open(struct inode *inode, struct file *file)
519  {
520  	return single_open(file, crtc_updates_show, inode->i_private);
521  }
522  
crtc_updates_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)523  static ssize_t crtc_updates_write(struct file *file,
524  				  const char __user *ubuf,
525  				  size_t len, loff_t *offp)
526  {
527  	struct seq_file *m = file->private_data;
528  	struct intel_crtc *crtc = m->private;
529  
530  	/* May race with an update. Meh. */
531  	memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
532  
533  	return len;
534  }
535  
536  static const struct file_operations crtc_updates_fops = {
537  	.owner = THIS_MODULE,
538  	.open = crtc_updates_open,
539  	.read = seq_read,
540  	.llseek = seq_lseek,
541  	.release = single_release,
542  	.write = crtc_updates_write
543  };
544  
crtc_updates_add(struct intel_crtc * crtc)545  static void crtc_updates_add(struct intel_crtc *crtc)
546  {
547  	debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
548  			    crtc, &crtc_updates_fops);
549  }
550  
551  #else
crtc_updates_info(struct seq_file * m,struct intel_crtc * crtc,const char * hdr)552  static void crtc_updates_info(struct seq_file *m,
553  			      struct intel_crtc *crtc,
554  			      const char *hdr)
555  {
556  }
557  
crtc_updates_add(struct intel_crtc * crtc)558  static void crtc_updates_add(struct intel_crtc *crtc)
559  {
560  }
561  #endif
562  
intel_crtc_info(struct seq_file * m,struct intel_crtc * crtc)563  static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
564  {
565  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
566  	const struct intel_crtc_state *crtc_state =
567  		to_intel_crtc_state(crtc->base.state);
568  	struct intel_encoder *encoder;
569  
570  	seq_printf(m, "[CRTC:%d:%s]:\n",
571  		   crtc->base.base.id, crtc->base.name);
572  
573  	seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
574  		   str_yes_no(crtc_state->uapi.enable),
575  		   str_yes_no(crtc_state->uapi.active),
576  		   DRM_MODE_ARG(&crtc_state->uapi.mode));
577  
578  	seq_printf(m, "\thw: enable=%s, active=%s\n",
579  		   str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
580  	seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
581  		   DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
582  	seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
583  		   DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
584  
585  	seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
586  		   DRM_RECT_ARG(&crtc_state->pipe_src),
587  		   str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
588  
589  	intel_scaler_info(m, crtc);
590  
591  	if (crtc_state->bigjoiner_pipes)
592  		seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
593  			   crtc_state->bigjoiner_pipes,
594  			   intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master");
595  
596  	for_each_intel_encoder_mask(&dev_priv->drm, encoder,
597  				    crtc_state->uapi.encoder_mask)
598  		intel_encoder_info(m, crtc, encoder);
599  
600  	intel_plane_info(m, crtc);
601  
602  	seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
603  		   str_yes_no(!crtc->cpu_fifo_underrun_disabled),
604  		   str_yes_no(!crtc->pch_fifo_underrun_disabled));
605  
606  	crtc_updates_info(m, crtc, "\t");
607  }
608  
i915_display_info(struct seq_file * m,void * unused)609  static int i915_display_info(struct seq_file *m, void *unused)
610  {
611  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
612  	struct intel_crtc *crtc;
613  	struct drm_connector *connector;
614  	struct drm_connector_list_iter conn_iter;
615  	intel_wakeref_t wakeref;
616  
617  	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
618  
619  	drm_modeset_lock_all(&dev_priv->drm);
620  
621  	seq_printf(m, "CRTC info\n");
622  	seq_printf(m, "---------\n");
623  	for_each_intel_crtc(&dev_priv->drm, crtc)
624  		intel_crtc_info(m, crtc);
625  
626  	seq_printf(m, "\n");
627  	seq_printf(m, "Connector info\n");
628  	seq_printf(m, "--------------\n");
629  	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
630  	drm_for_each_connector_iter(connector, &conn_iter)
631  		intel_connector_info(m, connector);
632  	drm_connector_list_iter_end(&conn_iter);
633  
634  	drm_modeset_unlock_all(&dev_priv->drm);
635  
636  	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
637  
638  	return 0;
639  }
640  
i915_shared_dplls_info(struct seq_file * m,void * unused)641  static int i915_shared_dplls_info(struct seq_file *m, void *unused)
642  {
643  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
644  	int i;
645  
646  	drm_modeset_lock_all(&dev_priv->drm);
647  
648  	seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
649  		   dev_priv->display.dpll.ref_clks.nssc,
650  		   dev_priv->display.dpll.ref_clks.ssc);
651  
652  	for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
653  		struct intel_shared_dpll *pll = &dev_priv->display.dpll.shared_dplls[i];
654  
655  		seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->info->name,
656  			   pll->info->id);
657  		seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
658  			   pll->state.pipe_mask, pll->active_mask,
659  			   str_yes_no(pll->on));
660  		seq_printf(m, " tracked hardware state:\n");
661  		seq_printf(m, " dpll:    0x%08x\n", pll->state.hw_state.dpll);
662  		seq_printf(m, " dpll_md: 0x%08x\n",
663  			   pll->state.hw_state.dpll_md);
664  		seq_printf(m, " fp0:     0x%08x\n", pll->state.hw_state.fp0);
665  		seq_printf(m, " fp1:     0x%08x\n", pll->state.hw_state.fp1);
666  		seq_printf(m, " wrpll:   0x%08x\n", pll->state.hw_state.wrpll);
667  		seq_printf(m, " cfgcr0:  0x%08x\n", pll->state.hw_state.cfgcr0);
668  		seq_printf(m, " cfgcr1:  0x%08x\n", pll->state.hw_state.cfgcr1);
669  		seq_printf(m, " div0:    0x%08x\n", pll->state.hw_state.div0);
670  		seq_printf(m, " mg_refclkin_ctl:        0x%08x\n",
671  			   pll->state.hw_state.mg_refclkin_ctl);
672  		seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n",
673  			   pll->state.hw_state.mg_clktop2_coreclkctl1);
674  		seq_printf(m, " mg_clktop2_hsclkctl:    0x%08x\n",
675  			   pll->state.hw_state.mg_clktop2_hsclkctl);
676  		seq_printf(m, " mg_pll_div0:  0x%08x\n",
677  			   pll->state.hw_state.mg_pll_div0);
678  		seq_printf(m, " mg_pll_div1:  0x%08x\n",
679  			   pll->state.hw_state.mg_pll_div1);
680  		seq_printf(m, " mg_pll_lf:    0x%08x\n",
681  			   pll->state.hw_state.mg_pll_lf);
682  		seq_printf(m, " mg_pll_frac_lock: 0x%08x\n",
683  			   pll->state.hw_state.mg_pll_frac_lock);
684  		seq_printf(m, " mg_pll_ssc:   0x%08x\n",
685  			   pll->state.hw_state.mg_pll_ssc);
686  		seq_printf(m, " mg_pll_bias:  0x%08x\n",
687  			   pll->state.hw_state.mg_pll_bias);
688  		seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n",
689  			   pll->state.hw_state.mg_pll_tdc_coldst_bias);
690  	}
691  	drm_modeset_unlock_all(&dev_priv->drm);
692  
693  	return 0;
694  }
695  
i915_ddb_info(struct seq_file * m,void * unused)696  static int i915_ddb_info(struct seq_file *m, void *unused)
697  {
698  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
699  	struct skl_ddb_entry *entry;
700  	struct intel_crtc *crtc;
701  
702  	if (DISPLAY_VER(dev_priv) < 9)
703  		return -ENODEV;
704  
705  	drm_modeset_lock_all(&dev_priv->drm);
706  
707  	seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
708  
709  	for_each_intel_crtc(&dev_priv->drm, crtc) {
710  		struct intel_crtc_state *crtc_state =
711  			to_intel_crtc_state(crtc->base.state);
712  		enum pipe pipe = crtc->pipe;
713  		enum plane_id plane_id;
714  
715  		seq_printf(m, "Pipe %c\n", pipe_name(pipe));
716  
717  		for_each_plane_id_on_crtc(crtc, plane_id) {
718  			entry = &crtc_state->wm.skl.plane_ddb[plane_id];
719  			seq_printf(m, "  Plane%-8d%8u%8u%8u\n", plane_id + 1,
720  				   entry->start, entry->end,
721  				   skl_ddb_entry_size(entry));
722  		}
723  
724  		entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
725  		seq_printf(m, "  %-13s%8u%8u%8u\n", "Cursor", entry->start,
726  			   entry->end, skl_ddb_entry_size(entry));
727  	}
728  
729  	drm_modeset_unlock_all(&dev_priv->drm);
730  
731  	return 0;
732  }
733  
734  static bool
intel_lpsp_power_well_enabled(struct drm_i915_private * i915,enum i915_power_well_id power_well_id)735  intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
736  			      enum i915_power_well_id power_well_id)
737  {
738  	intel_wakeref_t wakeref;
739  	bool is_enabled;
740  
741  	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
742  	is_enabled = intel_display_power_well_is_enabled(i915,
743  							 power_well_id);
744  	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
745  
746  	return is_enabled;
747  }
748  
i915_lpsp_status(struct seq_file * m,void * unused)749  static int i915_lpsp_status(struct seq_file *m, void *unused)
750  {
751  	struct drm_i915_private *i915 = node_to_i915(m->private);
752  	bool lpsp_enabled = false;
753  
754  	if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) {
755  		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2);
756  	} else if (IS_DISPLAY_VER(i915, 11, 12)) {
757  		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3);
758  	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
759  		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL);
760  	} else {
761  		seq_puts(m, "LPSP: not supported\n");
762  		return 0;
763  	}
764  
765  	seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
766  
767  	return 0;
768  }
769  
i915_dp_mst_info(struct seq_file * m,void * unused)770  static int i915_dp_mst_info(struct seq_file *m, void *unused)
771  {
772  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
773  	struct intel_encoder *intel_encoder;
774  	struct intel_digital_port *dig_port;
775  	struct drm_connector *connector;
776  	struct drm_connector_list_iter conn_iter;
777  
778  	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
779  	drm_for_each_connector_iter(connector, &conn_iter) {
780  		if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
781  			continue;
782  
783  		intel_encoder = intel_attached_encoder(to_intel_connector(connector));
784  		if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
785  			continue;
786  
787  		dig_port = enc_to_dig_port(intel_encoder);
788  		if (!intel_dp_mst_source_support(&dig_port->dp))
789  			continue;
790  
791  		seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
792  			   dig_port->base.base.base.id,
793  			   dig_port->base.base.name);
794  		drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr);
795  	}
796  	drm_connector_list_iter_end(&conn_iter);
797  
798  	return 0;
799  }
800  
i915_displayport_test_active_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)801  static ssize_t i915_displayport_test_active_write(struct file *file,
802  						  const char __user *ubuf,
803  						  size_t len, loff_t *offp)
804  {
805  	char *input_buffer;
806  	int status = 0;
807  	struct drm_device *dev;
808  	struct drm_connector *connector;
809  	struct drm_connector_list_iter conn_iter;
810  	struct intel_dp *intel_dp;
811  	int val = 0;
812  
813  	dev = ((struct seq_file *)file->private_data)->private;
814  
815  	if (len == 0)
816  		return 0;
817  
818  	input_buffer = memdup_user_nul(ubuf, len);
819  	if (IS_ERR(input_buffer))
820  		return PTR_ERR(input_buffer);
821  
822  	drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len);
823  
824  	drm_connector_list_iter_begin(dev, &conn_iter);
825  	drm_for_each_connector_iter(connector, &conn_iter) {
826  		struct intel_encoder *encoder;
827  
828  		if (connector->connector_type !=
829  		    DRM_MODE_CONNECTOR_DisplayPort)
830  			continue;
831  
832  		encoder = to_intel_encoder(connector->encoder);
833  		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
834  			continue;
835  
836  		if (encoder && connector->status == connector_status_connected) {
837  			intel_dp = enc_to_intel_dp(encoder);
838  			status = kstrtoint(input_buffer, 10, &val);
839  			if (status < 0)
840  				break;
841  			drm_dbg(dev, "Got %d for test active\n", val);
842  			/* To prevent erroneous activation of the compliance
843  			 * testing code, only accept an actual value of 1 here
844  			 */
845  			if (val == 1)
846  				intel_dp->compliance.test_active = true;
847  			else
848  				intel_dp->compliance.test_active = false;
849  		}
850  	}
851  	drm_connector_list_iter_end(&conn_iter);
852  	kfree(input_buffer);
853  	if (status < 0)
854  		return status;
855  
856  	*offp += len;
857  	return len;
858  }
859  
i915_displayport_test_active_show(struct seq_file * m,void * data)860  static int i915_displayport_test_active_show(struct seq_file *m, void *data)
861  {
862  	struct drm_i915_private *dev_priv = m->private;
863  	struct drm_connector *connector;
864  	struct drm_connector_list_iter conn_iter;
865  	struct intel_dp *intel_dp;
866  
867  	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
868  	drm_for_each_connector_iter(connector, &conn_iter) {
869  		struct intel_encoder *encoder;
870  
871  		if (connector->connector_type !=
872  		    DRM_MODE_CONNECTOR_DisplayPort)
873  			continue;
874  
875  		encoder = to_intel_encoder(connector->encoder);
876  		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
877  			continue;
878  
879  		if (encoder && connector->status == connector_status_connected) {
880  			intel_dp = enc_to_intel_dp(encoder);
881  			if (intel_dp->compliance.test_active)
882  				seq_puts(m, "1");
883  			else
884  				seq_puts(m, "0");
885  		} else
886  			seq_puts(m, "0");
887  	}
888  	drm_connector_list_iter_end(&conn_iter);
889  
890  	return 0;
891  }
892  
i915_displayport_test_active_open(struct inode * inode,struct file * file)893  static int i915_displayport_test_active_open(struct inode *inode,
894  					     struct file *file)
895  {
896  	return single_open(file, i915_displayport_test_active_show,
897  			   inode->i_private);
898  }
899  
900  static const struct file_operations i915_displayport_test_active_fops = {
901  	.owner = THIS_MODULE,
902  	.open = i915_displayport_test_active_open,
903  	.read = seq_read,
904  	.llseek = seq_lseek,
905  	.release = single_release,
906  	.write = i915_displayport_test_active_write
907  };
908  
i915_displayport_test_data_show(struct seq_file * m,void * data)909  static int i915_displayport_test_data_show(struct seq_file *m, void *data)
910  {
911  	struct drm_i915_private *dev_priv = m->private;
912  	struct drm_connector *connector;
913  	struct drm_connector_list_iter conn_iter;
914  	struct intel_dp *intel_dp;
915  
916  	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
917  	drm_for_each_connector_iter(connector, &conn_iter) {
918  		struct intel_encoder *encoder;
919  
920  		if (connector->connector_type !=
921  		    DRM_MODE_CONNECTOR_DisplayPort)
922  			continue;
923  
924  		encoder = to_intel_encoder(connector->encoder);
925  		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
926  			continue;
927  
928  		if (encoder && connector->status == connector_status_connected) {
929  			intel_dp = enc_to_intel_dp(encoder);
930  			if (intel_dp->compliance.test_type ==
931  			    DP_TEST_LINK_EDID_READ)
932  				seq_printf(m, "%lx",
933  					   intel_dp->compliance.test_data.edid);
934  			else if (intel_dp->compliance.test_type ==
935  				 DP_TEST_LINK_VIDEO_PATTERN) {
936  				seq_printf(m, "hdisplay: %d\n",
937  					   intel_dp->compliance.test_data.hdisplay);
938  				seq_printf(m, "vdisplay: %d\n",
939  					   intel_dp->compliance.test_data.vdisplay);
940  				seq_printf(m, "bpc: %u\n",
941  					   intel_dp->compliance.test_data.bpc);
942  			} else if (intel_dp->compliance.test_type ==
943  				   DP_TEST_LINK_PHY_TEST_PATTERN) {
944  				seq_printf(m, "pattern: %d\n",
945  					   intel_dp->compliance.test_data.phytest.phy_pattern);
946  				seq_printf(m, "Number of lanes: %d\n",
947  					   intel_dp->compliance.test_data.phytest.num_lanes);
948  				seq_printf(m, "Link Rate: %d\n",
949  					   intel_dp->compliance.test_data.phytest.link_rate);
950  				seq_printf(m, "level: %02x\n",
951  					   intel_dp->train_set[0]);
952  			}
953  		} else
954  			seq_puts(m, "0");
955  	}
956  	drm_connector_list_iter_end(&conn_iter);
957  
958  	return 0;
959  }
960  DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data);
961  
i915_displayport_test_type_show(struct seq_file * m,void * data)962  static int i915_displayport_test_type_show(struct seq_file *m, void *data)
963  {
964  	struct drm_i915_private *dev_priv = m->private;
965  	struct drm_connector *connector;
966  	struct drm_connector_list_iter conn_iter;
967  	struct intel_dp *intel_dp;
968  
969  	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
970  	drm_for_each_connector_iter(connector, &conn_iter) {
971  		struct intel_encoder *encoder;
972  
973  		if (connector->connector_type !=
974  		    DRM_MODE_CONNECTOR_DisplayPort)
975  			continue;
976  
977  		encoder = to_intel_encoder(connector->encoder);
978  		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
979  			continue;
980  
981  		if (encoder && connector->status == connector_status_connected) {
982  			intel_dp = enc_to_intel_dp(encoder);
983  			seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
984  		} else
985  			seq_puts(m, "0");
986  	}
987  	drm_connector_list_iter_end(&conn_iter);
988  
989  	return 0;
990  }
991  DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type);
992  
993  static ssize_t
i915_fifo_underrun_reset_write(struct file * filp,const char __user * ubuf,size_t cnt,loff_t * ppos)994  i915_fifo_underrun_reset_write(struct file *filp,
995  			       const char __user *ubuf,
996  			       size_t cnt, loff_t *ppos)
997  {
998  	struct drm_i915_private *dev_priv = filp->private_data;
999  	struct intel_crtc *crtc;
1000  	int ret;
1001  	bool reset;
1002  
1003  	ret = kstrtobool_from_user(ubuf, cnt, &reset);
1004  	if (ret)
1005  		return ret;
1006  
1007  	if (!reset)
1008  		return cnt;
1009  
1010  	for_each_intel_crtc(&dev_priv->drm, crtc) {
1011  		struct drm_crtc_commit *commit;
1012  		struct intel_crtc_state *crtc_state;
1013  
1014  		ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1015  		if (ret)
1016  			return ret;
1017  
1018  		crtc_state = to_intel_crtc_state(crtc->base.state);
1019  		commit = crtc_state->uapi.commit;
1020  		if (commit) {
1021  			ret = wait_for_completion_interruptible(&commit->hw_done);
1022  			if (!ret)
1023  				ret = wait_for_completion_interruptible(&commit->flip_done);
1024  		}
1025  
1026  		if (!ret && crtc_state->hw.active) {
1027  			drm_dbg_kms(&dev_priv->drm,
1028  				    "Re-arming FIFO underruns on pipe %c\n",
1029  				    pipe_name(crtc->pipe));
1030  
1031  			intel_crtc_arm_fifo_underrun(crtc, crtc_state);
1032  		}
1033  
1034  		drm_modeset_unlock(&crtc->base.mutex);
1035  
1036  		if (ret)
1037  			return ret;
1038  	}
1039  
1040  	intel_fbc_reset_underrun(dev_priv);
1041  
1042  	return cnt;
1043  }
1044  
1045  static const struct file_operations i915_fifo_underrun_reset_ops = {
1046  	.owner = THIS_MODULE,
1047  	.open = simple_open,
1048  	.write = i915_fifo_underrun_reset_write,
1049  	.llseek = default_llseek,
1050  };
1051  
1052  static const struct drm_info_list intel_display_debugfs_list[] = {
1053  	{"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
1054  	{"i915_sr_status", i915_sr_status, 0},
1055  	{"i915_opregion", i915_opregion, 0},
1056  	{"i915_vbt", i915_vbt, 0},
1057  	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1058  	{"i915_power_domain_info", i915_power_domain_info, 0},
1059  	{"i915_display_info", i915_display_info, 0},
1060  	{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
1061  	{"i915_dp_mst_info", i915_dp_mst_info, 0},
1062  	{"i915_ddb_info", i915_ddb_info, 0},
1063  	{"i915_lpsp_status", i915_lpsp_status, 0},
1064  };
1065  
1066  static const struct {
1067  	const char *name;
1068  	const struct file_operations *fops;
1069  } intel_display_debugfs_files[] = {
1070  	{"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops},
1071  	{"i915_dp_test_data", &i915_displayport_test_data_fops},
1072  	{"i915_dp_test_type", &i915_displayport_test_type_fops},
1073  	{"i915_dp_test_active", &i915_displayport_test_active_fops},
1074  };
1075  
intel_display_debugfs_register(struct drm_i915_private * i915)1076  void intel_display_debugfs_register(struct drm_i915_private *i915)
1077  {
1078  	struct drm_minor *minor = i915->drm.primary;
1079  	int i;
1080  
1081  	for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) {
1082  		debugfs_create_file(intel_display_debugfs_files[i].name,
1083  				    S_IRUGO | S_IWUSR,
1084  				    minor->debugfs_root,
1085  				    to_i915(minor->dev),
1086  				    intel_display_debugfs_files[i].fops);
1087  	}
1088  
1089  	drm_debugfs_create_files(intel_display_debugfs_list,
1090  				 ARRAY_SIZE(intel_display_debugfs_list),
1091  				 minor->debugfs_root, minor);
1092  
1093  	intel_cdclk_debugfs_register(i915);
1094  	intel_dmc_debugfs_register(i915);
1095  	intel_fbc_debugfs_register(i915);
1096  	intel_hpd_debugfs_register(i915);
1097  	intel_psr_debugfs_register(i915);
1098  	intel_wm_debugfs_register(i915);
1099  }
1100  
i915_panel_show(struct seq_file * m,void * data)1101  static int i915_panel_show(struct seq_file *m, void *data)
1102  {
1103  	struct drm_connector *connector = m->private;
1104  	struct intel_dp *intel_dp =
1105  		intel_attached_dp(to_intel_connector(connector));
1106  
1107  	if (connector->status != connector_status_connected)
1108  		return -ENODEV;
1109  
1110  	seq_printf(m, "Panel power up delay: %d\n",
1111  		   intel_dp->pps.panel_power_up_delay);
1112  	seq_printf(m, "Panel power down delay: %d\n",
1113  		   intel_dp->pps.panel_power_down_delay);
1114  	seq_printf(m, "Backlight on delay: %d\n",
1115  		   intel_dp->pps.backlight_on_delay);
1116  	seq_printf(m, "Backlight off delay: %d\n",
1117  		   intel_dp->pps.backlight_off_delay);
1118  
1119  	return 0;
1120  }
1121  DEFINE_SHOW_ATTRIBUTE(i915_panel);
1122  
i915_hdcp_sink_capability_show(struct seq_file * m,void * data)1123  static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
1124  {
1125  	struct drm_connector *connector = m->private;
1126  	struct drm_i915_private *i915 = to_i915(connector->dev);
1127  	struct intel_connector *intel_connector = to_intel_connector(connector);
1128  	int ret;
1129  
1130  	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1131  	if (ret)
1132  		return ret;
1133  
1134  	if (!connector->encoder || connector->status != connector_status_connected) {
1135  		ret = -ENODEV;
1136  		goto out;
1137  	}
1138  
1139  	seq_printf(m, "%s:%d HDCP version: ", connector->name,
1140  		   connector->base.id);
1141  	intel_hdcp_info(m, intel_connector);
1142  
1143  out:
1144  	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1145  
1146  	return ret;
1147  }
1148  DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
1149  
i915_lpsp_capability_show(struct seq_file * m,void * data)1150  static int i915_lpsp_capability_show(struct seq_file *m, void *data)
1151  {
1152  	struct drm_connector *connector = m->private;
1153  	struct drm_i915_private *i915 = to_i915(connector->dev);
1154  	struct intel_encoder *encoder;
1155  	bool lpsp_capable = false;
1156  
1157  	encoder = intel_attached_encoder(to_intel_connector(connector));
1158  	if (!encoder)
1159  		return -ENODEV;
1160  
1161  	if (connector->status != connector_status_connected)
1162  		return -ENODEV;
1163  
1164  	if (DISPLAY_VER(i915) >= 13)
1165  		lpsp_capable = encoder->port <= PORT_B;
1166  	else if (DISPLAY_VER(i915) >= 12)
1167  		/*
1168  		 * Actually TGL can drive LPSP on port till DDI_C
1169  		 * but there is no physical connected DDI_C on TGL sku's,
1170  		 * even driver is not initilizing DDI_C port for gen12.
1171  		 */
1172  		lpsp_capable = encoder->port <= PORT_B;
1173  	else if (DISPLAY_VER(i915) == 11)
1174  		lpsp_capable = (connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
1175  				connector->connector_type == DRM_MODE_CONNECTOR_eDP);
1176  	else if (IS_DISPLAY_VER(i915, 9, 10))
1177  		lpsp_capable = (encoder->port == PORT_A &&
1178  				(connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
1179  				 connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
1180  				 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort));
1181  	else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
1182  		lpsp_capable = connector->connector_type == DRM_MODE_CONNECTOR_eDP;
1183  
1184  	seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
1185  
1186  	return 0;
1187  }
1188  DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
1189  
i915_dsc_fec_support_show(struct seq_file * m,void * data)1190  static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
1191  {
1192  	struct drm_connector *connector = m->private;
1193  	struct drm_device *dev = connector->dev;
1194  	struct drm_crtc *crtc;
1195  	struct intel_dp *intel_dp;
1196  	struct drm_modeset_acquire_ctx ctx;
1197  	struct intel_crtc_state *crtc_state = NULL;
1198  	int ret = 0;
1199  	bool try_again = false;
1200  
1201  	drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
1202  
1203  	do {
1204  		try_again = false;
1205  		ret = drm_modeset_lock(&dev->mode_config.connection_mutex,
1206  				       &ctx);
1207  		if (ret) {
1208  			if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
1209  				try_again = true;
1210  				continue;
1211  			}
1212  			break;
1213  		}
1214  		crtc = connector->state->crtc;
1215  		if (connector->status != connector_status_connected || !crtc) {
1216  			ret = -ENODEV;
1217  			break;
1218  		}
1219  		ret = drm_modeset_lock(&crtc->mutex, &ctx);
1220  		if (ret == -EDEADLK) {
1221  			ret = drm_modeset_backoff(&ctx);
1222  			if (!ret) {
1223  				try_again = true;
1224  				continue;
1225  			}
1226  			break;
1227  		} else if (ret) {
1228  			break;
1229  		}
1230  		intel_dp = intel_attached_dp(to_intel_connector(connector));
1231  		crtc_state = to_intel_crtc_state(crtc->state);
1232  		seq_printf(m, "DSC_Enabled: %s\n",
1233  			   str_yes_no(crtc_state->dsc.compression_enable));
1234  		seq_printf(m, "DSC_Sink_Support: %s\n",
1235  			   str_yes_no(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)));
1236  		seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1237  			   str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1238  								      DP_DSC_RGB)),
1239  			   str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1240  								      DP_DSC_YCbCr420_Native)),
1241  			   str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1242  								      DP_DSC_YCbCr444)));
1243  		seq_printf(m, "Force_DSC_Enable: %s\n",
1244  			   str_yes_no(intel_dp->force_dsc_en));
1245  		if (!intel_dp_is_edp(intel_dp))
1246  			seq_printf(m, "FEC_Sink_Support: %s\n",
1247  				   str_yes_no(drm_dp_sink_supports_fec(intel_dp->fec_capable)));
1248  	} while (try_again);
1249  
1250  	drm_modeset_drop_locks(&ctx);
1251  	drm_modeset_acquire_fini(&ctx);
1252  
1253  	return ret;
1254  }
1255  
i915_dsc_fec_support_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1256  static ssize_t i915_dsc_fec_support_write(struct file *file,
1257  					  const char __user *ubuf,
1258  					  size_t len, loff_t *offp)
1259  {
1260  	bool dsc_enable = false;
1261  	int ret;
1262  	struct drm_connector *connector =
1263  		((struct seq_file *)file->private_data)->private;
1264  	struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1265  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
1266  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1267  
1268  	if (len == 0)
1269  		return 0;
1270  
1271  	drm_dbg(&i915->drm,
1272  		"Copied %zu bytes from user to force DSC\n", len);
1273  
1274  	ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
1275  	if (ret < 0)
1276  		return ret;
1277  
1278  	drm_dbg(&i915->drm, "Got %s for DSC Enable\n",
1279  		(dsc_enable) ? "true" : "false");
1280  	intel_dp->force_dsc_en = dsc_enable;
1281  
1282  	*offp += len;
1283  	return len;
1284  }
1285  
i915_dsc_fec_support_open(struct inode * inode,struct file * file)1286  static int i915_dsc_fec_support_open(struct inode *inode,
1287  				     struct file *file)
1288  {
1289  	return single_open(file, i915_dsc_fec_support_show,
1290  			   inode->i_private);
1291  }
1292  
1293  static const struct file_operations i915_dsc_fec_support_fops = {
1294  	.owner = THIS_MODULE,
1295  	.open = i915_dsc_fec_support_open,
1296  	.read = seq_read,
1297  	.llseek = seq_lseek,
1298  	.release = single_release,
1299  	.write = i915_dsc_fec_support_write
1300  };
1301  
i915_dsc_bpc_show(struct seq_file * m,void * data)1302  static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1303  {
1304  	struct drm_connector *connector = m->private;
1305  	struct drm_device *dev = connector->dev;
1306  	struct drm_crtc *crtc;
1307  	struct intel_crtc_state *crtc_state;
1308  	struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1309  	int ret;
1310  
1311  	if (!encoder)
1312  		return -ENODEV;
1313  
1314  	ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex);
1315  	if (ret)
1316  		return ret;
1317  
1318  	crtc = connector->state->crtc;
1319  	if (connector->status != connector_status_connected || !crtc) {
1320  		ret = -ENODEV;
1321  		goto out;
1322  	}
1323  
1324  	crtc_state = to_intel_crtc_state(crtc->state);
1325  	seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1326  
1327  out:	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1328  
1329  	return ret;
1330  }
1331  
i915_dsc_bpc_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1332  static ssize_t i915_dsc_bpc_write(struct file *file,
1333  				  const char __user *ubuf,
1334  				  size_t len, loff_t *offp)
1335  {
1336  	struct drm_connector *connector =
1337  		((struct seq_file *)file->private_data)->private;
1338  	struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1339  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1340  	int dsc_bpc = 0;
1341  	int ret;
1342  
1343  	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1344  	if (ret < 0)
1345  		return ret;
1346  
1347  	intel_dp->force_dsc_bpc = dsc_bpc;
1348  	*offp += len;
1349  
1350  	return len;
1351  }
1352  
i915_dsc_bpc_open(struct inode * inode,struct file * file)1353  static int i915_dsc_bpc_open(struct inode *inode,
1354  			     struct file *file)
1355  {
1356  	return single_open(file, i915_dsc_bpc_show, inode->i_private);
1357  }
1358  
1359  static const struct file_operations i915_dsc_bpc_fops = {
1360  	.owner = THIS_MODULE,
1361  	.open = i915_dsc_bpc_open,
1362  	.read = seq_read,
1363  	.llseek = seq_lseek,
1364  	.release = single_release,
1365  	.write = i915_dsc_bpc_write
1366  };
1367  
i915_dsc_output_format_show(struct seq_file * m,void * data)1368  static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1369  {
1370  	struct drm_connector *connector = m->private;
1371  	struct drm_device *dev = connector->dev;
1372  	struct drm_crtc *crtc;
1373  	struct intel_crtc_state *crtc_state;
1374  	struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1375  	int ret;
1376  
1377  	if (!encoder)
1378  		return -ENODEV;
1379  
1380  	ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex);
1381  	if (ret)
1382  		return ret;
1383  
1384  	crtc = connector->state->crtc;
1385  	if (connector->status != connector_status_connected || !crtc) {
1386  		ret = -ENODEV;
1387  		goto out;
1388  	}
1389  
1390  	crtc_state = to_intel_crtc_state(crtc->state);
1391  	seq_printf(m, "DSC_Output_Format: %s\n",
1392  		   intel_output_format_name(crtc_state->output_format));
1393  
1394  out:	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1395  
1396  	return ret;
1397  }
1398  
i915_dsc_output_format_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1399  static ssize_t i915_dsc_output_format_write(struct file *file,
1400  					    const char __user *ubuf,
1401  					    size_t len, loff_t *offp)
1402  {
1403  	struct drm_connector *connector =
1404  		((struct seq_file *)file->private_data)->private;
1405  	struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1406  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1407  	int dsc_output_format = 0;
1408  	int ret;
1409  
1410  	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1411  	if (ret < 0)
1412  		return ret;
1413  
1414  	intel_dp->force_dsc_output_format = dsc_output_format;
1415  	*offp += len;
1416  
1417  	return len;
1418  }
1419  
i915_dsc_output_format_open(struct inode * inode,struct file * file)1420  static int i915_dsc_output_format_open(struct inode *inode,
1421  				       struct file *file)
1422  {
1423  	return single_open(file, i915_dsc_output_format_show, inode->i_private);
1424  }
1425  
1426  static const struct file_operations i915_dsc_output_format_fops = {
1427  	.owner = THIS_MODULE,
1428  	.open = i915_dsc_output_format_open,
1429  	.read = seq_read,
1430  	.llseek = seq_lseek,
1431  	.release = single_release,
1432  	.write = i915_dsc_output_format_write
1433  };
1434  
1435  /*
1436   * Returns the Current CRTC's bpc.
1437   * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1438   */
i915_current_bpc_show(struct seq_file * m,void * data)1439  static int i915_current_bpc_show(struct seq_file *m, void *data)
1440  {
1441  	struct intel_crtc *crtc = m->private;
1442  	struct intel_crtc_state *crtc_state;
1443  	int ret;
1444  
1445  	ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1446  	if (ret)
1447  		return ret;
1448  
1449  	crtc_state = to_intel_crtc_state(crtc->base.state);
1450  	seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1451  
1452  	drm_modeset_unlock(&crtc->base.mutex);
1453  
1454  	return ret;
1455  }
1456  DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1457  
1458  /* Pipe may differ from crtc index if pipes are fused off */
intel_crtc_pipe_show(struct seq_file * m,void * unused)1459  static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1460  {
1461  	struct intel_crtc *crtc = m->private;
1462  
1463  	seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1464  
1465  	return 0;
1466  }
1467  DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1468  
1469  /**
1470   * intel_connector_debugfs_add - add i915 specific connector debugfs files
1471   * @intel_connector: pointer to a registered drm_connector
1472   *
1473   * Cleanup will be done by drm_connector_unregister() through a call to
1474   * drm_debugfs_connector_remove().
1475   */
intel_connector_debugfs_add(struct intel_connector * intel_connector)1476  void intel_connector_debugfs_add(struct intel_connector *intel_connector)
1477  {
1478  	struct drm_connector *connector = &intel_connector->base;
1479  	struct dentry *root = connector->debugfs_entry;
1480  	struct drm_i915_private *dev_priv = to_i915(connector->dev);
1481  
1482  	/* The connector must have been registered beforehands. */
1483  	if (!root)
1484  		return;
1485  
1486  	intel_drrs_connector_debugfs_add(intel_connector);
1487  	intel_psr_connector_debugfs_add(intel_connector);
1488  
1489  	if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
1490  		debugfs_create_file("i915_panel_timings", S_IRUGO, root,
1491  				    connector, &i915_panel_fops);
1492  
1493  	if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1494  	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1495  	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
1496  		debugfs_create_file("i915_hdcp_sink_capability", S_IRUGO, root,
1497  				    connector, &i915_hdcp_sink_capability_fops);
1498  	}
1499  
1500  	if (DISPLAY_VER(dev_priv) >= 11 &&
1501  	    ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
1502  	    !to_intel_connector(connector)->mst_port) ||
1503  	    connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
1504  		debugfs_create_file("i915_dsc_fec_support", 0644, root,
1505  				    connector, &i915_dsc_fec_support_fops);
1506  
1507  		debugfs_create_file("i915_dsc_bpc", 0644, root,
1508  				    connector, &i915_dsc_bpc_fops);
1509  
1510  		debugfs_create_file("i915_dsc_output_format", 0644, root,
1511  				    connector, &i915_dsc_output_format_fops);
1512  	}
1513  
1514  	if (connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
1515  	    connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
1516  	    connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1517  	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1518  	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIB)
1519  		debugfs_create_file("i915_lpsp_capability", 0444, root,
1520  				    connector, &i915_lpsp_capability_fops);
1521  }
1522  
1523  /**
1524   * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1525   * @crtc: pointer to a drm_crtc
1526   *
1527   * Failure to add debugfs entries should generally be ignored.
1528   */
intel_crtc_debugfs_add(struct intel_crtc * crtc)1529  void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1530  {
1531  	struct dentry *root = crtc->base.debugfs_entry;
1532  
1533  	if (!root)
1534  		return;
1535  
1536  	crtc_updates_add(crtc);
1537  	intel_drrs_crtc_debugfs_add(crtc);
1538  	intel_fbc_crtc_debugfs_add(crtc);
1539  	hsw_ips_crtc_debugfs_add(crtc);
1540  
1541  	debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1542  			    &i915_current_bpc_fops);
1543  	debugfs_create_file("i915_pipe", 0444, root, crtc,
1544  			    &intel_crtc_pipe_fops);
1545  }
1546