1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
3
4 #include <generated/utsrelease.h>
5 #include <linux/crash_dump.h>
6 #include <linux/if_bridge.h>
7 #include <linux/if_macvlan.h>
8 #include <linux/module.h>
9 #include <net/pkt_cls.h>
10 #include <net/xdp_sock_drv.h>
11
12 /* Local includes */
13 #include "i40e.h"
14 #include "i40e_devids.h"
15 #include "i40e_diag.h"
16 #include "i40e_lan_hmc.h"
17 #include "i40e_virtchnl_pf.h"
18 #include "i40e_xsk.h"
19
20 /* All i40e tracepoints are defined by the include below, which
21 * must be included exactly once across the whole kernel with
22 * CREATE_TRACE_POINTS defined
23 */
24 #define CREATE_TRACE_POINTS
25 #include "i40e_trace.h"
26
27 const char i40e_driver_name[] = "i40e";
28 static const char i40e_driver_string[] =
29 "Intel(R) Ethernet Connection XL710 Network Driver";
30
31 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
32
33 /* a bit of forward declarations */
34 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
35 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
36 static int i40e_add_vsi(struct i40e_vsi *vsi);
37 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
38 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
39 static int i40e_setup_misc_vector(struct i40e_pf *pf);
40 static void i40e_determine_queue_usage(struct i40e_pf *pf);
41 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
42 static void i40e_prep_for_reset(struct i40e_pf *pf);
43 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
44 bool lock_acquired);
45 static int i40e_reset(struct i40e_pf *pf);
46 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
47 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
48 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
49 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
50 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
51 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
52 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
53 static int i40e_get_capabilities(struct i40e_pf *pf,
54 enum i40e_admin_queue_opc list_type);
55 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
56
57 /* i40e_pci_tbl - PCI Device ID Table
58 *
59 * Last entry must be all 0s
60 *
61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
62 * Class, Class Mask, private data (not used) }
63 */
64 static const struct pci_device_id i40e_pci_tbl[] = {
65 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
66 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_BC), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722_A), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
91 /* required last entry */
92 {0, }
93 };
94 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
95
96 #define I40E_MAX_VF_COUNT 128
97 static int debug = -1;
98 module_param(debug, uint, 0);
99 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
100
101 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
102 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
103 MODULE_LICENSE("GPL v2");
104
105 static struct workqueue_struct *i40e_wq;
106
netdev_hw_addr_refcnt(struct i40e_mac_filter * f,struct net_device * netdev,int delta)107 static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
108 struct net_device *netdev, int delta)
109 {
110 struct netdev_hw_addr_list *ha_list;
111 struct netdev_hw_addr *ha;
112
113 if (!f || !netdev)
114 return;
115
116 if (is_unicast_ether_addr(f->macaddr) || is_link_local_ether_addr(f->macaddr))
117 ha_list = &netdev->uc;
118 else
119 ha_list = &netdev->mc;
120
121 netdev_hw_addr_list_for_each(ha, ha_list) {
122 if (ether_addr_equal(ha->addr, f->macaddr)) {
123 ha->refcount += delta;
124 if (ha->refcount <= 0)
125 ha->refcount = 1;
126 break;
127 }
128 }
129 }
130
131 /**
132 * i40e_hw_to_dev - get device pointer from the hardware structure
133 * @hw: pointer to the device HW structure
134 **/
i40e_hw_to_dev(struct i40e_hw * hw)135 struct device *i40e_hw_to_dev(struct i40e_hw *hw)
136 {
137 struct i40e_pf *pf = i40e_hw_to_pf(hw);
138
139 return &pf->pdev->dev;
140 }
141
142 /**
143 * i40e_allocate_dma_mem - OS specific memory alloc for shared code
144 * @hw: pointer to the HW structure
145 * @mem: ptr to mem struct to fill out
146 * @size: size of memory requested
147 * @alignment: what to align the allocation to
148 **/
i40e_allocate_dma_mem(struct i40e_hw * hw,struct i40e_dma_mem * mem,u64 size,u32 alignment)149 int i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
150 u64 size, u32 alignment)
151 {
152 struct i40e_pf *pf = i40e_hw_to_pf(hw);
153
154 mem->size = ALIGN(size, alignment);
155 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
156 GFP_KERNEL);
157 if (!mem->va)
158 return -ENOMEM;
159
160 return 0;
161 }
162
163 /**
164 * i40e_free_dma_mem - OS specific memory free for shared code
165 * @hw: pointer to the HW structure
166 * @mem: ptr to mem struct to free
167 **/
i40e_free_dma_mem(struct i40e_hw * hw,struct i40e_dma_mem * mem)168 int i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)
169 {
170 struct i40e_pf *pf = i40e_hw_to_pf(hw);
171
172 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
173 mem->va = NULL;
174 mem->pa = 0;
175 mem->size = 0;
176
177 return 0;
178 }
179
180 /**
181 * i40e_allocate_virt_mem - OS specific memory alloc for shared code
182 * @hw: pointer to the HW structure
183 * @mem: ptr to mem struct to fill out
184 * @size: size of memory requested
185 **/
i40e_allocate_virt_mem(struct i40e_hw * hw,struct i40e_virt_mem * mem,u32 size)186 int i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem,
187 u32 size)
188 {
189 mem->size = size;
190 mem->va = kzalloc(size, GFP_KERNEL);
191
192 if (!mem->va)
193 return -ENOMEM;
194
195 return 0;
196 }
197
198 /**
199 * i40e_free_virt_mem - OS specific memory free for shared code
200 * @hw: pointer to the HW structure
201 * @mem: ptr to mem struct to free
202 **/
i40e_free_virt_mem(struct i40e_hw * hw,struct i40e_virt_mem * mem)203 int i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
204 {
205 /* it's ok to kfree a NULL pointer */
206 kfree(mem->va);
207 mem->va = NULL;
208 mem->size = 0;
209
210 return 0;
211 }
212
213 /**
214 * i40e_get_lump - find a lump of free generic resource
215 * @pf: board private structure
216 * @pile: the pile of resource to search
217 * @needed: the number of items needed
218 * @id: an owner id to stick on the items assigned
219 *
220 * Returns the base item index of the lump, or negative for error
221 **/
i40e_get_lump(struct i40e_pf * pf,struct i40e_lump_tracking * pile,u16 needed,u16 id)222 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
223 u16 needed, u16 id)
224 {
225 int ret = -ENOMEM;
226 int i, j;
227
228 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
229 dev_info(&pf->pdev->dev,
230 "param err: pile=%s needed=%d id=0x%04x\n",
231 pile ? "<valid>" : "<null>", needed, id);
232 return -EINVAL;
233 }
234
235 /* Allocate last queue in the pile for FDIR VSI queue
236 * so it doesn't fragment the qp_pile
237 */
238 if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
239 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
240 dev_err(&pf->pdev->dev,
241 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
242 pile->num_entries - 1);
243 return -ENOMEM;
244 }
245 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
246 return pile->num_entries - 1;
247 }
248
249 i = 0;
250 while (i < pile->num_entries) {
251 /* skip already allocated entries */
252 if (pile->list[i] & I40E_PILE_VALID_BIT) {
253 i++;
254 continue;
255 }
256
257 /* do we have enough in this lump? */
258 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
259 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
260 break;
261 }
262
263 if (j == needed) {
264 /* there was enough, so assign it to the requestor */
265 for (j = 0; j < needed; j++)
266 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
267 ret = i;
268 break;
269 }
270
271 /* not enough, so skip over it and continue looking */
272 i += j;
273 }
274
275 return ret;
276 }
277
278 /**
279 * i40e_put_lump - return a lump of generic resource
280 * @pile: the pile of resource to search
281 * @index: the base item index
282 * @id: the owner id of the items assigned
283 *
284 * Returns the count of items in the lump
285 **/
i40e_put_lump(struct i40e_lump_tracking * pile,u16 index,u16 id)286 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
287 {
288 int valid_id = (id | I40E_PILE_VALID_BIT);
289 int count = 0;
290 u16 i;
291
292 if (!pile || index >= pile->num_entries)
293 return -EINVAL;
294
295 for (i = index;
296 i < pile->num_entries && pile->list[i] == valid_id;
297 i++) {
298 pile->list[i] = 0;
299 count++;
300 }
301
302
303 return count;
304 }
305
306 /**
307 * i40e_find_vsi_from_id - searches for the vsi with the given id
308 * @pf: the pf structure to search for the vsi
309 * @id: id of the vsi it is searching for
310 **/
i40e_find_vsi_from_id(struct i40e_pf * pf,u16 id)311 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
312 {
313 int i;
314
315 for (i = 0; i < pf->num_alloc_vsi; i++)
316 if (pf->vsi[i] && (pf->vsi[i]->id == id))
317 return pf->vsi[i];
318
319 return NULL;
320 }
321
322 /**
323 * i40e_service_event_schedule - Schedule the service task to wake up
324 * @pf: board private structure
325 *
326 * If not already scheduled, this puts the task into the work queue
327 **/
i40e_service_event_schedule(struct i40e_pf * pf)328 void i40e_service_event_schedule(struct i40e_pf *pf)
329 {
330 if ((!test_bit(__I40E_DOWN, pf->state) &&
331 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
332 test_bit(__I40E_RECOVERY_MODE, pf->state))
333 queue_work(i40e_wq, &pf->service_task);
334 }
335
336 /**
337 * i40e_tx_timeout - Respond to a Tx Hang
338 * @netdev: network interface device structure
339 * @txqueue: queue number timing out
340 *
341 * If any port has noticed a Tx timeout, it is likely that the whole
342 * device is munged, not just the one netdev port, so go for the full
343 * reset.
344 **/
i40e_tx_timeout(struct net_device * netdev,unsigned int txqueue)345 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
346 {
347 struct i40e_netdev_priv *np = netdev_priv(netdev);
348 struct i40e_vsi *vsi = np->vsi;
349 struct i40e_pf *pf = vsi->back;
350 struct i40e_ring *tx_ring = NULL;
351 unsigned int i;
352 u32 head, val;
353
354 pf->tx_timeout_count++;
355
356 /* with txqueue index, find the tx_ring struct */
357 for (i = 0; i < vsi->num_queue_pairs; i++) {
358 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
359 if (txqueue ==
360 vsi->tx_rings[i]->queue_index) {
361 tx_ring = vsi->tx_rings[i];
362 break;
363 }
364 }
365 }
366
367 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
368 pf->tx_timeout_recovery_level = 1; /* reset after some time */
369 else if (time_before(jiffies,
370 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
371 return; /* don't do any new action before the next timeout */
372
373 /* don't kick off another recovery if one is already pending */
374 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
375 return;
376
377 if (tx_ring) {
378 head = i40e_get_head(tx_ring);
379 /* Read interrupt register */
380 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
381 val = rd32(&pf->hw,
382 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
383 tx_ring->vsi->base_vector - 1));
384 else
385 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
386
387 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
388 vsi->seid, txqueue, tx_ring->next_to_clean,
389 head, tx_ring->next_to_use,
390 readl(tx_ring->tail), val);
391 }
392
393 pf->tx_timeout_last_recovery = jiffies;
394 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
395 pf->tx_timeout_recovery_level, txqueue);
396
397 switch (pf->tx_timeout_recovery_level) {
398 case 1:
399 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
400 break;
401 case 2:
402 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
403 break;
404 case 3:
405 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
406 break;
407 default:
408 netdev_err(netdev, "tx_timeout recovery unsuccessful, device is in non-recoverable state.\n");
409 set_bit(__I40E_DOWN_REQUESTED, pf->state);
410 set_bit(__I40E_VSI_DOWN_REQUESTED, vsi->state);
411 break;
412 }
413
414 i40e_service_event_schedule(pf);
415 pf->tx_timeout_recovery_level++;
416 }
417
418 /**
419 * i40e_get_vsi_stats_struct - Get System Network Statistics
420 * @vsi: the VSI we care about
421 *
422 * Returns the address of the device statistics structure.
423 * The statistics are actually updated from the service task.
424 **/
i40e_get_vsi_stats_struct(struct i40e_vsi * vsi)425 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
426 {
427 return &vsi->net_stats;
428 }
429
430 /**
431 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
432 * @ring: Tx ring to get statistics from
433 * @stats: statistics entry to be updated
434 **/
i40e_get_netdev_stats_struct_tx(struct i40e_ring * ring,struct rtnl_link_stats64 * stats)435 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
436 struct rtnl_link_stats64 *stats)
437 {
438 u64 bytes, packets;
439 unsigned int start;
440
441 do {
442 start = u64_stats_fetch_begin(&ring->syncp);
443 packets = ring->stats.packets;
444 bytes = ring->stats.bytes;
445 } while (u64_stats_fetch_retry(&ring->syncp, start));
446
447 stats->tx_packets += packets;
448 stats->tx_bytes += bytes;
449 }
450
451 /**
452 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
453 * @netdev: network interface device structure
454 * @stats: data structure to store statistics
455 *
456 * Returns the address of the device statistics structure.
457 * The statistics are actually updated from the service task.
458 **/
i40e_get_netdev_stats_struct(struct net_device * netdev,struct rtnl_link_stats64 * stats)459 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
460 struct rtnl_link_stats64 *stats)
461 {
462 struct i40e_netdev_priv *np = netdev_priv(netdev);
463 struct i40e_vsi *vsi = np->vsi;
464 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
465 struct i40e_ring *ring;
466 int i;
467
468 if (test_bit(__I40E_VSI_DOWN, vsi->state))
469 return;
470
471 if (!vsi->tx_rings)
472 return;
473
474 rcu_read_lock();
475 for (i = 0; i < vsi->num_queue_pairs; i++) {
476 u64 bytes, packets;
477 unsigned int start;
478
479 ring = READ_ONCE(vsi->tx_rings[i]);
480 if (!ring)
481 continue;
482 i40e_get_netdev_stats_struct_tx(ring, stats);
483
484 if (i40e_enabled_xdp_vsi(vsi)) {
485 ring = READ_ONCE(vsi->xdp_rings[i]);
486 if (!ring)
487 continue;
488 i40e_get_netdev_stats_struct_tx(ring, stats);
489 }
490
491 ring = READ_ONCE(vsi->rx_rings[i]);
492 if (!ring)
493 continue;
494 do {
495 start = u64_stats_fetch_begin(&ring->syncp);
496 packets = ring->stats.packets;
497 bytes = ring->stats.bytes;
498 } while (u64_stats_fetch_retry(&ring->syncp, start));
499
500 stats->rx_packets += packets;
501 stats->rx_bytes += bytes;
502
503 }
504 rcu_read_unlock();
505
506 /* following stats updated by i40e_watchdog_subtask() */
507 stats->multicast = vsi_stats->multicast;
508 stats->tx_errors = vsi_stats->tx_errors;
509 stats->tx_dropped = vsi_stats->tx_dropped;
510 stats->rx_errors = vsi_stats->rx_errors;
511 stats->rx_dropped = vsi_stats->rx_dropped;
512 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
513 stats->rx_length_errors = vsi_stats->rx_length_errors;
514 }
515
516 /**
517 * i40e_vsi_reset_stats - Resets all stats of the given vsi
518 * @vsi: the VSI to have its stats reset
519 **/
i40e_vsi_reset_stats(struct i40e_vsi * vsi)520 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
521 {
522 struct rtnl_link_stats64 *ns;
523 int i;
524
525 if (!vsi)
526 return;
527
528 ns = i40e_get_vsi_stats_struct(vsi);
529 memset(ns, 0, sizeof(*ns));
530 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
531 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
532 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
533 if (vsi->rx_rings && vsi->rx_rings[0]) {
534 for (i = 0; i < vsi->num_queue_pairs; i++) {
535 memset(&vsi->rx_rings[i]->stats, 0,
536 sizeof(vsi->rx_rings[i]->stats));
537 memset(&vsi->rx_rings[i]->rx_stats, 0,
538 sizeof(vsi->rx_rings[i]->rx_stats));
539 memset(&vsi->tx_rings[i]->stats, 0,
540 sizeof(vsi->tx_rings[i]->stats));
541 memset(&vsi->tx_rings[i]->tx_stats, 0,
542 sizeof(vsi->tx_rings[i]->tx_stats));
543 }
544 }
545 vsi->stat_offsets_loaded = false;
546 }
547
548 /**
549 * i40e_pf_reset_stats - Reset all of the stats for the given PF
550 * @pf: the PF to be reset
551 **/
i40e_pf_reset_stats(struct i40e_pf * pf)552 void i40e_pf_reset_stats(struct i40e_pf *pf)
553 {
554 int i;
555
556 memset(&pf->stats, 0, sizeof(pf->stats));
557 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
558 pf->stat_offsets_loaded = false;
559
560 for (i = 0; i < I40E_MAX_VEB; i++) {
561 if (pf->veb[i]) {
562 memset(&pf->veb[i]->stats, 0,
563 sizeof(pf->veb[i]->stats));
564 memset(&pf->veb[i]->stats_offsets, 0,
565 sizeof(pf->veb[i]->stats_offsets));
566 memset(&pf->veb[i]->tc_stats, 0,
567 sizeof(pf->veb[i]->tc_stats));
568 memset(&pf->veb[i]->tc_stats_offsets, 0,
569 sizeof(pf->veb[i]->tc_stats_offsets));
570 pf->veb[i]->stat_offsets_loaded = false;
571 }
572 }
573 pf->hw_csum_rx_error = 0;
574 }
575
576 /**
577 * i40e_compute_pci_to_hw_id - compute index form PCI function.
578 * @vsi: ptr to the VSI to read from.
579 * @hw: ptr to the hardware info.
580 **/
i40e_compute_pci_to_hw_id(struct i40e_vsi * vsi,struct i40e_hw * hw)581 static u32 i40e_compute_pci_to_hw_id(struct i40e_vsi *vsi, struct i40e_hw *hw)
582 {
583 int pf_count = i40e_get_pf_count(hw);
584
585 if (vsi->type == I40E_VSI_SRIOV)
586 return (hw->port * BIT(7)) / pf_count + vsi->vf_id;
587
588 return hw->port + BIT(7);
589 }
590
591 /**
592 * i40e_stat_update64 - read and update a 64 bit stat from the chip.
593 * @hw: ptr to the hardware info.
594 * @hireg: the high 32 bit reg to read.
595 * @loreg: the low 32 bit reg to read.
596 * @offset_loaded: has the initial offset been loaded yet.
597 * @offset: ptr to current offset value.
598 * @stat: ptr to the stat.
599 *
600 * Since the device stats are not reset at PFReset, they will not
601 * be zeroed when the driver starts. We'll save the first values read
602 * and use them as offsets to be subtracted from the raw values in order
603 * to report stats that count from zero.
604 **/
i40e_stat_update64(struct i40e_hw * hw,u32 hireg,u32 loreg,bool offset_loaded,u64 * offset,u64 * stat)605 static void i40e_stat_update64(struct i40e_hw *hw, u32 hireg, u32 loreg,
606 bool offset_loaded, u64 *offset, u64 *stat)
607 {
608 u64 new_data;
609
610 new_data = rd64(hw, loreg);
611
612 if (!offset_loaded || new_data < *offset)
613 *offset = new_data;
614 *stat = new_data - *offset;
615 }
616
617 /**
618 * i40e_stat_update48 - read and update a 48 bit stat from the chip
619 * @hw: ptr to the hardware info
620 * @hireg: the high 32 bit reg to read
621 * @loreg: the low 32 bit reg to read
622 * @offset_loaded: has the initial offset been loaded yet
623 * @offset: ptr to current offset value
624 * @stat: ptr to the stat
625 *
626 * Since the device stats are not reset at PFReset, they likely will not
627 * be zeroed when the driver starts. We'll save the first values read
628 * and use them as offsets to be subtracted from the raw values in order
629 * to report stats that count from zero. In the process, we also manage
630 * the potential roll-over.
631 **/
i40e_stat_update48(struct i40e_hw * hw,u32 hireg,u32 loreg,bool offset_loaded,u64 * offset,u64 * stat)632 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
633 bool offset_loaded, u64 *offset, u64 *stat)
634 {
635 u64 new_data;
636
637 if (hw->device_id == I40E_DEV_ID_QEMU) {
638 new_data = rd32(hw, loreg);
639 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
640 } else {
641 new_data = rd64(hw, loreg);
642 }
643 if (!offset_loaded)
644 *offset = new_data;
645 if (likely(new_data >= *offset))
646 *stat = new_data - *offset;
647 else
648 *stat = (new_data + BIT_ULL(48)) - *offset;
649 *stat &= 0xFFFFFFFFFFFFULL;
650 }
651
652 /**
653 * i40e_stat_update32 - read and update a 32 bit stat from the chip
654 * @hw: ptr to the hardware info
655 * @reg: the hw reg to read
656 * @offset_loaded: has the initial offset been loaded yet
657 * @offset: ptr to current offset value
658 * @stat: ptr to the stat
659 **/
i40e_stat_update32(struct i40e_hw * hw,u32 reg,bool offset_loaded,u64 * offset,u64 * stat)660 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
661 bool offset_loaded, u64 *offset, u64 *stat)
662 {
663 u32 new_data;
664
665 new_data = rd32(hw, reg);
666 if (!offset_loaded)
667 *offset = new_data;
668 if (likely(new_data >= *offset))
669 *stat = (u32)(new_data - *offset);
670 else
671 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
672 }
673
674 /**
675 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
676 * @hw: ptr to the hardware info
677 * @reg: the hw reg to read and clear
678 * @stat: ptr to the stat
679 **/
i40e_stat_update_and_clear32(struct i40e_hw * hw,u32 reg,u64 * stat)680 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
681 {
682 u32 new_data = rd32(hw, reg);
683
684 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
685 *stat += new_data;
686 }
687
688 /**
689 * i40e_stats_update_rx_discards - update rx_discards.
690 * @vsi: ptr to the VSI to be updated.
691 * @hw: ptr to the hardware info.
692 * @stat_idx: VSI's stat_counter_idx.
693 * @offset_loaded: ptr to the VSI's stat_offsets_loaded.
694 * @stat_offset: ptr to stat_offset to store first read of specific register.
695 * @stat: ptr to VSI's stat to be updated.
696 **/
697 static void
i40e_stats_update_rx_discards(struct i40e_vsi * vsi,struct i40e_hw * hw,int stat_idx,bool offset_loaded,struct i40e_eth_stats * stat_offset,struct i40e_eth_stats * stat)698 i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
699 int stat_idx, bool offset_loaded,
700 struct i40e_eth_stats *stat_offset,
701 struct i40e_eth_stats *stat)
702 {
703 u64 rx_rdpc, rx_rxerr;
704
705 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
706 &stat_offset->rx_discards, &rx_rdpc);
707 i40e_stat_update64(hw,
708 I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
709 I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
710 offset_loaded, &stat_offset->rx_discards_other,
711 &rx_rxerr);
712
713 stat->rx_discards = rx_rdpc + rx_rxerr;
714 }
715
716 /**
717 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
718 * @vsi: the VSI to be updated
719 **/
i40e_update_eth_stats(struct i40e_vsi * vsi)720 void i40e_update_eth_stats(struct i40e_vsi *vsi)
721 {
722 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
723 struct i40e_pf *pf = vsi->back;
724 struct i40e_hw *hw = &pf->hw;
725 struct i40e_eth_stats *oes;
726 struct i40e_eth_stats *es; /* device's eth stats */
727
728 es = &vsi->eth_stats;
729 oes = &vsi->eth_stats_offsets;
730
731 /* Gather up the stats that the hw collects */
732 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
733 vsi->stat_offsets_loaded,
734 &oes->tx_errors, &es->tx_errors);
735 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
736 vsi->stat_offsets_loaded,
737 &oes->rx_discards, &es->rx_discards);
738 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
739 vsi->stat_offsets_loaded,
740 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
741
742 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
743 I40E_GLV_GORCL(stat_idx),
744 vsi->stat_offsets_loaded,
745 &oes->rx_bytes, &es->rx_bytes);
746 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
747 I40E_GLV_UPRCL(stat_idx),
748 vsi->stat_offsets_loaded,
749 &oes->rx_unicast, &es->rx_unicast);
750 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
751 I40E_GLV_MPRCL(stat_idx),
752 vsi->stat_offsets_loaded,
753 &oes->rx_multicast, &es->rx_multicast);
754 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
755 I40E_GLV_BPRCL(stat_idx),
756 vsi->stat_offsets_loaded,
757 &oes->rx_broadcast, &es->rx_broadcast);
758
759 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
760 I40E_GLV_GOTCL(stat_idx),
761 vsi->stat_offsets_loaded,
762 &oes->tx_bytes, &es->tx_bytes);
763 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
764 I40E_GLV_UPTCL(stat_idx),
765 vsi->stat_offsets_loaded,
766 &oes->tx_unicast, &es->tx_unicast);
767 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
768 I40E_GLV_MPTCL(stat_idx),
769 vsi->stat_offsets_loaded,
770 &oes->tx_multicast, &es->tx_multicast);
771 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
772 I40E_GLV_BPTCL(stat_idx),
773 vsi->stat_offsets_loaded,
774 &oes->tx_broadcast, &es->tx_broadcast);
775
776 i40e_stats_update_rx_discards(vsi, hw, stat_idx,
777 vsi->stat_offsets_loaded, oes, es);
778
779 vsi->stat_offsets_loaded = true;
780 }
781
782 /**
783 * i40e_update_veb_stats - Update Switch component statistics
784 * @veb: the VEB being updated
785 **/
i40e_update_veb_stats(struct i40e_veb * veb)786 void i40e_update_veb_stats(struct i40e_veb *veb)
787 {
788 struct i40e_pf *pf = veb->pf;
789 struct i40e_hw *hw = &pf->hw;
790 struct i40e_eth_stats *oes;
791 struct i40e_eth_stats *es; /* device's eth stats */
792 struct i40e_veb_tc_stats *veb_oes;
793 struct i40e_veb_tc_stats *veb_es;
794 int i, idx = 0;
795
796 idx = veb->stats_idx;
797 es = &veb->stats;
798 oes = &veb->stats_offsets;
799 veb_es = &veb->tc_stats;
800 veb_oes = &veb->tc_stats_offsets;
801
802 /* Gather up the stats that the hw collects */
803 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
804 veb->stat_offsets_loaded,
805 &oes->tx_discards, &es->tx_discards);
806 if (hw->revision_id > 0)
807 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
808 veb->stat_offsets_loaded,
809 &oes->rx_unknown_protocol,
810 &es->rx_unknown_protocol);
811 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
812 veb->stat_offsets_loaded,
813 &oes->rx_bytes, &es->rx_bytes);
814 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
815 veb->stat_offsets_loaded,
816 &oes->rx_unicast, &es->rx_unicast);
817 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
818 veb->stat_offsets_loaded,
819 &oes->rx_multicast, &es->rx_multicast);
820 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
821 veb->stat_offsets_loaded,
822 &oes->rx_broadcast, &es->rx_broadcast);
823
824 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
825 veb->stat_offsets_loaded,
826 &oes->tx_bytes, &es->tx_bytes);
827 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
828 veb->stat_offsets_loaded,
829 &oes->tx_unicast, &es->tx_unicast);
830 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
831 veb->stat_offsets_loaded,
832 &oes->tx_multicast, &es->tx_multicast);
833 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
834 veb->stat_offsets_loaded,
835 &oes->tx_broadcast, &es->tx_broadcast);
836 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
837 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
838 I40E_GLVEBTC_RPCL(i, idx),
839 veb->stat_offsets_loaded,
840 &veb_oes->tc_rx_packets[i],
841 &veb_es->tc_rx_packets[i]);
842 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
843 I40E_GLVEBTC_RBCL(i, idx),
844 veb->stat_offsets_loaded,
845 &veb_oes->tc_rx_bytes[i],
846 &veb_es->tc_rx_bytes[i]);
847 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
848 I40E_GLVEBTC_TPCL(i, idx),
849 veb->stat_offsets_loaded,
850 &veb_oes->tc_tx_packets[i],
851 &veb_es->tc_tx_packets[i]);
852 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
853 I40E_GLVEBTC_TBCL(i, idx),
854 veb->stat_offsets_loaded,
855 &veb_oes->tc_tx_bytes[i],
856 &veb_es->tc_tx_bytes[i]);
857 }
858 veb->stat_offsets_loaded = true;
859 }
860
861 /**
862 * i40e_update_vsi_stats - Update the vsi statistics counters.
863 * @vsi: the VSI to be updated
864 *
865 * There are a few instances where we store the same stat in a
866 * couple of different structs. This is partly because we have
867 * the netdev stats that need to be filled out, which is slightly
868 * different from the "eth_stats" defined by the chip and used in
869 * VF communications. We sort it out here.
870 **/
i40e_update_vsi_stats(struct i40e_vsi * vsi)871 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
872 {
873 u64 rx_page, rx_buf, rx_reuse, rx_alloc, rx_waive, rx_busy;
874 struct i40e_pf *pf = vsi->back;
875 struct rtnl_link_stats64 *ons;
876 struct rtnl_link_stats64 *ns; /* netdev stats */
877 struct i40e_eth_stats *oes;
878 struct i40e_eth_stats *es; /* device's eth stats */
879 u64 tx_restart, tx_busy;
880 struct i40e_ring *p;
881 u64 bytes, packets;
882 unsigned int start;
883 u64 tx_linearize;
884 u64 tx_force_wb;
885 u64 tx_stopped;
886 u64 rx_p, rx_b;
887 u64 tx_p, tx_b;
888 u16 q;
889
890 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
891 test_bit(__I40E_CONFIG_BUSY, pf->state))
892 return;
893
894 ns = i40e_get_vsi_stats_struct(vsi);
895 ons = &vsi->net_stats_offsets;
896 es = &vsi->eth_stats;
897 oes = &vsi->eth_stats_offsets;
898
899 /* Gather up the netdev and vsi stats that the driver collects
900 * on the fly during packet processing
901 */
902 rx_b = rx_p = 0;
903 tx_b = tx_p = 0;
904 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
905 tx_stopped = 0;
906 rx_page = 0;
907 rx_buf = 0;
908 rx_reuse = 0;
909 rx_alloc = 0;
910 rx_waive = 0;
911 rx_busy = 0;
912 rcu_read_lock();
913 for (q = 0; q < vsi->num_queue_pairs; q++) {
914 /* locate Tx ring */
915 p = READ_ONCE(vsi->tx_rings[q]);
916 if (!p)
917 continue;
918
919 do {
920 start = u64_stats_fetch_begin(&p->syncp);
921 packets = p->stats.packets;
922 bytes = p->stats.bytes;
923 } while (u64_stats_fetch_retry(&p->syncp, start));
924 tx_b += bytes;
925 tx_p += packets;
926 tx_restart += p->tx_stats.restart_queue;
927 tx_busy += p->tx_stats.tx_busy;
928 tx_linearize += p->tx_stats.tx_linearize;
929 tx_force_wb += p->tx_stats.tx_force_wb;
930 tx_stopped += p->tx_stats.tx_stopped;
931
932 /* locate Rx ring */
933 p = READ_ONCE(vsi->rx_rings[q]);
934 if (!p)
935 continue;
936
937 do {
938 start = u64_stats_fetch_begin(&p->syncp);
939 packets = p->stats.packets;
940 bytes = p->stats.bytes;
941 } while (u64_stats_fetch_retry(&p->syncp, start));
942 rx_b += bytes;
943 rx_p += packets;
944 rx_buf += p->rx_stats.alloc_buff_failed;
945 rx_page += p->rx_stats.alloc_page_failed;
946 rx_reuse += p->rx_stats.page_reuse_count;
947 rx_alloc += p->rx_stats.page_alloc_count;
948 rx_waive += p->rx_stats.page_waive_count;
949 rx_busy += p->rx_stats.page_busy_count;
950
951 if (i40e_enabled_xdp_vsi(vsi)) {
952 /* locate XDP ring */
953 p = READ_ONCE(vsi->xdp_rings[q]);
954 if (!p)
955 continue;
956
957 do {
958 start = u64_stats_fetch_begin(&p->syncp);
959 packets = p->stats.packets;
960 bytes = p->stats.bytes;
961 } while (u64_stats_fetch_retry(&p->syncp, start));
962 tx_b += bytes;
963 tx_p += packets;
964 tx_restart += p->tx_stats.restart_queue;
965 tx_busy += p->tx_stats.tx_busy;
966 tx_linearize += p->tx_stats.tx_linearize;
967 tx_force_wb += p->tx_stats.tx_force_wb;
968 }
969 }
970 rcu_read_unlock();
971 vsi->tx_restart = tx_restart;
972 vsi->tx_busy = tx_busy;
973 vsi->tx_linearize = tx_linearize;
974 vsi->tx_force_wb = tx_force_wb;
975 vsi->tx_stopped = tx_stopped;
976 vsi->rx_page_failed = rx_page;
977 vsi->rx_buf_failed = rx_buf;
978 vsi->rx_page_reuse = rx_reuse;
979 vsi->rx_page_alloc = rx_alloc;
980 vsi->rx_page_waive = rx_waive;
981 vsi->rx_page_busy = rx_busy;
982
983 ns->rx_packets = rx_p;
984 ns->rx_bytes = rx_b;
985 ns->tx_packets = tx_p;
986 ns->tx_bytes = tx_b;
987
988 /* update netdev stats from eth stats */
989 i40e_update_eth_stats(vsi);
990 ons->tx_errors = oes->tx_errors;
991 ns->tx_errors = es->tx_errors;
992 ons->multicast = oes->rx_multicast;
993 ns->multicast = es->rx_multicast;
994 ons->rx_dropped = oes->rx_discards;
995 ns->rx_dropped = es->rx_discards;
996 ons->tx_dropped = oes->tx_discards;
997 ns->tx_dropped = es->tx_discards;
998
999 /* pull in a couple PF stats if this is the main vsi */
1000 if (vsi == pf->vsi[pf->lan_vsi]) {
1001 ns->rx_crc_errors = pf->stats.crc_errors;
1002 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
1003 ns->rx_length_errors = pf->stats.rx_length_errors;
1004 }
1005 }
1006
1007 /**
1008 * i40e_update_pf_stats - Update the PF statistics counters.
1009 * @pf: the PF to be updated
1010 **/
i40e_update_pf_stats(struct i40e_pf * pf)1011 static void i40e_update_pf_stats(struct i40e_pf *pf)
1012 {
1013 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
1014 struct i40e_hw_port_stats *nsd = &pf->stats;
1015 struct i40e_hw *hw = &pf->hw;
1016 u32 val;
1017 int i;
1018
1019 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
1020 I40E_GLPRT_GORCL(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
1023 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
1024 I40E_GLPRT_GOTCL(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
1027 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->eth.rx_discards,
1030 &nsd->eth.rx_discards);
1031 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
1032 I40E_GLPRT_UPRCL(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->eth.rx_unicast,
1035 &nsd->eth.rx_unicast);
1036 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
1037 I40E_GLPRT_MPRCL(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->eth.rx_multicast,
1040 &nsd->eth.rx_multicast);
1041 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1042 I40E_GLPRT_BPRCL(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->eth.rx_broadcast,
1045 &nsd->eth.rx_broadcast);
1046 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1047 I40E_GLPRT_UPTCL(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->eth.tx_unicast,
1050 &nsd->eth.tx_unicast);
1051 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1052 I40E_GLPRT_MPTCL(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->eth.tx_multicast,
1055 &nsd->eth.tx_multicast);
1056 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1057 I40E_GLPRT_BPTCL(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->eth.tx_broadcast,
1060 &nsd->eth.tx_broadcast);
1061
1062 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->tx_dropped_link_down,
1065 &nsd->tx_dropped_link_down);
1066
1067 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1068 pf->stat_offsets_loaded,
1069 &osd->crc_errors, &nsd->crc_errors);
1070
1071 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->illegal_bytes, &nsd->illegal_bytes);
1074
1075 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->mac_local_faults,
1078 &nsd->mac_local_faults);
1079 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1080 pf->stat_offsets_loaded,
1081 &osd->mac_remote_faults,
1082 &nsd->mac_remote_faults);
1083
1084 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->rx_length_errors,
1087 &nsd->rx_length_errors);
1088
1089 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1090 pf->stat_offsets_loaded,
1091 &osd->link_xon_rx, &nsd->link_xon_rx);
1092 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1093 pf->stat_offsets_loaded,
1094 &osd->link_xon_tx, &nsd->link_xon_tx);
1095 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1096 pf->stat_offsets_loaded,
1097 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1098 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1101
1102 for (i = 0; i < 8; i++) {
1103 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1104 pf->stat_offsets_loaded,
1105 &osd->priority_xoff_rx[i],
1106 &nsd->priority_xoff_rx[i]);
1107 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1108 pf->stat_offsets_loaded,
1109 &osd->priority_xon_rx[i],
1110 &nsd->priority_xon_rx[i]);
1111 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1112 pf->stat_offsets_loaded,
1113 &osd->priority_xon_tx[i],
1114 &nsd->priority_xon_tx[i]);
1115 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1116 pf->stat_offsets_loaded,
1117 &osd->priority_xoff_tx[i],
1118 &nsd->priority_xoff_tx[i]);
1119 i40e_stat_update32(hw,
1120 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1121 pf->stat_offsets_loaded,
1122 &osd->priority_xon_2_xoff[i],
1123 &nsd->priority_xon_2_xoff[i]);
1124 }
1125
1126 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1127 I40E_GLPRT_PRC64L(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->rx_size_64, &nsd->rx_size_64);
1130 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1131 I40E_GLPRT_PRC127L(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->rx_size_127, &nsd->rx_size_127);
1134 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1135 I40E_GLPRT_PRC255L(hw->port),
1136 pf->stat_offsets_loaded,
1137 &osd->rx_size_255, &nsd->rx_size_255);
1138 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1139 I40E_GLPRT_PRC511L(hw->port),
1140 pf->stat_offsets_loaded,
1141 &osd->rx_size_511, &nsd->rx_size_511);
1142 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1143 I40E_GLPRT_PRC1023L(hw->port),
1144 pf->stat_offsets_loaded,
1145 &osd->rx_size_1023, &nsd->rx_size_1023);
1146 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1147 I40E_GLPRT_PRC1522L(hw->port),
1148 pf->stat_offsets_loaded,
1149 &osd->rx_size_1522, &nsd->rx_size_1522);
1150 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1151 I40E_GLPRT_PRC9522L(hw->port),
1152 pf->stat_offsets_loaded,
1153 &osd->rx_size_big, &nsd->rx_size_big);
1154
1155 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1156 I40E_GLPRT_PTC64L(hw->port),
1157 pf->stat_offsets_loaded,
1158 &osd->tx_size_64, &nsd->tx_size_64);
1159 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1160 I40E_GLPRT_PTC127L(hw->port),
1161 pf->stat_offsets_loaded,
1162 &osd->tx_size_127, &nsd->tx_size_127);
1163 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1164 I40E_GLPRT_PTC255L(hw->port),
1165 pf->stat_offsets_loaded,
1166 &osd->tx_size_255, &nsd->tx_size_255);
1167 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1168 I40E_GLPRT_PTC511L(hw->port),
1169 pf->stat_offsets_loaded,
1170 &osd->tx_size_511, &nsd->tx_size_511);
1171 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1172 I40E_GLPRT_PTC1023L(hw->port),
1173 pf->stat_offsets_loaded,
1174 &osd->tx_size_1023, &nsd->tx_size_1023);
1175 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1176 I40E_GLPRT_PTC1522L(hw->port),
1177 pf->stat_offsets_loaded,
1178 &osd->tx_size_1522, &nsd->tx_size_1522);
1179 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1180 I40E_GLPRT_PTC9522L(hw->port),
1181 pf->stat_offsets_loaded,
1182 &osd->tx_size_big, &nsd->tx_size_big);
1183
1184 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1185 pf->stat_offsets_loaded,
1186 &osd->rx_undersize, &nsd->rx_undersize);
1187 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1188 pf->stat_offsets_loaded,
1189 &osd->rx_fragments, &nsd->rx_fragments);
1190 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1191 pf->stat_offsets_loaded,
1192 &osd->rx_oversize, &nsd->rx_oversize);
1193 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1194 pf->stat_offsets_loaded,
1195 &osd->rx_jabber, &nsd->rx_jabber);
1196
1197 /* FDIR stats */
1198 i40e_stat_update_and_clear32(hw,
1199 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1200 &nsd->fd_atr_match);
1201 i40e_stat_update_and_clear32(hw,
1202 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1203 &nsd->fd_sb_match);
1204 i40e_stat_update_and_clear32(hw,
1205 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1206 &nsd->fd_atr_tunnel_match);
1207
1208 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1209 nsd->tx_lpi_status =
1210 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1211 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1212 nsd->rx_lpi_status =
1213 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1214 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1215 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1216 pf->stat_offsets_loaded,
1217 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1218 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1219 pf->stat_offsets_loaded,
1220 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1221
1222 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1223 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1224 nsd->fd_sb_status = true;
1225 else
1226 nsd->fd_sb_status = false;
1227
1228 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1229 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1230 nsd->fd_atr_status = true;
1231 else
1232 nsd->fd_atr_status = false;
1233
1234 pf->stat_offsets_loaded = true;
1235 }
1236
1237 /**
1238 * i40e_update_stats - Update the various statistics counters.
1239 * @vsi: the VSI to be updated
1240 *
1241 * Update the various stats for this VSI and its related entities.
1242 **/
i40e_update_stats(struct i40e_vsi * vsi)1243 void i40e_update_stats(struct i40e_vsi *vsi)
1244 {
1245 struct i40e_pf *pf = vsi->back;
1246
1247 if (vsi == pf->vsi[pf->lan_vsi])
1248 i40e_update_pf_stats(pf);
1249
1250 i40e_update_vsi_stats(vsi);
1251 }
1252
1253 /**
1254 * i40e_count_filters - counts VSI mac filters
1255 * @vsi: the VSI to be searched
1256 *
1257 * Returns count of mac filters
1258 **/
i40e_count_filters(struct i40e_vsi * vsi)1259 int i40e_count_filters(struct i40e_vsi *vsi)
1260 {
1261 struct i40e_mac_filter *f;
1262 struct hlist_node *h;
1263 int bkt;
1264 int cnt = 0;
1265
1266 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1267 if (f->state == I40E_FILTER_NEW ||
1268 f->state == I40E_FILTER_ACTIVE)
1269 ++cnt;
1270 }
1271
1272 return cnt;
1273 }
1274
1275 /**
1276 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1277 * @vsi: the VSI to be searched
1278 * @macaddr: the MAC address
1279 * @vlan: the vlan
1280 *
1281 * Returns ptr to the filter object or NULL
1282 **/
i40e_find_filter(struct i40e_vsi * vsi,const u8 * macaddr,s16 vlan)1283 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1284 const u8 *macaddr, s16 vlan)
1285 {
1286 struct i40e_mac_filter *f;
1287 u64 key;
1288
1289 if (!vsi || !macaddr)
1290 return NULL;
1291
1292 key = i40e_addr_to_hkey(macaddr);
1293 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1294 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1295 (vlan == f->vlan))
1296 return f;
1297 }
1298 return NULL;
1299 }
1300
1301 /**
1302 * i40e_find_mac - Find a mac addr in the macvlan filters list
1303 * @vsi: the VSI to be searched
1304 * @macaddr: the MAC address we are searching for
1305 *
1306 * Returns the first filter with the provided MAC address or NULL if
1307 * MAC address was not found
1308 **/
i40e_find_mac(struct i40e_vsi * vsi,const u8 * macaddr)1309 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1310 {
1311 struct i40e_mac_filter *f;
1312 u64 key;
1313
1314 if (!vsi || !macaddr)
1315 return NULL;
1316
1317 key = i40e_addr_to_hkey(macaddr);
1318 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1319 if ((ether_addr_equal(macaddr, f->macaddr)))
1320 return f;
1321 }
1322 return NULL;
1323 }
1324
1325 /**
1326 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1327 * @vsi: the VSI to be searched
1328 *
1329 * Returns true if VSI is in vlan mode or false otherwise
1330 **/
i40e_is_vsi_in_vlan(struct i40e_vsi * vsi)1331 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1332 {
1333 /* If we have a PVID, always operate in VLAN mode */
1334 if (vsi->info.pvid)
1335 return true;
1336
1337 /* We need to operate in VLAN mode whenever we have any filters with
1338 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1339 * time, incurring search cost repeatedly. However, we can notice two
1340 * things:
1341 *
1342 * 1) the only place where we can gain a VLAN filter is in
1343 * i40e_add_filter.
1344 *
1345 * 2) the only place where filters are actually removed is in
1346 * i40e_sync_filters_subtask.
1347 *
1348 * Thus, we can simply use a boolean value, has_vlan_filters which we
1349 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1350 * we have to perform the full search after deleting filters in
1351 * i40e_sync_filters_subtask, but we already have to search
1352 * filters here and can perform the check at the same time. This
1353 * results in avoiding embedding a loop for VLAN mode inside another
1354 * loop over all the filters, and should maintain correctness as noted
1355 * above.
1356 */
1357 return vsi->has_vlan_filter;
1358 }
1359
1360 /**
1361 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1362 * @vsi: the VSI to configure
1363 * @tmp_add_list: list of filters ready to be added
1364 * @tmp_del_list: list of filters ready to be deleted
1365 * @vlan_filters: the number of active VLAN filters
1366 *
1367 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1368 * behave as expected. If we have any active VLAN filters remaining or about
1369 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1370 * so that they only match against untagged traffic. If we no longer have any
1371 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1372 * so that they match against both tagged and untagged traffic. In this way,
1373 * we ensure that we correctly receive the desired traffic. This ensures that
1374 * when we have an active VLAN we will receive only untagged traffic and
1375 * traffic matching active VLANs. If we have no active VLANs then we will
1376 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1377 *
1378 * Finally, in a similar fashion, this function also corrects filters when
1379 * there is an active PVID assigned to this VSI.
1380 *
1381 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1382 *
1383 * This function is only expected to be called from within
1384 * i40e_sync_vsi_filters.
1385 *
1386 * NOTE: This function expects to be called while under the
1387 * mac_filter_hash_lock
1388 */
i40e_correct_mac_vlan_filters(struct i40e_vsi * vsi,struct hlist_head * tmp_add_list,struct hlist_head * tmp_del_list,int vlan_filters)1389 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1390 struct hlist_head *tmp_add_list,
1391 struct hlist_head *tmp_del_list,
1392 int vlan_filters)
1393 {
1394 s16 pvid = le16_to_cpu(vsi->info.pvid);
1395 struct i40e_mac_filter *f, *add_head;
1396 struct i40e_new_mac_filter *new;
1397 struct hlist_node *h;
1398 int bkt, new_vlan;
1399
1400 /* To determine if a particular filter needs to be replaced we
1401 * have the three following conditions:
1402 *
1403 * a) if we have a PVID assigned, then all filters which are
1404 * not marked as VLAN=PVID must be replaced with filters that
1405 * are.
1406 * b) otherwise, if we have any active VLANS, all filters
1407 * which are marked as VLAN=-1 must be replaced with
1408 * filters marked as VLAN=0
1409 * c) finally, if we do not have any active VLANS, all filters
1410 * which are marked as VLAN=0 must be replaced with filters
1411 * marked as VLAN=-1
1412 */
1413
1414 /* Update the filters about to be added in place */
1415 hlist_for_each_entry(new, tmp_add_list, hlist) {
1416 if (pvid && new->f->vlan != pvid)
1417 new->f->vlan = pvid;
1418 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1419 new->f->vlan = 0;
1420 else if (!vlan_filters && new->f->vlan == 0)
1421 new->f->vlan = I40E_VLAN_ANY;
1422 }
1423
1424 /* Update the remaining active filters */
1425 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1426 /* Combine the checks for whether a filter needs to be changed
1427 * and then determine the new VLAN inside the if block, in
1428 * order to avoid duplicating code for adding the new filter
1429 * then deleting the old filter.
1430 */
1431 if ((pvid && f->vlan != pvid) ||
1432 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1433 (!vlan_filters && f->vlan == 0)) {
1434 /* Determine the new vlan we will be adding */
1435 if (pvid)
1436 new_vlan = pvid;
1437 else if (vlan_filters)
1438 new_vlan = 0;
1439 else
1440 new_vlan = I40E_VLAN_ANY;
1441
1442 /* Create the new filter */
1443 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1444 if (!add_head)
1445 return -ENOMEM;
1446
1447 /* Create a temporary i40e_new_mac_filter */
1448 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1449 if (!new)
1450 return -ENOMEM;
1451
1452 new->f = add_head;
1453 new->state = add_head->state;
1454
1455 /* Add the new filter to the tmp list */
1456 hlist_add_head(&new->hlist, tmp_add_list);
1457
1458 /* Put the original filter into the delete list */
1459 f->state = I40E_FILTER_REMOVE;
1460 hash_del(&f->hlist);
1461 hlist_add_head(&f->hlist, tmp_del_list);
1462 }
1463 }
1464
1465 vsi->has_vlan_filter = !!vlan_filters;
1466
1467 return 0;
1468 }
1469
1470 /**
1471 * i40e_get_vf_new_vlan - Get new vlan id on a vf
1472 * @vsi: the vsi to configure
1473 * @new_mac: new mac filter to be added
1474 * @f: existing mac filter, replaced with new_mac->f if new_mac is not NULL
1475 * @vlan_filters: the number of active VLAN filters
1476 * @trusted: flag if the VF is trusted
1477 *
1478 * Get new VLAN id based on current VLAN filters, trust, PVID
1479 * and vf-vlan-prune-disable flag.
1480 *
1481 * Returns the value of the new vlan filter or
1482 * the old value if no new filter is needed.
1483 */
i40e_get_vf_new_vlan(struct i40e_vsi * vsi,struct i40e_new_mac_filter * new_mac,struct i40e_mac_filter * f,int vlan_filters,bool trusted)1484 static s16 i40e_get_vf_new_vlan(struct i40e_vsi *vsi,
1485 struct i40e_new_mac_filter *new_mac,
1486 struct i40e_mac_filter *f,
1487 int vlan_filters,
1488 bool trusted)
1489 {
1490 s16 pvid = le16_to_cpu(vsi->info.pvid);
1491 struct i40e_pf *pf = vsi->back;
1492 bool is_any;
1493
1494 if (new_mac)
1495 f = new_mac->f;
1496
1497 if (pvid && f->vlan != pvid)
1498 return pvid;
1499
1500 is_any = (trusted ||
1501 !(pf->flags & I40E_FLAG_VF_VLAN_PRUNING));
1502
1503 if ((vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1504 (!is_any && !vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1505 (is_any && !vlan_filters && f->vlan == 0)) {
1506 if (is_any)
1507 return I40E_VLAN_ANY;
1508 else
1509 return 0;
1510 }
1511
1512 return f->vlan;
1513 }
1514
1515 /**
1516 * i40e_correct_vf_mac_vlan_filters - Correct non-VLAN VF filters if necessary
1517 * @vsi: the vsi to configure
1518 * @tmp_add_list: list of filters ready to be added
1519 * @tmp_del_list: list of filters ready to be deleted
1520 * @vlan_filters: the number of active VLAN filters
1521 * @trusted: flag if the VF is trusted
1522 *
1523 * Correct VF VLAN filters based on current VLAN filters, trust, PVID
1524 * and vf-vlan-prune-disable flag.
1525 *
1526 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1527 *
1528 * This function is only expected to be called from within
1529 * i40e_sync_vsi_filters.
1530 *
1531 * NOTE: This function expects to be called while under the
1532 * mac_filter_hash_lock
1533 */
i40e_correct_vf_mac_vlan_filters(struct i40e_vsi * vsi,struct hlist_head * tmp_add_list,struct hlist_head * tmp_del_list,int vlan_filters,bool trusted)1534 static int i40e_correct_vf_mac_vlan_filters(struct i40e_vsi *vsi,
1535 struct hlist_head *tmp_add_list,
1536 struct hlist_head *tmp_del_list,
1537 int vlan_filters,
1538 bool trusted)
1539 {
1540 struct i40e_mac_filter *f, *add_head;
1541 struct i40e_new_mac_filter *new_mac;
1542 struct hlist_node *h;
1543 int bkt, new_vlan;
1544
1545 hlist_for_each_entry(new_mac, tmp_add_list, hlist) {
1546 new_mac->f->vlan = i40e_get_vf_new_vlan(vsi, new_mac, NULL,
1547 vlan_filters, trusted);
1548 }
1549
1550 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1551 new_vlan = i40e_get_vf_new_vlan(vsi, NULL, f, vlan_filters,
1552 trusted);
1553 if (new_vlan != f->vlan) {
1554 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1555 if (!add_head)
1556 return -ENOMEM;
1557 /* Create a temporary i40e_new_mac_filter */
1558 new_mac = kzalloc(sizeof(*new_mac), GFP_ATOMIC);
1559 if (!new_mac)
1560 return -ENOMEM;
1561 new_mac->f = add_head;
1562 new_mac->state = add_head->state;
1563
1564 /* Add the new filter to the tmp list */
1565 hlist_add_head(&new_mac->hlist, tmp_add_list);
1566
1567 /* Put the original filter into the delete list */
1568 f->state = I40E_FILTER_REMOVE;
1569 hash_del(&f->hlist);
1570 hlist_add_head(&f->hlist, tmp_del_list);
1571 }
1572 }
1573
1574 vsi->has_vlan_filter = !!vlan_filters;
1575 return 0;
1576 }
1577
1578 /**
1579 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1580 * @vsi: the PF Main VSI - inappropriate for any other VSI
1581 * @macaddr: the MAC address
1582 *
1583 * Remove whatever filter the firmware set up so the driver can manage
1584 * its own filtering intelligently.
1585 **/
i40e_rm_default_mac_filter(struct i40e_vsi * vsi,u8 * macaddr)1586 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1587 {
1588 struct i40e_aqc_remove_macvlan_element_data element;
1589 struct i40e_pf *pf = vsi->back;
1590
1591 /* Only appropriate for the PF main VSI */
1592 if (vsi->type != I40E_VSI_MAIN)
1593 return;
1594
1595 memset(&element, 0, sizeof(element));
1596 ether_addr_copy(element.mac_addr, macaddr);
1597 element.vlan_tag = 0;
1598 /* Ignore error returns, some firmware does it this way... */
1599 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1600 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1601
1602 memset(&element, 0, sizeof(element));
1603 ether_addr_copy(element.mac_addr, macaddr);
1604 element.vlan_tag = 0;
1605 /* ...and some firmware does it this way. */
1606 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1607 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1608 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1609 }
1610
1611 /**
1612 * i40e_add_filter - Add a mac/vlan filter to the VSI
1613 * @vsi: the VSI to be searched
1614 * @macaddr: the MAC address
1615 * @vlan: the vlan
1616 *
1617 * Returns ptr to the filter object or NULL when no memory available.
1618 *
1619 * NOTE: This function is expected to be called with mac_filter_hash_lock
1620 * being held.
1621 **/
i40e_add_filter(struct i40e_vsi * vsi,const u8 * macaddr,s16 vlan)1622 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1623 const u8 *macaddr, s16 vlan)
1624 {
1625 struct i40e_mac_filter *f;
1626 u64 key;
1627
1628 if (!vsi || !macaddr)
1629 return NULL;
1630
1631 f = i40e_find_filter(vsi, macaddr, vlan);
1632 if (!f) {
1633 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1634 if (!f)
1635 return NULL;
1636
1637 /* Update the boolean indicating if we need to function in
1638 * VLAN mode.
1639 */
1640 if (vlan >= 0)
1641 vsi->has_vlan_filter = true;
1642
1643 ether_addr_copy(f->macaddr, macaddr);
1644 f->vlan = vlan;
1645 f->state = I40E_FILTER_NEW;
1646 INIT_HLIST_NODE(&f->hlist);
1647
1648 key = i40e_addr_to_hkey(macaddr);
1649 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1650
1651 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1652 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1653 }
1654
1655 /* If we're asked to add a filter that has been marked for removal, it
1656 * is safe to simply restore it to active state. __i40e_del_filter
1657 * will have simply deleted any filters which were previously marked
1658 * NEW or FAILED, so if it is currently marked REMOVE it must have
1659 * previously been ACTIVE. Since we haven't yet run the sync filters
1660 * task, just restore this filter to the ACTIVE state so that the
1661 * sync task leaves it in place
1662 */
1663 if (f->state == I40E_FILTER_REMOVE)
1664 f->state = I40E_FILTER_ACTIVE;
1665
1666 return f;
1667 }
1668
1669 /**
1670 * __i40e_del_filter - Remove a specific filter from the VSI
1671 * @vsi: VSI to remove from
1672 * @f: the filter to remove from the list
1673 *
1674 * This function should be called instead of i40e_del_filter only if you know
1675 * the exact filter you will remove already, such as via i40e_find_filter or
1676 * i40e_find_mac.
1677 *
1678 * NOTE: This function is expected to be called with mac_filter_hash_lock
1679 * being held.
1680 * ANOTHER NOTE: This function MUST be called from within the context of
1681 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1682 * instead of list_for_each_entry().
1683 **/
__i40e_del_filter(struct i40e_vsi * vsi,struct i40e_mac_filter * f)1684 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1685 {
1686 if (!f)
1687 return;
1688
1689 /* If the filter was never added to firmware then we can just delete it
1690 * directly and we don't want to set the status to remove or else an
1691 * admin queue command will unnecessarily fire.
1692 */
1693 if ((f->state == I40E_FILTER_FAILED) ||
1694 (f->state == I40E_FILTER_NEW)) {
1695 hash_del(&f->hlist);
1696 kfree(f);
1697 } else {
1698 f->state = I40E_FILTER_REMOVE;
1699 }
1700
1701 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1702 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1703 }
1704
1705 /**
1706 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1707 * @vsi: the VSI to be searched
1708 * @macaddr: the MAC address
1709 * @vlan: the VLAN
1710 *
1711 * NOTE: This function is expected to be called with mac_filter_hash_lock
1712 * being held.
1713 * ANOTHER NOTE: This function MUST be called from within the context of
1714 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1715 * instead of list_for_each_entry().
1716 **/
i40e_del_filter(struct i40e_vsi * vsi,const u8 * macaddr,s16 vlan)1717 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1718 {
1719 struct i40e_mac_filter *f;
1720
1721 if (!vsi || !macaddr)
1722 return;
1723
1724 f = i40e_find_filter(vsi, macaddr, vlan);
1725 __i40e_del_filter(vsi, f);
1726 }
1727
1728 /**
1729 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1730 * @vsi: the VSI to be searched
1731 * @macaddr: the mac address to be filtered
1732 *
1733 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1734 * go through all the macvlan filters and add a macvlan filter for each
1735 * unique vlan that already exists. If a PVID has been assigned, instead only
1736 * add the macaddr to that VLAN.
1737 *
1738 * Returns last filter added on success, else NULL
1739 **/
i40e_add_mac_filter(struct i40e_vsi * vsi,const u8 * macaddr)1740 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1741 const u8 *macaddr)
1742 {
1743 struct i40e_mac_filter *f, *add = NULL;
1744 struct hlist_node *h;
1745 int bkt;
1746
1747 if (vsi->info.pvid)
1748 return i40e_add_filter(vsi, macaddr,
1749 le16_to_cpu(vsi->info.pvid));
1750
1751 if (!i40e_is_vsi_in_vlan(vsi))
1752 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1753
1754 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1755 if (f->state == I40E_FILTER_REMOVE)
1756 continue;
1757 add = i40e_add_filter(vsi, macaddr, f->vlan);
1758 if (!add)
1759 return NULL;
1760 }
1761
1762 return add;
1763 }
1764
1765 /**
1766 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1767 * @vsi: the VSI to be searched
1768 * @macaddr: the mac address to be removed
1769 *
1770 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1771 * associated with.
1772 *
1773 * Returns 0 for success, or error
1774 **/
i40e_del_mac_filter(struct i40e_vsi * vsi,const u8 * macaddr)1775 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1776 {
1777 struct i40e_mac_filter *f;
1778 struct hlist_node *h;
1779 bool found = false;
1780 int bkt;
1781
1782 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1783 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1784 if (ether_addr_equal(macaddr, f->macaddr)) {
1785 __i40e_del_filter(vsi, f);
1786 found = true;
1787 }
1788 }
1789
1790 if (found)
1791 return 0;
1792 else
1793 return -ENOENT;
1794 }
1795
1796 /**
1797 * i40e_set_mac - NDO callback to set mac address
1798 * @netdev: network interface device structure
1799 * @p: pointer to an address structure
1800 *
1801 * Returns 0 on success, negative on failure
1802 **/
i40e_set_mac(struct net_device * netdev,void * p)1803 static int i40e_set_mac(struct net_device *netdev, void *p)
1804 {
1805 struct i40e_netdev_priv *np = netdev_priv(netdev);
1806 struct i40e_vsi *vsi = np->vsi;
1807 struct i40e_pf *pf = vsi->back;
1808 struct i40e_hw *hw = &pf->hw;
1809 struct sockaddr *addr = p;
1810
1811 if (!is_valid_ether_addr(addr->sa_data))
1812 return -EADDRNOTAVAIL;
1813
1814 if (test_bit(__I40E_DOWN, pf->state) ||
1815 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1816 return -EADDRNOTAVAIL;
1817
1818 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1819 netdev_info(netdev, "returning to hw mac address %pM\n",
1820 hw->mac.addr);
1821 else
1822 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1823
1824 /* Copy the address first, so that we avoid a possible race with
1825 * .set_rx_mode().
1826 * - Remove old address from MAC filter
1827 * - Copy new address
1828 * - Add new address to MAC filter
1829 */
1830 spin_lock_bh(&vsi->mac_filter_hash_lock);
1831 i40e_del_mac_filter(vsi, netdev->dev_addr);
1832 eth_hw_addr_set(netdev, addr->sa_data);
1833 i40e_add_mac_filter(vsi, netdev->dev_addr);
1834 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1835
1836 if (vsi->type == I40E_VSI_MAIN) {
1837 int ret;
1838
1839 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1840 addr->sa_data, NULL);
1841 if (ret)
1842 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %pe, AQ ret %s\n",
1843 ERR_PTR(ret),
1844 i40e_aq_str(hw, hw->aq.asq_last_status));
1845 }
1846
1847 /* schedule our worker thread which will take care of
1848 * applying the new filter changes
1849 */
1850 i40e_service_event_schedule(pf);
1851 return 0;
1852 }
1853
1854 /**
1855 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1856 * @vsi: vsi structure
1857 * @seed: RSS hash seed
1858 * @lut: pointer to lookup table of lut_size
1859 * @lut_size: size of the lookup table
1860 **/
i40e_config_rss_aq(struct i40e_vsi * vsi,const u8 * seed,u8 * lut,u16 lut_size)1861 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1862 u8 *lut, u16 lut_size)
1863 {
1864 struct i40e_pf *pf = vsi->back;
1865 struct i40e_hw *hw = &pf->hw;
1866 int ret = 0;
1867
1868 if (seed) {
1869 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1870 (struct i40e_aqc_get_set_rss_key_data *)seed;
1871 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1872 if (ret) {
1873 dev_info(&pf->pdev->dev,
1874 "Cannot set RSS key, err %pe aq_err %s\n",
1875 ERR_PTR(ret),
1876 i40e_aq_str(hw, hw->aq.asq_last_status));
1877 return ret;
1878 }
1879 }
1880 if (lut) {
1881 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1882
1883 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1884 if (ret) {
1885 dev_info(&pf->pdev->dev,
1886 "Cannot set RSS lut, err %pe aq_err %s\n",
1887 ERR_PTR(ret),
1888 i40e_aq_str(hw, hw->aq.asq_last_status));
1889 return ret;
1890 }
1891 }
1892 return ret;
1893 }
1894
1895 /**
1896 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1897 * @vsi: VSI structure
1898 **/
i40e_vsi_config_rss(struct i40e_vsi * vsi)1899 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1900 {
1901 struct i40e_pf *pf = vsi->back;
1902 u8 seed[I40E_HKEY_ARRAY_SIZE];
1903 u8 *lut;
1904 int ret;
1905
1906 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1907 return 0;
1908 if (!vsi->rss_size)
1909 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1910 vsi->num_queue_pairs);
1911 if (!vsi->rss_size)
1912 return -EINVAL;
1913 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1914 if (!lut)
1915 return -ENOMEM;
1916
1917 /* Use the user configured hash keys and lookup table if there is one,
1918 * otherwise use default
1919 */
1920 if (vsi->rss_lut_user)
1921 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1922 else
1923 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1924 if (vsi->rss_hkey_user)
1925 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1926 else
1927 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1928 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1929 kfree(lut);
1930 return ret;
1931 }
1932
1933 /**
1934 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1935 * @vsi: the VSI being configured,
1936 * @ctxt: VSI context structure
1937 * @enabled_tc: number of traffic classes to enable
1938 *
1939 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1940 **/
i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi * vsi,struct i40e_vsi_context * ctxt,u8 enabled_tc)1941 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1942 struct i40e_vsi_context *ctxt,
1943 u8 enabled_tc)
1944 {
1945 u16 qcount = 0, max_qcount, qmap, sections = 0;
1946 int i, override_q, pow, num_qps, ret;
1947 u8 netdev_tc = 0, offset = 0;
1948
1949 if (vsi->type != I40E_VSI_MAIN)
1950 return -EINVAL;
1951 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1952 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1953 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1954 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1955 num_qps = vsi->mqprio_qopt.qopt.count[0];
1956
1957 /* find the next higher power-of-2 of num queue pairs */
1958 pow = ilog2(num_qps);
1959 if (!is_power_of_2(num_qps))
1960 pow++;
1961 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1962 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1963
1964 /* Setup queue offset/count for all TCs for given VSI */
1965 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1966 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1967 /* See if the given TC is enabled for the given VSI */
1968 if (vsi->tc_config.enabled_tc & BIT(i)) {
1969 offset = vsi->mqprio_qopt.qopt.offset[i];
1970 qcount = vsi->mqprio_qopt.qopt.count[i];
1971 if (qcount > max_qcount)
1972 max_qcount = qcount;
1973 vsi->tc_config.tc_info[i].qoffset = offset;
1974 vsi->tc_config.tc_info[i].qcount = qcount;
1975 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1976 } else {
1977 /* TC is not enabled so set the offset to
1978 * default queue and allocate one queue
1979 * for the given TC.
1980 */
1981 vsi->tc_config.tc_info[i].qoffset = 0;
1982 vsi->tc_config.tc_info[i].qcount = 1;
1983 vsi->tc_config.tc_info[i].netdev_tc = 0;
1984 }
1985 }
1986
1987 /* Set actual Tx/Rx queue pairs */
1988 vsi->num_queue_pairs = offset + qcount;
1989
1990 /* Setup queue TC[0].qmap for given VSI context */
1991 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1992 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1993 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1994 ctxt->info.valid_sections |= cpu_to_le16(sections);
1995
1996 /* Reconfigure RSS for main VSI with max queue count */
1997 vsi->rss_size = max_qcount;
1998 ret = i40e_vsi_config_rss(vsi);
1999 if (ret) {
2000 dev_info(&vsi->back->pdev->dev,
2001 "Failed to reconfig rss for num_queues (%u)\n",
2002 max_qcount);
2003 return ret;
2004 }
2005 vsi->reconfig_rss = true;
2006 dev_dbg(&vsi->back->pdev->dev,
2007 "Reconfigured rss with num_queues (%u)\n", max_qcount);
2008
2009 /* Find queue count available for channel VSIs and starting offset
2010 * for channel VSIs
2011 */
2012 override_q = vsi->mqprio_qopt.qopt.count[0];
2013 if (override_q && override_q < vsi->num_queue_pairs) {
2014 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
2015 vsi->next_base_queue = override_q;
2016 }
2017 return 0;
2018 }
2019
2020 /**
2021 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
2022 * @vsi: the VSI being setup
2023 * @ctxt: VSI context structure
2024 * @enabled_tc: Enabled TCs bitmap
2025 * @is_add: True if called before Add VSI
2026 *
2027 * Setup VSI queue mapping for enabled traffic classes.
2028 **/
i40e_vsi_setup_queue_map(struct i40e_vsi * vsi,struct i40e_vsi_context * ctxt,u8 enabled_tc,bool is_add)2029 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
2030 struct i40e_vsi_context *ctxt,
2031 u8 enabled_tc,
2032 bool is_add)
2033 {
2034 struct i40e_pf *pf = vsi->back;
2035 u16 num_tc_qps = 0;
2036 u16 sections = 0;
2037 u8 netdev_tc = 0;
2038 u16 numtc = 1;
2039 u16 qcount;
2040 u8 offset;
2041 u16 qmap;
2042 int i;
2043
2044 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
2045 offset = 0;
2046 /* zero out queue mapping, it will get updated on the end of the function */
2047 memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
2048
2049 if (vsi->type == I40E_VSI_MAIN) {
2050 /* This code helps add more queue to the VSI if we have
2051 * more cores than RSS can support, the higher cores will
2052 * be served by ATR or other filters. Furthermore, the
2053 * non-zero req_queue_pairs says that user requested a new
2054 * queue count via ethtool's set_channels, so use this
2055 * value for queues distribution across traffic classes
2056 * We need at least one queue pair for the interface
2057 * to be usable as we see in else statement.
2058 */
2059 if (vsi->req_queue_pairs > 0)
2060 vsi->num_queue_pairs = vsi->req_queue_pairs;
2061 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
2062 vsi->num_queue_pairs = pf->num_lan_msix;
2063 else
2064 vsi->num_queue_pairs = 1;
2065 }
2066
2067 /* Number of queues per enabled TC */
2068 if (vsi->type == I40E_VSI_MAIN ||
2069 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
2070 num_tc_qps = vsi->num_queue_pairs;
2071 else
2072 num_tc_qps = vsi->alloc_queue_pairs;
2073
2074 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2075 /* Find numtc from enabled TC bitmap */
2076 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2077 if (enabled_tc & BIT(i)) /* TC is enabled */
2078 numtc++;
2079 }
2080 if (!numtc) {
2081 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
2082 numtc = 1;
2083 }
2084 num_tc_qps = num_tc_qps / numtc;
2085 num_tc_qps = min_t(int, num_tc_qps,
2086 i40e_pf_get_max_q_per_tc(pf));
2087 }
2088
2089 vsi->tc_config.numtc = numtc;
2090 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
2091
2092 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
2093 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
2094 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
2095
2096 /* Setup queue offset/count for all TCs for given VSI */
2097 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2098 /* See if the given TC is enabled for the given VSI */
2099 if (vsi->tc_config.enabled_tc & BIT(i)) {
2100 /* TC is enabled */
2101 int pow, num_qps;
2102
2103 switch (vsi->type) {
2104 case I40E_VSI_MAIN:
2105 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
2106 I40E_FLAG_FD_ATR_ENABLED)) ||
2107 vsi->tc_config.enabled_tc != 1) {
2108 qcount = min_t(int, pf->alloc_rss_size,
2109 num_tc_qps);
2110 break;
2111 }
2112 fallthrough;
2113 case I40E_VSI_FDIR:
2114 case I40E_VSI_SRIOV:
2115 case I40E_VSI_VMDQ2:
2116 default:
2117 qcount = num_tc_qps;
2118 WARN_ON(i != 0);
2119 break;
2120 }
2121 vsi->tc_config.tc_info[i].qoffset = offset;
2122 vsi->tc_config.tc_info[i].qcount = qcount;
2123
2124 /* find the next higher power-of-2 of num queue pairs */
2125 num_qps = qcount;
2126 pow = 0;
2127 while (num_qps && (BIT_ULL(pow) < qcount)) {
2128 pow++;
2129 num_qps >>= 1;
2130 }
2131
2132 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
2133 qmap =
2134 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
2135 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
2136
2137 offset += qcount;
2138 } else {
2139 /* TC is not enabled so set the offset to
2140 * default queue and allocate one queue
2141 * for the given TC.
2142 */
2143 vsi->tc_config.tc_info[i].qoffset = 0;
2144 vsi->tc_config.tc_info[i].qcount = 1;
2145 vsi->tc_config.tc_info[i].netdev_tc = 0;
2146
2147 qmap = 0;
2148 }
2149 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
2150 }
2151 /* Do not change previously set num_queue_pairs for PFs and VFs*/
2152 if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
2153 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
2154 (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
2155 vsi->num_queue_pairs = offset;
2156
2157 /* Scheduler section valid can only be set for ADD VSI */
2158 if (is_add) {
2159 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
2160
2161 ctxt->info.up_enable_bits = enabled_tc;
2162 }
2163 if (vsi->type == I40E_VSI_SRIOV) {
2164 ctxt->info.mapping_flags |=
2165 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
2166 for (i = 0; i < vsi->num_queue_pairs; i++)
2167 ctxt->info.queue_mapping[i] =
2168 cpu_to_le16(vsi->base_queue + i);
2169 } else {
2170 ctxt->info.mapping_flags |=
2171 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
2172 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
2173 }
2174 ctxt->info.valid_sections |= cpu_to_le16(sections);
2175 }
2176
2177 /**
2178 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
2179 * @netdev: the netdevice
2180 * @addr: address to add
2181 *
2182 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
2183 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2184 */
i40e_addr_sync(struct net_device * netdev,const u8 * addr)2185 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
2186 {
2187 struct i40e_netdev_priv *np = netdev_priv(netdev);
2188 struct i40e_vsi *vsi = np->vsi;
2189
2190 if (i40e_add_mac_filter(vsi, addr))
2191 return 0;
2192 else
2193 return -ENOMEM;
2194 }
2195
2196 /**
2197 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
2198 * @netdev: the netdevice
2199 * @addr: address to add
2200 *
2201 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
2202 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2203 */
i40e_addr_unsync(struct net_device * netdev,const u8 * addr)2204 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
2205 {
2206 struct i40e_netdev_priv *np = netdev_priv(netdev);
2207 struct i40e_vsi *vsi = np->vsi;
2208
2209 /* Under some circumstances, we might receive a request to delete
2210 * our own device address from our uc list. Because we store the
2211 * device address in the VSI's MAC/VLAN filter list, we need to ignore
2212 * such requests and not delete our device address from this list.
2213 */
2214 if (ether_addr_equal(addr, netdev->dev_addr))
2215 return 0;
2216
2217 i40e_del_mac_filter(vsi, addr);
2218
2219 return 0;
2220 }
2221
2222 /**
2223 * i40e_set_rx_mode - NDO callback to set the netdev filters
2224 * @netdev: network interface device structure
2225 **/
i40e_set_rx_mode(struct net_device * netdev)2226 static void i40e_set_rx_mode(struct net_device *netdev)
2227 {
2228 struct i40e_netdev_priv *np = netdev_priv(netdev);
2229 struct i40e_vsi *vsi = np->vsi;
2230
2231 spin_lock_bh(&vsi->mac_filter_hash_lock);
2232
2233 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2234 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2235
2236 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2237
2238 /* check for other flag changes */
2239 if (vsi->current_netdev_flags != vsi->netdev->flags) {
2240 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2241 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
2242 }
2243 }
2244
2245 /**
2246 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
2247 * @vsi: Pointer to VSI struct
2248 * @from: Pointer to list which contains MAC filter entries - changes to
2249 * those entries needs to be undone.
2250 *
2251 * MAC filter entries from this list were slated for deletion.
2252 **/
i40e_undo_del_filter_entries(struct i40e_vsi * vsi,struct hlist_head * from)2253 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
2254 struct hlist_head *from)
2255 {
2256 struct i40e_mac_filter *f;
2257 struct hlist_node *h;
2258
2259 hlist_for_each_entry_safe(f, h, from, hlist) {
2260 u64 key = i40e_addr_to_hkey(f->macaddr);
2261
2262 /* Move the element back into MAC filter list*/
2263 hlist_del(&f->hlist);
2264 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2265 }
2266 }
2267
2268 /**
2269 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2270 * @vsi: Pointer to vsi struct
2271 * @from: Pointer to list which contains MAC filter entries - changes to
2272 * those entries needs to be undone.
2273 *
2274 * MAC filter entries from this list were slated for addition.
2275 **/
i40e_undo_add_filter_entries(struct i40e_vsi * vsi,struct hlist_head * from)2276 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2277 struct hlist_head *from)
2278 {
2279 struct i40e_new_mac_filter *new;
2280 struct hlist_node *h;
2281
2282 hlist_for_each_entry_safe(new, h, from, hlist) {
2283 /* We can simply free the wrapper structure */
2284 hlist_del(&new->hlist);
2285 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2286 kfree(new);
2287 }
2288 }
2289
2290 /**
2291 * i40e_next_filter - Get the next non-broadcast filter from a list
2292 * @next: pointer to filter in list
2293 *
2294 * Returns the next non-broadcast filter in the list. Required so that we
2295 * ignore broadcast filters within the list, since these are not handled via
2296 * the normal firmware update path.
2297 */
2298 static
i40e_next_filter(struct i40e_new_mac_filter * next)2299 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2300 {
2301 hlist_for_each_entry_continue(next, hlist) {
2302 if (!is_broadcast_ether_addr(next->f->macaddr))
2303 return next;
2304 }
2305
2306 return NULL;
2307 }
2308
2309 /**
2310 * i40e_update_filter_state - Update filter state based on return data
2311 * from firmware
2312 * @count: Number of filters added
2313 * @add_list: return data from fw
2314 * @add_head: pointer to first filter in current batch
2315 *
2316 * MAC filter entries from list were slated to be added to device. Returns
2317 * number of successful filters. Note that 0 does NOT mean success!
2318 **/
2319 static int
i40e_update_filter_state(int count,struct i40e_aqc_add_macvlan_element_data * add_list,struct i40e_new_mac_filter * add_head)2320 i40e_update_filter_state(int count,
2321 struct i40e_aqc_add_macvlan_element_data *add_list,
2322 struct i40e_new_mac_filter *add_head)
2323 {
2324 int retval = 0;
2325 int i;
2326
2327 for (i = 0; i < count; i++) {
2328 /* Always check status of each filter. We don't need to check
2329 * the firmware return status because we pre-set the filter
2330 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2331 * request to the adminq. Thus, if it no longer matches then
2332 * we know the filter is active.
2333 */
2334 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2335 add_head->state = I40E_FILTER_FAILED;
2336 } else {
2337 add_head->state = I40E_FILTER_ACTIVE;
2338 retval++;
2339 }
2340
2341 add_head = i40e_next_filter(add_head);
2342 if (!add_head)
2343 break;
2344 }
2345
2346 return retval;
2347 }
2348
2349 /**
2350 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2351 * @vsi: ptr to the VSI
2352 * @vsi_name: name to display in messages
2353 * @list: the list of filters to send to firmware
2354 * @num_del: the number of filters to delete
2355 * @retval: Set to -EIO on failure to delete
2356 *
2357 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2358 * *retval instead of a return value so that success does not force ret_val to
2359 * be set to 0. This ensures that a sequence of calls to this function
2360 * preserve the previous value of *retval on successful delete.
2361 */
2362 static
i40e_aqc_del_filters(struct i40e_vsi * vsi,const char * vsi_name,struct i40e_aqc_remove_macvlan_element_data * list,int num_del,int * retval)2363 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2364 struct i40e_aqc_remove_macvlan_element_data *list,
2365 int num_del, int *retval)
2366 {
2367 struct i40e_hw *hw = &vsi->back->hw;
2368 enum i40e_admin_queue_err aq_status;
2369 int aq_ret;
2370
2371 aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL,
2372 &aq_status);
2373
2374 /* Explicitly ignore and do not report when firmware returns ENOENT */
2375 if (aq_ret && !(aq_status == I40E_AQ_RC_ENOENT)) {
2376 *retval = -EIO;
2377 dev_info(&vsi->back->pdev->dev,
2378 "ignoring delete macvlan error on %s, err %pe, aq_err %s\n",
2379 vsi_name, ERR_PTR(aq_ret),
2380 i40e_aq_str(hw, aq_status));
2381 }
2382 }
2383
2384 /**
2385 * i40e_aqc_add_filters - Request firmware to add a set of filters
2386 * @vsi: ptr to the VSI
2387 * @vsi_name: name to display in messages
2388 * @list: the list of filters to send to firmware
2389 * @add_head: Position in the add hlist
2390 * @num_add: the number of filters to add
2391 *
2392 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2393 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2394 * space for more filters.
2395 */
2396 static
i40e_aqc_add_filters(struct i40e_vsi * vsi,const char * vsi_name,struct i40e_aqc_add_macvlan_element_data * list,struct i40e_new_mac_filter * add_head,int num_add)2397 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2398 struct i40e_aqc_add_macvlan_element_data *list,
2399 struct i40e_new_mac_filter *add_head,
2400 int num_add)
2401 {
2402 struct i40e_hw *hw = &vsi->back->hw;
2403 enum i40e_admin_queue_err aq_status;
2404 int fcnt;
2405
2406 i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status);
2407 fcnt = i40e_update_filter_state(num_add, list, add_head);
2408
2409 if (fcnt != num_add) {
2410 if (vsi->type == I40E_VSI_MAIN) {
2411 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2412 dev_warn(&vsi->back->pdev->dev,
2413 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2414 i40e_aq_str(hw, aq_status), vsi_name);
2415 } else if (vsi->type == I40E_VSI_SRIOV ||
2416 vsi->type == I40E_VSI_VMDQ1 ||
2417 vsi->type == I40E_VSI_VMDQ2) {
2418 dev_warn(&vsi->back->pdev->dev,
2419 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2420 i40e_aq_str(hw, aq_status), vsi_name,
2421 vsi_name);
2422 } else {
2423 dev_warn(&vsi->back->pdev->dev,
2424 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2425 i40e_aq_str(hw, aq_status), vsi_name,
2426 vsi->type);
2427 }
2428 }
2429 }
2430
2431 /**
2432 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2433 * @vsi: pointer to the VSI
2434 * @vsi_name: the VSI name
2435 * @f: filter data
2436 *
2437 * This function sets or clears the promiscuous broadcast flags for VLAN
2438 * filters in order to properly receive broadcast frames. Assumes that only
2439 * broadcast filters are passed.
2440 *
2441 * Returns status indicating success or failure;
2442 **/
2443 static int
i40e_aqc_broadcast_filter(struct i40e_vsi * vsi,const char * vsi_name,struct i40e_mac_filter * f)2444 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2445 struct i40e_mac_filter *f)
2446 {
2447 bool enable = f->state == I40E_FILTER_NEW;
2448 struct i40e_hw *hw = &vsi->back->hw;
2449 int aq_ret;
2450
2451 if (f->vlan == I40E_VLAN_ANY) {
2452 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2453 vsi->seid,
2454 enable,
2455 NULL);
2456 } else {
2457 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2458 vsi->seid,
2459 enable,
2460 f->vlan,
2461 NULL);
2462 }
2463
2464 if (aq_ret) {
2465 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2466 dev_warn(&vsi->back->pdev->dev,
2467 "Error %s, forcing overflow promiscuous on %s\n",
2468 i40e_aq_str(hw, hw->aq.asq_last_status),
2469 vsi_name);
2470 }
2471
2472 return aq_ret;
2473 }
2474
2475 /**
2476 * i40e_set_promiscuous - set promiscuous mode
2477 * @pf: board private structure
2478 * @promisc: promisc on or off
2479 *
2480 * There are different ways of setting promiscuous mode on a PF depending on
2481 * what state/environment we're in. This identifies and sets it appropriately.
2482 * Returns 0 on success.
2483 **/
i40e_set_promiscuous(struct i40e_pf * pf,bool promisc)2484 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2485 {
2486 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2487 struct i40e_hw *hw = &pf->hw;
2488 int aq_ret;
2489
2490 if (vsi->type == I40E_VSI_MAIN &&
2491 pf->lan_veb != I40E_NO_VEB &&
2492 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2493 /* set defport ON for Main VSI instead of true promisc
2494 * this way we will get all unicast/multicast and VLAN
2495 * promisc behavior but will not get VF or VMDq traffic
2496 * replicated on the Main VSI.
2497 */
2498 if (promisc)
2499 aq_ret = i40e_aq_set_default_vsi(hw,
2500 vsi->seid,
2501 NULL);
2502 else
2503 aq_ret = i40e_aq_clear_default_vsi(hw,
2504 vsi->seid,
2505 NULL);
2506 if (aq_ret) {
2507 dev_info(&pf->pdev->dev,
2508 "Set default VSI failed, err %pe, aq_err %s\n",
2509 ERR_PTR(aq_ret),
2510 i40e_aq_str(hw, hw->aq.asq_last_status));
2511 }
2512 } else {
2513 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2514 hw,
2515 vsi->seid,
2516 promisc, NULL,
2517 true);
2518 if (aq_ret) {
2519 dev_info(&pf->pdev->dev,
2520 "set unicast promisc failed, err %pe, aq_err %s\n",
2521 ERR_PTR(aq_ret),
2522 i40e_aq_str(hw, hw->aq.asq_last_status));
2523 }
2524 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2525 hw,
2526 vsi->seid,
2527 promisc, NULL);
2528 if (aq_ret) {
2529 dev_info(&pf->pdev->dev,
2530 "set multicast promisc failed, err %pe, aq_err %s\n",
2531 ERR_PTR(aq_ret),
2532 i40e_aq_str(hw, hw->aq.asq_last_status));
2533 }
2534 }
2535
2536 if (!aq_ret)
2537 pf->cur_promisc = promisc;
2538
2539 return aq_ret;
2540 }
2541
2542 /**
2543 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2544 * @vsi: ptr to the VSI
2545 *
2546 * Push any outstanding VSI filter changes through the AdminQ.
2547 *
2548 * Returns 0 or error value
2549 **/
i40e_sync_vsi_filters(struct i40e_vsi * vsi)2550 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2551 {
2552 struct hlist_head tmp_add_list, tmp_del_list;
2553 struct i40e_mac_filter *f;
2554 struct i40e_new_mac_filter *new, *add_head = NULL;
2555 struct i40e_hw *hw = &vsi->back->hw;
2556 bool old_overflow, new_overflow;
2557 unsigned int failed_filters = 0;
2558 unsigned int vlan_filters = 0;
2559 char vsi_name[16] = "PF";
2560 int filter_list_len = 0;
2561 u32 changed_flags = 0;
2562 struct hlist_node *h;
2563 struct i40e_pf *pf;
2564 int num_add = 0;
2565 int num_del = 0;
2566 int aq_ret = 0;
2567 int retval = 0;
2568 u16 cmd_flags;
2569 int list_size;
2570 int bkt;
2571
2572 /* empty array typed pointers, kcalloc later */
2573 struct i40e_aqc_add_macvlan_element_data *add_list;
2574 struct i40e_aqc_remove_macvlan_element_data *del_list;
2575
2576 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2577 usleep_range(1000, 2000);
2578 pf = vsi->back;
2579
2580 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2581
2582 if (vsi->netdev) {
2583 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2584 vsi->current_netdev_flags = vsi->netdev->flags;
2585 }
2586
2587 INIT_HLIST_HEAD(&tmp_add_list);
2588 INIT_HLIST_HEAD(&tmp_del_list);
2589
2590 if (vsi->type == I40E_VSI_SRIOV)
2591 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2592 else if (vsi->type != I40E_VSI_MAIN)
2593 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2594
2595 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2596 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2597
2598 spin_lock_bh(&vsi->mac_filter_hash_lock);
2599 /* Create a list of filters to delete. */
2600 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2601 if (f->state == I40E_FILTER_REMOVE) {
2602 /* Move the element into temporary del_list */
2603 hash_del(&f->hlist);
2604 hlist_add_head(&f->hlist, &tmp_del_list);
2605
2606 /* Avoid counting removed filters */
2607 continue;
2608 }
2609 if (f->state == I40E_FILTER_NEW) {
2610 /* Create a temporary i40e_new_mac_filter */
2611 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2612 if (!new)
2613 goto err_no_memory_locked;
2614
2615 /* Store pointer to the real filter */
2616 new->f = f;
2617 new->state = f->state;
2618
2619 /* Add it to the hash list */
2620 hlist_add_head(&new->hlist, &tmp_add_list);
2621 }
2622
2623 /* Count the number of active (current and new) VLAN
2624 * filters we have now. Does not count filters which
2625 * are marked for deletion.
2626 */
2627 if (f->vlan > 0)
2628 vlan_filters++;
2629 }
2630
2631 if (vsi->type != I40E_VSI_SRIOV)
2632 retval = i40e_correct_mac_vlan_filters
2633 (vsi, &tmp_add_list, &tmp_del_list,
2634 vlan_filters);
2635 else if (pf->vf)
2636 retval = i40e_correct_vf_mac_vlan_filters
2637 (vsi, &tmp_add_list, &tmp_del_list,
2638 vlan_filters, pf->vf[vsi->vf_id].trusted);
2639
2640 hlist_for_each_entry(new, &tmp_add_list, hlist)
2641 netdev_hw_addr_refcnt(new->f, vsi->netdev, 1);
2642
2643 if (retval)
2644 goto err_no_memory_locked;
2645
2646 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2647 }
2648
2649 /* Now process 'del_list' outside the lock */
2650 if (!hlist_empty(&tmp_del_list)) {
2651 filter_list_len = hw->aq.asq_buf_size /
2652 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2653 list_size = filter_list_len *
2654 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2655 del_list = kzalloc(list_size, GFP_ATOMIC);
2656 if (!del_list)
2657 goto err_no_memory;
2658
2659 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2660 cmd_flags = 0;
2661
2662 /* handle broadcast filters by updating the broadcast
2663 * promiscuous flag and release filter list.
2664 */
2665 if (is_broadcast_ether_addr(f->macaddr)) {
2666 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2667
2668 hlist_del(&f->hlist);
2669 kfree(f);
2670 continue;
2671 }
2672
2673 /* add to delete list */
2674 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2675 if (f->vlan == I40E_VLAN_ANY) {
2676 del_list[num_del].vlan_tag = 0;
2677 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2678 } else {
2679 del_list[num_del].vlan_tag =
2680 cpu_to_le16((u16)(f->vlan));
2681 }
2682
2683 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2684 del_list[num_del].flags = cmd_flags;
2685 num_del++;
2686
2687 /* flush a full buffer */
2688 if (num_del == filter_list_len) {
2689 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2690 num_del, &retval);
2691 memset(del_list, 0, list_size);
2692 num_del = 0;
2693 }
2694 /* Release memory for MAC filter entries which were
2695 * synced up with HW.
2696 */
2697 hlist_del(&f->hlist);
2698 kfree(f);
2699 }
2700
2701 if (num_del) {
2702 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2703 num_del, &retval);
2704 }
2705
2706 kfree(del_list);
2707 del_list = NULL;
2708 }
2709
2710 if (!hlist_empty(&tmp_add_list)) {
2711 /* Do all the adds now. */
2712 filter_list_len = hw->aq.asq_buf_size /
2713 sizeof(struct i40e_aqc_add_macvlan_element_data);
2714 list_size = filter_list_len *
2715 sizeof(struct i40e_aqc_add_macvlan_element_data);
2716 add_list = kzalloc(list_size, GFP_ATOMIC);
2717 if (!add_list)
2718 goto err_no_memory;
2719
2720 num_add = 0;
2721 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2722 /* handle broadcast filters by updating the broadcast
2723 * promiscuous flag instead of adding a MAC filter.
2724 */
2725 if (is_broadcast_ether_addr(new->f->macaddr)) {
2726 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2727 new->f))
2728 new->state = I40E_FILTER_FAILED;
2729 else
2730 new->state = I40E_FILTER_ACTIVE;
2731 continue;
2732 }
2733
2734 /* add to add array */
2735 if (num_add == 0)
2736 add_head = new;
2737 cmd_flags = 0;
2738 ether_addr_copy(add_list[num_add].mac_addr,
2739 new->f->macaddr);
2740 if (new->f->vlan == I40E_VLAN_ANY) {
2741 add_list[num_add].vlan_tag = 0;
2742 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2743 } else {
2744 add_list[num_add].vlan_tag =
2745 cpu_to_le16((u16)(new->f->vlan));
2746 }
2747 add_list[num_add].queue_number = 0;
2748 /* set invalid match method for later detection */
2749 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2750 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2751 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2752 num_add++;
2753
2754 /* flush a full buffer */
2755 if (num_add == filter_list_len) {
2756 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2757 add_head, num_add);
2758 memset(add_list, 0, list_size);
2759 num_add = 0;
2760 }
2761 }
2762 if (num_add) {
2763 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2764 num_add);
2765 }
2766 /* Now move all of the filters from the temp add list back to
2767 * the VSI's list.
2768 */
2769 spin_lock_bh(&vsi->mac_filter_hash_lock);
2770 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2771 /* Only update the state if we're still NEW */
2772 if (new->f->state == I40E_FILTER_NEW)
2773 new->f->state = new->state;
2774 hlist_del(&new->hlist);
2775 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2776 kfree(new);
2777 }
2778 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2779 kfree(add_list);
2780 add_list = NULL;
2781 }
2782
2783 /* Determine the number of active and failed filters. */
2784 spin_lock_bh(&vsi->mac_filter_hash_lock);
2785 vsi->active_filters = 0;
2786 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2787 if (f->state == I40E_FILTER_ACTIVE)
2788 vsi->active_filters++;
2789 else if (f->state == I40E_FILTER_FAILED)
2790 failed_filters++;
2791 }
2792 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2793
2794 /* Check if we are able to exit overflow promiscuous mode. We can
2795 * safely exit if we didn't just enter, we no longer have any failed
2796 * filters, and we have reduced filters below the threshold value.
2797 */
2798 if (old_overflow && !failed_filters &&
2799 vsi->active_filters < vsi->promisc_threshold) {
2800 dev_info(&pf->pdev->dev,
2801 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2802 vsi_name);
2803 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2804 vsi->promisc_threshold = 0;
2805 }
2806
2807 /* if the VF is not trusted do not do promisc */
2808 if (vsi->type == I40E_VSI_SRIOV && pf->vf &&
2809 !pf->vf[vsi->vf_id].trusted) {
2810 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2811 goto out;
2812 }
2813
2814 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2815
2816 /* If we are entering overflow promiscuous, we need to calculate a new
2817 * threshold for when we are safe to exit
2818 */
2819 if (!old_overflow && new_overflow)
2820 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2821
2822 /* check for changes in promiscuous modes */
2823 if (changed_flags & IFF_ALLMULTI) {
2824 bool cur_multipromisc;
2825
2826 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2827 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2828 vsi->seid,
2829 cur_multipromisc,
2830 NULL);
2831 if (aq_ret) {
2832 retval = i40e_aq_rc_to_posix(aq_ret,
2833 hw->aq.asq_last_status);
2834 dev_info(&pf->pdev->dev,
2835 "set multi promisc failed on %s, err %pe aq_err %s\n",
2836 vsi_name,
2837 ERR_PTR(aq_ret),
2838 i40e_aq_str(hw, hw->aq.asq_last_status));
2839 } else {
2840 dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2841 cur_multipromisc ? "entering" : "leaving");
2842 }
2843 }
2844
2845 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2846 bool cur_promisc;
2847
2848 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2849 new_overflow);
2850 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2851 if (aq_ret) {
2852 retval = i40e_aq_rc_to_posix(aq_ret,
2853 hw->aq.asq_last_status);
2854 dev_info(&pf->pdev->dev,
2855 "Setting promiscuous %s failed on %s, err %pe aq_err %s\n",
2856 cur_promisc ? "on" : "off",
2857 vsi_name,
2858 ERR_PTR(aq_ret),
2859 i40e_aq_str(hw, hw->aq.asq_last_status));
2860 }
2861 }
2862 out:
2863 /* if something went wrong then set the changed flag so we try again */
2864 if (retval)
2865 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2866
2867 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2868 return retval;
2869
2870 err_no_memory:
2871 /* Restore elements on the temporary add and delete lists */
2872 spin_lock_bh(&vsi->mac_filter_hash_lock);
2873 err_no_memory_locked:
2874 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2875 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2876 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2877
2878 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2879 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2880 return -ENOMEM;
2881 }
2882
2883 /**
2884 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2885 * @pf: board private structure
2886 **/
i40e_sync_filters_subtask(struct i40e_pf * pf)2887 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2888 {
2889 int v;
2890
2891 if (!pf)
2892 return;
2893 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2894 return;
2895 if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2896 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2897 return;
2898 }
2899
2900 for (v = 0; v < pf->num_alloc_vsi; v++) {
2901 if (pf->vsi[v] &&
2902 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
2903 !test_bit(__I40E_VSI_RELEASING, pf->vsi[v]->state)) {
2904 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2905
2906 if (ret) {
2907 /* come back and try again later */
2908 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2909 pf->state);
2910 break;
2911 }
2912 }
2913 }
2914 }
2915
2916 /**
2917 * i40e_calculate_vsi_rx_buf_len - Calculates buffer length
2918 *
2919 * @vsi: VSI to calculate rx_buf_len from
2920 */
i40e_calculate_vsi_rx_buf_len(struct i40e_vsi * vsi)2921 static u16 i40e_calculate_vsi_rx_buf_len(struct i40e_vsi *vsi)
2922 {
2923 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2924 return SKB_WITH_OVERHEAD(I40E_RXBUFFER_2048);
2925
2926 return PAGE_SIZE < 8192 ? I40E_RXBUFFER_3072 : I40E_RXBUFFER_2048;
2927 }
2928
2929 /**
2930 * i40e_max_vsi_frame_size - returns the maximum allowed frame size for VSI
2931 * @vsi: the vsi
2932 * @xdp_prog: XDP program
2933 **/
i40e_max_vsi_frame_size(struct i40e_vsi * vsi,struct bpf_prog * xdp_prog)2934 static int i40e_max_vsi_frame_size(struct i40e_vsi *vsi,
2935 struct bpf_prog *xdp_prog)
2936 {
2937 u16 rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
2938 u16 chain_len;
2939
2940 if (xdp_prog && !xdp_prog->aux->xdp_has_frags)
2941 chain_len = 1;
2942 else
2943 chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
2944
2945 return min_t(u16, rx_buf_len * chain_len, I40E_MAX_RXBUFFER);
2946 }
2947
2948 /**
2949 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2950 * @netdev: network interface device structure
2951 * @new_mtu: new value for maximum frame size
2952 *
2953 * Returns 0 on success, negative on failure
2954 **/
i40e_change_mtu(struct net_device * netdev,int new_mtu)2955 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2956 {
2957 struct i40e_netdev_priv *np = netdev_priv(netdev);
2958 struct i40e_vsi *vsi = np->vsi;
2959 struct i40e_pf *pf = vsi->back;
2960 int frame_size;
2961
2962 frame_size = i40e_max_vsi_frame_size(vsi, vsi->xdp_prog);
2963 if (new_mtu > frame_size - I40E_PACKET_HDR_PAD) {
2964 netdev_err(netdev, "Error changing mtu to %d, Max is %d\n",
2965 new_mtu, frame_size - I40E_PACKET_HDR_PAD);
2966 return -EINVAL;
2967 }
2968
2969 netdev_dbg(netdev, "changing MTU from %d to %d\n",
2970 netdev->mtu, new_mtu);
2971 netdev->mtu = new_mtu;
2972 if (netif_running(netdev))
2973 i40e_vsi_reinit_locked(vsi);
2974 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2975 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2976 return 0;
2977 }
2978
2979 /**
2980 * i40e_ioctl - Access the hwtstamp interface
2981 * @netdev: network interface device structure
2982 * @ifr: interface request data
2983 * @cmd: ioctl command
2984 **/
i40e_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)2985 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2986 {
2987 struct i40e_netdev_priv *np = netdev_priv(netdev);
2988 struct i40e_pf *pf = np->vsi->back;
2989
2990 switch (cmd) {
2991 case SIOCGHWTSTAMP:
2992 return i40e_ptp_get_ts_config(pf, ifr);
2993 case SIOCSHWTSTAMP:
2994 return i40e_ptp_set_ts_config(pf, ifr);
2995 default:
2996 return -EOPNOTSUPP;
2997 }
2998 }
2999
3000 /**
3001 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
3002 * @vsi: the vsi being adjusted
3003 **/
i40e_vlan_stripping_enable(struct i40e_vsi * vsi)3004 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
3005 {
3006 struct i40e_vsi_context ctxt;
3007 int ret;
3008
3009 /* Don't modify stripping options if a port VLAN is active */
3010 if (vsi->info.pvid)
3011 return;
3012
3013 if ((vsi->info.valid_sections &
3014 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3015 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
3016 return; /* already enabled */
3017
3018 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3019 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3020 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
3021
3022 ctxt.seid = vsi->seid;
3023 ctxt.info = vsi->info;
3024 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3025 if (ret) {
3026 dev_info(&vsi->back->pdev->dev,
3027 "update vlan stripping failed, err %pe aq_err %s\n",
3028 ERR_PTR(ret),
3029 i40e_aq_str(&vsi->back->hw,
3030 vsi->back->hw.aq.asq_last_status));
3031 }
3032 }
3033
3034 /**
3035 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
3036 * @vsi: the vsi being adjusted
3037 **/
i40e_vlan_stripping_disable(struct i40e_vsi * vsi)3038 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
3039 {
3040 struct i40e_vsi_context ctxt;
3041 int ret;
3042
3043 /* Don't modify stripping options if a port VLAN is active */
3044 if (vsi->info.pvid)
3045 return;
3046
3047 if ((vsi->info.valid_sections &
3048 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3049 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
3050 I40E_AQ_VSI_PVLAN_EMOD_MASK))
3051 return; /* already disabled */
3052
3053 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3054 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3055 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
3056
3057 ctxt.seid = vsi->seid;
3058 ctxt.info = vsi->info;
3059 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3060 if (ret) {
3061 dev_info(&vsi->back->pdev->dev,
3062 "update vlan stripping failed, err %pe aq_err %s\n",
3063 ERR_PTR(ret),
3064 i40e_aq_str(&vsi->back->hw,
3065 vsi->back->hw.aq.asq_last_status));
3066 }
3067 }
3068
3069 /**
3070 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
3071 * @vsi: the vsi being configured
3072 * @vid: vlan id to be added (0 = untagged only , -1 = any)
3073 *
3074 * This is a helper function for adding a new MAC/VLAN filter with the
3075 * specified VLAN for each existing MAC address already in the hash table.
3076 * This function does *not* perform any accounting to update filters based on
3077 * VLAN mode.
3078 *
3079 * NOTE: this function expects to be called while under the
3080 * mac_filter_hash_lock
3081 **/
i40e_add_vlan_all_mac(struct i40e_vsi * vsi,s16 vid)3082 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3083 {
3084 struct i40e_mac_filter *f, *add_f;
3085 struct hlist_node *h;
3086 int bkt;
3087
3088 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3089 /* If we're asked to add a filter that has been marked for
3090 * removal, it is safe to simply restore it to active state.
3091 * __i40e_del_filter will have simply deleted any filters which
3092 * were previously marked NEW or FAILED, so if it is currently
3093 * marked REMOVE it must have previously been ACTIVE. Since we
3094 * haven't yet run the sync filters task, just restore this
3095 * filter to the ACTIVE state so that the sync task leaves it
3096 * in place.
3097 */
3098 if (f->state == I40E_FILTER_REMOVE && f->vlan == vid) {
3099 f->state = I40E_FILTER_ACTIVE;
3100 continue;
3101 } else if (f->state == I40E_FILTER_REMOVE) {
3102 continue;
3103 }
3104 add_f = i40e_add_filter(vsi, f->macaddr, vid);
3105 if (!add_f) {
3106 dev_info(&vsi->back->pdev->dev,
3107 "Could not add vlan filter %d for %pM\n",
3108 vid, f->macaddr);
3109 return -ENOMEM;
3110 }
3111 }
3112
3113 return 0;
3114 }
3115
3116 /**
3117 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
3118 * @vsi: the VSI being configured
3119 * @vid: VLAN id to be added
3120 **/
i40e_vsi_add_vlan(struct i40e_vsi * vsi,u16 vid)3121 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
3122 {
3123 int err;
3124
3125 if (vsi->info.pvid)
3126 return -EINVAL;
3127
3128 /* The network stack will attempt to add VID=0, with the intention to
3129 * receive priority tagged packets with a VLAN of 0. Our HW receives
3130 * these packets by default when configured to receive untagged
3131 * packets, so we don't need to add a filter for this case.
3132 * Additionally, HW interprets adding a VID=0 filter as meaning to
3133 * receive *only* tagged traffic and stops receiving untagged traffic.
3134 * Thus, we do not want to actually add a filter for VID=0
3135 */
3136 if (!vid)
3137 return 0;
3138
3139 /* Locked once because all functions invoked below iterates list*/
3140 spin_lock_bh(&vsi->mac_filter_hash_lock);
3141 err = i40e_add_vlan_all_mac(vsi, vid);
3142 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3143 if (err)
3144 return err;
3145
3146 /* schedule our worker thread which will take care of
3147 * applying the new filter changes
3148 */
3149 i40e_service_event_schedule(vsi->back);
3150 return 0;
3151 }
3152
3153 /**
3154 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
3155 * @vsi: the vsi being configured
3156 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
3157 *
3158 * This function should be used to remove all VLAN filters which match the
3159 * given VID. It does not schedule the service event and does not take the
3160 * mac_filter_hash_lock so it may be combined with other operations under
3161 * a single invocation of the mac_filter_hash_lock.
3162 *
3163 * NOTE: this function expects to be called while under the
3164 * mac_filter_hash_lock
3165 */
i40e_rm_vlan_all_mac(struct i40e_vsi * vsi,s16 vid)3166 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3167 {
3168 struct i40e_mac_filter *f;
3169 struct hlist_node *h;
3170 int bkt;
3171
3172 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3173 if (f->vlan == vid)
3174 __i40e_del_filter(vsi, f);
3175 }
3176 }
3177
3178 /**
3179 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
3180 * @vsi: the VSI being configured
3181 * @vid: VLAN id to be removed
3182 **/
i40e_vsi_kill_vlan(struct i40e_vsi * vsi,u16 vid)3183 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
3184 {
3185 if (!vid || vsi->info.pvid)
3186 return;
3187
3188 spin_lock_bh(&vsi->mac_filter_hash_lock);
3189 i40e_rm_vlan_all_mac(vsi, vid);
3190 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3191
3192 /* schedule our worker thread which will take care of
3193 * applying the new filter changes
3194 */
3195 i40e_service_event_schedule(vsi->back);
3196 }
3197
3198 /**
3199 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
3200 * @netdev: network interface to be adjusted
3201 * @proto: unused protocol value
3202 * @vid: vlan id to be added
3203 *
3204 * net_device_ops implementation for adding vlan ids
3205 **/
i40e_vlan_rx_add_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)3206 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
3207 __always_unused __be16 proto, u16 vid)
3208 {
3209 struct i40e_netdev_priv *np = netdev_priv(netdev);
3210 struct i40e_vsi *vsi = np->vsi;
3211 int ret = 0;
3212
3213 if (vid >= VLAN_N_VID)
3214 return -EINVAL;
3215
3216 ret = i40e_vsi_add_vlan(vsi, vid);
3217 if (!ret)
3218 set_bit(vid, vsi->active_vlans);
3219
3220 return ret;
3221 }
3222
3223 /**
3224 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
3225 * @netdev: network interface to be adjusted
3226 * @proto: unused protocol value
3227 * @vid: vlan id to be added
3228 **/
i40e_vlan_rx_add_vid_up(struct net_device * netdev,__always_unused __be16 proto,u16 vid)3229 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
3230 __always_unused __be16 proto, u16 vid)
3231 {
3232 struct i40e_netdev_priv *np = netdev_priv(netdev);
3233 struct i40e_vsi *vsi = np->vsi;
3234
3235 if (vid >= VLAN_N_VID)
3236 return;
3237 set_bit(vid, vsi->active_vlans);
3238 }
3239
3240 /**
3241 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
3242 * @netdev: network interface to be adjusted
3243 * @proto: unused protocol value
3244 * @vid: vlan id to be removed
3245 *
3246 * net_device_ops implementation for removing vlan ids
3247 **/
i40e_vlan_rx_kill_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)3248 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
3249 __always_unused __be16 proto, u16 vid)
3250 {
3251 struct i40e_netdev_priv *np = netdev_priv(netdev);
3252 struct i40e_vsi *vsi = np->vsi;
3253
3254 /* return code is ignored as there is nothing a user
3255 * can do about failure to remove and a log message was
3256 * already printed from the other function
3257 */
3258 i40e_vsi_kill_vlan(vsi, vid);
3259
3260 clear_bit(vid, vsi->active_vlans);
3261
3262 return 0;
3263 }
3264
3265 /**
3266 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
3267 * @vsi: the vsi being brought back up
3268 **/
i40e_restore_vlan(struct i40e_vsi * vsi)3269 static void i40e_restore_vlan(struct i40e_vsi *vsi)
3270 {
3271 u16 vid;
3272
3273 if (!vsi->netdev)
3274 return;
3275
3276 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3277 i40e_vlan_stripping_enable(vsi);
3278 else
3279 i40e_vlan_stripping_disable(vsi);
3280
3281 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
3282 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
3283 vid);
3284 }
3285
3286 /**
3287 * i40e_vsi_add_pvid - Add pvid for the VSI
3288 * @vsi: the vsi being adjusted
3289 * @vid: the vlan id to set as a PVID
3290 **/
i40e_vsi_add_pvid(struct i40e_vsi * vsi,u16 vid)3291 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
3292 {
3293 struct i40e_vsi_context ctxt;
3294 int ret;
3295
3296 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3297 vsi->info.pvid = cpu_to_le16(vid);
3298 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
3299 I40E_AQ_VSI_PVLAN_INSERT_PVID |
3300 I40E_AQ_VSI_PVLAN_EMOD_STR;
3301
3302 ctxt.seid = vsi->seid;
3303 ctxt.info = vsi->info;
3304 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3305 if (ret) {
3306 dev_info(&vsi->back->pdev->dev,
3307 "add pvid failed, err %pe aq_err %s\n",
3308 ERR_PTR(ret),
3309 i40e_aq_str(&vsi->back->hw,
3310 vsi->back->hw.aq.asq_last_status));
3311 return -ENOENT;
3312 }
3313
3314 return 0;
3315 }
3316
3317 /**
3318 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3319 * @vsi: the vsi being adjusted
3320 *
3321 * Just use the vlan_rx_register() service to put it back to normal
3322 **/
i40e_vsi_remove_pvid(struct i40e_vsi * vsi)3323 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3324 {
3325 vsi->info.pvid = 0;
3326
3327 i40e_vlan_stripping_disable(vsi);
3328 }
3329
3330 /**
3331 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3332 * @vsi: ptr to the VSI
3333 *
3334 * If this function returns with an error, then it's possible one or
3335 * more of the rings is populated (while the rest are not). It is the
3336 * callers duty to clean those orphaned rings.
3337 *
3338 * Return 0 on success, negative on failure
3339 **/
i40e_vsi_setup_tx_resources(struct i40e_vsi * vsi)3340 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3341 {
3342 int i, err = 0;
3343
3344 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3345 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3346
3347 if (!i40e_enabled_xdp_vsi(vsi))
3348 return err;
3349
3350 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3351 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3352
3353 return err;
3354 }
3355
3356 /**
3357 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3358 * @vsi: ptr to the VSI
3359 *
3360 * Free VSI's transmit software resources
3361 **/
i40e_vsi_free_tx_resources(struct i40e_vsi * vsi)3362 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3363 {
3364 int i;
3365
3366 if (vsi->tx_rings) {
3367 for (i = 0; i < vsi->num_queue_pairs; i++)
3368 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3369 i40e_free_tx_resources(vsi->tx_rings[i]);
3370 }
3371
3372 if (vsi->xdp_rings) {
3373 for (i = 0; i < vsi->num_queue_pairs; i++)
3374 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3375 i40e_free_tx_resources(vsi->xdp_rings[i]);
3376 }
3377 }
3378
3379 /**
3380 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3381 * @vsi: ptr to the VSI
3382 *
3383 * If this function returns with an error, then it's possible one or
3384 * more of the rings is populated (while the rest are not). It is the
3385 * callers duty to clean those orphaned rings.
3386 *
3387 * Return 0 on success, negative on failure
3388 **/
i40e_vsi_setup_rx_resources(struct i40e_vsi * vsi)3389 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3390 {
3391 int i, err = 0;
3392
3393 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3394 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3395 return err;
3396 }
3397
3398 /**
3399 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3400 * @vsi: ptr to the VSI
3401 *
3402 * Free all receive software resources
3403 **/
i40e_vsi_free_rx_resources(struct i40e_vsi * vsi)3404 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3405 {
3406 int i;
3407
3408 if (!vsi->rx_rings)
3409 return;
3410
3411 for (i = 0; i < vsi->num_queue_pairs; i++)
3412 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3413 i40e_free_rx_resources(vsi->rx_rings[i]);
3414 }
3415
3416 /**
3417 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3418 * @ring: The Tx ring to configure
3419 *
3420 * This enables/disables XPS for a given Tx descriptor ring
3421 * based on the TCs enabled for the VSI that ring belongs to.
3422 **/
i40e_config_xps_tx_ring(struct i40e_ring * ring)3423 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3424 {
3425 int cpu;
3426
3427 if (!ring->q_vector || !ring->netdev || ring->ch)
3428 return;
3429
3430 /* We only initialize XPS once, so as not to overwrite user settings */
3431 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3432 return;
3433
3434 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3435 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3436 ring->queue_index);
3437 }
3438
3439 /**
3440 * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3441 * @ring: The Tx or Rx ring
3442 *
3443 * Returns the AF_XDP buffer pool or NULL.
3444 **/
i40e_xsk_pool(struct i40e_ring * ring)3445 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3446 {
3447 bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3448 int qid = ring->queue_index;
3449
3450 if (ring_is_xdp(ring))
3451 qid -= ring->vsi->alloc_queue_pairs;
3452
3453 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3454 return NULL;
3455
3456 return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3457 }
3458
3459 /**
3460 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3461 * @ring: The Tx ring to configure
3462 *
3463 * Configure the Tx descriptor ring in the HMC context.
3464 **/
i40e_configure_tx_ring(struct i40e_ring * ring)3465 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3466 {
3467 struct i40e_vsi *vsi = ring->vsi;
3468 u16 pf_q = vsi->base_queue + ring->queue_index;
3469 struct i40e_hw *hw = &vsi->back->hw;
3470 struct i40e_hmc_obj_txq tx_ctx;
3471 u32 qtx_ctl = 0;
3472 int err = 0;
3473
3474 if (ring_is_xdp(ring))
3475 ring->xsk_pool = i40e_xsk_pool(ring);
3476
3477 /* some ATR related tx ring init */
3478 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3479 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3480 ring->atr_count = 0;
3481 } else {
3482 ring->atr_sample_rate = 0;
3483 }
3484
3485 /* configure XPS */
3486 i40e_config_xps_tx_ring(ring);
3487
3488 /* clear the context structure first */
3489 memset(&tx_ctx, 0, sizeof(tx_ctx));
3490
3491 tx_ctx.new_context = 1;
3492 tx_ctx.base = (ring->dma / 128);
3493 tx_ctx.qlen = ring->count;
3494 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3495 I40E_FLAG_FD_ATR_ENABLED));
3496 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3497 /* FDIR VSI tx ring can still use RS bit and writebacks */
3498 if (vsi->type != I40E_VSI_FDIR)
3499 tx_ctx.head_wb_ena = 1;
3500 tx_ctx.head_wb_addr = ring->dma +
3501 (ring->count * sizeof(struct i40e_tx_desc));
3502
3503 /* As part of VSI creation/update, FW allocates certain
3504 * Tx arbitration queue sets for each TC enabled for
3505 * the VSI. The FW returns the handles to these queue
3506 * sets as part of the response buffer to Add VSI,
3507 * Update VSI, etc. AQ commands. It is expected that
3508 * these queue set handles be associated with the Tx
3509 * queues by the driver as part of the TX queue context
3510 * initialization. This has to be done regardless of
3511 * DCB as by default everything is mapped to TC0.
3512 */
3513
3514 if (ring->ch)
3515 tx_ctx.rdylist =
3516 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3517
3518 else
3519 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3520
3521 tx_ctx.rdylist_act = 0;
3522
3523 /* clear the context in the HMC */
3524 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3525 if (err) {
3526 dev_info(&vsi->back->pdev->dev,
3527 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3528 ring->queue_index, pf_q, err);
3529 return -ENOMEM;
3530 }
3531
3532 /* set the context in the HMC */
3533 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3534 if (err) {
3535 dev_info(&vsi->back->pdev->dev,
3536 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3537 ring->queue_index, pf_q, err);
3538 return -ENOMEM;
3539 }
3540
3541 /* Now associate this queue with this PCI function */
3542 if (ring->ch) {
3543 if (ring->ch->type == I40E_VSI_VMDQ2)
3544 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3545 else
3546 return -EINVAL;
3547
3548 qtx_ctl |= (ring->ch->vsi_number <<
3549 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3550 I40E_QTX_CTL_VFVM_INDX_MASK;
3551 } else {
3552 if (vsi->type == I40E_VSI_VMDQ2) {
3553 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3554 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3555 I40E_QTX_CTL_VFVM_INDX_MASK;
3556 } else {
3557 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3558 }
3559 }
3560
3561 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3562 I40E_QTX_CTL_PF_INDX_MASK);
3563 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3564 i40e_flush(hw);
3565
3566 /* cache tail off for easier writes later */
3567 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3568
3569 return 0;
3570 }
3571
3572 /**
3573 * i40e_rx_offset - Return expected offset into page to access data
3574 * @rx_ring: Ring we are requesting offset of
3575 *
3576 * Returns the offset value for ring into the data buffer.
3577 */
i40e_rx_offset(struct i40e_ring * rx_ring)3578 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3579 {
3580 return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3581 }
3582
3583 /**
3584 * i40e_configure_rx_ring - Configure a receive ring context
3585 * @ring: The Rx ring to configure
3586 *
3587 * Configure the Rx descriptor ring in the HMC context.
3588 **/
i40e_configure_rx_ring(struct i40e_ring * ring)3589 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3590 {
3591 struct i40e_vsi *vsi = ring->vsi;
3592 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3593 u16 pf_q = vsi->base_queue + ring->queue_index;
3594 struct i40e_hw *hw = &vsi->back->hw;
3595 struct i40e_hmc_obj_rxq rx_ctx;
3596 int err = 0;
3597 bool ok;
3598
3599 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3600
3601 /* clear the context structure first */
3602 memset(&rx_ctx, 0, sizeof(rx_ctx));
3603
3604 ring->rx_buf_len = vsi->rx_buf_len;
3605
3606 /* XDP RX-queue info only needed for RX rings exposed to XDP */
3607 if (ring->vsi->type != I40E_VSI_MAIN)
3608 goto skip;
3609
3610 if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
3611 err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
3612 ring->queue_index,
3613 ring->q_vector->napi.napi_id,
3614 ring->rx_buf_len);
3615 if (err)
3616 return err;
3617 }
3618
3619 ring->xsk_pool = i40e_xsk_pool(ring);
3620 if (ring->xsk_pool) {
3621 xdp_rxq_info_unreg(&ring->xdp_rxq);
3622 ring->rx_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool);
3623 err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
3624 ring->queue_index,
3625 ring->q_vector->napi.napi_id,
3626 ring->rx_buf_len);
3627 if (err)
3628 return err;
3629 err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3630 MEM_TYPE_XSK_BUFF_POOL,
3631 NULL);
3632 if (err)
3633 return err;
3634 dev_info(&vsi->back->pdev->dev,
3635 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3636 ring->queue_index);
3637
3638 } else {
3639 err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3640 MEM_TYPE_PAGE_SHARED,
3641 NULL);
3642 if (err)
3643 return err;
3644 }
3645
3646 skip:
3647 xdp_init_buff(&ring->xdp, i40e_rx_pg_size(ring) / 2, &ring->xdp_rxq);
3648
3649 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3650 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3651
3652 rx_ctx.base = (ring->dma / 128);
3653 rx_ctx.qlen = ring->count;
3654
3655 /* use 16 byte descriptors */
3656 rx_ctx.dsize = 0;
3657
3658 /* descriptor type is always zero
3659 * rx_ctx.dtype = 0;
3660 */
3661 rx_ctx.hsplit_0 = 0;
3662
3663 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3664 if (hw->revision_id == 0)
3665 rx_ctx.lrxqthresh = 0;
3666 else
3667 rx_ctx.lrxqthresh = 1;
3668 rx_ctx.crcstrip = 1;
3669 rx_ctx.l2tsel = 1;
3670 /* this controls whether VLAN is stripped from inner headers */
3671 rx_ctx.showiv = 0;
3672 /* set the prefena field to 1 because the manual says to */
3673 rx_ctx.prefena = 1;
3674
3675 /* clear the context in the HMC */
3676 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3677 if (err) {
3678 dev_info(&vsi->back->pdev->dev,
3679 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3680 ring->queue_index, pf_q, err);
3681 return -ENOMEM;
3682 }
3683
3684 /* set the context in the HMC */
3685 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3686 if (err) {
3687 dev_info(&vsi->back->pdev->dev,
3688 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3689 ring->queue_index, pf_q, err);
3690 return -ENOMEM;
3691 }
3692
3693 /* configure Rx buffer alignment */
3694 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3695 if (I40E_2K_TOO_SMALL_WITH_PADDING) {
3696 dev_info(&vsi->back->pdev->dev,
3697 "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
3698 return -EOPNOTSUPP;
3699 }
3700 clear_ring_build_skb_enabled(ring);
3701 } else {
3702 set_ring_build_skb_enabled(ring);
3703 }
3704
3705 ring->rx_offset = i40e_rx_offset(ring);
3706
3707 /* cache tail for quicker writes, and clear the reg before use */
3708 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3709 writel(0, ring->tail);
3710
3711 if (ring->xsk_pool) {
3712 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3713 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3714 } else {
3715 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3716 }
3717 if (!ok) {
3718 /* Log this in case the user has forgotten to give the kernel
3719 * any buffers, even later in the application.
3720 */
3721 dev_info(&vsi->back->pdev->dev,
3722 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3723 ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3724 ring->queue_index, pf_q);
3725 }
3726
3727 return 0;
3728 }
3729
3730 /**
3731 * i40e_vsi_configure_tx - Configure the VSI for Tx
3732 * @vsi: VSI structure describing this set of rings and resources
3733 *
3734 * Configure the Tx VSI for operation.
3735 **/
i40e_vsi_configure_tx(struct i40e_vsi * vsi)3736 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3737 {
3738 int err = 0;
3739 u16 i;
3740
3741 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3742 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3743
3744 if (err || !i40e_enabled_xdp_vsi(vsi))
3745 return err;
3746
3747 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3748 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3749
3750 return err;
3751 }
3752
3753 /**
3754 * i40e_vsi_configure_rx - Configure the VSI for Rx
3755 * @vsi: the VSI being configured
3756 *
3757 * Configure the Rx VSI for operation.
3758 **/
i40e_vsi_configure_rx(struct i40e_vsi * vsi)3759 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3760 {
3761 int err = 0;
3762 u16 i;
3763
3764 vsi->max_frame = i40e_max_vsi_frame_size(vsi, vsi->xdp_prog);
3765 vsi->rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
3766
3767 #if (PAGE_SIZE < 8192)
3768 if (vsi->netdev && !I40E_2K_TOO_SMALL_WITH_PADDING &&
3769 vsi->netdev->mtu <= ETH_DATA_LEN) {
3770 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3771 vsi->max_frame = vsi->rx_buf_len;
3772 }
3773 #endif
3774
3775 /* set up individual rings */
3776 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3777 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3778
3779 return err;
3780 }
3781
3782 /**
3783 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3784 * @vsi: ptr to the VSI
3785 **/
i40e_vsi_config_dcb_rings(struct i40e_vsi * vsi)3786 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3787 {
3788 struct i40e_ring *tx_ring, *rx_ring;
3789 u16 qoffset, qcount;
3790 int i, n;
3791
3792 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3793 /* Reset the TC information */
3794 for (i = 0; i < vsi->num_queue_pairs; i++) {
3795 rx_ring = vsi->rx_rings[i];
3796 tx_ring = vsi->tx_rings[i];
3797 rx_ring->dcb_tc = 0;
3798 tx_ring->dcb_tc = 0;
3799 }
3800 return;
3801 }
3802
3803 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3804 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3805 continue;
3806
3807 qoffset = vsi->tc_config.tc_info[n].qoffset;
3808 qcount = vsi->tc_config.tc_info[n].qcount;
3809 for (i = qoffset; i < (qoffset + qcount); i++) {
3810 rx_ring = vsi->rx_rings[i];
3811 tx_ring = vsi->tx_rings[i];
3812 rx_ring->dcb_tc = n;
3813 tx_ring->dcb_tc = n;
3814 }
3815 }
3816 }
3817
3818 /**
3819 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3820 * @vsi: ptr to the VSI
3821 **/
i40e_set_vsi_rx_mode(struct i40e_vsi * vsi)3822 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3823 {
3824 if (vsi->netdev)
3825 i40e_set_rx_mode(vsi->netdev);
3826 }
3827
3828 /**
3829 * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3830 * @pf: Pointer to the targeted PF
3831 *
3832 * Set all flow director counters to 0.
3833 */
i40e_reset_fdir_filter_cnt(struct i40e_pf * pf)3834 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3835 {
3836 pf->fd_tcp4_filter_cnt = 0;
3837 pf->fd_udp4_filter_cnt = 0;
3838 pf->fd_sctp4_filter_cnt = 0;
3839 pf->fd_ip4_filter_cnt = 0;
3840 pf->fd_tcp6_filter_cnt = 0;
3841 pf->fd_udp6_filter_cnt = 0;
3842 pf->fd_sctp6_filter_cnt = 0;
3843 pf->fd_ip6_filter_cnt = 0;
3844 }
3845
3846 /**
3847 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3848 * @vsi: Pointer to the targeted VSI
3849 *
3850 * This function replays the hlist on the hw where all the SB Flow Director
3851 * filters were saved.
3852 **/
i40e_fdir_filter_restore(struct i40e_vsi * vsi)3853 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3854 {
3855 struct i40e_fdir_filter *filter;
3856 struct i40e_pf *pf = vsi->back;
3857 struct hlist_node *node;
3858
3859 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3860 return;
3861
3862 /* Reset FDir counters as we're replaying all existing filters */
3863 i40e_reset_fdir_filter_cnt(pf);
3864
3865 hlist_for_each_entry_safe(filter, node,
3866 &pf->fdir_filter_list, fdir_node) {
3867 i40e_add_del_fdir(vsi, filter, true);
3868 }
3869 }
3870
3871 /**
3872 * i40e_vsi_configure - Set up the VSI for action
3873 * @vsi: the VSI being configured
3874 **/
i40e_vsi_configure(struct i40e_vsi * vsi)3875 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3876 {
3877 int err;
3878
3879 i40e_set_vsi_rx_mode(vsi);
3880 i40e_restore_vlan(vsi);
3881 i40e_vsi_config_dcb_rings(vsi);
3882 err = i40e_vsi_configure_tx(vsi);
3883 if (!err)
3884 err = i40e_vsi_configure_rx(vsi);
3885
3886 return err;
3887 }
3888
3889 /**
3890 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3891 * @vsi: the VSI being configured
3892 **/
i40e_vsi_configure_msix(struct i40e_vsi * vsi)3893 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3894 {
3895 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3896 struct i40e_pf *pf = vsi->back;
3897 struct i40e_hw *hw = &pf->hw;
3898 u16 vector;
3899 int i, q;
3900 u32 qp;
3901
3902 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3903 * and PFINT_LNKLSTn registers, e.g.:
3904 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3905 */
3906 qp = vsi->base_queue;
3907 vector = vsi->base_vector;
3908 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3909 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3910
3911 q_vector->rx.next_update = jiffies + 1;
3912 q_vector->rx.target_itr =
3913 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3914 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3915 q_vector->rx.target_itr >> 1);
3916 q_vector->rx.current_itr = q_vector->rx.target_itr;
3917
3918 q_vector->tx.next_update = jiffies + 1;
3919 q_vector->tx.target_itr =
3920 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3921 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3922 q_vector->tx.target_itr >> 1);
3923 q_vector->tx.current_itr = q_vector->tx.target_itr;
3924
3925 /* Set ITR for software interrupts triggered after exiting
3926 * busy-loop polling.
3927 */
3928 wr32(hw, I40E_PFINT_ITRN(I40E_SW_ITR, vector - 1),
3929 I40E_ITR_20K);
3930
3931 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3932 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3933
3934 /* begin of linked list for RX queue assigned to this vector */
3935 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3936 for (q = 0; q < q_vector->num_ringpairs; q++) {
3937 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3938 u32 val;
3939
3940 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3941 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3942 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3943 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3944 (I40E_QUEUE_TYPE_TX <<
3945 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3946
3947 wr32(hw, I40E_QINT_RQCTL(qp), val);
3948
3949 if (has_xdp) {
3950 /* TX queue with next queue set to TX */
3951 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3952 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3953 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3954 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3955 (I40E_QUEUE_TYPE_TX <<
3956 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3957
3958 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3959 }
3960 /* TX queue with next RX or end of linked list */
3961 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3962 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3963 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3964 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3965 (I40E_QUEUE_TYPE_RX <<
3966 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3967
3968 /* Terminate the linked list */
3969 if (q == (q_vector->num_ringpairs - 1))
3970 val |= (I40E_QUEUE_END_OF_LIST <<
3971 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3972
3973 wr32(hw, I40E_QINT_TQCTL(qp), val);
3974 qp++;
3975 }
3976 }
3977
3978 i40e_flush(hw);
3979 }
3980
3981 /**
3982 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3983 * @pf: pointer to private device data structure
3984 **/
i40e_enable_misc_int_causes(struct i40e_pf * pf)3985 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3986 {
3987 struct i40e_hw *hw = &pf->hw;
3988 u32 val;
3989
3990 /* clear things first */
3991 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3992 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3993
3994 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3995 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3996 I40E_PFINT_ICR0_ENA_GRST_MASK |
3997 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3998 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3999 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
4000 I40E_PFINT_ICR0_ENA_VFLR_MASK |
4001 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4002
4003 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
4004 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4005
4006 if (pf->flags & I40E_FLAG_PTP)
4007 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4008
4009 wr32(hw, I40E_PFINT_ICR0_ENA, val);
4010
4011 /* SW_ITR_IDX = 0, but don't change INTENA */
4012 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
4013 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
4014
4015 /* OTHER_ITR_IDX = 0 */
4016 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
4017 }
4018
4019 /**
4020 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
4021 * @vsi: the VSI being configured
4022 **/
i40e_configure_msi_and_legacy(struct i40e_vsi * vsi)4023 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
4024 {
4025 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
4026 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4027 struct i40e_pf *pf = vsi->back;
4028 struct i40e_hw *hw = &pf->hw;
4029
4030 /* set the ITR configuration */
4031 q_vector->rx.next_update = jiffies + 1;
4032 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
4033 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
4034 q_vector->rx.current_itr = q_vector->rx.target_itr;
4035 q_vector->tx.next_update = jiffies + 1;
4036 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
4037 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
4038 q_vector->tx.current_itr = q_vector->tx.target_itr;
4039
4040 i40e_enable_misc_int_causes(pf);
4041
4042 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
4043 wr32(hw, I40E_PFINT_LNKLST0, 0);
4044
4045 /* Associate the queue pair to the vector and enable the queue
4046 * interrupt RX queue in linked list with next queue set to TX
4047 */
4048 wr32(hw, I40E_QINT_RQCTL(0), I40E_QINT_RQCTL_VAL(nextqp, 0, TX));
4049
4050 if (i40e_enabled_xdp_vsi(vsi)) {
4051 /* TX queue in linked list with next queue set to TX */
4052 wr32(hw, I40E_QINT_TQCTL(nextqp),
4053 I40E_QINT_TQCTL_VAL(nextqp, 0, TX));
4054 }
4055
4056 /* last TX queue so the next RX queue doesn't matter */
4057 wr32(hw, I40E_QINT_TQCTL(0),
4058 I40E_QINT_TQCTL_VAL(I40E_QUEUE_END_OF_LIST, 0, RX));
4059 i40e_flush(hw);
4060 }
4061
4062 /**
4063 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
4064 * @pf: board private structure
4065 **/
i40e_irq_dynamic_disable_icr0(struct i40e_pf * pf)4066 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
4067 {
4068 struct i40e_hw *hw = &pf->hw;
4069
4070 wr32(hw, I40E_PFINT_DYN_CTL0,
4071 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
4072 i40e_flush(hw);
4073 }
4074
4075 /**
4076 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
4077 * @pf: board private structure
4078 **/
i40e_irq_dynamic_enable_icr0(struct i40e_pf * pf)4079 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
4080 {
4081 struct i40e_hw *hw = &pf->hw;
4082 u32 val;
4083
4084 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
4085 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
4086 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
4087
4088 wr32(hw, I40E_PFINT_DYN_CTL0, val);
4089 i40e_flush(hw);
4090 }
4091
4092 /**
4093 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
4094 * @irq: interrupt number
4095 * @data: pointer to a q_vector
4096 **/
i40e_msix_clean_rings(int irq,void * data)4097 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
4098 {
4099 struct i40e_q_vector *q_vector = data;
4100
4101 if (!q_vector->tx.ring && !q_vector->rx.ring)
4102 return IRQ_HANDLED;
4103
4104 napi_schedule_irqoff(&q_vector->napi);
4105
4106 return IRQ_HANDLED;
4107 }
4108
4109 /**
4110 * i40e_irq_affinity_notify - Callback for affinity changes
4111 * @notify: context as to what irq was changed
4112 * @mask: the new affinity mask
4113 *
4114 * This is a callback function used by the irq_set_affinity_notifier function
4115 * so that we may register to receive changes to the irq affinity masks.
4116 **/
i40e_irq_affinity_notify(struct irq_affinity_notify * notify,const cpumask_t * mask)4117 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
4118 const cpumask_t *mask)
4119 {
4120 struct i40e_q_vector *q_vector =
4121 container_of(notify, struct i40e_q_vector, affinity_notify);
4122
4123 cpumask_copy(&q_vector->affinity_mask, mask);
4124 }
4125
4126 /**
4127 * i40e_irq_affinity_release - Callback for affinity notifier release
4128 * @ref: internal core kernel usage
4129 *
4130 * This is a callback function used by the irq_set_affinity_notifier function
4131 * to inform the current notification subscriber that they will no longer
4132 * receive notifications.
4133 **/
i40e_irq_affinity_release(struct kref * ref)4134 static void i40e_irq_affinity_release(struct kref *ref) {}
4135
4136 /**
4137 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
4138 * @vsi: the VSI being configured
4139 * @basename: name for the vector
4140 *
4141 * Allocates MSI-X vectors and requests interrupts from the kernel.
4142 **/
i40e_vsi_request_irq_msix(struct i40e_vsi * vsi,char * basename)4143 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
4144 {
4145 int q_vectors = vsi->num_q_vectors;
4146 struct i40e_pf *pf = vsi->back;
4147 int base = vsi->base_vector;
4148 int rx_int_idx = 0;
4149 int tx_int_idx = 0;
4150 int vector, err;
4151 int irq_num;
4152 int cpu;
4153
4154 for (vector = 0; vector < q_vectors; vector++) {
4155 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
4156
4157 irq_num = pf->msix_entries[base + vector].vector;
4158
4159 if (q_vector->tx.ring && q_vector->rx.ring) {
4160 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4161 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
4162 tx_int_idx++;
4163 } else if (q_vector->rx.ring) {
4164 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4165 "%s-%s-%d", basename, "rx", rx_int_idx++);
4166 } else if (q_vector->tx.ring) {
4167 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4168 "%s-%s-%d", basename, "tx", tx_int_idx++);
4169 } else {
4170 /* skip this unused q_vector */
4171 continue;
4172 }
4173 err = request_irq(irq_num,
4174 vsi->irq_handler,
4175 0,
4176 q_vector->name,
4177 q_vector);
4178 if (err) {
4179 dev_info(&pf->pdev->dev,
4180 "MSIX request_irq failed, error: %d\n", err);
4181 goto free_queue_irqs;
4182 }
4183
4184 /* register for affinity change notifications */
4185 q_vector->irq_num = irq_num;
4186 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
4187 q_vector->affinity_notify.release = i40e_irq_affinity_release;
4188 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
4189 /* Spread affinity hints out across online CPUs.
4190 *
4191 * get_cpu_mask returns a static constant mask with
4192 * a permanent lifetime so it's ok to pass to
4193 * irq_update_affinity_hint without making a copy.
4194 */
4195 cpu = cpumask_local_spread(q_vector->v_idx, -1);
4196 irq_update_affinity_hint(irq_num, get_cpu_mask(cpu));
4197 }
4198
4199 vsi->irqs_ready = true;
4200 return 0;
4201
4202 free_queue_irqs:
4203 while (vector) {
4204 vector--;
4205 irq_num = pf->msix_entries[base + vector].vector;
4206 irq_set_affinity_notifier(irq_num, NULL);
4207 irq_update_affinity_hint(irq_num, NULL);
4208 free_irq(irq_num, &vsi->q_vectors[vector]);
4209 }
4210 return err;
4211 }
4212
4213 /**
4214 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
4215 * @vsi: the VSI being un-configured
4216 **/
i40e_vsi_disable_irq(struct i40e_vsi * vsi)4217 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
4218 {
4219 struct i40e_pf *pf = vsi->back;
4220 struct i40e_hw *hw = &pf->hw;
4221 int base = vsi->base_vector;
4222 int i;
4223
4224 /* disable interrupt causation from each queue */
4225 for (i = 0; i < vsi->num_queue_pairs; i++) {
4226 u32 val;
4227
4228 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
4229 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
4230 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
4231
4232 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
4233 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
4234 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
4235
4236 if (!i40e_enabled_xdp_vsi(vsi))
4237 continue;
4238 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
4239 }
4240
4241 /* disable each interrupt */
4242 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4243 for (i = vsi->base_vector;
4244 i < (vsi->num_q_vectors + vsi->base_vector); i++)
4245 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
4246
4247 i40e_flush(hw);
4248 for (i = 0; i < vsi->num_q_vectors; i++)
4249 synchronize_irq(pf->msix_entries[i + base].vector);
4250 } else {
4251 /* Legacy and MSI mode - this stops all interrupt handling */
4252 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
4253 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
4254 i40e_flush(hw);
4255 synchronize_irq(pf->pdev->irq);
4256 }
4257 }
4258
4259 /**
4260 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
4261 * @vsi: the VSI being configured
4262 **/
i40e_vsi_enable_irq(struct i40e_vsi * vsi)4263 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
4264 {
4265 struct i40e_pf *pf = vsi->back;
4266 int i;
4267
4268 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4269 for (i = 0; i < vsi->num_q_vectors; i++)
4270 i40e_irq_dynamic_enable(vsi, i);
4271 } else {
4272 i40e_irq_dynamic_enable_icr0(pf);
4273 }
4274
4275 i40e_flush(&pf->hw);
4276 return 0;
4277 }
4278
4279 /**
4280 * i40e_free_misc_vector - Free the vector that handles non-queue events
4281 * @pf: board private structure
4282 **/
i40e_free_misc_vector(struct i40e_pf * pf)4283 static void i40e_free_misc_vector(struct i40e_pf *pf)
4284 {
4285 /* Disable ICR 0 */
4286 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4287 i40e_flush(&pf->hw);
4288
4289 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4290 free_irq(pf->msix_entries[0].vector, pf);
4291 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
4292 }
4293 }
4294
4295 /**
4296 * i40e_intr - MSI/Legacy and non-queue interrupt handler
4297 * @irq: interrupt number
4298 * @data: pointer to a q_vector
4299 *
4300 * This is the handler used for all MSI/Legacy interrupts, and deals
4301 * with both queue and non-queue interrupts. This is also used in
4302 * MSIX mode to handle the non-queue interrupts.
4303 **/
i40e_intr(int irq,void * data)4304 static irqreturn_t i40e_intr(int irq, void *data)
4305 {
4306 struct i40e_pf *pf = (struct i40e_pf *)data;
4307 struct i40e_hw *hw = &pf->hw;
4308 irqreturn_t ret = IRQ_NONE;
4309 u32 icr0, icr0_remaining;
4310 u32 val, ena_mask;
4311
4312 icr0 = rd32(hw, I40E_PFINT_ICR0);
4313 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
4314
4315 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4316 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4317 goto enable_intr;
4318
4319 /* if interrupt but no bits showing, must be SWINT */
4320 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4321 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4322 pf->sw_int_count++;
4323
4324 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4325 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4326 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4327 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4328 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4329 }
4330
4331 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4332 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4333 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4334 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4335
4336 /* We do not have a way to disarm Queue causes while leaving
4337 * interrupt enabled for all other causes, ideally
4338 * interrupt should be disabled while we are in NAPI but
4339 * this is not a performance path and napi_schedule()
4340 * can deal with rescheduling.
4341 */
4342 if (!test_bit(__I40E_DOWN, pf->state))
4343 napi_schedule_irqoff(&q_vector->napi);
4344 }
4345
4346 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4347 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4348 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4349 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4350 }
4351
4352 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4353 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4354 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4355 }
4356
4357 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4358 /* disable any further VFLR event notifications */
4359 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4360 u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4361
4362 reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4363 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4364 } else {
4365 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4366 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4367 }
4368 }
4369
4370 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4371 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4372 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4373 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4374 val = rd32(hw, I40E_GLGEN_RSTAT);
4375 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4376 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4377 if (val == I40E_RESET_CORER) {
4378 pf->corer_count++;
4379 } else if (val == I40E_RESET_GLOBR) {
4380 pf->globr_count++;
4381 } else if (val == I40E_RESET_EMPR) {
4382 pf->empr_count++;
4383 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4384 }
4385 }
4386
4387 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4388 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4389 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4390 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4391 rd32(hw, I40E_PFHMC_ERRORINFO),
4392 rd32(hw, I40E_PFHMC_ERRORDATA));
4393 }
4394
4395 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4396 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4397
4398 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4399 schedule_work(&pf->ptp_extts0_work);
4400
4401 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4402 i40e_ptp_tx_hwtstamp(pf);
4403
4404 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4405 }
4406
4407 /* If a critical error is pending we have no choice but to reset the
4408 * device.
4409 * Report and mask out any remaining unexpected interrupts.
4410 */
4411 icr0_remaining = icr0 & ena_mask;
4412 if (icr0_remaining) {
4413 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4414 icr0_remaining);
4415 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4416 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4417 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4418 dev_info(&pf->pdev->dev, "device will be reset\n");
4419 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4420 i40e_service_event_schedule(pf);
4421 }
4422 ena_mask &= ~icr0_remaining;
4423 }
4424 ret = IRQ_HANDLED;
4425
4426 enable_intr:
4427 /* re-enable interrupt causes */
4428 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4429 if (!test_bit(__I40E_DOWN, pf->state) ||
4430 test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4431 i40e_service_event_schedule(pf);
4432 i40e_irq_dynamic_enable_icr0(pf);
4433 }
4434
4435 return ret;
4436 }
4437
4438 /**
4439 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4440 * @tx_ring: tx ring to clean
4441 * @budget: how many cleans we're allowed
4442 *
4443 * Returns true if there's any budget left (e.g. the clean is finished)
4444 **/
i40e_clean_fdir_tx_irq(struct i40e_ring * tx_ring,int budget)4445 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4446 {
4447 struct i40e_vsi *vsi = tx_ring->vsi;
4448 u16 i = tx_ring->next_to_clean;
4449 struct i40e_tx_buffer *tx_buf;
4450 struct i40e_tx_desc *tx_desc;
4451
4452 tx_buf = &tx_ring->tx_bi[i];
4453 tx_desc = I40E_TX_DESC(tx_ring, i);
4454 i -= tx_ring->count;
4455
4456 do {
4457 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4458
4459 /* if next_to_watch is not set then there is no work pending */
4460 if (!eop_desc)
4461 break;
4462
4463 /* prevent any other reads prior to eop_desc */
4464 smp_rmb();
4465
4466 /* if the descriptor isn't done, no work yet to do */
4467 if (!(eop_desc->cmd_type_offset_bsz &
4468 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4469 break;
4470
4471 /* clear next_to_watch to prevent false hangs */
4472 tx_buf->next_to_watch = NULL;
4473
4474 tx_desc->buffer_addr = 0;
4475 tx_desc->cmd_type_offset_bsz = 0;
4476 /* move past filter desc */
4477 tx_buf++;
4478 tx_desc++;
4479 i++;
4480 if (unlikely(!i)) {
4481 i -= tx_ring->count;
4482 tx_buf = tx_ring->tx_bi;
4483 tx_desc = I40E_TX_DESC(tx_ring, 0);
4484 }
4485 /* unmap skb header data */
4486 dma_unmap_single(tx_ring->dev,
4487 dma_unmap_addr(tx_buf, dma),
4488 dma_unmap_len(tx_buf, len),
4489 DMA_TO_DEVICE);
4490 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4491 kfree(tx_buf->raw_buf);
4492
4493 tx_buf->raw_buf = NULL;
4494 tx_buf->tx_flags = 0;
4495 tx_buf->next_to_watch = NULL;
4496 dma_unmap_len_set(tx_buf, len, 0);
4497 tx_desc->buffer_addr = 0;
4498 tx_desc->cmd_type_offset_bsz = 0;
4499
4500 /* move us past the eop_desc for start of next FD desc */
4501 tx_buf++;
4502 tx_desc++;
4503 i++;
4504 if (unlikely(!i)) {
4505 i -= tx_ring->count;
4506 tx_buf = tx_ring->tx_bi;
4507 tx_desc = I40E_TX_DESC(tx_ring, 0);
4508 }
4509
4510 /* update budget accounting */
4511 budget--;
4512 } while (likely(budget));
4513
4514 i += tx_ring->count;
4515 tx_ring->next_to_clean = i;
4516
4517 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4518 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4519
4520 return budget > 0;
4521 }
4522
4523 /**
4524 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4525 * @irq: interrupt number
4526 * @data: pointer to a q_vector
4527 **/
i40e_fdir_clean_ring(int irq,void * data)4528 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4529 {
4530 struct i40e_q_vector *q_vector = data;
4531 struct i40e_vsi *vsi;
4532
4533 if (!q_vector->tx.ring)
4534 return IRQ_HANDLED;
4535
4536 vsi = q_vector->tx.ring->vsi;
4537 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4538
4539 return IRQ_HANDLED;
4540 }
4541
4542 /**
4543 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4544 * @vsi: the VSI being configured
4545 * @v_idx: vector index
4546 * @qp_idx: queue pair index
4547 **/
i40e_map_vector_to_qp(struct i40e_vsi * vsi,int v_idx,int qp_idx)4548 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4549 {
4550 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4551 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4552 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4553
4554 tx_ring->q_vector = q_vector;
4555 tx_ring->next = q_vector->tx.ring;
4556 q_vector->tx.ring = tx_ring;
4557 q_vector->tx.count++;
4558
4559 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4560 if (i40e_enabled_xdp_vsi(vsi)) {
4561 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4562
4563 xdp_ring->q_vector = q_vector;
4564 xdp_ring->next = q_vector->tx.ring;
4565 q_vector->tx.ring = xdp_ring;
4566 q_vector->tx.count++;
4567 }
4568
4569 rx_ring->q_vector = q_vector;
4570 rx_ring->next = q_vector->rx.ring;
4571 q_vector->rx.ring = rx_ring;
4572 q_vector->rx.count++;
4573 }
4574
4575 /**
4576 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4577 * @vsi: the VSI being configured
4578 *
4579 * This function maps descriptor rings to the queue-specific vectors
4580 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4581 * one vector per queue pair, but on a constrained vector budget, we
4582 * group the queue pairs as "efficiently" as possible.
4583 **/
i40e_vsi_map_rings_to_vectors(struct i40e_vsi * vsi)4584 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4585 {
4586 int qp_remaining = vsi->num_queue_pairs;
4587 int q_vectors = vsi->num_q_vectors;
4588 int num_ringpairs;
4589 int v_start = 0;
4590 int qp_idx = 0;
4591
4592 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4593 * group them so there are multiple queues per vector.
4594 * It is also important to go through all the vectors available to be
4595 * sure that if we don't use all the vectors, that the remaining vectors
4596 * are cleared. This is especially important when decreasing the
4597 * number of queues in use.
4598 */
4599 for (; v_start < q_vectors; v_start++) {
4600 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4601
4602 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4603
4604 q_vector->num_ringpairs = num_ringpairs;
4605 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4606
4607 q_vector->rx.count = 0;
4608 q_vector->tx.count = 0;
4609 q_vector->rx.ring = NULL;
4610 q_vector->tx.ring = NULL;
4611
4612 while (num_ringpairs--) {
4613 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4614 qp_idx++;
4615 qp_remaining--;
4616 }
4617 }
4618 }
4619
4620 /**
4621 * i40e_vsi_request_irq - Request IRQ from the OS
4622 * @vsi: the VSI being configured
4623 * @basename: name for the vector
4624 **/
i40e_vsi_request_irq(struct i40e_vsi * vsi,char * basename)4625 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4626 {
4627 struct i40e_pf *pf = vsi->back;
4628 int err;
4629
4630 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4631 err = i40e_vsi_request_irq_msix(vsi, basename);
4632 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4633 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4634 pf->int_name, pf);
4635 else
4636 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4637 pf->int_name, pf);
4638
4639 if (err)
4640 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4641
4642 return err;
4643 }
4644
4645 #ifdef CONFIG_NET_POLL_CONTROLLER
4646 /**
4647 * i40e_netpoll - A Polling 'interrupt' handler
4648 * @netdev: network interface device structure
4649 *
4650 * This is used by netconsole to send skbs without having to re-enable
4651 * interrupts. It's not called while the normal interrupt routine is executing.
4652 **/
i40e_netpoll(struct net_device * netdev)4653 static void i40e_netpoll(struct net_device *netdev)
4654 {
4655 struct i40e_netdev_priv *np = netdev_priv(netdev);
4656 struct i40e_vsi *vsi = np->vsi;
4657 struct i40e_pf *pf = vsi->back;
4658 int i;
4659
4660 /* if interface is down do nothing */
4661 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4662 return;
4663
4664 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4665 for (i = 0; i < vsi->num_q_vectors; i++)
4666 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4667 } else {
4668 i40e_intr(pf->pdev->irq, netdev);
4669 }
4670 }
4671 #endif
4672
4673 #define I40E_QTX_ENA_WAIT_COUNT 50
4674
4675 /**
4676 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4677 * @pf: the PF being configured
4678 * @pf_q: the PF queue
4679 * @enable: enable or disable state of the queue
4680 *
4681 * This routine will wait for the given Tx queue of the PF to reach the
4682 * enabled or disabled state.
4683 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4684 * multiple retries; else will return 0 in case of success.
4685 **/
i40e_pf_txq_wait(struct i40e_pf * pf,int pf_q,bool enable)4686 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4687 {
4688 int i;
4689 u32 tx_reg;
4690
4691 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4692 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4693 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4694 break;
4695
4696 usleep_range(10, 20);
4697 }
4698 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4699 return -ETIMEDOUT;
4700
4701 return 0;
4702 }
4703
4704 /**
4705 * i40e_control_tx_q - Start or stop a particular Tx queue
4706 * @pf: the PF structure
4707 * @pf_q: the PF queue to configure
4708 * @enable: start or stop the queue
4709 *
4710 * This function enables or disables a single queue. Note that any delay
4711 * required after the operation is expected to be handled by the caller of
4712 * this function.
4713 **/
i40e_control_tx_q(struct i40e_pf * pf,int pf_q,bool enable)4714 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4715 {
4716 struct i40e_hw *hw = &pf->hw;
4717 u32 tx_reg;
4718 int i;
4719
4720 /* warn the TX unit of coming changes */
4721 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4722 if (!enable)
4723 usleep_range(10, 20);
4724
4725 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4726 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4727 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4728 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4729 break;
4730 usleep_range(1000, 2000);
4731 }
4732
4733 /* Skip if the queue is already in the requested state */
4734 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4735 return;
4736
4737 /* turn on/off the queue */
4738 if (enable) {
4739 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4740 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4741 } else {
4742 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4743 }
4744
4745 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4746 }
4747
4748 /**
4749 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4750 * @seid: VSI SEID
4751 * @pf: the PF structure
4752 * @pf_q: the PF queue to configure
4753 * @is_xdp: true if the queue is used for XDP
4754 * @enable: start or stop the queue
4755 **/
i40e_control_wait_tx_q(int seid,struct i40e_pf * pf,int pf_q,bool is_xdp,bool enable)4756 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4757 bool is_xdp, bool enable)
4758 {
4759 int ret;
4760
4761 i40e_control_tx_q(pf, pf_q, enable);
4762
4763 /* wait for the change to finish */
4764 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4765 if (ret) {
4766 dev_info(&pf->pdev->dev,
4767 "VSI seid %d %sTx ring %d %sable timeout\n",
4768 seid, (is_xdp ? "XDP " : ""), pf_q,
4769 (enable ? "en" : "dis"));
4770 }
4771
4772 return ret;
4773 }
4774
4775 /**
4776 * i40e_vsi_enable_tx - Start a VSI's rings
4777 * @vsi: the VSI being configured
4778 **/
i40e_vsi_enable_tx(struct i40e_vsi * vsi)4779 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4780 {
4781 struct i40e_pf *pf = vsi->back;
4782 int i, pf_q, ret = 0;
4783
4784 pf_q = vsi->base_queue;
4785 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4786 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4787 pf_q,
4788 false /*is xdp*/, true);
4789 if (ret)
4790 break;
4791
4792 if (!i40e_enabled_xdp_vsi(vsi))
4793 continue;
4794
4795 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4796 pf_q + vsi->alloc_queue_pairs,
4797 true /*is xdp*/, true);
4798 if (ret)
4799 break;
4800 }
4801 return ret;
4802 }
4803
4804 /**
4805 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4806 * @pf: the PF being configured
4807 * @pf_q: the PF queue
4808 * @enable: enable or disable state of the queue
4809 *
4810 * This routine will wait for the given Rx queue of the PF to reach the
4811 * enabled or disabled state.
4812 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4813 * multiple retries; else will return 0 in case of success.
4814 **/
i40e_pf_rxq_wait(struct i40e_pf * pf,int pf_q,bool enable)4815 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4816 {
4817 int i;
4818 u32 rx_reg;
4819
4820 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4821 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4822 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4823 break;
4824
4825 usleep_range(10, 20);
4826 }
4827 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4828 return -ETIMEDOUT;
4829
4830 return 0;
4831 }
4832
4833 /**
4834 * i40e_control_rx_q - Start or stop a particular Rx queue
4835 * @pf: the PF structure
4836 * @pf_q: the PF queue to configure
4837 * @enable: start or stop the queue
4838 *
4839 * This function enables or disables a single queue. Note that
4840 * any delay required after the operation is expected to be
4841 * handled by the caller of this function.
4842 **/
i40e_control_rx_q(struct i40e_pf * pf,int pf_q,bool enable)4843 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4844 {
4845 struct i40e_hw *hw = &pf->hw;
4846 u32 rx_reg;
4847 int i;
4848
4849 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4850 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4851 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4852 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4853 break;
4854 usleep_range(1000, 2000);
4855 }
4856
4857 /* Skip if the queue is already in the requested state */
4858 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4859 return;
4860
4861 /* turn on/off the queue */
4862 if (enable)
4863 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4864 else
4865 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4866
4867 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4868 }
4869
4870 /**
4871 * i40e_control_wait_rx_q
4872 * @pf: the PF structure
4873 * @pf_q: queue being configured
4874 * @enable: start or stop the rings
4875 *
4876 * This function enables or disables a single queue along with waiting
4877 * for the change to finish. The caller of this function should handle
4878 * the delays needed in the case of disabling queues.
4879 **/
i40e_control_wait_rx_q(struct i40e_pf * pf,int pf_q,bool enable)4880 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4881 {
4882 int ret = 0;
4883
4884 i40e_control_rx_q(pf, pf_q, enable);
4885
4886 /* wait for the change to finish */
4887 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4888 if (ret)
4889 return ret;
4890
4891 return ret;
4892 }
4893
4894 /**
4895 * i40e_vsi_enable_rx - Start a VSI's rings
4896 * @vsi: the VSI being configured
4897 **/
i40e_vsi_enable_rx(struct i40e_vsi * vsi)4898 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4899 {
4900 struct i40e_pf *pf = vsi->back;
4901 int i, pf_q, ret = 0;
4902
4903 pf_q = vsi->base_queue;
4904 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4905 ret = i40e_control_wait_rx_q(pf, pf_q, true);
4906 if (ret) {
4907 dev_info(&pf->pdev->dev,
4908 "VSI seid %d Rx ring %d enable timeout\n",
4909 vsi->seid, pf_q);
4910 break;
4911 }
4912 }
4913
4914 return ret;
4915 }
4916
4917 /**
4918 * i40e_vsi_start_rings - Start a VSI's rings
4919 * @vsi: the VSI being configured
4920 **/
i40e_vsi_start_rings(struct i40e_vsi * vsi)4921 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4922 {
4923 int ret = 0;
4924
4925 /* do rx first for enable and last for disable */
4926 ret = i40e_vsi_enable_rx(vsi);
4927 if (ret)
4928 return ret;
4929 ret = i40e_vsi_enable_tx(vsi);
4930
4931 return ret;
4932 }
4933
4934 #define I40E_DISABLE_TX_GAP_MSEC 50
4935
4936 /**
4937 * i40e_vsi_stop_rings - Stop a VSI's rings
4938 * @vsi: the VSI being configured
4939 **/
i40e_vsi_stop_rings(struct i40e_vsi * vsi)4940 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4941 {
4942 struct i40e_pf *pf = vsi->back;
4943 int pf_q, err, q_end;
4944
4945 /* When port TX is suspended, don't wait */
4946 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4947 return i40e_vsi_stop_rings_no_wait(vsi);
4948
4949 q_end = vsi->base_queue + vsi->num_queue_pairs;
4950 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4951 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false);
4952
4953 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) {
4954 err = i40e_control_wait_rx_q(pf, pf_q, false);
4955 if (err)
4956 dev_info(&pf->pdev->dev,
4957 "VSI seid %d Rx ring %d disable timeout\n",
4958 vsi->seid, pf_q);
4959 }
4960
4961 msleep(I40E_DISABLE_TX_GAP_MSEC);
4962 pf_q = vsi->base_queue;
4963 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4964 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4965
4966 i40e_vsi_wait_queues_disabled(vsi);
4967 }
4968
4969 /**
4970 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4971 * @vsi: the VSI being shutdown
4972 *
4973 * This function stops all the rings for a VSI but does not delay to verify
4974 * that rings have been disabled. It is expected that the caller is shutting
4975 * down multiple VSIs at once and will delay together for all the VSIs after
4976 * initiating the shutdown. This is particularly useful for shutting down lots
4977 * of VFs together. Otherwise, a large delay can be incurred while configuring
4978 * each VSI in serial.
4979 **/
i40e_vsi_stop_rings_no_wait(struct i40e_vsi * vsi)4980 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4981 {
4982 struct i40e_pf *pf = vsi->back;
4983 int i, pf_q;
4984
4985 pf_q = vsi->base_queue;
4986 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4987 i40e_control_tx_q(pf, pf_q, false);
4988 i40e_control_rx_q(pf, pf_q, false);
4989 }
4990 }
4991
4992 /**
4993 * i40e_vsi_free_irq - Free the irq association with the OS
4994 * @vsi: the VSI being configured
4995 **/
i40e_vsi_free_irq(struct i40e_vsi * vsi)4996 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4997 {
4998 struct i40e_pf *pf = vsi->back;
4999 struct i40e_hw *hw = &pf->hw;
5000 int base = vsi->base_vector;
5001 u32 val, qp;
5002 int i;
5003
5004 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
5005 if (!vsi->q_vectors)
5006 return;
5007
5008 if (!vsi->irqs_ready)
5009 return;
5010
5011 vsi->irqs_ready = false;
5012 for (i = 0; i < vsi->num_q_vectors; i++) {
5013 int irq_num;
5014 u16 vector;
5015
5016 vector = i + base;
5017 irq_num = pf->msix_entries[vector].vector;
5018
5019 /* free only the irqs that were actually requested */
5020 if (!vsi->q_vectors[i] ||
5021 !vsi->q_vectors[i]->num_ringpairs)
5022 continue;
5023
5024 /* clear the affinity notifier in the IRQ descriptor */
5025 irq_set_affinity_notifier(irq_num, NULL);
5026 /* remove our suggested affinity mask for this IRQ */
5027 irq_update_affinity_hint(irq_num, NULL);
5028 free_irq(irq_num, vsi->q_vectors[i]);
5029
5030 /* Tear down the interrupt queue link list
5031 *
5032 * We know that they come in pairs and always
5033 * the Rx first, then the Tx. To clear the
5034 * link list, stick the EOL value into the
5035 * next_q field of the registers.
5036 */
5037 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
5038 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
5039 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5040 val |= I40E_QUEUE_END_OF_LIST
5041 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5042 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
5043
5044 while (qp != I40E_QUEUE_END_OF_LIST) {
5045 u32 next;
5046
5047 val = rd32(hw, I40E_QINT_RQCTL(qp));
5048
5049 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
5050 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5051 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
5052 I40E_QINT_RQCTL_INTEVENT_MASK);
5053
5054 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5055 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5056
5057 wr32(hw, I40E_QINT_RQCTL(qp), val);
5058
5059 val = rd32(hw, I40E_QINT_TQCTL(qp));
5060
5061 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
5062 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
5063
5064 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
5065 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5066 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
5067 I40E_QINT_TQCTL_INTEVENT_MASK);
5068
5069 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5070 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5071
5072 wr32(hw, I40E_QINT_TQCTL(qp), val);
5073 qp = next;
5074 }
5075 }
5076 } else {
5077 free_irq(pf->pdev->irq, pf);
5078
5079 val = rd32(hw, I40E_PFINT_LNKLST0);
5080 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
5081 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5082 val |= I40E_QUEUE_END_OF_LIST
5083 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
5084 wr32(hw, I40E_PFINT_LNKLST0, val);
5085
5086 val = rd32(hw, I40E_QINT_RQCTL(qp));
5087 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
5088 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5089 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
5090 I40E_QINT_RQCTL_INTEVENT_MASK);
5091
5092 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5093 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5094
5095 wr32(hw, I40E_QINT_RQCTL(qp), val);
5096
5097 val = rd32(hw, I40E_QINT_TQCTL(qp));
5098
5099 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
5100 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5101 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
5102 I40E_QINT_TQCTL_INTEVENT_MASK);
5103
5104 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5105 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5106
5107 wr32(hw, I40E_QINT_TQCTL(qp), val);
5108 }
5109 }
5110
5111 /**
5112 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
5113 * @vsi: the VSI being configured
5114 * @v_idx: Index of vector to be freed
5115 *
5116 * This function frees the memory allocated to the q_vector. In addition if
5117 * NAPI is enabled it will delete any references to the NAPI struct prior
5118 * to freeing the q_vector.
5119 **/
i40e_free_q_vector(struct i40e_vsi * vsi,int v_idx)5120 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
5121 {
5122 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
5123 struct i40e_ring *ring;
5124
5125 if (!q_vector)
5126 return;
5127
5128 /* disassociate q_vector from rings */
5129 i40e_for_each_ring(ring, q_vector->tx)
5130 ring->q_vector = NULL;
5131
5132 i40e_for_each_ring(ring, q_vector->rx)
5133 ring->q_vector = NULL;
5134
5135 /* only VSI w/ an associated netdev is set up w/ NAPI */
5136 if (vsi->netdev)
5137 netif_napi_del(&q_vector->napi);
5138
5139 vsi->q_vectors[v_idx] = NULL;
5140
5141 kfree_rcu(q_vector, rcu);
5142 }
5143
5144 /**
5145 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
5146 * @vsi: the VSI being un-configured
5147 *
5148 * This frees the memory allocated to the q_vectors and
5149 * deletes references to the NAPI struct.
5150 **/
i40e_vsi_free_q_vectors(struct i40e_vsi * vsi)5151 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
5152 {
5153 int v_idx;
5154
5155 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
5156 i40e_free_q_vector(vsi, v_idx);
5157 }
5158
5159 /**
5160 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
5161 * @pf: board private structure
5162 **/
i40e_reset_interrupt_capability(struct i40e_pf * pf)5163 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
5164 {
5165 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
5166 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
5167 pci_disable_msix(pf->pdev);
5168 kfree(pf->msix_entries);
5169 pf->msix_entries = NULL;
5170 kfree(pf->irq_pile);
5171 pf->irq_pile = NULL;
5172 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
5173 pci_disable_msi(pf->pdev);
5174 }
5175 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
5176 }
5177
5178 /**
5179 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
5180 * @pf: board private structure
5181 *
5182 * We go through and clear interrupt specific resources and reset the structure
5183 * to pre-load conditions
5184 **/
i40e_clear_interrupt_scheme(struct i40e_pf * pf)5185 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5186 {
5187 int i;
5188
5189 if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5190 i40e_free_misc_vector(pf);
5191
5192 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
5193 I40E_IWARP_IRQ_PILE_ID);
5194
5195 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
5196 for (i = 0; i < pf->num_alloc_vsi; i++)
5197 if (pf->vsi[i])
5198 i40e_vsi_free_q_vectors(pf->vsi[i]);
5199 i40e_reset_interrupt_capability(pf);
5200 }
5201
5202 /**
5203 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
5204 * @vsi: the VSI being configured
5205 **/
i40e_napi_enable_all(struct i40e_vsi * vsi)5206 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
5207 {
5208 int q_idx;
5209
5210 if (!vsi->netdev)
5211 return;
5212
5213 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5214 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5215
5216 if (q_vector->rx.ring || q_vector->tx.ring)
5217 napi_enable(&q_vector->napi);
5218 }
5219 }
5220
5221 /**
5222 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
5223 * @vsi: the VSI being configured
5224 **/
i40e_napi_disable_all(struct i40e_vsi * vsi)5225 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
5226 {
5227 int q_idx;
5228
5229 if (!vsi->netdev)
5230 return;
5231
5232 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5233 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5234
5235 if (q_vector->rx.ring || q_vector->tx.ring)
5236 napi_disable(&q_vector->napi);
5237 }
5238 }
5239
5240 /**
5241 * i40e_vsi_close - Shut down a VSI
5242 * @vsi: the vsi to be quelled
5243 **/
i40e_vsi_close(struct i40e_vsi * vsi)5244 static void i40e_vsi_close(struct i40e_vsi *vsi)
5245 {
5246 struct i40e_pf *pf = vsi->back;
5247 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
5248 i40e_down(vsi);
5249 i40e_vsi_free_irq(vsi);
5250 i40e_vsi_free_tx_resources(vsi);
5251 i40e_vsi_free_rx_resources(vsi);
5252 vsi->current_netdev_flags = 0;
5253 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
5254 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5255 set_bit(__I40E_CLIENT_RESET, pf->state);
5256 }
5257
5258 /**
5259 * i40e_quiesce_vsi - Pause a given VSI
5260 * @vsi: the VSI being paused
5261 **/
i40e_quiesce_vsi(struct i40e_vsi * vsi)5262 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
5263 {
5264 if (test_bit(__I40E_VSI_DOWN, vsi->state))
5265 return;
5266
5267 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
5268 if (vsi->netdev && netif_running(vsi->netdev))
5269 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
5270 else
5271 i40e_vsi_close(vsi);
5272 }
5273
5274 /**
5275 * i40e_unquiesce_vsi - Resume a given VSI
5276 * @vsi: the VSI being resumed
5277 **/
i40e_unquiesce_vsi(struct i40e_vsi * vsi)5278 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
5279 {
5280 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
5281 return;
5282
5283 if (vsi->netdev && netif_running(vsi->netdev))
5284 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
5285 else
5286 i40e_vsi_open(vsi); /* this clears the DOWN bit */
5287 }
5288
5289 /**
5290 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
5291 * @pf: the PF
5292 **/
i40e_pf_quiesce_all_vsi(struct i40e_pf * pf)5293 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5294 {
5295 int v;
5296
5297 for (v = 0; v < pf->num_alloc_vsi; v++) {
5298 if (pf->vsi[v])
5299 i40e_quiesce_vsi(pf->vsi[v]);
5300 }
5301 }
5302
5303 /**
5304 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
5305 * @pf: the PF
5306 **/
i40e_pf_unquiesce_all_vsi(struct i40e_pf * pf)5307 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5308 {
5309 int v;
5310
5311 for (v = 0; v < pf->num_alloc_vsi; v++) {
5312 if (pf->vsi[v])
5313 i40e_unquiesce_vsi(pf->vsi[v]);
5314 }
5315 }
5316
5317 /**
5318 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5319 * @vsi: the VSI being configured
5320 *
5321 * Wait until all queues on a given VSI have been disabled.
5322 **/
i40e_vsi_wait_queues_disabled(struct i40e_vsi * vsi)5323 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5324 {
5325 struct i40e_pf *pf = vsi->back;
5326 int i, pf_q, ret;
5327
5328 pf_q = vsi->base_queue;
5329 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5330 /* Check and wait for the Tx queue */
5331 ret = i40e_pf_txq_wait(pf, pf_q, false);
5332 if (ret) {
5333 dev_info(&pf->pdev->dev,
5334 "VSI seid %d Tx ring %d disable timeout\n",
5335 vsi->seid, pf_q);
5336 return ret;
5337 }
5338
5339 if (!i40e_enabled_xdp_vsi(vsi))
5340 goto wait_rx;
5341
5342 /* Check and wait for the XDP Tx queue */
5343 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5344 false);
5345 if (ret) {
5346 dev_info(&pf->pdev->dev,
5347 "VSI seid %d XDP Tx ring %d disable timeout\n",
5348 vsi->seid, pf_q);
5349 return ret;
5350 }
5351 wait_rx:
5352 /* Check and wait for the Rx queue */
5353 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5354 if (ret) {
5355 dev_info(&pf->pdev->dev,
5356 "VSI seid %d Rx ring %d disable timeout\n",
5357 vsi->seid, pf_q);
5358 return ret;
5359 }
5360 }
5361
5362 return 0;
5363 }
5364
5365 #ifdef CONFIG_I40E_DCB
5366 /**
5367 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5368 * @pf: the PF
5369 *
5370 * This function waits for the queues to be in disabled state for all the
5371 * VSIs that are managed by this PF.
5372 **/
i40e_pf_wait_queues_disabled(struct i40e_pf * pf)5373 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5374 {
5375 int v, ret = 0;
5376
5377 for (v = 0; v < pf->num_alloc_vsi; v++) {
5378 if (pf->vsi[v]) {
5379 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5380 if (ret)
5381 break;
5382 }
5383 }
5384
5385 return ret;
5386 }
5387
5388 #endif
5389
5390 /**
5391 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5392 * @pf: pointer to PF
5393 *
5394 * Get TC map for ISCSI PF type that will include iSCSI TC
5395 * and LAN TC.
5396 **/
i40e_get_iscsi_tc_map(struct i40e_pf * pf)5397 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5398 {
5399 struct i40e_dcb_app_priority_table app;
5400 struct i40e_hw *hw = &pf->hw;
5401 u8 enabled_tc = 1; /* TC0 is always enabled */
5402 u8 tc, i;
5403 /* Get the iSCSI APP TLV */
5404 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5405
5406 for (i = 0; i < dcbcfg->numapps; i++) {
5407 app = dcbcfg->app[i];
5408 if (app.selector == I40E_APP_SEL_TCPIP &&
5409 app.protocolid == I40E_APP_PROTOID_ISCSI) {
5410 tc = dcbcfg->etscfg.prioritytable[app.priority];
5411 enabled_tc |= BIT(tc);
5412 break;
5413 }
5414 }
5415
5416 return enabled_tc;
5417 }
5418
5419 /**
5420 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5421 * @dcbcfg: the corresponding DCBx configuration structure
5422 *
5423 * Return the number of TCs from given DCBx configuration
5424 **/
i40e_dcb_get_num_tc(struct i40e_dcbx_config * dcbcfg)5425 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5426 {
5427 int i, tc_unused = 0;
5428 u8 num_tc = 0;
5429 u8 ret = 0;
5430
5431 /* Scan the ETS Config Priority Table to find
5432 * traffic class enabled for a given priority
5433 * and create a bitmask of enabled TCs
5434 */
5435 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5436 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5437
5438 /* Now scan the bitmask to check for
5439 * contiguous TCs starting with TC0
5440 */
5441 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5442 if (num_tc & BIT(i)) {
5443 if (!tc_unused) {
5444 ret++;
5445 } else {
5446 pr_err("Non-contiguous TC - Disabling DCB\n");
5447 return 1;
5448 }
5449 } else {
5450 tc_unused = 1;
5451 }
5452 }
5453
5454 /* There is always at least TC0 */
5455 if (!ret)
5456 ret = 1;
5457
5458 return ret;
5459 }
5460
5461 /**
5462 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5463 * @dcbcfg: the corresponding DCBx configuration structure
5464 *
5465 * Query the current DCB configuration and return the number of
5466 * traffic classes enabled from the given DCBX config
5467 **/
i40e_dcb_get_enabled_tc(struct i40e_dcbx_config * dcbcfg)5468 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5469 {
5470 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5471 u8 enabled_tc = 1;
5472 u8 i;
5473
5474 for (i = 0; i < num_tc; i++)
5475 enabled_tc |= BIT(i);
5476
5477 return enabled_tc;
5478 }
5479
5480 /**
5481 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5482 * @pf: PF being queried
5483 *
5484 * Query the current MQPRIO configuration and return the number of
5485 * traffic classes enabled.
5486 **/
i40e_mqprio_get_enabled_tc(struct i40e_pf * pf)5487 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5488 {
5489 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5490 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5491 u8 enabled_tc = 1, i;
5492
5493 for (i = 1; i < num_tc; i++)
5494 enabled_tc |= BIT(i);
5495 return enabled_tc;
5496 }
5497
5498 /**
5499 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5500 * @pf: PF being queried
5501 *
5502 * Return number of traffic classes enabled for the given PF
5503 **/
i40e_pf_get_num_tc(struct i40e_pf * pf)5504 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5505 {
5506 struct i40e_hw *hw = &pf->hw;
5507 u8 i, enabled_tc = 1;
5508 u8 num_tc = 0;
5509 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5510
5511 if (i40e_is_tc_mqprio_enabled(pf))
5512 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5513
5514 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5515 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5516 return 1;
5517
5518 /* SFP mode will be enabled for all TCs on port */
5519 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5520 return i40e_dcb_get_num_tc(dcbcfg);
5521
5522 /* MFP mode return count of enabled TCs for this PF */
5523 if (pf->hw.func_caps.iscsi)
5524 enabled_tc = i40e_get_iscsi_tc_map(pf);
5525 else
5526 return 1; /* Only TC0 */
5527
5528 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5529 if (enabled_tc & BIT(i))
5530 num_tc++;
5531 }
5532 return num_tc;
5533 }
5534
5535 /**
5536 * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5537 * @pf: PF being queried
5538 *
5539 * Return a bitmap for enabled traffic classes for this PF.
5540 **/
i40e_pf_get_tc_map(struct i40e_pf * pf)5541 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5542 {
5543 if (i40e_is_tc_mqprio_enabled(pf))
5544 return i40e_mqprio_get_enabled_tc(pf);
5545
5546 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5547 * default TC
5548 */
5549 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5550 return I40E_DEFAULT_TRAFFIC_CLASS;
5551
5552 /* SFP mode we want PF to be enabled for all TCs */
5553 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5554 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5555
5556 /* MFP enabled and iSCSI PF type */
5557 if (pf->hw.func_caps.iscsi)
5558 return i40e_get_iscsi_tc_map(pf);
5559 else
5560 return I40E_DEFAULT_TRAFFIC_CLASS;
5561 }
5562
5563 /**
5564 * i40e_vsi_get_bw_info - Query VSI BW Information
5565 * @vsi: the VSI being queried
5566 *
5567 * Returns 0 on success, negative value on failure
5568 **/
i40e_vsi_get_bw_info(struct i40e_vsi * vsi)5569 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5570 {
5571 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5572 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5573 struct i40e_pf *pf = vsi->back;
5574 struct i40e_hw *hw = &pf->hw;
5575 u32 tc_bw_max;
5576 int ret;
5577 int i;
5578
5579 /* Get the VSI level BW configuration */
5580 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5581 if (ret) {
5582 dev_info(&pf->pdev->dev,
5583 "couldn't get PF vsi bw config, err %pe aq_err %s\n",
5584 ERR_PTR(ret),
5585 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5586 return -EINVAL;
5587 }
5588
5589 /* Get the VSI level BW configuration per TC */
5590 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5591 NULL);
5592 if (ret) {
5593 dev_info(&pf->pdev->dev,
5594 "couldn't get PF vsi ets bw config, err %pe aq_err %s\n",
5595 ERR_PTR(ret),
5596 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5597 return -EINVAL;
5598 }
5599
5600 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5601 dev_info(&pf->pdev->dev,
5602 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5603 bw_config.tc_valid_bits,
5604 bw_ets_config.tc_valid_bits);
5605 /* Still continuing */
5606 }
5607
5608 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5609 vsi->bw_max_quanta = bw_config.max_bw;
5610 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5611 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5612 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5613 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5614 vsi->bw_ets_limit_credits[i] =
5615 le16_to_cpu(bw_ets_config.credits[i]);
5616 /* 3 bits out of 4 for each TC */
5617 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5618 }
5619
5620 return 0;
5621 }
5622
5623 /**
5624 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5625 * @vsi: the VSI being configured
5626 * @enabled_tc: TC bitmap
5627 * @bw_share: BW shared credits per TC
5628 *
5629 * Returns 0 on success, negative value on failure
5630 **/
i40e_vsi_configure_bw_alloc(struct i40e_vsi * vsi,u8 enabled_tc,u8 * bw_share)5631 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5632 u8 *bw_share)
5633 {
5634 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5635 struct i40e_pf *pf = vsi->back;
5636 int ret;
5637 int i;
5638
5639 /* There is no need to reset BW when mqprio mode is on. */
5640 if (i40e_is_tc_mqprio_enabled(pf))
5641 return 0;
5642 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5643 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5644 if (ret)
5645 dev_info(&pf->pdev->dev,
5646 "Failed to reset tx rate for vsi->seid %u\n",
5647 vsi->seid);
5648 return ret;
5649 }
5650 memset(&bw_data, 0, sizeof(bw_data));
5651 bw_data.tc_valid_bits = enabled_tc;
5652 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5653 bw_data.tc_bw_credits[i] = bw_share[i];
5654
5655 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5656 if (ret) {
5657 dev_info(&pf->pdev->dev,
5658 "AQ command Config VSI BW allocation per TC failed = %d\n",
5659 pf->hw.aq.asq_last_status);
5660 return -EINVAL;
5661 }
5662
5663 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5664 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5665
5666 return 0;
5667 }
5668
5669 /**
5670 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5671 * @vsi: the VSI being configured
5672 * @enabled_tc: TC map to be enabled
5673 *
5674 **/
i40e_vsi_config_netdev_tc(struct i40e_vsi * vsi,u8 enabled_tc)5675 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5676 {
5677 struct net_device *netdev = vsi->netdev;
5678 struct i40e_pf *pf = vsi->back;
5679 struct i40e_hw *hw = &pf->hw;
5680 u8 netdev_tc = 0;
5681 int i;
5682 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5683
5684 if (!netdev)
5685 return;
5686
5687 if (!enabled_tc) {
5688 netdev_reset_tc(netdev);
5689 return;
5690 }
5691
5692 /* Set up actual enabled TCs on the VSI */
5693 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5694 return;
5695
5696 /* set per TC queues for the VSI */
5697 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5698 /* Only set TC queues for enabled tcs
5699 *
5700 * e.g. For a VSI that has TC0 and TC3 enabled the
5701 * enabled_tc bitmap would be 0x00001001; the driver
5702 * will set the numtc for netdev as 2 that will be
5703 * referenced by the netdev layer as TC 0 and 1.
5704 */
5705 if (vsi->tc_config.enabled_tc & BIT(i))
5706 netdev_set_tc_queue(netdev,
5707 vsi->tc_config.tc_info[i].netdev_tc,
5708 vsi->tc_config.tc_info[i].qcount,
5709 vsi->tc_config.tc_info[i].qoffset);
5710 }
5711
5712 if (i40e_is_tc_mqprio_enabled(pf))
5713 return;
5714
5715 /* Assign UP2TC map for the VSI */
5716 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5717 /* Get the actual TC# for the UP */
5718 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5719 /* Get the mapped netdev TC# for the UP */
5720 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5721 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5722 }
5723 }
5724
5725 /**
5726 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5727 * @vsi: the VSI being configured
5728 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5729 **/
i40e_vsi_update_queue_map(struct i40e_vsi * vsi,struct i40e_vsi_context * ctxt)5730 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5731 struct i40e_vsi_context *ctxt)
5732 {
5733 /* copy just the sections touched not the entire info
5734 * since not all sections are valid as returned by
5735 * update vsi params
5736 */
5737 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5738 memcpy(&vsi->info.queue_mapping,
5739 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5740 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5741 sizeof(vsi->info.tc_mapping));
5742 }
5743
5744 /**
5745 * i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
5746 * @vsi: the VSI being reconfigured
5747 * @vsi_offset: offset from main VF VSI
5748 */
i40e_update_adq_vsi_queues(struct i40e_vsi * vsi,int vsi_offset)5749 int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
5750 {
5751 struct i40e_vsi_context ctxt = {};
5752 struct i40e_pf *pf;
5753 struct i40e_hw *hw;
5754 int ret;
5755
5756 if (!vsi)
5757 return -EINVAL;
5758 pf = vsi->back;
5759 hw = &pf->hw;
5760
5761 ctxt.seid = vsi->seid;
5762 ctxt.pf_num = hw->pf_id;
5763 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
5764 ctxt.uplink_seid = vsi->uplink_seid;
5765 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5766 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5767 ctxt.info = vsi->info;
5768
5769 i40e_vsi_setup_queue_map(vsi, &ctxt, vsi->tc_config.enabled_tc,
5770 false);
5771 if (vsi->reconfig_rss) {
5772 vsi->rss_size = min_t(int, pf->alloc_rss_size,
5773 vsi->num_queue_pairs);
5774 ret = i40e_vsi_config_rss(vsi);
5775 if (ret) {
5776 dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5777 return ret;
5778 }
5779 vsi->reconfig_rss = false;
5780 }
5781
5782 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5783 if (ret) {
5784 dev_info(&pf->pdev->dev, "Update vsi config failed, err %pe aq_err %s\n",
5785 ERR_PTR(ret),
5786 i40e_aq_str(hw, hw->aq.asq_last_status));
5787 return ret;
5788 }
5789 /* update the local VSI info with updated queue map */
5790 i40e_vsi_update_queue_map(vsi, &ctxt);
5791 vsi->info.valid_sections = 0;
5792
5793 return ret;
5794 }
5795
5796 /**
5797 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5798 * @vsi: VSI to be configured
5799 * @enabled_tc: TC bitmap
5800 *
5801 * This configures a particular VSI for TCs that are mapped to the
5802 * given TC bitmap. It uses default bandwidth share for TCs across
5803 * VSIs to configure TC for a particular VSI.
5804 *
5805 * NOTE:
5806 * It is expected that the VSI queues have been quisced before calling
5807 * this function.
5808 **/
i40e_vsi_config_tc(struct i40e_vsi * vsi,u8 enabled_tc)5809 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5810 {
5811 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5812 struct i40e_pf *pf = vsi->back;
5813 struct i40e_hw *hw = &pf->hw;
5814 struct i40e_vsi_context ctxt;
5815 int ret = 0;
5816 int i;
5817
5818 /* Check if enabled_tc is same as existing or new TCs */
5819 if (vsi->tc_config.enabled_tc == enabled_tc &&
5820 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5821 return ret;
5822
5823 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5824 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5825 if (enabled_tc & BIT(i))
5826 bw_share[i] = 1;
5827 }
5828
5829 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5830 if (ret) {
5831 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5832
5833 dev_info(&pf->pdev->dev,
5834 "Failed configuring TC map %d for VSI %d\n",
5835 enabled_tc, vsi->seid);
5836 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5837 &bw_config, NULL);
5838 if (ret) {
5839 dev_info(&pf->pdev->dev,
5840 "Failed querying vsi bw info, err %pe aq_err %s\n",
5841 ERR_PTR(ret),
5842 i40e_aq_str(hw, hw->aq.asq_last_status));
5843 goto out;
5844 }
5845 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5846 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5847
5848 if (!valid_tc)
5849 valid_tc = bw_config.tc_valid_bits;
5850 /* Always enable TC0, no matter what */
5851 valid_tc |= 1;
5852 dev_info(&pf->pdev->dev,
5853 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5854 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5855 enabled_tc = valid_tc;
5856 }
5857
5858 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5859 if (ret) {
5860 dev_err(&pf->pdev->dev,
5861 "Unable to configure TC map %d for VSI %d\n",
5862 enabled_tc, vsi->seid);
5863 goto out;
5864 }
5865 }
5866
5867 /* Update Queue Pairs Mapping for currently enabled UPs */
5868 ctxt.seid = vsi->seid;
5869 ctxt.pf_num = vsi->back->hw.pf_id;
5870 ctxt.vf_num = 0;
5871 ctxt.uplink_seid = vsi->uplink_seid;
5872 ctxt.info = vsi->info;
5873 if (i40e_is_tc_mqprio_enabled(pf)) {
5874 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5875 if (ret)
5876 goto out;
5877 } else {
5878 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5879 }
5880
5881 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5882 * queues changed.
5883 */
5884 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5885 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5886 vsi->num_queue_pairs);
5887 ret = i40e_vsi_config_rss(vsi);
5888 if (ret) {
5889 dev_info(&vsi->back->pdev->dev,
5890 "Failed to reconfig rss for num_queues\n");
5891 return ret;
5892 }
5893 vsi->reconfig_rss = false;
5894 }
5895 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5896 ctxt.info.valid_sections |=
5897 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5898 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5899 }
5900
5901 /* Update the VSI after updating the VSI queue-mapping
5902 * information
5903 */
5904 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5905 if (ret) {
5906 dev_info(&pf->pdev->dev,
5907 "Update vsi tc config failed, err %pe aq_err %s\n",
5908 ERR_PTR(ret),
5909 i40e_aq_str(hw, hw->aq.asq_last_status));
5910 goto out;
5911 }
5912 /* update the local VSI info with updated queue map */
5913 i40e_vsi_update_queue_map(vsi, &ctxt);
5914 vsi->info.valid_sections = 0;
5915
5916 /* Update current VSI BW information */
5917 ret = i40e_vsi_get_bw_info(vsi);
5918 if (ret) {
5919 dev_info(&pf->pdev->dev,
5920 "Failed updating vsi bw info, err %pe aq_err %s\n",
5921 ERR_PTR(ret),
5922 i40e_aq_str(hw, hw->aq.asq_last_status));
5923 goto out;
5924 }
5925
5926 /* Update the netdev TC setup */
5927 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5928 out:
5929 return ret;
5930 }
5931
5932 /**
5933 * i40e_get_link_speed - Returns link speed for the interface
5934 * @vsi: VSI to be configured
5935 *
5936 **/
i40e_get_link_speed(struct i40e_vsi * vsi)5937 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5938 {
5939 struct i40e_pf *pf = vsi->back;
5940
5941 switch (pf->hw.phy.link_info.link_speed) {
5942 case I40E_LINK_SPEED_40GB:
5943 return 40000;
5944 case I40E_LINK_SPEED_25GB:
5945 return 25000;
5946 case I40E_LINK_SPEED_20GB:
5947 return 20000;
5948 case I40E_LINK_SPEED_10GB:
5949 return 10000;
5950 case I40E_LINK_SPEED_1GB:
5951 return 1000;
5952 default:
5953 return -EINVAL;
5954 }
5955 }
5956
5957 /**
5958 * i40e_bw_bytes_to_mbits - Convert max_tx_rate from bytes to mbits
5959 * @vsi: Pointer to vsi structure
5960 * @max_tx_rate: max TX rate in bytes to be converted into Mbits
5961 *
5962 * Helper function to convert units before send to set BW limit
5963 **/
i40e_bw_bytes_to_mbits(struct i40e_vsi * vsi,u64 max_tx_rate)5964 static u64 i40e_bw_bytes_to_mbits(struct i40e_vsi *vsi, u64 max_tx_rate)
5965 {
5966 if (max_tx_rate < I40E_BW_MBPS_DIVISOR) {
5967 dev_warn(&vsi->back->pdev->dev,
5968 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5969 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
5970 } else {
5971 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
5972 }
5973
5974 return max_tx_rate;
5975 }
5976
5977 /**
5978 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5979 * @vsi: VSI to be configured
5980 * @seid: seid of the channel/VSI
5981 * @max_tx_rate: max TX rate to be configured as BW limit
5982 *
5983 * Helper function to set BW limit for a given VSI
5984 **/
i40e_set_bw_limit(struct i40e_vsi * vsi,u16 seid,u64 max_tx_rate)5985 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5986 {
5987 struct i40e_pf *pf = vsi->back;
5988 u64 credits = 0;
5989 int speed = 0;
5990 int ret = 0;
5991
5992 speed = i40e_get_link_speed(vsi);
5993 if (max_tx_rate > speed) {
5994 dev_err(&pf->pdev->dev,
5995 "Invalid max tx rate %llu specified for VSI seid %d.",
5996 max_tx_rate, seid);
5997 return -EINVAL;
5998 }
5999 if (max_tx_rate && max_tx_rate < I40E_BW_CREDIT_DIVISOR) {
6000 dev_warn(&pf->pdev->dev,
6001 "Setting max tx rate to minimum usable value of 50Mbps.\n");
6002 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
6003 }
6004
6005 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
6006 credits = max_tx_rate;
6007 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6008 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
6009 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
6010 if (ret)
6011 dev_err(&pf->pdev->dev,
6012 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %pe aq_err %s\n",
6013 max_tx_rate, seid, ERR_PTR(ret),
6014 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6015 return ret;
6016 }
6017
6018 /**
6019 * i40e_remove_queue_channels - Remove queue channels for the TCs
6020 * @vsi: VSI to be configured
6021 *
6022 * Remove queue channels for the TCs
6023 **/
i40e_remove_queue_channels(struct i40e_vsi * vsi)6024 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
6025 {
6026 enum i40e_admin_queue_err last_aq_status;
6027 struct i40e_cloud_filter *cfilter;
6028 struct i40e_channel *ch, *ch_tmp;
6029 struct i40e_pf *pf = vsi->back;
6030 struct hlist_node *node;
6031 int ret, i;
6032
6033 /* Reset rss size that was stored when reconfiguring rss for
6034 * channel VSIs with non-power-of-2 queue count.
6035 */
6036 vsi->current_rss_size = 0;
6037
6038 /* perform cleanup for channels if they exist */
6039 if (list_empty(&vsi->ch_list))
6040 return;
6041
6042 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6043 struct i40e_vsi *p_vsi;
6044
6045 list_del(&ch->list);
6046 p_vsi = ch->parent_vsi;
6047 if (!p_vsi || !ch->initialized) {
6048 kfree(ch);
6049 continue;
6050 }
6051 /* Reset queue contexts */
6052 for (i = 0; i < ch->num_queue_pairs; i++) {
6053 struct i40e_ring *tx_ring, *rx_ring;
6054 u16 pf_q;
6055
6056 pf_q = ch->base_queue + i;
6057 tx_ring = vsi->tx_rings[pf_q];
6058 tx_ring->ch = NULL;
6059
6060 rx_ring = vsi->rx_rings[pf_q];
6061 rx_ring->ch = NULL;
6062 }
6063
6064 /* Reset BW configured for this VSI via mqprio */
6065 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
6066 if (ret)
6067 dev_info(&vsi->back->pdev->dev,
6068 "Failed to reset tx rate for ch->seid %u\n",
6069 ch->seid);
6070
6071 /* delete cloud filters associated with this channel */
6072 hlist_for_each_entry_safe(cfilter, node,
6073 &pf->cloud_filter_list, cloud_node) {
6074 if (cfilter->seid != ch->seid)
6075 continue;
6076
6077 hash_del(&cfilter->cloud_node);
6078 if (cfilter->dst_port)
6079 ret = i40e_add_del_cloud_filter_big_buf(vsi,
6080 cfilter,
6081 false);
6082 else
6083 ret = i40e_add_del_cloud_filter(vsi, cfilter,
6084 false);
6085 last_aq_status = pf->hw.aq.asq_last_status;
6086 if (ret)
6087 dev_info(&pf->pdev->dev,
6088 "Failed to delete cloud filter, err %pe aq_err %s\n",
6089 ERR_PTR(ret),
6090 i40e_aq_str(&pf->hw, last_aq_status));
6091 kfree(cfilter);
6092 }
6093
6094 /* delete VSI from FW */
6095 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
6096 NULL);
6097 if (ret)
6098 dev_err(&vsi->back->pdev->dev,
6099 "unable to remove channel (%d) for parent VSI(%d)\n",
6100 ch->seid, p_vsi->seid);
6101 kfree(ch);
6102 }
6103 INIT_LIST_HEAD(&vsi->ch_list);
6104 }
6105
6106 /**
6107 * i40e_get_max_queues_for_channel
6108 * @vsi: ptr to VSI to which channels are associated with
6109 *
6110 * Helper function which returns max value among the queue counts set on the
6111 * channels/TCs created.
6112 **/
i40e_get_max_queues_for_channel(struct i40e_vsi * vsi)6113 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
6114 {
6115 struct i40e_channel *ch, *ch_tmp;
6116 int max = 0;
6117
6118 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6119 if (!ch->initialized)
6120 continue;
6121 if (ch->num_queue_pairs > max)
6122 max = ch->num_queue_pairs;
6123 }
6124
6125 return max;
6126 }
6127
6128 /**
6129 * i40e_validate_num_queues - validate num_queues w.r.t channel
6130 * @pf: ptr to PF device
6131 * @num_queues: number of queues
6132 * @vsi: the parent VSI
6133 * @reconfig_rss: indicates should the RSS be reconfigured or not
6134 *
6135 * This function validates number of queues in the context of new channel
6136 * which is being established and determines if RSS should be reconfigured
6137 * or not for parent VSI.
6138 **/
i40e_validate_num_queues(struct i40e_pf * pf,int num_queues,struct i40e_vsi * vsi,bool * reconfig_rss)6139 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
6140 struct i40e_vsi *vsi, bool *reconfig_rss)
6141 {
6142 int max_ch_queues;
6143
6144 if (!reconfig_rss)
6145 return -EINVAL;
6146
6147 *reconfig_rss = false;
6148 if (vsi->current_rss_size) {
6149 if (num_queues > vsi->current_rss_size) {
6150 dev_dbg(&pf->pdev->dev,
6151 "Error: num_queues (%d) > vsi's current_size(%d)\n",
6152 num_queues, vsi->current_rss_size);
6153 return -EINVAL;
6154 } else if ((num_queues < vsi->current_rss_size) &&
6155 (!is_power_of_2(num_queues))) {
6156 dev_dbg(&pf->pdev->dev,
6157 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
6158 num_queues, vsi->current_rss_size);
6159 return -EINVAL;
6160 }
6161 }
6162
6163 if (!is_power_of_2(num_queues)) {
6164 /* Find the max num_queues configured for channel if channel
6165 * exist.
6166 * if channel exist, then enforce 'num_queues' to be more than
6167 * max ever queues configured for channel.
6168 */
6169 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
6170 if (num_queues < max_ch_queues) {
6171 dev_dbg(&pf->pdev->dev,
6172 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
6173 num_queues, max_ch_queues);
6174 return -EINVAL;
6175 }
6176 *reconfig_rss = true;
6177 }
6178
6179 return 0;
6180 }
6181
6182 /**
6183 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
6184 * @vsi: the VSI being setup
6185 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
6186 *
6187 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
6188 **/
i40e_vsi_reconfig_rss(struct i40e_vsi * vsi,u16 rss_size)6189 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
6190 {
6191 struct i40e_pf *pf = vsi->back;
6192 u8 seed[I40E_HKEY_ARRAY_SIZE];
6193 struct i40e_hw *hw = &pf->hw;
6194 int local_rss_size;
6195 u8 *lut;
6196 int ret;
6197
6198 if (!vsi->rss_size)
6199 return -EINVAL;
6200
6201 if (rss_size > vsi->rss_size)
6202 return -EINVAL;
6203
6204 local_rss_size = min_t(int, vsi->rss_size, rss_size);
6205 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
6206 if (!lut)
6207 return -ENOMEM;
6208
6209 /* Ignoring user configured lut if there is one */
6210 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
6211
6212 /* Use user configured hash key if there is one, otherwise
6213 * use default.
6214 */
6215 if (vsi->rss_hkey_user)
6216 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
6217 else
6218 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
6219
6220 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
6221 if (ret) {
6222 dev_info(&pf->pdev->dev,
6223 "Cannot set RSS lut, err %pe aq_err %s\n",
6224 ERR_PTR(ret),
6225 i40e_aq_str(hw, hw->aq.asq_last_status));
6226 kfree(lut);
6227 return ret;
6228 }
6229 kfree(lut);
6230
6231 /* Do the update w.r.t. storing rss_size */
6232 if (!vsi->orig_rss_size)
6233 vsi->orig_rss_size = vsi->rss_size;
6234 vsi->current_rss_size = local_rss_size;
6235
6236 return ret;
6237 }
6238
6239 /**
6240 * i40e_channel_setup_queue_map - Setup a channel queue map
6241 * @pf: ptr to PF device
6242 * @ctxt: VSI context structure
6243 * @ch: ptr to channel structure
6244 *
6245 * Setup queue map for a specific channel
6246 **/
i40e_channel_setup_queue_map(struct i40e_pf * pf,struct i40e_vsi_context * ctxt,struct i40e_channel * ch)6247 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6248 struct i40e_vsi_context *ctxt,
6249 struct i40e_channel *ch)
6250 {
6251 u16 qcount, qmap, sections = 0;
6252 u8 offset = 0;
6253 int pow;
6254
6255 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
6256 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
6257
6258 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6259 ch->num_queue_pairs = qcount;
6260
6261 /* find the next higher power-of-2 of num queue pairs */
6262 pow = ilog2(qcount);
6263 if (!is_power_of_2(qcount))
6264 pow++;
6265
6266 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
6267 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
6268
6269 /* Setup queue TC[0].qmap for given VSI context */
6270 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
6271
6272 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
6273 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
6274 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
6275 ctxt->info.valid_sections |= cpu_to_le16(sections);
6276 }
6277
6278 /**
6279 * i40e_add_channel - add a channel by adding VSI
6280 * @pf: ptr to PF device
6281 * @uplink_seid: underlying HW switching element (VEB) ID
6282 * @ch: ptr to channel structure
6283 *
6284 * Add a channel (VSI) using add_vsi and queue_map
6285 **/
i40e_add_channel(struct i40e_pf * pf,u16 uplink_seid,struct i40e_channel * ch)6286 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6287 struct i40e_channel *ch)
6288 {
6289 struct i40e_hw *hw = &pf->hw;
6290 struct i40e_vsi_context ctxt;
6291 u8 enabled_tc = 0x1; /* TC0 enabled */
6292 int ret;
6293
6294 if (ch->type != I40E_VSI_VMDQ2) {
6295 dev_info(&pf->pdev->dev,
6296 "add new vsi failed, ch->type %d\n", ch->type);
6297 return -EINVAL;
6298 }
6299
6300 memset(&ctxt, 0, sizeof(ctxt));
6301 ctxt.pf_num = hw->pf_id;
6302 ctxt.vf_num = 0;
6303 ctxt.uplink_seid = uplink_seid;
6304 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
6305 if (ch->type == I40E_VSI_VMDQ2)
6306 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6307
6308 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
6309 ctxt.info.valid_sections |=
6310 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6311 ctxt.info.switch_id =
6312 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6313 }
6314
6315 /* Set queue map for a given VSI context */
6316 i40e_channel_setup_queue_map(pf, &ctxt, ch);
6317
6318 /* Now time to create VSI */
6319 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6320 if (ret) {
6321 dev_info(&pf->pdev->dev,
6322 "add new vsi failed, err %pe aq_err %s\n",
6323 ERR_PTR(ret),
6324 i40e_aq_str(&pf->hw,
6325 pf->hw.aq.asq_last_status));
6326 return -ENOENT;
6327 }
6328
6329 /* Success, update channel, set enabled_tc only if the channel
6330 * is not a macvlan
6331 */
6332 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
6333 ch->seid = ctxt.seid;
6334 ch->vsi_number = ctxt.vsi_number;
6335 ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
6336
6337 /* copy just the sections touched not the entire info
6338 * since not all sections are valid as returned by
6339 * update vsi params
6340 */
6341 ch->info.mapping_flags = ctxt.info.mapping_flags;
6342 memcpy(&ch->info.queue_mapping,
6343 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
6344 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
6345 sizeof(ctxt.info.tc_mapping));
6346
6347 return 0;
6348 }
6349
i40e_channel_config_bw(struct i40e_vsi * vsi,struct i40e_channel * ch,u8 * bw_share)6350 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
6351 u8 *bw_share)
6352 {
6353 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
6354 int ret;
6355 int i;
6356
6357 memset(&bw_data, 0, sizeof(bw_data));
6358 bw_data.tc_valid_bits = ch->enabled_tc;
6359 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6360 bw_data.tc_bw_credits[i] = bw_share[i];
6361
6362 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
6363 &bw_data, NULL);
6364 if (ret) {
6365 dev_info(&vsi->back->pdev->dev,
6366 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
6367 vsi->back->hw.aq.asq_last_status, ch->seid);
6368 return -EINVAL;
6369 }
6370
6371 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6372 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6373
6374 return 0;
6375 }
6376
6377 /**
6378 * i40e_channel_config_tx_ring - config TX ring associated with new channel
6379 * @pf: ptr to PF device
6380 * @vsi: the VSI being setup
6381 * @ch: ptr to channel structure
6382 *
6383 * Configure TX rings associated with channel (VSI) since queues are being
6384 * from parent VSI.
6385 **/
i40e_channel_config_tx_ring(struct i40e_pf * pf,struct i40e_vsi * vsi,struct i40e_channel * ch)6386 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6387 struct i40e_vsi *vsi,
6388 struct i40e_channel *ch)
6389 {
6390 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6391 int ret;
6392 int i;
6393
6394 /* Enable ETS TCs with equal BW Share for now across all VSIs */
6395 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6396 if (ch->enabled_tc & BIT(i))
6397 bw_share[i] = 1;
6398 }
6399
6400 /* configure BW for new VSI */
6401 ret = i40e_channel_config_bw(vsi, ch, bw_share);
6402 if (ret) {
6403 dev_info(&vsi->back->pdev->dev,
6404 "Failed configuring TC map %d for channel (seid %u)\n",
6405 ch->enabled_tc, ch->seid);
6406 return ret;
6407 }
6408
6409 for (i = 0; i < ch->num_queue_pairs; i++) {
6410 struct i40e_ring *tx_ring, *rx_ring;
6411 u16 pf_q;
6412
6413 pf_q = ch->base_queue + i;
6414
6415 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6416 * context
6417 */
6418 tx_ring = vsi->tx_rings[pf_q];
6419 tx_ring->ch = ch;
6420
6421 /* Get the RX ring ptr */
6422 rx_ring = vsi->rx_rings[pf_q];
6423 rx_ring->ch = ch;
6424 }
6425
6426 return 0;
6427 }
6428
6429 /**
6430 * i40e_setup_hw_channel - setup new channel
6431 * @pf: ptr to PF device
6432 * @vsi: the VSI being setup
6433 * @ch: ptr to channel structure
6434 * @uplink_seid: underlying HW switching element (VEB) ID
6435 * @type: type of channel to be created (VMDq2/VF)
6436 *
6437 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6438 * and configures TX rings accordingly
6439 **/
i40e_setup_hw_channel(struct i40e_pf * pf,struct i40e_vsi * vsi,struct i40e_channel * ch,u16 uplink_seid,u8 type)6440 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6441 struct i40e_vsi *vsi,
6442 struct i40e_channel *ch,
6443 u16 uplink_seid, u8 type)
6444 {
6445 int ret;
6446
6447 ch->initialized = false;
6448 ch->base_queue = vsi->next_base_queue;
6449 ch->type = type;
6450
6451 /* Proceed with creation of channel (VMDq2) VSI */
6452 ret = i40e_add_channel(pf, uplink_seid, ch);
6453 if (ret) {
6454 dev_info(&pf->pdev->dev,
6455 "failed to add_channel using uplink_seid %u\n",
6456 uplink_seid);
6457 return ret;
6458 }
6459
6460 /* Mark the successful creation of channel */
6461 ch->initialized = true;
6462
6463 /* Reconfigure TX queues using QTX_CTL register */
6464 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6465 if (ret) {
6466 dev_info(&pf->pdev->dev,
6467 "failed to configure TX rings for channel %u\n",
6468 ch->seid);
6469 return ret;
6470 }
6471
6472 /* update 'next_base_queue' */
6473 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6474 dev_dbg(&pf->pdev->dev,
6475 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6476 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6477 ch->num_queue_pairs,
6478 vsi->next_base_queue);
6479 return ret;
6480 }
6481
6482 /**
6483 * i40e_setup_channel - setup new channel using uplink element
6484 * @pf: ptr to PF device
6485 * @vsi: pointer to the VSI to set up the channel within
6486 * @ch: ptr to channel structure
6487 *
6488 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6489 * and uplink switching element (uplink_seid)
6490 **/
i40e_setup_channel(struct i40e_pf * pf,struct i40e_vsi * vsi,struct i40e_channel * ch)6491 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6492 struct i40e_channel *ch)
6493 {
6494 u8 vsi_type;
6495 u16 seid;
6496 int ret;
6497
6498 if (vsi->type == I40E_VSI_MAIN) {
6499 vsi_type = I40E_VSI_VMDQ2;
6500 } else {
6501 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6502 vsi->type);
6503 return false;
6504 }
6505
6506 /* underlying switching element */
6507 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6508
6509 /* create channel (VSI), configure TX rings */
6510 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6511 if (ret) {
6512 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6513 return false;
6514 }
6515
6516 return ch->initialized ? true : false;
6517 }
6518
6519 /**
6520 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6521 * @vsi: ptr to VSI which has PF backing
6522 *
6523 * Sets up switch mode correctly if it needs to be changed and perform
6524 * what are allowed modes.
6525 **/
i40e_validate_and_set_switch_mode(struct i40e_vsi * vsi)6526 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6527 {
6528 u8 mode;
6529 struct i40e_pf *pf = vsi->back;
6530 struct i40e_hw *hw = &pf->hw;
6531 int ret;
6532
6533 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6534 if (ret)
6535 return -EINVAL;
6536
6537 if (hw->dev_caps.switch_mode) {
6538 /* if switch mode is set, support mode2 (non-tunneled for
6539 * cloud filter) for now
6540 */
6541 u32 switch_mode = hw->dev_caps.switch_mode &
6542 I40E_SWITCH_MODE_MASK;
6543 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6544 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6545 return 0;
6546 dev_err(&pf->pdev->dev,
6547 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6548 hw->dev_caps.switch_mode);
6549 return -EINVAL;
6550 }
6551 }
6552
6553 /* Set Bit 7 to be valid */
6554 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6555
6556 /* Set L4type for TCP support */
6557 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6558
6559 /* Set cloud filter mode */
6560 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6561
6562 /* Prep mode field for set_switch_config */
6563 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6564 pf->last_sw_conf_valid_flags,
6565 mode, NULL);
6566 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6567 dev_err(&pf->pdev->dev,
6568 "couldn't set switch config bits, err %pe aq_err %s\n",
6569 ERR_PTR(ret),
6570 i40e_aq_str(hw,
6571 hw->aq.asq_last_status));
6572
6573 return ret;
6574 }
6575
6576 /**
6577 * i40e_create_queue_channel - function to create channel
6578 * @vsi: VSI to be configured
6579 * @ch: ptr to channel (it contains channel specific params)
6580 *
6581 * This function creates channel (VSI) using num_queues specified by user,
6582 * reconfigs RSS if needed.
6583 **/
i40e_create_queue_channel(struct i40e_vsi * vsi,struct i40e_channel * ch)6584 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6585 struct i40e_channel *ch)
6586 {
6587 struct i40e_pf *pf = vsi->back;
6588 bool reconfig_rss;
6589 int err;
6590
6591 if (!ch)
6592 return -EINVAL;
6593
6594 if (!ch->num_queue_pairs) {
6595 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6596 ch->num_queue_pairs);
6597 return -EINVAL;
6598 }
6599
6600 /* validate user requested num_queues for channel */
6601 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6602 &reconfig_rss);
6603 if (err) {
6604 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6605 ch->num_queue_pairs);
6606 return -EINVAL;
6607 }
6608
6609 /* By default we are in VEPA mode, if this is the first VF/VMDq
6610 * VSI to be added switch to VEB mode.
6611 */
6612
6613 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6614 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6615
6616 if (vsi->type == I40E_VSI_MAIN) {
6617 if (i40e_is_tc_mqprio_enabled(pf))
6618 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
6619 else
6620 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6621 }
6622 /* now onwards for main VSI, number of queues will be value
6623 * of TC0's queue count
6624 */
6625 }
6626
6627 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6628 * it should be more than num_queues
6629 */
6630 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6631 dev_dbg(&pf->pdev->dev,
6632 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6633 vsi->cnt_q_avail, ch->num_queue_pairs);
6634 return -EINVAL;
6635 }
6636
6637 /* reconfig_rss only if vsi type is MAIN_VSI */
6638 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6639 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6640 if (err) {
6641 dev_info(&pf->pdev->dev,
6642 "Error: unable to reconfig rss for num_queues (%u)\n",
6643 ch->num_queue_pairs);
6644 return -EINVAL;
6645 }
6646 }
6647
6648 if (!i40e_setup_channel(pf, vsi, ch)) {
6649 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6650 return -EINVAL;
6651 }
6652
6653 dev_info(&pf->pdev->dev,
6654 "Setup channel (id:%u) utilizing num_queues %d\n",
6655 ch->seid, ch->num_queue_pairs);
6656
6657 /* configure VSI for BW limit */
6658 if (ch->max_tx_rate) {
6659 u64 credits = ch->max_tx_rate;
6660
6661 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6662 return -EINVAL;
6663
6664 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6665 dev_dbg(&pf->pdev->dev,
6666 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6667 ch->max_tx_rate,
6668 credits,
6669 ch->seid);
6670 }
6671
6672 /* in case of VF, this will be main SRIOV VSI */
6673 ch->parent_vsi = vsi;
6674
6675 /* and update main_vsi's count for queue_available to use */
6676 vsi->cnt_q_avail -= ch->num_queue_pairs;
6677
6678 return 0;
6679 }
6680
6681 /**
6682 * i40e_configure_queue_channels - Add queue channel for the given TCs
6683 * @vsi: VSI to be configured
6684 *
6685 * Configures queue channel mapping to the given TCs
6686 **/
i40e_configure_queue_channels(struct i40e_vsi * vsi)6687 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6688 {
6689 struct i40e_channel *ch;
6690 u64 max_rate = 0;
6691 int ret = 0, i;
6692
6693 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6694 vsi->tc_seid_map[0] = vsi->seid;
6695 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6696 if (vsi->tc_config.enabled_tc & BIT(i)) {
6697 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6698 if (!ch) {
6699 ret = -ENOMEM;
6700 goto err_free;
6701 }
6702
6703 INIT_LIST_HEAD(&ch->list);
6704 ch->num_queue_pairs =
6705 vsi->tc_config.tc_info[i].qcount;
6706 ch->base_queue =
6707 vsi->tc_config.tc_info[i].qoffset;
6708
6709 /* Bandwidth limit through tc interface is in bytes/s,
6710 * change to Mbit/s
6711 */
6712 max_rate = vsi->mqprio_qopt.max_rate[i];
6713 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6714 ch->max_tx_rate = max_rate;
6715
6716 list_add_tail(&ch->list, &vsi->ch_list);
6717
6718 ret = i40e_create_queue_channel(vsi, ch);
6719 if (ret) {
6720 dev_err(&vsi->back->pdev->dev,
6721 "Failed creating queue channel with TC%d: queues %d\n",
6722 i, ch->num_queue_pairs);
6723 goto err_free;
6724 }
6725 vsi->tc_seid_map[i] = ch->seid;
6726 }
6727 }
6728
6729 /* reset to reconfigure TX queue contexts */
6730 i40e_do_reset(vsi->back, I40E_PF_RESET_FLAG, true);
6731 return ret;
6732
6733 err_free:
6734 i40e_remove_queue_channels(vsi);
6735 return ret;
6736 }
6737
6738 /**
6739 * i40e_veb_config_tc - Configure TCs for given VEB
6740 * @veb: given VEB
6741 * @enabled_tc: TC bitmap
6742 *
6743 * Configures given TC bitmap for VEB (switching) element
6744 **/
i40e_veb_config_tc(struct i40e_veb * veb,u8 enabled_tc)6745 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6746 {
6747 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6748 struct i40e_pf *pf = veb->pf;
6749 int ret = 0;
6750 int i;
6751
6752 /* No TCs or already enabled TCs just return */
6753 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6754 return ret;
6755
6756 bw_data.tc_valid_bits = enabled_tc;
6757 /* bw_data.absolute_credits is not set (relative) */
6758
6759 /* Enable ETS TCs with equal BW Share for now */
6760 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6761 if (enabled_tc & BIT(i))
6762 bw_data.tc_bw_share_credits[i] = 1;
6763 }
6764
6765 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6766 &bw_data, NULL);
6767 if (ret) {
6768 dev_info(&pf->pdev->dev,
6769 "VEB bw config failed, err %pe aq_err %s\n",
6770 ERR_PTR(ret),
6771 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6772 goto out;
6773 }
6774
6775 /* Update the BW information */
6776 ret = i40e_veb_get_bw_info(veb);
6777 if (ret) {
6778 dev_info(&pf->pdev->dev,
6779 "Failed getting veb bw config, err %pe aq_err %s\n",
6780 ERR_PTR(ret),
6781 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6782 }
6783
6784 out:
6785 return ret;
6786 }
6787
6788 #ifdef CONFIG_I40E_DCB
6789 /**
6790 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6791 * @pf: PF struct
6792 *
6793 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6794 * the caller would've quiesce all the VSIs before calling
6795 * this function
6796 **/
i40e_dcb_reconfigure(struct i40e_pf * pf)6797 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6798 {
6799 u8 tc_map = 0;
6800 int ret;
6801 u8 v;
6802
6803 /* Enable the TCs available on PF to all VEBs */
6804 tc_map = i40e_pf_get_tc_map(pf);
6805 if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6806 return;
6807
6808 for (v = 0; v < I40E_MAX_VEB; v++) {
6809 if (!pf->veb[v])
6810 continue;
6811 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6812 if (ret) {
6813 dev_info(&pf->pdev->dev,
6814 "Failed configuring TC for VEB seid=%d\n",
6815 pf->veb[v]->seid);
6816 /* Will try to configure as many components */
6817 }
6818 }
6819
6820 /* Update each VSI */
6821 for (v = 0; v < pf->num_alloc_vsi; v++) {
6822 if (!pf->vsi[v])
6823 continue;
6824
6825 /* - Enable all TCs for the LAN VSI
6826 * - For all others keep them at TC0 for now
6827 */
6828 if (v == pf->lan_vsi)
6829 tc_map = i40e_pf_get_tc_map(pf);
6830 else
6831 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6832
6833 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6834 if (ret) {
6835 dev_info(&pf->pdev->dev,
6836 "Failed configuring TC for VSI seid=%d\n",
6837 pf->vsi[v]->seid);
6838 /* Will try to configure as many components */
6839 } else {
6840 /* Re-configure VSI vectors based on updated TC map */
6841 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6842 if (pf->vsi[v]->netdev)
6843 i40e_dcbnl_set_all(pf->vsi[v]);
6844 }
6845 }
6846 }
6847
6848 /**
6849 * i40e_resume_port_tx - Resume port Tx
6850 * @pf: PF struct
6851 *
6852 * Resume a port's Tx and issue a PF reset in case of failure to
6853 * resume.
6854 **/
i40e_resume_port_tx(struct i40e_pf * pf)6855 static int i40e_resume_port_tx(struct i40e_pf *pf)
6856 {
6857 struct i40e_hw *hw = &pf->hw;
6858 int ret;
6859
6860 ret = i40e_aq_resume_port_tx(hw, NULL);
6861 if (ret) {
6862 dev_info(&pf->pdev->dev,
6863 "Resume Port Tx failed, err %pe aq_err %s\n",
6864 ERR_PTR(ret),
6865 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6866 /* Schedule PF reset to recover */
6867 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6868 i40e_service_event_schedule(pf);
6869 }
6870
6871 return ret;
6872 }
6873
6874 /**
6875 * i40e_suspend_port_tx - Suspend port Tx
6876 * @pf: PF struct
6877 *
6878 * Suspend a port's Tx and issue a PF reset in case of failure.
6879 **/
i40e_suspend_port_tx(struct i40e_pf * pf)6880 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6881 {
6882 struct i40e_hw *hw = &pf->hw;
6883 int ret;
6884
6885 ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6886 if (ret) {
6887 dev_info(&pf->pdev->dev,
6888 "Suspend Port Tx failed, err %pe aq_err %s\n",
6889 ERR_PTR(ret),
6890 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6891 /* Schedule PF reset to recover */
6892 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6893 i40e_service_event_schedule(pf);
6894 }
6895
6896 return ret;
6897 }
6898
6899 /**
6900 * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6901 * @pf: PF being configured
6902 * @new_cfg: New DCBX configuration
6903 *
6904 * Program DCB settings into HW and reconfigure VEB/VSIs on
6905 * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6906 **/
i40e_hw_set_dcb_config(struct i40e_pf * pf,struct i40e_dcbx_config * new_cfg)6907 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6908 struct i40e_dcbx_config *new_cfg)
6909 {
6910 struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6911 int ret;
6912
6913 /* Check if need reconfiguration */
6914 if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6915 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6916 return 0;
6917 }
6918
6919 /* Config change disable all VSIs */
6920 i40e_pf_quiesce_all_vsi(pf);
6921
6922 /* Copy the new config to the current config */
6923 *old_cfg = *new_cfg;
6924 old_cfg->etsrec = old_cfg->etscfg;
6925 ret = i40e_set_dcb_config(&pf->hw);
6926 if (ret) {
6927 dev_info(&pf->pdev->dev,
6928 "Set DCB Config failed, err %pe aq_err %s\n",
6929 ERR_PTR(ret),
6930 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6931 goto out;
6932 }
6933
6934 /* Changes in configuration update VEB/VSI */
6935 i40e_dcb_reconfigure(pf);
6936 out:
6937 /* In case of reset do not try to resume anything */
6938 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6939 /* Re-start the VSIs if disabled */
6940 ret = i40e_resume_port_tx(pf);
6941 /* In case of error no point in resuming VSIs */
6942 if (ret)
6943 goto err;
6944 i40e_pf_unquiesce_all_vsi(pf);
6945 }
6946 err:
6947 return ret;
6948 }
6949
6950 /**
6951 * i40e_hw_dcb_config - Program new DCBX settings into HW
6952 * @pf: PF being configured
6953 * @new_cfg: New DCBX configuration
6954 *
6955 * Program DCB settings into HW and reconfigure VEB/VSIs on
6956 * given PF
6957 **/
i40e_hw_dcb_config(struct i40e_pf * pf,struct i40e_dcbx_config * new_cfg)6958 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6959 {
6960 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6961 u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6962 u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6963 struct i40e_dcbx_config *old_cfg;
6964 u8 mode[I40E_MAX_TRAFFIC_CLASS];
6965 struct i40e_rx_pb_config pb_cfg;
6966 struct i40e_hw *hw = &pf->hw;
6967 u8 num_ports = hw->num_ports;
6968 bool need_reconfig;
6969 int ret = -EINVAL;
6970 u8 lltc_map = 0;
6971 u8 tc_map = 0;
6972 u8 new_numtc;
6973 u8 i;
6974
6975 dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6976 /* Un-pack information to Program ETS HW via shared API
6977 * numtc, tcmap
6978 * LLTC map
6979 * ETS/NON-ETS arbiter mode
6980 * max exponent (credit refills)
6981 * Total number of ports
6982 * PFC priority bit-map
6983 * Priority Table
6984 * BW % per TC
6985 * Arbiter mode between UPs sharing same TC
6986 * TSA table (ETS or non-ETS)
6987 * EEE enabled or not
6988 * MFS TC table
6989 */
6990
6991 new_numtc = i40e_dcb_get_num_tc(new_cfg);
6992
6993 memset(&ets_data, 0, sizeof(ets_data));
6994 for (i = 0; i < new_numtc; i++) {
6995 tc_map |= BIT(i);
6996 switch (new_cfg->etscfg.tsatable[i]) {
6997 case I40E_IEEE_TSA_ETS:
6998 prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6999 ets_data.tc_bw_share_credits[i] =
7000 new_cfg->etscfg.tcbwtable[i];
7001 break;
7002 case I40E_IEEE_TSA_STRICT:
7003 prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
7004 lltc_map |= BIT(i);
7005 ets_data.tc_bw_share_credits[i] =
7006 I40E_DCB_STRICT_PRIO_CREDITS;
7007 break;
7008 default:
7009 /* Invalid TSA type */
7010 need_reconfig = false;
7011 goto out;
7012 }
7013 }
7014
7015 old_cfg = &hw->local_dcbx_config;
7016 /* Check if need reconfiguration */
7017 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
7018
7019 /* If needed, enable/disable frame tagging, disable all VSIs
7020 * and suspend port tx
7021 */
7022 if (need_reconfig) {
7023 /* Enable DCB tagging only when more than one TC */
7024 if (new_numtc > 1)
7025 pf->flags |= I40E_FLAG_DCB_ENABLED;
7026 else
7027 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7028
7029 set_bit(__I40E_PORT_SUSPENDED, pf->state);
7030 /* Reconfiguration needed quiesce all VSIs */
7031 i40e_pf_quiesce_all_vsi(pf);
7032 ret = i40e_suspend_port_tx(pf);
7033 if (ret)
7034 goto err;
7035 }
7036
7037 /* Configure Port ETS Tx Scheduler */
7038 ets_data.tc_valid_bits = tc_map;
7039 ets_data.tc_strict_priority_flags = lltc_map;
7040 ret = i40e_aq_config_switch_comp_ets
7041 (hw, pf->mac_seid, &ets_data,
7042 i40e_aqc_opc_modify_switching_comp_ets, NULL);
7043 if (ret) {
7044 dev_info(&pf->pdev->dev,
7045 "Modify Port ETS failed, err %pe aq_err %s\n",
7046 ERR_PTR(ret),
7047 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7048 goto out;
7049 }
7050
7051 /* Configure Rx ETS HW */
7052 memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
7053 i40e_dcb_hw_set_num_tc(hw, new_numtc);
7054 i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
7055 I40E_DCB_ARB_MODE_STRICT_PRIORITY,
7056 I40E_DCB_DEFAULT_MAX_EXPONENT,
7057 lltc_map);
7058 i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
7059 i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
7060 prio_type);
7061 i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
7062 new_cfg->etscfg.prioritytable);
7063 i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
7064
7065 /* Configure Rx Packet Buffers in HW */
7066 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7067 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
7068 mfs_tc[i] += I40E_PACKET_HDR_PAD;
7069 }
7070
7071 i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
7072 false, new_cfg->pfc.pfcenable,
7073 mfs_tc, &pb_cfg);
7074 i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
7075
7076 /* Update the local Rx Packet buffer config */
7077 pf->pb_cfg = pb_cfg;
7078
7079 /* Inform the FW about changes to DCB configuration */
7080 ret = i40e_aq_dcb_updated(&pf->hw, NULL);
7081 if (ret) {
7082 dev_info(&pf->pdev->dev,
7083 "DCB Updated failed, err %pe aq_err %s\n",
7084 ERR_PTR(ret),
7085 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7086 goto out;
7087 }
7088
7089 /* Update the port DCBx configuration */
7090 *old_cfg = *new_cfg;
7091
7092 /* Changes in configuration update VEB/VSI */
7093 i40e_dcb_reconfigure(pf);
7094 out:
7095 /* Re-start the VSIs if disabled */
7096 if (need_reconfig) {
7097 ret = i40e_resume_port_tx(pf);
7098
7099 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
7100 /* In case of error no point in resuming VSIs */
7101 if (ret)
7102 goto err;
7103
7104 /* Wait for the PF's queues to be disabled */
7105 ret = i40e_pf_wait_queues_disabled(pf);
7106 if (ret) {
7107 /* Schedule PF reset to recover */
7108 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
7109 i40e_service_event_schedule(pf);
7110 goto err;
7111 } else {
7112 i40e_pf_unquiesce_all_vsi(pf);
7113 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7114 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
7115 }
7116 /* registers are set, lets apply */
7117 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
7118 ret = i40e_hw_set_dcb_config(pf, new_cfg);
7119 }
7120
7121 err:
7122 return ret;
7123 }
7124
7125 /**
7126 * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
7127 * @pf: PF being queried
7128 *
7129 * Set default DCB configuration in case DCB is to be done in SW.
7130 **/
i40e_dcb_sw_default_config(struct i40e_pf * pf)7131 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
7132 {
7133 struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
7134 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
7135 struct i40e_hw *hw = &pf->hw;
7136 int err;
7137
7138 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
7139 /* Update the local cached instance with TC0 ETS */
7140 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
7141 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7142 pf->tmp_cfg.etscfg.maxtcs = 0;
7143 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7144 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
7145 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
7146 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
7147 /* FW needs one App to configure HW */
7148 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
7149 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
7150 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
7151 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
7152
7153 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
7154 }
7155
7156 memset(&ets_data, 0, sizeof(ets_data));
7157 ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
7158 ets_data.tc_strict_priority_flags = 0; /* ETS */
7159 ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
7160
7161 /* Enable ETS on the Physical port */
7162 err = i40e_aq_config_switch_comp_ets
7163 (hw, pf->mac_seid, &ets_data,
7164 i40e_aqc_opc_enable_switching_comp_ets, NULL);
7165 if (err) {
7166 dev_info(&pf->pdev->dev,
7167 "Enable Port ETS failed, err %pe aq_err %s\n",
7168 ERR_PTR(err),
7169 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7170 err = -ENOENT;
7171 goto out;
7172 }
7173
7174 /* Update the local cached instance with TC0 ETS */
7175 dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7176 dcb_cfg->etscfg.cbs = 0;
7177 dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
7178 dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7179
7180 out:
7181 return err;
7182 }
7183
7184 /**
7185 * i40e_init_pf_dcb - Initialize DCB configuration
7186 * @pf: PF being configured
7187 *
7188 * Query the current DCB configuration and cache it
7189 * in the hardware structure
7190 **/
i40e_init_pf_dcb(struct i40e_pf * pf)7191 static int i40e_init_pf_dcb(struct i40e_pf *pf)
7192 {
7193 struct i40e_hw *hw = &pf->hw;
7194 int err;
7195
7196 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
7197 * Also do not enable DCBx if FW LLDP agent is disabled
7198 */
7199 if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
7200 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7201 err = -EOPNOTSUPP;
7202 goto out;
7203 }
7204 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
7205 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7206 err = i40e_dcb_sw_default_config(pf);
7207 if (err) {
7208 dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7209 goto out;
7210 }
7211 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7212 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7213 DCB_CAP_DCBX_VER_IEEE;
7214 /* at init capable but disabled */
7215 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7216 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7217 goto out;
7218 }
7219 err = i40e_init_dcb(hw, true);
7220 if (!err) {
7221 /* Device/Function is not DCBX capable */
7222 if ((!hw->func_caps.dcb) ||
7223 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
7224 dev_info(&pf->pdev->dev,
7225 "DCBX offload is not supported or is disabled for this PF.\n");
7226 } else {
7227 /* When status is not DISABLED then DCBX in FW */
7228 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7229 DCB_CAP_DCBX_VER_IEEE;
7230
7231 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7232 /* Enable DCB tagging only when more than one TC
7233 * or explicitly disable if only one TC
7234 */
7235 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
7236 pf->flags |= I40E_FLAG_DCB_ENABLED;
7237 else
7238 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7239 dev_dbg(&pf->pdev->dev,
7240 "DCBX offload is supported for this PF.\n");
7241 }
7242 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
7243 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7244 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
7245 } else {
7246 dev_info(&pf->pdev->dev,
7247 "Query for DCB configuration failed, err %pe aq_err %s\n",
7248 ERR_PTR(err),
7249 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7250 }
7251
7252 out:
7253 return err;
7254 }
7255 #endif /* CONFIG_I40E_DCB */
7256
7257 /**
7258 * i40e_print_link_message - print link up or down
7259 * @vsi: the VSI for which link needs a message
7260 * @isup: true of link is up, false otherwise
7261 */
i40e_print_link_message(struct i40e_vsi * vsi,bool isup)7262 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
7263 {
7264 enum i40e_aq_link_speed new_speed;
7265 struct i40e_pf *pf = vsi->back;
7266 char *speed = "Unknown";
7267 char *fc = "Unknown";
7268 char *fec = "";
7269 char *req_fec = "";
7270 char *an = "";
7271
7272 if (isup)
7273 new_speed = pf->hw.phy.link_info.link_speed;
7274 else
7275 new_speed = I40E_LINK_SPEED_UNKNOWN;
7276
7277 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
7278 return;
7279 vsi->current_isup = isup;
7280 vsi->current_speed = new_speed;
7281 if (!isup) {
7282 netdev_info(vsi->netdev, "NIC Link is Down\n");
7283 return;
7284 }
7285
7286 /* Warn user if link speed on NPAR enabled partition is not at
7287 * least 10GB
7288 */
7289 if (pf->hw.func_caps.npar_enable &&
7290 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7291 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7292 netdev_warn(vsi->netdev,
7293 "The partition detected link speed that is less than 10Gbps\n");
7294
7295 switch (pf->hw.phy.link_info.link_speed) {
7296 case I40E_LINK_SPEED_40GB:
7297 speed = "40 G";
7298 break;
7299 case I40E_LINK_SPEED_20GB:
7300 speed = "20 G";
7301 break;
7302 case I40E_LINK_SPEED_25GB:
7303 speed = "25 G";
7304 break;
7305 case I40E_LINK_SPEED_10GB:
7306 speed = "10 G";
7307 break;
7308 case I40E_LINK_SPEED_5GB:
7309 speed = "5 G";
7310 break;
7311 case I40E_LINK_SPEED_2_5GB:
7312 speed = "2.5 G";
7313 break;
7314 case I40E_LINK_SPEED_1GB:
7315 speed = "1000 M";
7316 break;
7317 case I40E_LINK_SPEED_100MB:
7318 speed = "100 M";
7319 break;
7320 default:
7321 break;
7322 }
7323
7324 switch (pf->hw.fc.current_mode) {
7325 case I40E_FC_FULL:
7326 fc = "RX/TX";
7327 break;
7328 case I40E_FC_TX_PAUSE:
7329 fc = "TX";
7330 break;
7331 case I40E_FC_RX_PAUSE:
7332 fc = "RX";
7333 break;
7334 default:
7335 fc = "None";
7336 break;
7337 }
7338
7339 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7340 req_fec = "None";
7341 fec = "None";
7342 an = "False";
7343
7344 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7345 an = "True";
7346
7347 if (pf->hw.phy.link_info.fec_info &
7348 I40E_AQ_CONFIG_FEC_KR_ENA)
7349 fec = "CL74 FC-FEC/BASE-R";
7350 else if (pf->hw.phy.link_info.fec_info &
7351 I40E_AQ_CONFIG_FEC_RS_ENA)
7352 fec = "CL108 RS-FEC";
7353
7354 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7355 * both RS and FC are requested
7356 */
7357 if (vsi->back->hw.phy.link_info.req_fec_info &
7358 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7359 if (vsi->back->hw.phy.link_info.req_fec_info &
7360 I40E_AQ_REQUEST_FEC_RS)
7361 req_fec = "CL108 RS-FEC";
7362 else
7363 req_fec = "CL74 FC-FEC/BASE-R";
7364 }
7365 netdev_info(vsi->netdev,
7366 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7367 speed, req_fec, fec, an, fc);
7368 } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7369 req_fec = "None";
7370 fec = "None";
7371 an = "False";
7372
7373 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7374 an = "True";
7375
7376 if (pf->hw.phy.link_info.fec_info &
7377 I40E_AQ_CONFIG_FEC_KR_ENA)
7378 fec = "CL74 FC-FEC/BASE-R";
7379
7380 if (pf->hw.phy.link_info.req_fec_info &
7381 I40E_AQ_REQUEST_FEC_KR)
7382 req_fec = "CL74 FC-FEC/BASE-R";
7383
7384 netdev_info(vsi->netdev,
7385 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7386 speed, req_fec, fec, an, fc);
7387 } else {
7388 netdev_info(vsi->netdev,
7389 "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7390 speed, fc);
7391 }
7392
7393 }
7394
7395 /**
7396 * i40e_up_complete - Finish the last steps of bringing up a connection
7397 * @vsi: the VSI being configured
7398 **/
i40e_up_complete(struct i40e_vsi * vsi)7399 static int i40e_up_complete(struct i40e_vsi *vsi)
7400 {
7401 struct i40e_pf *pf = vsi->back;
7402 int err;
7403
7404 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7405 i40e_vsi_configure_msix(vsi);
7406 else
7407 i40e_configure_msi_and_legacy(vsi);
7408
7409 /* start rings */
7410 err = i40e_vsi_start_rings(vsi);
7411 if (err)
7412 return err;
7413
7414 clear_bit(__I40E_VSI_DOWN, vsi->state);
7415 i40e_napi_enable_all(vsi);
7416 i40e_vsi_enable_irq(vsi);
7417
7418 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7419 (vsi->netdev)) {
7420 i40e_print_link_message(vsi, true);
7421 netif_tx_start_all_queues(vsi->netdev);
7422 netif_carrier_on(vsi->netdev);
7423 }
7424
7425 /* replay FDIR SB filters */
7426 if (vsi->type == I40E_VSI_FDIR) {
7427 /* reset fd counters */
7428 pf->fd_add_err = 0;
7429 pf->fd_atr_cnt = 0;
7430 i40e_fdir_filter_restore(vsi);
7431 }
7432
7433 /* On the next run of the service_task, notify any clients of the new
7434 * opened netdev
7435 */
7436 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7437 i40e_service_event_schedule(pf);
7438
7439 return 0;
7440 }
7441
7442 /**
7443 * i40e_vsi_reinit_locked - Reset the VSI
7444 * @vsi: the VSI being configured
7445 *
7446 * Rebuild the ring structs after some configuration
7447 * has changed, e.g. MTU size.
7448 **/
i40e_vsi_reinit_locked(struct i40e_vsi * vsi)7449 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7450 {
7451 struct i40e_pf *pf = vsi->back;
7452
7453 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7454 usleep_range(1000, 2000);
7455 i40e_down(vsi);
7456
7457 i40e_up(vsi);
7458 clear_bit(__I40E_CONFIG_BUSY, pf->state);
7459 }
7460
7461 /**
7462 * i40e_force_link_state - Force the link status
7463 * @pf: board private structure
7464 * @is_up: whether the link state should be forced up or down
7465 **/
i40e_force_link_state(struct i40e_pf * pf,bool is_up)7466 static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7467 {
7468 struct i40e_aq_get_phy_abilities_resp abilities;
7469 struct i40e_aq_set_phy_config config = {0};
7470 bool non_zero_phy_type = is_up;
7471 struct i40e_hw *hw = &pf->hw;
7472 u64 mask;
7473 u8 speed;
7474 int err;
7475
7476 /* Card might've been put in an unstable state by other drivers
7477 * and applications, which causes incorrect speed values being
7478 * set on startup. In order to clear speed registers, we call
7479 * get_phy_capabilities twice, once to get initial state of
7480 * available speeds, and once to get current PHY config.
7481 */
7482 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7483 NULL);
7484 if (err) {
7485 dev_err(&pf->pdev->dev,
7486 "failed to get phy cap., ret = %pe last_status = %s\n",
7487 ERR_PTR(err),
7488 i40e_aq_str(hw, hw->aq.asq_last_status));
7489 return err;
7490 }
7491 speed = abilities.link_speed;
7492
7493 /* Get the current phy config */
7494 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7495 NULL);
7496 if (err) {
7497 dev_err(&pf->pdev->dev,
7498 "failed to get phy cap., ret = %pe last_status = %s\n",
7499 ERR_PTR(err),
7500 i40e_aq_str(hw, hw->aq.asq_last_status));
7501 return err;
7502 }
7503
7504 /* If link needs to go up, but was not forced to go down,
7505 * and its speed values are OK, no need for a flap
7506 * if non_zero_phy_type was set, still need to force up
7507 */
7508 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7509 non_zero_phy_type = true;
7510 else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7511 return 0;
7512
7513 /* To force link we need to set bits for all supported PHY types,
7514 * but there are now more than 32, so we need to split the bitmap
7515 * across two fields.
7516 */
7517 mask = I40E_PHY_TYPES_BITMASK;
7518 config.phy_type =
7519 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7520 config.phy_type_ext =
7521 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7522 /* Copy the old settings, except of phy_type */
7523 config.abilities = abilities.abilities;
7524 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7525 if (is_up)
7526 config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7527 else
7528 config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7529 }
7530 if (abilities.link_speed != 0)
7531 config.link_speed = abilities.link_speed;
7532 else
7533 config.link_speed = speed;
7534 config.eee_capability = abilities.eee_capability;
7535 config.eeer = abilities.eeer_val;
7536 config.low_power_ctrl = abilities.d3_lpan;
7537 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7538 I40E_AQ_PHY_FEC_CONFIG_MASK;
7539 err = i40e_aq_set_phy_config(hw, &config, NULL);
7540
7541 if (err) {
7542 dev_err(&pf->pdev->dev,
7543 "set phy config ret = %pe last_status = %s\n",
7544 ERR_PTR(err),
7545 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7546 return err;
7547 }
7548
7549 /* Update the link info */
7550 err = i40e_update_link_info(hw);
7551 if (err) {
7552 /* Wait a little bit (on 40G cards it sometimes takes a really
7553 * long time for link to come back from the atomic reset)
7554 * and try once more
7555 */
7556 msleep(1000);
7557 i40e_update_link_info(hw);
7558 }
7559
7560 i40e_aq_set_link_restart_an(hw, is_up, NULL);
7561
7562 return 0;
7563 }
7564
7565 /**
7566 * i40e_up - Bring the connection back up after being down
7567 * @vsi: the VSI being configured
7568 **/
i40e_up(struct i40e_vsi * vsi)7569 int i40e_up(struct i40e_vsi *vsi)
7570 {
7571 int err;
7572
7573 if (vsi->type == I40E_VSI_MAIN &&
7574 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7575 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7576 i40e_force_link_state(vsi->back, true);
7577
7578 err = i40e_vsi_configure(vsi);
7579 if (!err)
7580 err = i40e_up_complete(vsi);
7581
7582 return err;
7583 }
7584
7585 /**
7586 * i40e_down - Shutdown the connection processing
7587 * @vsi: the VSI being stopped
7588 **/
i40e_down(struct i40e_vsi * vsi)7589 void i40e_down(struct i40e_vsi *vsi)
7590 {
7591 int i;
7592
7593 /* It is assumed that the caller of this function
7594 * sets the vsi->state __I40E_VSI_DOWN bit.
7595 */
7596 if (vsi->netdev) {
7597 netif_carrier_off(vsi->netdev);
7598 netif_tx_disable(vsi->netdev);
7599 }
7600 i40e_vsi_disable_irq(vsi);
7601 i40e_vsi_stop_rings(vsi);
7602 if (vsi->type == I40E_VSI_MAIN &&
7603 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7604 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7605 i40e_force_link_state(vsi->back, false);
7606 i40e_napi_disable_all(vsi);
7607
7608 for (i = 0; i < vsi->num_queue_pairs; i++) {
7609 i40e_clean_tx_ring(vsi->tx_rings[i]);
7610 if (i40e_enabled_xdp_vsi(vsi)) {
7611 /* Make sure that in-progress ndo_xdp_xmit and
7612 * ndo_xsk_wakeup calls are completed.
7613 */
7614 synchronize_rcu();
7615 i40e_clean_tx_ring(vsi->xdp_rings[i]);
7616 }
7617 i40e_clean_rx_ring(vsi->rx_rings[i]);
7618 }
7619
7620 }
7621
7622 /**
7623 * i40e_validate_mqprio_qopt- validate queue mapping info
7624 * @vsi: the VSI being configured
7625 * @mqprio_qopt: queue parametrs
7626 **/
i40e_validate_mqprio_qopt(struct i40e_vsi * vsi,struct tc_mqprio_qopt_offload * mqprio_qopt)7627 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7628 struct tc_mqprio_qopt_offload *mqprio_qopt)
7629 {
7630 u64 sum_max_rate = 0;
7631 u64 max_rate = 0;
7632 int i;
7633
7634 if (mqprio_qopt->qopt.offset[0] != 0 ||
7635 mqprio_qopt->qopt.num_tc < 1 ||
7636 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7637 return -EINVAL;
7638 for (i = 0; ; i++) {
7639 if (!mqprio_qopt->qopt.count[i])
7640 return -EINVAL;
7641 if (mqprio_qopt->min_rate[i]) {
7642 dev_err(&vsi->back->pdev->dev,
7643 "Invalid min tx rate (greater than 0) specified\n");
7644 return -EINVAL;
7645 }
7646 max_rate = mqprio_qopt->max_rate[i];
7647 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7648 sum_max_rate += max_rate;
7649
7650 if (i >= mqprio_qopt->qopt.num_tc - 1)
7651 break;
7652 if (mqprio_qopt->qopt.offset[i + 1] !=
7653 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7654 return -EINVAL;
7655 }
7656 if (vsi->num_queue_pairs <
7657 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7658 dev_err(&vsi->back->pdev->dev,
7659 "Failed to create traffic channel, insufficient number of queues.\n");
7660 return -EINVAL;
7661 }
7662 if (sum_max_rate > i40e_get_link_speed(vsi)) {
7663 dev_err(&vsi->back->pdev->dev,
7664 "Invalid max tx rate specified\n");
7665 return -EINVAL;
7666 }
7667 return 0;
7668 }
7669
7670 /**
7671 * i40e_vsi_set_default_tc_config - set default values for tc configuration
7672 * @vsi: the VSI being configured
7673 **/
i40e_vsi_set_default_tc_config(struct i40e_vsi * vsi)7674 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7675 {
7676 u16 qcount;
7677 int i;
7678
7679 /* Only TC0 is enabled */
7680 vsi->tc_config.numtc = 1;
7681 vsi->tc_config.enabled_tc = 1;
7682 qcount = min_t(int, vsi->alloc_queue_pairs,
7683 i40e_pf_get_max_q_per_tc(vsi->back));
7684 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7685 /* For the TC that is not enabled set the offset to default
7686 * queue and allocate one queue for the given TC.
7687 */
7688 vsi->tc_config.tc_info[i].qoffset = 0;
7689 if (i == 0)
7690 vsi->tc_config.tc_info[i].qcount = qcount;
7691 else
7692 vsi->tc_config.tc_info[i].qcount = 1;
7693 vsi->tc_config.tc_info[i].netdev_tc = 0;
7694 }
7695 }
7696
7697 /**
7698 * i40e_del_macvlan_filter
7699 * @hw: pointer to the HW structure
7700 * @seid: seid of the channel VSI
7701 * @macaddr: the mac address to apply as a filter
7702 * @aq_err: store the admin Q error
7703 *
7704 * This function deletes a mac filter on the channel VSI which serves as the
7705 * macvlan. Returns 0 on success.
7706 **/
i40e_del_macvlan_filter(struct i40e_hw * hw,u16 seid,const u8 * macaddr,int * aq_err)7707 static int i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7708 const u8 *macaddr, int *aq_err)
7709 {
7710 struct i40e_aqc_remove_macvlan_element_data element;
7711 int status;
7712
7713 memset(&element, 0, sizeof(element));
7714 ether_addr_copy(element.mac_addr, macaddr);
7715 element.vlan_tag = 0;
7716 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7717 status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7718 *aq_err = hw->aq.asq_last_status;
7719
7720 return status;
7721 }
7722
7723 /**
7724 * i40e_add_macvlan_filter
7725 * @hw: pointer to the HW structure
7726 * @seid: seid of the channel VSI
7727 * @macaddr: the mac address to apply as a filter
7728 * @aq_err: store the admin Q error
7729 *
7730 * This function adds a mac filter on the channel VSI which serves as the
7731 * macvlan. Returns 0 on success.
7732 **/
i40e_add_macvlan_filter(struct i40e_hw * hw,u16 seid,const u8 * macaddr,int * aq_err)7733 static int i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7734 const u8 *macaddr, int *aq_err)
7735 {
7736 struct i40e_aqc_add_macvlan_element_data element;
7737 u16 cmd_flags = 0;
7738 int status;
7739
7740 ether_addr_copy(element.mac_addr, macaddr);
7741 element.vlan_tag = 0;
7742 element.queue_number = 0;
7743 element.match_method = I40E_AQC_MM_ERR_NO_RES;
7744 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7745 element.flags = cpu_to_le16(cmd_flags);
7746 status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7747 *aq_err = hw->aq.asq_last_status;
7748
7749 return status;
7750 }
7751
7752 /**
7753 * i40e_reset_ch_rings - Reset the queue contexts in a channel
7754 * @vsi: the VSI we want to access
7755 * @ch: the channel we want to access
7756 */
i40e_reset_ch_rings(struct i40e_vsi * vsi,struct i40e_channel * ch)7757 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7758 {
7759 struct i40e_ring *tx_ring, *rx_ring;
7760 u16 pf_q;
7761 int i;
7762
7763 for (i = 0; i < ch->num_queue_pairs; i++) {
7764 pf_q = ch->base_queue + i;
7765 tx_ring = vsi->tx_rings[pf_q];
7766 tx_ring->ch = NULL;
7767 rx_ring = vsi->rx_rings[pf_q];
7768 rx_ring->ch = NULL;
7769 }
7770 }
7771
7772 /**
7773 * i40e_free_macvlan_channels
7774 * @vsi: the VSI we want to access
7775 *
7776 * This function frees the Qs of the channel VSI from
7777 * the stack and also deletes the channel VSIs which
7778 * serve as macvlans.
7779 */
i40e_free_macvlan_channels(struct i40e_vsi * vsi)7780 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7781 {
7782 struct i40e_channel *ch, *ch_tmp;
7783 int ret;
7784
7785 if (list_empty(&vsi->macvlan_list))
7786 return;
7787
7788 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7789 struct i40e_vsi *parent_vsi;
7790
7791 if (i40e_is_channel_macvlan(ch)) {
7792 i40e_reset_ch_rings(vsi, ch);
7793 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7794 netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7795 netdev_set_sb_channel(ch->fwd->netdev, 0);
7796 kfree(ch->fwd);
7797 ch->fwd = NULL;
7798 }
7799
7800 list_del(&ch->list);
7801 parent_vsi = ch->parent_vsi;
7802 if (!parent_vsi || !ch->initialized) {
7803 kfree(ch);
7804 continue;
7805 }
7806
7807 /* remove the VSI */
7808 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7809 NULL);
7810 if (ret)
7811 dev_err(&vsi->back->pdev->dev,
7812 "unable to remove channel (%d) for parent VSI(%d)\n",
7813 ch->seid, parent_vsi->seid);
7814 kfree(ch);
7815 }
7816 vsi->macvlan_cnt = 0;
7817 }
7818
7819 /**
7820 * i40e_fwd_ring_up - bring the macvlan device up
7821 * @vsi: the VSI we want to access
7822 * @vdev: macvlan netdevice
7823 * @fwd: the private fwd structure
7824 */
i40e_fwd_ring_up(struct i40e_vsi * vsi,struct net_device * vdev,struct i40e_fwd_adapter * fwd)7825 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7826 struct i40e_fwd_adapter *fwd)
7827 {
7828 struct i40e_channel *ch = NULL, *ch_tmp, *iter;
7829 int ret = 0, num_tc = 1, i, aq_err;
7830 struct i40e_pf *pf = vsi->back;
7831 struct i40e_hw *hw = &pf->hw;
7832
7833 /* Go through the list and find an available channel */
7834 list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7835 if (!i40e_is_channel_macvlan(iter)) {
7836 iter->fwd = fwd;
7837 /* record configuration for macvlan interface in vdev */
7838 for (i = 0; i < num_tc; i++)
7839 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7840 i,
7841 iter->num_queue_pairs,
7842 iter->base_queue);
7843 for (i = 0; i < iter->num_queue_pairs; i++) {
7844 struct i40e_ring *tx_ring, *rx_ring;
7845 u16 pf_q;
7846
7847 pf_q = iter->base_queue + i;
7848
7849 /* Get to TX ring ptr */
7850 tx_ring = vsi->tx_rings[pf_q];
7851 tx_ring->ch = iter;
7852
7853 /* Get the RX ring ptr */
7854 rx_ring = vsi->rx_rings[pf_q];
7855 rx_ring->ch = iter;
7856 }
7857 ch = iter;
7858 break;
7859 }
7860 }
7861
7862 if (!ch)
7863 return -EINVAL;
7864
7865 /* Guarantee all rings are updated before we update the
7866 * MAC address filter.
7867 */
7868 wmb();
7869
7870 /* Add a mac filter */
7871 ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7872 if (ret) {
7873 /* if we cannot add the MAC rule then disable the offload */
7874 macvlan_release_l2fw_offload(vdev);
7875 for (i = 0; i < ch->num_queue_pairs; i++) {
7876 struct i40e_ring *rx_ring;
7877 u16 pf_q;
7878
7879 pf_q = ch->base_queue + i;
7880 rx_ring = vsi->rx_rings[pf_q];
7881 rx_ring->netdev = NULL;
7882 }
7883 dev_info(&pf->pdev->dev,
7884 "Error adding mac filter on macvlan err %pe, aq_err %s\n",
7885 ERR_PTR(ret),
7886 i40e_aq_str(hw, aq_err));
7887 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7888 }
7889
7890 return ret;
7891 }
7892
7893 /**
7894 * i40e_setup_macvlans - create the channels which will be macvlans
7895 * @vsi: the VSI we want to access
7896 * @macvlan_cnt: no. of macvlans to be setup
7897 * @qcnt: no. of Qs per macvlan
7898 * @vdev: macvlan netdevice
7899 */
i40e_setup_macvlans(struct i40e_vsi * vsi,u16 macvlan_cnt,u16 qcnt,struct net_device * vdev)7900 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7901 struct net_device *vdev)
7902 {
7903 struct i40e_pf *pf = vsi->back;
7904 struct i40e_hw *hw = &pf->hw;
7905 struct i40e_vsi_context ctxt;
7906 u16 sections, qmap, num_qps;
7907 struct i40e_channel *ch;
7908 int i, pow, ret = 0;
7909 u8 offset = 0;
7910
7911 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7912 return -EINVAL;
7913
7914 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7915
7916 /* find the next higher power-of-2 of num queue pairs */
7917 pow = fls(roundup_pow_of_two(num_qps) - 1);
7918
7919 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7920 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7921
7922 /* Setup context bits for the main VSI */
7923 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7924 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7925 memset(&ctxt, 0, sizeof(ctxt));
7926 ctxt.seid = vsi->seid;
7927 ctxt.pf_num = vsi->back->hw.pf_id;
7928 ctxt.vf_num = 0;
7929 ctxt.uplink_seid = vsi->uplink_seid;
7930 ctxt.info = vsi->info;
7931 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7932 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7933 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7934 ctxt.info.valid_sections |= cpu_to_le16(sections);
7935
7936 /* Reconfigure RSS for main VSI with new max queue count */
7937 vsi->rss_size = max_t(u16, num_qps, qcnt);
7938 ret = i40e_vsi_config_rss(vsi);
7939 if (ret) {
7940 dev_info(&pf->pdev->dev,
7941 "Failed to reconfig RSS for num_queues (%u)\n",
7942 vsi->rss_size);
7943 return ret;
7944 }
7945 vsi->reconfig_rss = true;
7946 dev_dbg(&vsi->back->pdev->dev,
7947 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7948 vsi->next_base_queue = num_qps;
7949 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7950
7951 /* Update the VSI after updating the VSI queue-mapping
7952 * information
7953 */
7954 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7955 if (ret) {
7956 dev_info(&pf->pdev->dev,
7957 "Update vsi tc config failed, err %pe aq_err %s\n",
7958 ERR_PTR(ret),
7959 i40e_aq_str(hw, hw->aq.asq_last_status));
7960 return ret;
7961 }
7962 /* update the local VSI info with updated queue map */
7963 i40e_vsi_update_queue_map(vsi, &ctxt);
7964 vsi->info.valid_sections = 0;
7965
7966 /* Create channels for macvlans */
7967 INIT_LIST_HEAD(&vsi->macvlan_list);
7968 for (i = 0; i < macvlan_cnt; i++) {
7969 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7970 if (!ch) {
7971 ret = -ENOMEM;
7972 goto err_free;
7973 }
7974 INIT_LIST_HEAD(&ch->list);
7975 ch->num_queue_pairs = qcnt;
7976 if (!i40e_setup_channel(pf, vsi, ch)) {
7977 ret = -EINVAL;
7978 kfree(ch);
7979 goto err_free;
7980 }
7981 ch->parent_vsi = vsi;
7982 vsi->cnt_q_avail -= ch->num_queue_pairs;
7983 vsi->macvlan_cnt++;
7984 list_add_tail(&ch->list, &vsi->macvlan_list);
7985 }
7986
7987 return ret;
7988
7989 err_free:
7990 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7991 i40e_free_macvlan_channels(vsi);
7992
7993 return ret;
7994 }
7995
7996 /**
7997 * i40e_fwd_add - configure macvlans
7998 * @netdev: net device to configure
7999 * @vdev: macvlan netdevice
8000 **/
i40e_fwd_add(struct net_device * netdev,struct net_device * vdev)8001 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
8002 {
8003 struct i40e_netdev_priv *np = netdev_priv(netdev);
8004 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
8005 struct i40e_vsi *vsi = np->vsi;
8006 struct i40e_pf *pf = vsi->back;
8007 struct i40e_fwd_adapter *fwd;
8008 int avail_macvlan, ret;
8009
8010 if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
8011 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
8012 return ERR_PTR(-EINVAL);
8013 }
8014 if (i40e_is_tc_mqprio_enabled(pf)) {
8015 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
8016 return ERR_PTR(-EINVAL);
8017 }
8018 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
8019 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
8020 return ERR_PTR(-EINVAL);
8021 }
8022
8023 /* The macvlan device has to be a single Q device so that the
8024 * tc_to_txq field can be reused to pick the tx queue.
8025 */
8026 if (netif_is_multiqueue(vdev))
8027 return ERR_PTR(-ERANGE);
8028
8029 if (!vsi->macvlan_cnt) {
8030 /* reserve bit 0 for the pf device */
8031 set_bit(0, vsi->fwd_bitmask);
8032
8033 /* Try to reserve as many queues as possible for macvlans. First
8034 * reserve 3/4th of max vectors, then half, then quarter and
8035 * calculate Qs per macvlan as you go
8036 */
8037 vectors = pf->num_lan_msix;
8038 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
8039 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
8040 q_per_macvlan = 4;
8041 macvlan_cnt = (vectors - 32) / 4;
8042 } else if (vectors <= 64 && vectors > 32) {
8043 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
8044 q_per_macvlan = 2;
8045 macvlan_cnt = (vectors - 16) / 2;
8046 } else if (vectors <= 32 && vectors > 16) {
8047 /* allocate 1 Q per macvlan and 16 Qs to the PF*/
8048 q_per_macvlan = 1;
8049 macvlan_cnt = vectors - 16;
8050 } else if (vectors <= 16 && vectors > 8) {
8051 /* allocate 1 Q per macvlan and 8 Qs to the PF */
8052 q_per_macvlan = 1;
8053 macvlan_cnt = vectors - 8;
8054 } else {
8055 /* allocate 1 Q per macvlan and 1 Q to the PF */
8056 q_per_macvlan = 1;
8057 macvlan_cnt = vectors - 1;
8058 }
8059
8060 if (macvlan_cnt == 0)
8061 return ERR_PTR(-EBUSY);
8062
8063 /* Quiesce VSI queues */
8064 i40e_quiesce_vsi(vsi);
8065
8066 /* sets up the macvlans but does not "enable" them */
8067 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
8068 vdev);
8069 if (ret)
8070 return ERR_PTR(ret);
8071
8072 /* Unquiesce VSI */
8073 i40e_unquiesce_vsi(vsi);
8074 }
8075 avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
8076 vsi->macvlan_cnt);
8077 if (avail_macvlan >= I40E_MAX_MACVLANS)
8078 return ERR_PTR(-EBUSY);
8079
8080 /* create the fwd struct */
8081 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
8082 if (!fwd)
8083 return ERR_PTR(-ENOMEM);
8084
8085 set_bit(avail_macvlan, vsi->fwd_bitmask);
8086 fwd->bit_no = avail_macvlan;
8087 netdev_set_sb_channel(vdev, avail_macvlan);
8088 fwd->netdev = vdev;
8089
8090 if (!netif_running(netdev))
8091 return fwd;
8092
8093 /* Set fwd ring up */
8094 ret = i40e_fwd_ring_up(vsi, vdev, fwd);
8095 if (ret) {
8096 /* unbind the queues and drop the subordinate channel config */
8097 netdev_unbind_sb_channel(netdev, vdev);
8098 netdev_set_sb_channel(vdev, 0);
8099
8100 kfree(fwd);
8101 return ERR_PTR(-EINVAL);
8102 }
8103
8104 return fwd;
8105 }
8106
8107 /**
8108 * i40e_del_all_macvlans - Delete all the mac filters on the channels
8109 * @vsi: the VSI we want to access
8110 */
i40e_del_all_macvlans(struct i40e_vsi * vsi)8111 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
8112 {
8113 struct i40e_channel *ch, *ch_tmp;
8114 struct i40e_pf *pf = vsi->back;
8115 struct i40e_hw *hw = &pf->hw;
8116 int aq_err, ret = 0;
8117
8118 if (list_empty(&vsi->macvlan_list))
8119 return;
8120
8121 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8122 if (i40e_is_channel_macvlan(ch)) {
8123 ret = i40e_del_macvlan_filter(hw, ch->seid,
8124 i40e_channel_mac(ch),
8125 &aq_err);
8126 if (!ret) {
8127 /* Reset queue contexts */
8128 i40e_reset_ch_rings(vsi, ch);
8129 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
8130 netdev_unbind_sb_channel(vsi->netdev,
8131 ch->fwd->netdev);
8132 netdev_set_sb_channel(ch->fwd->netdev, 0);
8133 kfree(ch->fwd);
8134 ch->fwd = NULL;
8135 }
8136 }
8137 }
8138 }
8139
8140 /**
8141 * i40e_fwd_del - delete macvlan interfaces
8142 * @netdev: net device to configure
8143 * @vdev: macvlan netdevice
8144 */
i40e_fwd_del(struct net_device * netdev,void * vdev)8145 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
8146 {
8147 struct i40e_netdev_priv *np = netdev_priv(netdev);
8148 struct i40e_fwd_adapter *fwd = vdev;
8149 struct i40e_channel *ch, *ch_tmp;
8150 struct i40e_vsi *vsi = np->vsi;
8151 struct i40e_pf *pf = vsi->back;
8152 struct i40e_hw *hw = &pf->hw;
8153 int aq_err, ret = 0;
8154
8155 /* Find the channel associated with the macvlan and del mac filter */
8156 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8157 if (i40e_is_channel_macvlan(ch) &&
8158 ether_addr_equal(i40e_channel_mac(ch),
8159 fwd->netdev->dev_addr)) {
8160 ret = i40e_del_macvlan_filter(hw, ch->seid,
8161 i40e_channel_mac(ch),
8162 &aq_err);
8163 if (!ret) {
8164 /* Reset queue contexts */
8165 i40e_reset_ch_rings(vsi, ch);
8166 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
8167 netdev_unbind_sb_channel(netdev, fwd->netdev);
8168 netdev_set_sb_channel(fwd->netdev, 0);
8169 kfree(ch->fwd);
8170 ch->fwd = NULL;
8171 } else {
8172 dev_info(&pf->pdev->dev,
8173 "Error deleting mac filter on macvlan err %pe, aq_err %s\n",
8174 ERR_PTR(ret),
8175 i40e_aq_str(hw, aq_err));
8176 }
8177 break;
8178 }
8179 }
8180 }
8181
8182 /**
8183 * i40e_setup_tc - configure multiple traffic classes
8184 * @netdev: net device to configure
8185 * @type_data: tc offload data
8186 **/
i40e_setup_tc(struct net_device * netdev,void * type_data)8187 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
8188 {
8189 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
8190 struct i40e_netdev_priv *np = netdev_priv(netdev);
8191 struct i40e_vsi *vsi = np->vsi;
8192 struct i40e_pf *pf = vsi->back;
8193 u8 enabled_tc = 0, num_tc, hw;
8194 bool need_reset = false;
8195 int old_queue_pairs;
8196 int ret = -EINVAL;
8197 u16 mode;
8198 int i;
8199
8200 old_queue_pairs = vsi->num_queue_pairs;
8201 num_tc = mqprio_qopt->qopt.num_tc;
8202 hw = mqprio_qopt->qopt.hw;
8203 mode = mqprio_qopt->mode;
8204 if (!hw) {
8205 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8206 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
8207 goto config_tc;
8208 }
8209
8210 /* Check if MFP enabled */
8211 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
8212 netdev_info(netdev,
8213 "Configuring TC not supported in MFP mode\n");
8214 return ret;
8215 }
8216 switch (mode) {
8217 case TC_MQPRIO_MODE_DCB:
8218 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8219
8220 /* Check if DCB enabled to continue */
8221 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
8222 netdev_info(netdev,
8223 "DCB is not enabled for adapter\n");
8224 return ret;
8225 }
8226
8227 /* Check whether tc count is within enabled limit */
8228 if (num_tc > i40e_pf_get_num_tc(pf)) {
8229 netdev_info(netdev,
8230 "TC count greater than enabled on link for adapter\n");
8231 return ret;
8232 }
8233 break;
8234 case TC_MQPRIO_MODE_CHANNEL:
8235 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
8236 netdev_info(netdev,
8237 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
8238 return ret;
8239 }
8240 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8241 return ret;
8242 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
8243 if (ret)
8244 return ret;
8245 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
8246 sizeof(*mqprio_qopt));
8247 pf->flags |= I40E_FLAG_TC_MQPRIO;
8248 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8249 break;
8250 default:
8251 return -EINVAL;
8252 }
8253
8254 config_tc:
8255 /* Generate TC map for number of tc requested */
8256 for (i = 0; i < num_tc; i++)
8257 enabled_tc |= BIT(i);
8258
8259 /* Requesting same TC configuration as already enabled */
8260 if (enabled_tc == vsi->tc_config.enabled_tc &&
8261 mode != TC_MQPRIO_MODE_CHANNEL)
8262 return 0;
8263
8264 /* Quiesce VSI queues */
8265 i40e_quiesce_vsi(vsi);
8266
8267 if (!hw && !i40e_is_tc_mqprio_enabled(pf))
8268 i40e_remove_queue_channels(vsi);
8269
8270 /* Configure VSI for enabled TCs */
8271 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8272 if (ret) {
8273 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
8274 vsi->seid);
8275 need_reset = true;
8276 goto exit;
8277 } else if (enabled_tc &&
8278 (!is_power_of_2(vsi->tc_config.tc_info[0].qcount))) {
8279 netdev_info(netdev,
8280 "Failed to create channel. Override queues (%u) not power of 2\n",
8281 vsi->tc_config.tc_info[0].qcount);
8282 ret = -EINVAL;
8283 need_reset = true;
8284 goto exit;
8285 }
8286
8287 dev_info(&vsi->back->pdev->dev,
8288 "Setup channel (id:%u) utilizing num_queues %d\n",
8289 vsi->seid, vsi->tc_config.tc_info[0].qcount);
8290
8291 if (i40e_is_tc_mqprio_enabled(pf)) {
8292 if (vsi->mqprio_qopt.max_rate[0]) {
8293 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
8294 vsi->mqprio_qopt.max_rate[0]);
8295
8296 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
8297 if (!ret) {
8298 u64 credits = max_tx_rate;
8299
8300 do_div(credits, I40E_BW_CREDIT_DIVISOR);
8301 dev_dbg(&vsi->back->pdev->dev,
8302 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
8303 max_tx_rate,
8304 credits,
8305 vsi->seid);
8306 } else {
8307 need_reset = true;
8308 goto exit;
8309 }
8310 }
8311 ret = i40e_configure_queue_channels(vsi);
8312 if (ret) {
8313 vsi->num_queue_pairs = old_queue_pairs;
8314 netdev_info(netdev,
8315 "Failed configuring queue channels\n");
8316 need_reset = true;
8317 goto exit;
8318 }
8319 }
8320
8321 exit:
8322 /* Reset the configuration data to defaults, only TC0 is enabled */
8323 if (need_reset) {
8324 i40e_vsi_set_default_tc_config(vsi);
8325 need_reset = false;
8326 }
8327
8328 /* Unquiesce VSI */
8329 i40e_unquiesce_vsi(vsi);
8330 return ret;
8331 }
8332
8333 /**
8334 * i40e_set_cld_element - sets cloud filter element data
8335 * @filter: cloud filter rule
8336 * @cld: ptr to cloud filter element data
8337 *
8338 * This is helper function to copy data into cloud filter element
8339 **/
8340 static inline void
i40e_set_cld_element(struct i40e_cloud_filter * filter,struct i40e_aqc_cloud_filters_element_data * cld)8341 i40e_set_cld_element(struct i40e_cloud_filter *filter,
8342 struct i40e_aqc_cloud_filters_element_data *cld)
8343 {
8344 u32 ipa;
8345 int i;
8346
8347 memset(cld, 0, sizeof(*cld));
8348 ether_addr_copy(cld->outer_mac, filter->dst_mac);
8349 ether_addr_copy(cld->inner_mac, filter->src_mac);
8350
8351 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8352 return;
8353
8354 if (filter->n_proto == ETH_P_IPV6) {
8355 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
8356 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8357 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8358
8359 *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8360 }
8361 } else {
8362 ipa = be32_to_cpu(filter->dst_ipv4);
8363
8364 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8365 }
8366
8367 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8368
8369 /* tenant_id is not supported by FW now, once the support is enabled
8370 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8371 */
8372 if (filter->tenant_id)
8373 return;
8374 }
8375
8376 /**
8377 * i40e_add_del_cloud_filter - Add/del cloud filter
8378 * @vsi: pointer to VSI
8379 * @filter: cloud filter rule
8380 * @add: if true, add, if false, delete
8381 *
8382 * Add or delete a cloud filter for a specific flow spec.
8383 * Returns 0 if the filter were successfully added.
8384 **/
i40e_add_del_cloud_filter(struct i40e_vsi * vsi,struct i40e_cloud_filter * filter,bool add)8385 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8386 struct i40e_cloud_filter *filter, bool add)
8387 {
8388 struct i40e_aqc_cloud_filters_element_data cld_filter;
8389 struct i40e_pf *pf = vsi->back;
8390 int ret;
8391 static const u16 flag_table[128] = {
8392 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
8393 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8394 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
8395 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8396 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
8397 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8398 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8399 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8400 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8401 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8402 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8403 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8404 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8405 I40E_AQC_ADD_CLOUD_FILTER_IIP,
8406 };
8407
8408 if (filter->flags >= ARRAY_SIZE(flag_table))
8409 return -EIO;
8410
8411 memset(&cld_filter, 0, sizeof(cld_filter));
8412
8413 /* copy element needed to add cloud filter from filter */
8414 i40e_set_cld_element(filter, &cld_filter);
8415
8416 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8417 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8418 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8419
8420 if (filter->n_proto == ETH_P_IPV6)
8421 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8422 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8423 else
8424 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8425 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8426
8427 if (add)
8428 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8429 &cld_filter, 1);
8430 else
8431 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8432 &cld_filter, 1);
8433 if (ret)
8434 dev_dbg(&pf->pdev->dev,
8435 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8436 add ? "add" : "delete", filter->dst_port, ret,
8437 pf->hw.aq.asq_last_status);
8438 else
8439 dev_info(&pf->pdev->dev,
8440 "%s cloud filter for VSI: %d\n",
8441 add ? "Added" : "Deleted", filter->seid);
8442 return ret;
8443 }
8444
8445 /**
8446 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8447 * @vsi: pointer to VSI
8448 * @filter: cloud filter rule
8449 * @add: if true, add, if false, delete
8450 *
8451 * Add or delete a cloud filter for a specific flow spec using big buffer.
8452 * Returns 0 if the filter were successfully added.
8453 **/
i40e_add_del_cloud_filter_big_buf(struct i40e_vsi * vsi,struct i40e_cloud_filter * filter,bool add)8454 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8455 struct i40e_cloud_filter *filter,
8456 bool add)
8457 {
8458 struct i40e_aqc_cloud_filters_element_bb cld_filter;
8459 struct i40e_pf *pf = vsi->back;
8460 int ret;
8461
8462 /* Both (src/dst) valid mac_addr are not supported */
8463 if ((is_valid_ether_addr(filter->dst_mac) &&
8464 is_valid_ether_addr(filter->src_mac)) ||
8465 (is_multicast_ether_addr(filter->dst_mac) &&
8466 is_multicast_ether_addr(filter->src_mac)))
8467 return -EOPNOTSUPP;
8468
8469 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8470 * ports are not supported via big buffer now.
8471 */
8472 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8473 return -EOPNOTSUPP;
8474
8475 /* adding filter using src_port/src_ip is not supported at this stage */
8476 if (filter->src_port ||
8477 (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8478 !ipv6_addr_any(&filter->ip.v6.src_ip6))
8479 return -EOPNOTSUPP;
8480
8481 memset(&cld_filter, 0, sizeof(cld_filter));
8482
8483 /* copy element needed to add cloud filter from filter */
8484 i40e_set_cld_element(filter, &cld_filter.element);
8485
8486 if (is_valid_ether_addr(filter->dst_mac) ||
8487 is_valid_ether_addr(filter->src_mac) ||
8488 is_multicast_ether_addr(filter->dst_mac) ||
8489 is_multicast_ether_addr(filter->src_mac)) {
8490 /* MAC + IP : unsupported mode */
8491 if (filter->dst_ipv4)
8492 return -EOPNOTSUPP;
8493
8494 /* since we validated that L4 port must be valid before
8495 * we get here, start with respective "flags" value
8496 * and update if vlan is present or not
8497 */
8498 cld_filter.element.flags =
8499 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8500
8501 if (filter->vlan_id) {
8502 cld_filter.element.flags =
8503 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8504 }
8505
8506 } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8507 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8508 cld_filter.element.flags =
8509 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8510 if (filter->n_proto == ETH_P_IPV6)
8511 cld_filter.element.flags |=
8512 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8513 else
8514 cld_filter.element.flags |=
8515 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8516 } else {
8517 dev_err(&pf->pdev->dev,
8518 "either mac or ip has to be valid for cloud filter\n");
8519 return -EINVAL;
8520 }
8521
8522 /* Now copy L4 port in Byte 6..7 in general fields */
8523 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8524 be16_to_cpu(filter->dst_port);
8525
8526 if (add) {
8527 /* Validate current device switch mode, change if necessary */
8528 ret = i40e_validate_and_set_switch_mode(vsi);
8529 if (ret) {
8530 dev_err(&pf->pdev->dev,
8531 "failed to set switch mode, ret %d\n",
8532 ret);
8533 return ret;
8534 }
8535
8536 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8537 &cld_filter, 1);
8538 } else {
8539 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8540 &cld_filter, 1);
8541 }
8542
8543 if (ret)
8544 dev_dbg(&pf->pdev->dev,
8545 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8546 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8547 else
8548 dev_info(&pf->pdev->dev,
8549 "%s cloud filter for VSI: %d, L4 port: %d\n",
8550 add ? "add" : "delete", filter->seid,
8551 ntohs(filter->dst_port));
8552 return ret;
8553 }
8554
8555 /**
8556 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8557 * @vsi: Pointer to VSI
8558 * @f: Pointer to struct flow_cls_offload
8559 * @filter: Pointer to cloud filter structure
8560 *
8561 **/
i40e_parse_cls_flower(struct i40e_vsi * vsi,struct flow_cls_offload * f,struct i40e_cloud_filter * filter)8562 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8563 struct flow_cls_offload *f,
8564 struct i40e_cloud_filter *filter)
8565 {
8566 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8567 struct flow_dissector *dissector = rule->match.dissector;
8568 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8569 struct i40e_pf *pf = vsi->back;
8570 u8 field_flags = 0;
8571
8572 if (dissector->used_keys &
8573 ~(BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |
8574 BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |
8575 BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8576 BIT_ULL(FLOW_DISSECTOR_KEY_VLAN) |
8577 BIT_ULL(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8578 BIT_ULL(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8579 BIT_ULL(FLOW_DISSECTOR_KEY_PORTS) |
8580 BIT_ULL(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8581 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%llx\n",
8582 dissector->used_keys);
8583 return -EOPNOTSUPP;
8584 }
8585
8586 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8587 struct flow_match_enc_keyid match;
8588
8589 flow_rule_match_enc_keyid(rule, &match);
8590 if (match.mask->keyid != 0)
8591 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8592
8593 filter->tenant_id = be32_to_cpu(match.key->keyid);
8594 }
8595
8596 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8597 struct flow_match_basic match;
8598
8599 flow_rule_match_basic(rule, &match);
8600 n_proto_key = ntohs(match.key->n_proto);
8601 n_proto_mask = ntohs(match.mask->n_proto);
8602
8603 if (n_proto_key == ETH_P_ALL) {
8604 n_proto_key = 0;
8605 n_proto_mask = 0;
8606 }
8607 filter->n_proto = n_proto_key & n_proto_mask;
8608 filter->ip_proto = match.key->ip_proto;
8609 }
8610
8611 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8612 struct flow_match_eth_addrs match;
8613
8614 flow_rule_match_eth_addrs(rule, &match);
8615
8616 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8617 if (!is_zero_ether_addr(match.mask->dst)) {
8618 if (is_broadcast_ether_addr(match.mask->dst)) {
8619 field_flags |= I40E_CLOUD_FIELD_OMAC;
8620 } else {
8621 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8622 match.mask->dst);
8623 return -EIO;
8624 }
8625 }
8626
8627 if (!is_zero_ether_addr(match.mask->src)) {
8628 if (is_broadcast_ether_addr(match.mask->src)) {
8629 field_flags |= I40E_CLOUD_FIELD_IMAC;
8630 } else {
8631 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8632 match.mask->src);
8633 return -EIO;
8634 }
8635 }
8636 ether_addr_copy(filter->dst_mac, match.key->dst);
8637 ether_addr_copy(filter->src_mac, match.key->src);
8638 }
8639
8640 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8641 struct flow_match_vlan match;
8642
8643 flow_rule_match_vlan(rule, &match);
8644 if (match.mask->vlan_id) {
8645 if (match.mask->vlan_id == VLAN_VID_MASK) {
8646 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8647
8648 } else {
8649 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8650 match.mask->vlan_id);
8651 return -EIO;
8652 }
8653 }
8654
8655 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8656 }
8657
8658 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8659 struct flow_match_control match;
8660
8661 flow_rule_match_control(rule, &match);
8662 addr_type = match.key->addr_type;
8663 }
8664
8665 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8666 struct flow_match_ipv4_addrs match;
8667
8668 flow_rule_match_ipv4_addrs(rule, &match);
8669 if (match.mask->dst) {
8670 if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8671 field_flags |= I40E_CLOUD_FIELD_IIP;
8672 } else {
8673 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8674 &match.mask->dst);
8675 return -EIO;
8676 }
8677 }
8678
8679 if (match.mask->src) {
8680 if (match.mask->src == cpu_to_be32(0xffffffff)) {
8681 field_flags |= I40E_CLOUD_FIELD_IIP;
8682 } else {
8683 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8684 &match.mask->src);
8685 return -EIO;
8686 }
8687 }
8688
8689 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8690 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8691 return -EIO;
8692 }
8693 filter->dst_ipv4 = match.key->dst;
8694 filter->src_ipv4 = match.key->src;
8695 }
8696
8697 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8698 struct flow_match_ipv6_addrs match;
8699
8700 flow_rule_match_ipv6_addrs(rule, &match);
8701
8702 /* src and dest IPV6 address should not be LOOPBACK
8703 * (0:0:0:0:0:0:0:1), which can be represented as ::1
8704 */
8705 if (ipv6_addr_loopback(&match.key->dst) ||
8706 ipv6_addr_loopback(&match.key->src)) {
8707 dev_err(&pf->pdev->dev,
8708 "Bad ipv6, addr is LOOPBACK\n");
8709 return -EIO;
8710 }
8711 if (!ipv6_addr_any(&match.mask->dst) ||
8712 !ipv6_addr_any(&match.mask->src))
8713 field_flags |= I40E_CLOUD_FIELD_IIP;
8714
8715 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8716 sizeof(filter->src_ipv6));
8717 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8718 sizeof(filter->dst_ipv6));
8719 }
8720
8721 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8722 struct flow_match_ports match;
8723
8724 flow_rule_match_ports(rule, &match);
8725 if (match.mask->src) {
8726 if (match.mask->src == cpu_to_be16(0xffff)) {
8727 field_flags |= I40E_CLOUD_FIELD_IIP;
8728 } else {
8729 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8730 be16_to_cpu(match.mask->src));
8731 return -EIO;
8732 }
8733 }
8734
8735 if (match.mask->dst) {
8736 if (match.mask->dst == cpu_to_be16(0xffff)) {
8737 field_flags |= I40E_CLOUD_FIELD_IIP;
8738 } else {
8739 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8740 be16_to_cpu(match.mask->dst));
8741 return -EIO;
8742 }
8743 }
8744
8745 filter->dst_port = match.key->dst;
8746 filter->src_port = match.key->src;
8747
8748 switch (filter->ip_proto) {
8749 case IPPROTO_TCP:
8750 case IPPROTO_UDP:
8751 break;
8752 default:
8753 dev_err(&pf->pdev->dev,
8754 "Only UDP and TCP transport are supported\n");
8755 return -EINVAL;
8756 }
8757 }
8758 filter->flags = field_flags;
8759 return 0;
8760 }
8761
8762 /**
8763 * i40e_handle_tclass: Forward to a traffic class on the device
8764 * @vsi: Pointer to VSI
8765 * @tc: traffic class index on the device
8766 * @filter: Pointer to cloud filter structure
8767 *
8768 **/
i40e_handle_tclass(struct i40e_vsi * vsi,u32 tc,struct i40e_cloud_filter * filter)8769 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8770 struct i40e_cloud_filter *filter)
8771 {
8772 struct i40e_channel *ch, *ch_tmp;
8773
8774 /* direct to a traffic class on the same device */
8775 if (tc == 0) {
8776 filter->seid = vsi->seid;
8777 return 0;
8778 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8779 if (!filter->dst_port) {
8780 dev_err(&vsi->back->pdev->dev,
8781 "Specify destination port to direct to traffic class that is not default\n");
8782 return -EINVAL;
8783 }
8784 if (list_empty(&vsi->ch_list))
8785 return -EINVAL;
8786 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8787 list) {
8788 if (ch->seid == vsi->tc_seid_map[tc])
8789 filter->seid = ch->seid;
8790 }
8791 return 0;
8792 }
8793 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8794 return -EINVAL;
8795 }
8796
8797 /**
8798 * i40e_configure_clsflower - Configure tc flower filters
8799 * @vsi: Pointer to VSI
8800 * @cls_flower: Pointer to struct flow_cls_offload
8801 *
8802 **/
i40e_configure_clsflower(struct i40e_vsi * vsi,struct flow_cls_offload * cls_flower)8803 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8804 struct flow_cls_offload *cls_flower)
8805 {
8806 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8807 struct i40e_cloud_filter *filter = NULL;
8808 struct i40e_pf *pf = vsi->back;
8809 int err = 0;
8810
8811 if (tc < 0) {
8812 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8813 return -EOPNOTSUPP;
8814 }
8815
8816 if (!tc) {
8817 dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8818 return -EINVAL;
8819 }
8820
8821 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8822 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8823 return -EBUSY;
8824
8825 if (pf->fdir_pf_active_filters ||
8826 (!hlist_empty(&pf->fdir_filter_list))) {
8827 dev_err(&vsi->back->pdev->dev,
8828 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8829 return -EINVAL;
8830 }
8831
8832 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8833 dev_err(&vsi->back->pdev->dev,
8834 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8835 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8836 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8837 }
8838
8839 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8840 if (!filter)
8841 return -ENOMEM;
8842
8843 filter->cookie = cls_flower->cookie;
8844
8845 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8846 if (err < 0)
8847 goto err;
8848
8849 err = i40e_handle_tclass(vsi, tc, filter);
8850 if (err < 0)
8851 goto err;
8852
8853 /* Add cloud filter */
8854 if (filter->dst_port)
8855 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8856 else
8857 err = i40e_add_del_cloud_filter(vsi, filter, true);
8858
8859 if (err) {
8860 dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8861 err);
8862 goto err;
8863 }
8864
8865 /* add filter to the ordered list */
8866 INIT_HLIST_NODE(&filter->cloud_node);
8867
8868 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8869
8870 pf->num_cloud_filters++;
8871
8872 return err;
8873 err:
8874 kfree(filter);
8875 return err;
8876 }
8877
8878 /**
8879 * i40e_find_cloud_filter - Find the could filter in the list
8880 * @vsi: Pointer to VSI
8881 * @cookie: filter specific cookie
8882 *
8883 **/
i40e_find_cloud_filter(struct i40e_vsi * vsi,unsigned long * cookie)8884 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8885 unsigned long *cookie)
8886 {
8887 struct i40e_cloud_filter *filter = NULL;
8888 struct hlist_node *node2;
8889
8890 hlist_for_each_entry_safe(filter, node2,
8891 &vsi->back->cloud_filter_list, cloud_node)
8892 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8893 return filter;
8894 return NULL;
8895 }
8896
8897 /**
8898 * i40e_delete_clsflower - Remove tc flower filters
8899 * @vsi: Pointer to VSI
8900 * @cls_flower: Pointer to struct flow_cls_offload
8901 *
8902 **/
i40e_delete_clsflower(struct i40e_vsi * vsi,struct flow_cls_offload * cls_flower)8903 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8904 struct flow_cls_offload *cls_flower)
8905 {
8906 struct i40e_cloud_filter *filter = NULL;
8907 struct i40e_pf *pf = vsi->back;
8908 int err = 0;
8909
8910 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8911
8912 if (!filter)
8913 return -EINVAL;
8914
8915 hash_del(&filter->cloud_node);
8916
8917 if (filter->dst_port)
8918 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8919 else
8920 err = i40e_add_del_cloud_filter(vsi, filter, false);
8921
8922 kfree(filter);
8923 if (err) {
8924 dev_err(&pf->pdev->dev,
8925 "Failed to delete cloud filter, err %pe\n",
8926 ERR_PTR(err));
8927 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8928 }
8929
8930 pf->num_cloud_filters--;
8931 if (!pf->num_cloud_filters)
8932 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8933 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8934 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8935 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8936 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8937 }
8938 return 0;
8939 }
8940
8941 /**
8942 * i40e_setup_tc_cls_flower - flower classifier offloads
8943 * @np: net device to configure
8944 * @cls_flower: offload data
8945 **/
i40e_setup_tc_cls_flower(struct i40e_netdev_priv * np,struct flow_cls_offload * cls_flower)8946 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8947 struct flow_cls_offload *cls_flower)
8948 {
8949 struct i40e_vsi *vsi = np->vsi;
8950
8951 switch (cls_flower->command) {
8952 case FLOW_CLS_REPLACE:
8953 return i40e_configure_clsflower(vsi, cls_flower);
8954 case FLOW_CLS_DESTROY:
8955 return i40e_delete_clsflower(vsi, cls_flower);
8956 case FLOW_CLS_STATS:
8957 return -EOPNOTSUPP;
8958 default:
8959 return -EOPNOTSUPP;
8960 }
8961 }
8962
i40e_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)8963 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8964 void *cb_priv)
8965 {
8966 struct i40e_netdev_priv *np = cb_priv;
8967
8968 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8969 return -EOPNOTSUPP;
8970
8971 switch (type) {
8972 case TC_SETUP_CLSFLOWER:
8973 return i40e_setup_tc_cls_flower(np, type_data);
8974
8975 default:
8976 return -EOPNOTSUPP;
8977 }
8978 }
8979
8980 static LIST_HEAD(i40e_block_cb_list);
8981
__i40e_setup_tc(struct net_device * netdev,enum tc_setup_type type,void * type_data)8982 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8983 void *type_data)
8984 {
8985 struct i40e_netdev_priv *np = netdev_priv(netdev);
8986
8987 switch (type) {
8988 case TC_SETUP_QDISC_MQPRIO:
8989 return i40e_setup_tc(netdev, type_data);
8990 case TC_SETUP_BLOCK:
8991 return flow_block_cb_setup_simple(type_data,
8992 &i40e_block_cb_list,
8993 i40e_setup_tc_block_cb,
8994 np, np, true);
8995 default:
8996 return -EOPNOTSUPP;
8997 }
8998 }
8999
9000 /**
9001 * i40e_open - Called when a network interface is made active
9002 * @netdev: network interface device structure
9003 *
9004 * The open entry point is called when a network interface is made
9005 * active by the system (IFF_UP). At this point all resources needed
9006 * for transmit and receive operations are allocated, the interrupt
9007 * handler is registered with the OS, the netdev watchdog subtask is
9008 * enabled, and the stack is notified that the interface is ready.
9009 *
9010 * Returns 0 on success, negative value on failure
9011 **/
i40e_open(struct net_device * netdev)9012 int i40e_open(struct net_device *netdev)
9013 {
9014 struct i40e_netdev_priv *np = netdev_priv(netdev);
9015 struct i40e_vsi *vsi = np->vsi;
9016 struct i40e_pf *pf = vsi->back;
9017 int err;
9018
9019 /* disallow open during test or if eeprom is broken */
9020 if (test_bit(__I40E_TESTING, pf->state) ||
9021 test_bit(__I40E_BAD_EEPROM, pf->state))
9022 return -EBUSY;
9023
9024 netif_carrier_off(netdev);
9025
9026 if (i40e_force_link_state(pf, true))
9027 return -EAGAIN;
9028
9029 err = i40e_vsi_open(vsi);
9030 if (err)
9031 return err;
9032
9033 /* configure global TSO hardware offload settings */
9034 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
9035 TCP_FLAG_FIN) >> 16);
9036 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
9037 TCP_FLAG_FIN |
9038 TCP_FLAG_CWR) >> 16);
9039 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
9040 udp_tunnel_get_rx_info(netdev);
9041
9042 return 0;
9043 }
9044
9045 /**
9046 * i40e_netif_set_realnum_tx_rx_queues - Update number of tx/rx queues
9047 * @vsi: vsi structure
9048 *
9049 * This updates netdev's number of tx/rx queues
9050 *
9051 * Returns status of setting tx/rx queues
9052 **/
i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi * vsi)9053 static int i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi *vsi)
9054 {
9055 int ret;
9056
9057 ret = netif_set_real_num_rx_queues(vsi->netdev,
9058 vsi->num_queue_pairs);
9059 if (ret)
9060 return ret;
9061
9062 return netif_set_real_num_tx_queues(vsi->netdev,
9063 vsi->num_queue_pairs);
9064 }
9065
9066 /**
9067 * i40e_vsi_open -
9068 * @vsi: the VSI to open
9069 *
9070 * Finish initialization of the VSI.
9071 *
9072 * Returns 0 on success, negative value on failure
9073 *
9074 * Note: expects to be called while under rtnl_lock()
9075 **/
i40e_vsi_open(struct i40e_vsi * vsi)9076 int i40e_vsi_open(struct i40e_vsi *vsi)
9077 {
9078 struct i40e_pf *pf = vsi->back;
9079 char int_name[I40E_INT_NAME_STR_LEN];
9080 int err;
9081
9082 /* allocate descriptors */
9083 err = i40e_vsi_setup_tx_resources(vsi);
9084 if (err)
9085 goto err_setup_tx;
9086 err = i40e_vsi_setup_rx_resources(vsi);
9087 if (err)
9088 goto err_setup_rx;
9089
9090 err = i40e_vsi_configure(vsi);
9091 if (err)
9092 goto err_setup_rx;
9093
9094 if (vsi->netdev) {
9095 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
9096 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
9097 err = i40e_vsi_request_irq(vsi, int_name);
9098 if (err)
9099 goto err_setup_rx;
9100
9101 /* Notify the stack of the actual queue counts. */
9102 err = i40e_netif_set_realnum_tx_rx_queues(vsi);
9103 if (err)
9104 goto err_set_queues;
9105
9106 } else if (vsi->type == I40E_VSI_FDIR) {
9107 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
9108 dev_driver_string(&pf->pdev->dev),
9109 dev_name(&pf->pdev->dev));
9110 err = i40e_vsi_request_irq(vsi, int_name);
9111 if (err)
9112 goto err_setup_rx;
9113
9114 } else {
9115 err = -EINVAL;
9116 goto err_setup_rx;
9117 }
9118
9119 err = i40e_up_complete(vsi);
9120 if (err)
9121 goto err_up_complete;
9122
9123 return 0;
9124
9125 err_up_complete:
9126 i40e_down(vsi);
9127 err_set_queues:
9128 i40e_vsi_free_irq(vsi);
9129 err_setup_rx:
9130 i40e_vsi_free_rx_resources(vsi);
9131 err_setup_tx:
9132 i40e_vsi_free_tx_resources(vsi);
9133 if (vsi == pf->vsi[pf->lan_vsi])
9134 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
9135
9136 return err;
9137 }
9138
9139 /**
9140 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
9141 * @pf: Pointer to PF
9142 *
9143 * This function destroys the hlist where all the Flow Director
9144 * filters were saved.
9145 **/
i40e_fdir_filter_exit(struct i40e_pf * pf)9146 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
9147 {
9148 struct i40e_fdir_filter *filter;
9149 struct i40e_flex_pit *pit_entry, *tmp;
9150 struct hlist_node *node2;
9151
9152 hlist_for_each_entry_safe(filter, node2,
9153 &pf->fdir_filter_list, fdir_node) {
9154 hlist_del(&filter->fdir_node);
9155 kfree(filter);
9156 }
9157
9158 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
9159 list_del(&pit_entry->list);
9160 kfree(pit_entry);
9161 }
9162 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
9163
9164 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
9165 list_del(&pit_entry->list);
9166 kfree(pit_entry);
9167 }
9168 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
9169
9170 pf->fdir_pf_active_filters = 0;
9171 i40e_reset_fdir_filter_cnt(pf);
9172
9173 /* Reprogram the default input set for TCP/IPv4 */
9174 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9175 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9176 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9177
9178 /* Reprogram the default input set for TCP/IPv6 */
9179 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
9180 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9181 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9182
9183 /* Reprogram the default input set for UDP/IPv4 */
9184 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
9185 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9186 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9187
9188 /* Reprogram the default input set for UDP/IPv6 */
9189 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
9190 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9191 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9192
9193 /* Reprogram the default input set for SCTP/IPv4 */
9194 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
9195 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9196 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9197
9198 /* Reprogram the default input set for SCTP/IPv6 */
9199 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
9200 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9201 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9202
9203 /* Reprogram the default input set for Other/IPv4 */
9204 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
9205 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9206
9207 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
9208 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9209
9210 /* Reprogram the default input set for Other/IPv6 */
9211 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
9212 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9213
9214 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
9215 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9216 }
9217
9218 /**
9219 * i40e_cloud_filter_exit - Cleans up the cloud filters
9220 * @pf: Pointer to PF
9221 *
9222 * This function destroys the hlist where all the cloud filters
9223 * were saved.
9224 **/
i40e_cloud_filter_exit(struct i40e_pf * pf)9225 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9226 {
9227 struct i40e_cloud_filter *cfilter;
9228 struct hlist_node *node;
9229
9230 hlist_for_each_entry_safe(cfilter, node,
9231 &pf->cloud_filter_list, cloud_node) {
9232 hlist_del(&cfilter->cloud_node);
9233 kfree(cfilter);
9234 }
9235 pf->num_cloud_filters = 0;
9236
9237 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
9238 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
9239 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
9240 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
9241 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
9242 }
9243 }
9244
9245 /**
9246 * i40e_close - Disables a network interface
9247 * @netdev: network interface device structure
9248 *
9249 * The close entry point is called when an interface is de-activated
9250 * by the OS. The hardware is still under the driver's control, but
9251 * this netdev interface is disabled.
9252 *
9253 * Returns 0, this is not allowed to fail
9254 **/
i40e_close(struct net_device * netdev)9255 int i40e_close(struct net_device *netdev)
9256 {
9257 struct i40e_netdev_priv *np = netdev_priv(netdev);
9258 struct i40e_vsi *vsi = np->vsi;
9259
9260 i40e_vsi_close(vsi);
9261
9262 return 0;
9263 }
9264
9265 /**
9266 * i40e_do_reset - Start a PF or Core Reset sequence
9267 * @pf: board private structure
9268 * @reset_flags: which reset is requested
9269 * @lock_acquired: indicates whether or not the lock has been acquired
9270 * before this function was called.
9271 *
9272 * The essential difference in resets is that the PF Reset
9273 * doesn't clear the packet buffers, doesn't reset the PE
9274 * firmware, and doesn't bother the other PFs on the chip.
9275 **/
i40e_do_reset(struct i40e_pf * pf,u32 reset_flags,bool lock_acquired)9276 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9277 {
9278 u32 val;
9279
9280 /* do the biggest reset indicated */
9281 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
9282
9283 /* Request a Global Reset
9284 *
9285 * This will start the chip's countdown to the actual full
9286 * chip reset event, and a warning interrupt to be sent
9287 * to all PFs, including the requestor. Our handler
9288 * for the warning interrupt will deal with the shutdown
9289 * and recovery of the switch setup.
9290 */
9291 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9292 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9293 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
9294 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9295
9296 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
9297
9298 /* Request a Core Reset
9299 *
9300 * Same as Global Reset, except does *not* include the MAC/PHY
9301 */
9302 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9303 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9304 val |= I40E_GLGEN_RTRIG_CORER_MASK;
9305 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9306 i40e_flush(&pf->hw);
9307
9308 } else if (reset_flags & I40E_PF_RESET_FLAG) {
9309
9310 /* Request a PF Reset
9311 *
9312 * Resets only the PF-specific registers
9313 *
9314 * This goes directly to the tear-down and rebuild of
9315 * the switch, since we need to do all the recovery as
9316 * for the Core Reset.
9317 */
9318 dev_dbg(&pf->pdev->dev, "PFR requested\n");
9319 i40e_handle_reset_warning(pf, lock_acquired);
9320
9321 } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
9322 /* Request a PF Reset
9323 *
9324 * Resets PF and reinitializes PFs VSI.
9325 */
9326 i40e_prep_for_reset(pf);
9327 i40e_reset_and_rebuild(pf, true, lock_acquired);
9328 dev_info(&pf->pdev->dev,
9329 pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
9330 "FW LLDP is disabled\n" :
9331 "FW LLDP is enabled\n");
9332
9333 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
9334 int v;
9335
9336 /* Find the VSI(s) that requested a re-init */
9337 dev_info(&pf->pdev->dev,
9338 "VSI reinit requested\n");
9339 for (v = 0; v < pf->num_alloc_vsi; v++) {
9340 struct i40e_vsi *vsi = pf->vsi[v];
9341
9342 if (vsi != NULL &&
9343 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
9344 vsi->state))
9345 i40e_vsi_reinit_locked(pf->vsi[v]);
9346 }
9347 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
9348 int v;
9349
9350 /* Find the VSI(s) that needs to be brought down */
9351 dev_info(&pf->pdev->dev, "VSI down requested\n");
9352 for (v = 0; v < pf->num_alloc_vsi; v++) {
9353 struct i40e_vsi *vsi = pf->vsi[v];
9354
9355 if (vsi != NULL &&
9356 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
9357 vsi->state)) {
9358 set_bit(__I40E_VSI_DOWN, vsi->state);
9359 i40e_down(vsi);
9360 }
9361 }
9362 } else {
9363 dev_info(&pf->pdev->dev,
9364 "bad reset request 0x%08x\n", reset_flags);
9365 }
9366 }
9367
9368 #ifdef CONFIG_I40E_DCB
9369 /**
9370 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
9371 * @pf: board private structure
9372 * @old_cfg: current DCB config
9373 * @new_cfg: new DCB config
9374 **/
i40e_dcb_need_reconfig(struct i40e_pf * pf,struct i40e_dcbx_config * old_cfg,struct i40e_dcbx_config * new_cfg)9375 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9376 struct i40e_dcbx_config *old_cfg,
9377 struct i40e_dcbx_config *new_cfg)
9378 {
9379 bool need_reconfig = false;
9380
9381 /* Check if ETS configuration has changed */
9382 if (memcmp(&new_cfg->etscfg,
9383 &old_cfg->etscfg,
9384 sizeof(new_cfg->etscfg))) {
9385 /* If Priority Table has changed reconfig is needed */
9386 if (memcmp(&new_cfg->etscfg.prioritytable,
9387 &old_cfg->etscfg.prioritytable,
9388 sizeof(new_cfg->etscfg.prioritytable))) {
9389 need_reconfig = true;
9390 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9391 }
9392
9393 if (memcmp(&new_cfg->etscfg.tcbwtable,
9394 &old_cfg->etscfg.tcbwtable,
9395 sizeof(new_cfg->etscfg.tcbwtable)))
9396 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9397
9398 if (memcmp(&new_cfg->etscfg.tsatable,
9399 &old_cfg->etscfg.tsatable,
9400 sizeof(new_cfg->etscfg.tsatable)))
9401 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9402 }
9403
9404 /* Check if PFC configuration has changed */
9405 if (memcmp(&new_cfg->pfc,
9406 &old_cfg->pfc,
9407 sizeof(new_cfg->pfc))) {
9408 need_reconfig = true;
9409 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9410 }
9411
9412 /* Check if APP Table has changed */
9413 if (memcmp(&new_cfg->app,
9414 &old_cfg->app,
9415 sizeof(new_cfg->app))) {
9416 need_reconfig = true;
9417 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9418 }
9419
9420 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9421 return need_reconfig;
9422 }
9423
9424 /**
9425 * i40e_handle_lldp_event - Handle LLDP Change MIB event
9426 * @pf: board private structure
9427 * @e: event info posted on ARQ
9428 **/
i40e_handle_lldp_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)9429 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9430 struct i40e_arq_event_info *e)
9431 {
9432 struct i40e_aqc_lldp_get_mib *mib =
9433 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9434 struct i40e_hw *hw = &pf->hw;
9435 struct i40e_dcbx_config tmp_dcbx_cfg;
9436 bool need_reconfig = false;
9437 int ret = 0;
9438 u8 type;
9439
9440 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9441 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9442 (hw->phy.link_info.link_speed &
9443 ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9444 !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9445 /* let firmware decide if the DCB should be disabled */
9446 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9447
9448 /* Not DCB capable or capability disabled */
9449 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9450 return ret;
9451
9452 /* Ignore if event is not for Nearest Bridge */
9453 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9454 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9455 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9456 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9457 return ret;
9458
9459 /* Check MIB Type and return if event for Remote MIB update */
9460 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9461 dev_dbg(&pf->pdev->dev,
9462 "LLDP event mib type %s\n", type ? "remote" : "local");
9463 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9464 /* Update the remote cached instance and return */
9465 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9466 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9467 &hw->remote_dcbx_config);
9468 goto exit;
9469 }
9470
9471 /* Store the old configuration */
9472 tmp_dcbx_cfg = hw->local_dcbx_config;
9473
9474 /* Reset the old DCBx configuration data */
9475 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9476 /* Get updated DCBX data from firmware */
9477 ret = i40e_get_dcb_config(&pf->hw);
9478 if (ret) {
9479 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9480 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9481 (hw->phy.link_info.link_speed &
9482 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9483 dev_warn(&pf->pdev->dev,
9484 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9485 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9486 } else {
9487 dev_info(&pf->pdev->dev,
9488 "Failed querying DCB configuration data from firmware, err %pe aq_err %s\n",
9489 ERR_PTR(ret),
9490 i40e_aq_str(&pf->hw,
9491 pf->hw.aq.asq_last_status));
9492 }
9493 goto exit;
9494 }
9495
9496 /* No change detected in DCBX configs */
9497 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9498 sizeof(tmp_dcbx_cfg))) {
9499 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9500 goto exit;
9501 }
9502
9503 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9504 &hw->local_dcbx_config);
9505
9506 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9507
9508 if (!need_reconfig)
9509 goto exit;
9510
9511 /* Enable DCB tagging only when more than one TC */
9512 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9513 pf->flags |= I40E_FLAG_DCB_ENABLED;
9514 else
9515 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9516
9517 set_bit(__I40E_PORT_SUSPENDED, pf->state);
9518 /* Reconfiguration needed quiesce all VSIs */
9519 i40e_pf_quiesce_all_vsi(pf);
9520
9521 /* Changes in configuration update VEB/VSI */
9522 i40e_dcb_reconfigure(pf);
9523
9524 ret = i40e_resume_port_tx(pf);
9525
9526 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9527 /* In case of error no point in resuming VSIs */
9528 if (ret)
9529 goto exit;
9530
9531 /* Wait for the PF's queues to be disabled */
9532 ret = i40e_pf_wait_queues_disabled(pf);
9533 if (ret) {
9534 /* Schedule PF reset to recover */
9535 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9536 i40e_service_event_schedule(pf);
9537 } else {
9538 i40e_pf_unquiesce_all_vsi(pf);
9539 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9540 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9541 }
9542
9543 exit:
9544 return ret;
9545 }
9546 #endif /* CONFIG_I40E_DCB */
9547
9548 /**
9549 * i40e_do_reset_safe - Protected reset path for userland calls.
9550 * @pf: board private structure
9551 * @reset_flags: which reset is requested
9552 *
9553 **/
i40e_do_reset_safe(struct i40e_pf * pf,u32 reset_flags)9554 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9555 {
9556 rtnl_lock();
9557 i40e_do_reset(pf, reset_flags, true);
9558 rtnl_unlock();
9559 }
9560
9561 /**
9562 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9563 * @pf: board private structure
9564 * @e: event info posted on ARQ
9565 *
9566 * Handler for LAN Queue Overflow Event generated by the firmware for PF
9567 * and VF queues
9568 **/
i40e_handle_lan_overflow_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)9569 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9570 struct i40e_arq_event_info *e)
9571 {
9572 struct i40e_aqc_lan_overflow *data =
9573 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9574 u32 queue = le32_to_cpu(data->prtdcb_rupto);
9575 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9576 struct i40e_hw *hw = &pf->hw;
9577 struct i40e_vf *vf;
9578 u16 vf_id;
9579
9580 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9581 queue, qtx_ctl);
9582
9583 /* Queue belongs to VF, find the VF and issue VF reset */
9584 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9585 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9586 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9587 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9588 vf_id -= hw->func_caps.vf_base_id;
9589 vf = &pf->vf[vf_id];
9590 i40e_vc_notify_vf_reset(vf);
9591 /* Allow VF to process pending reset notification */
9592 msleep(20);
9593 i40e_reset_vf(vf, false);
9594 }
9595 }
9596
9597 /**
9598 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9599 * @pf: board private structure
9600 **/
i40e_get_cur_guaranteed_fd_count(struct i40e_pf * pf)9601 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9602 {
9603 u32 val, fcnt_prog;
9604
9605 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9606 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9607 return fcnt_prog;
9608 }
9609
9610 /**
9611 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9612 * @pf: board private structure
9613 **/
i40e_get_current_fd_count(struct i40e_pf * pf)9614 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9615 {
9616 u32 val, fcnt_prog;
9617
9618 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9619 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9620 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9621 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9622 return fcnt_prog;
9623 }
9624
9625 /**
9626 * i40e_get_global_fd_count - Get total FD filters programmed on device
9627 * @pf: board private structure
9628 **/
i40e_get_global_fd_count(struct i40e_pf * pf)9629 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9630 {
9631 u32 val, fcnt_prog;
9632
9633 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9634 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9635 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9636 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9637 return fcnt_prog;
9638 }
9639
9640 /**
9641 * i40e_reenable_fdir_sb - Restore FDir SB capability
9642 * @pf: board private structure
9643 **/
i40e_reenable_fdir_sb(struct i40e_pf * pf)9644 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9645 {
9646 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9647 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9648 (I40E_DEBUG_FD & pf->hw.debug_mask))
9649 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9650 }
9651
9652 /**
9653 * i40e_reenable_fdir_atr - Restore FDir ATR capability
9654 * @pf: board private structure
9655 **/
i40e_reenable_fdir_atr(struct i40e_pf * pf)9656 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9657 {
9658 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9659 /* ATR uses the same filtering logic as SB rules. It only
9660 * functions properly if the input set mask is at the default
9661 * settings. It is safe to restore the default input set
9662 * because there are no active TCPv4 filter rules.
9663 */
9664 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9665 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9666 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9667
9668 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9669 (I40E_DEBUG_FD & pf->hw.debug_mask))
9670 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9671 }
9672 }
9673
9674 /**
9675 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9676 * @pf: board private structure
9677 * @filter: FDir filter to remove
9678 */
i40e_delete_invalid_filter(struct i40e_pf * pf,struct i40e_fdir_filter * filter)9679 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9680 struct i40e_fdir_filter *filter)
9681 {
9682 /* Update counters */
9683 pf->fdir_pf_active_filters--;
9684 pf->fd_inv = 0;
9685
9686 switch (filter->flow_type) {
9687 case TCP_V4_FLOW:
9688 pf->fd_tcp4_filter_cnt--;
9689 break;
9690 case UDP_V4_FLOW:
9691 pf->fd_udp4_filter_cnt--;
9692 break;
9693 case SCTP_V4_FLOW:
9694 pf->fd_sctp4_filter_cnt--;
9695 break;
9696 case TCP_V6_FLOW:
9697 pf->fd_tcp6_filter_cnt--;
9698 break;
9699 case UDP_V6_FLOW:
9700 pf->fd_udp6_filter_cnt--;
9701 break;
9702 case SCTP_V6_FLOW:
9703 pf->fd_udp6_filter_cnt--;
9704 break;
9705 case IP_USER_FLOW:
9706 switch (filter->ipl4_proto) {
9707 case IPPROTO_TCP:
9708 pf->fd_tcp4_filter_cnt--;
9709 break;
9710 case IPPROTO_UDP:
9711 pf->fd_udp4_filter_cnt--;
9712 break;
9713 case IPPROTO_SCTP:
9714 pf->fd_sctp4_filter_cnt--;
9715 break;
9716 case IPPROTO_IP:
9717 pf->fd_ip4_filter_cnt--;
9718 break;
9719 }
9720 break;
9721 case IPV6_USER_FLOW:
9722 switch (filter->ipl4_proto) {
9723 case IPPROTO_TCP:
9724 pf->fd_tcp6_filter_cnt--;
9725 break;
9726 case IPPROTO_UDP:
9727 pf->fd_udp6_filter_cnt--;
9728 break;
9729 case IPPROTO_SCTP:
9730 pf->fd_sctp6_filter_cnt--;
9731 break;
9732 case IPPROTO_IP:
9733 pf->fd_ip6_filter_cnt--;
9734 break;
9735 }
9736 break;
9737 }
9738
9739 /* Remove the filter from the list and free memory */
9740 hlist_del(&filter->fdir_node);
9741 kfree(filter);
9742 }
9743
9744 /**
9745 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9746 * @pf: board private structure
9747 **/
i40e_fdir_check_and_reenable(struct i40e_pf * pf)9748 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9749 {
9750 struct i40e_fdir_filter *filter;
9751 u32 fcnt_prog, fcnt_avail;
9752 struct hlist_node *node;
9753
9754 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9755 return;
9756
9757 /* Check if we have enough room to re-enable FDir SB capability. */
9758 fcnt_prog = i40e_get_global_fd_count(pf);
9759 fcnt_avail = pf->fdir_pf_filter_count;
9760 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9761 (pf->fd_add_err == 0) ||
9762 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9763 i40e_reenable_fdir_sb(pf);
9764
9765 /* We should wait for even more space before re-enabling ATR.
9766 * Additionally, we cannot enable ATR as long as we still have TCP SB
9767 * rules active.
9768 */
9769 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9770 pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9771 i40e_reenable_fdir_atr(pf);
9772
9773 /* if hw had a problem adding a filter, delete it */
9774 if (pf->fd_inv > 0) {
9775 hlist_for_each_entry_safe(filter, node,
9776 &pf->fdir_filter_list, fdir_node)
9777 if (filter->fd_id == pf->fd_inv)
9778 i40e_delete_invalid_filter(pf, filter);
9779 }
9780 }
9781
9782 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9783 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9784 /**
9785 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9786 * @pf: board private structure
9787 **/
i40e_fdir_flush_and_replay(struct i40e_pf * pf)9788 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9789 {
9790 unsigned long min_flush_time;
9791 int flush_wait_retry = 50;
9792 bool disable_atr = false;
9793 int fd_room;
9794 int reg;
9795
9796 if (!time_after(jiffies, pf->fd_flush_timestamp +
9797 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9798 return;
9799
9800 /* If the flush is happening too quick and we have mostly SB rules we
9801 * should not re-enable ATR for some time.
9802 */
9803 min_flush_time = pf->fd_flush_timestamp +
9804 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9805 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9806
9807 if (!(time_after(jiffies, min_flush_time)) &&
9808 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9809 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9810 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9811 disable_atr = true;
9812 }
9813
9814 pf->fd_flush_timestamp = jiffies;
9815 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9816 /* flush all filters */
9817 wr32(&pf->hw, I40E_PFQF_CTL_1,
9818 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9819 i40e_flush(&pf->hw);
9820 pf->fd_flush_cnt++;
9821 pf->fd_add_err = 0;
9822 do {
9823 /* Check FD flush status every 5-6msec */
9824 usleep_range(5000, 6000);
9825 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9826 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9827 break;
9828 } while (flush_wait_retry--);
9829 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9830 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9831 } else {
9832 /* replay sideband filters */
9833 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9834 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9835 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9836 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9837 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9838 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9839 }
9840 }
9841
9842 /**
9843 * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9844 * @pf: board private structure
9845 **/
i40e_get_current_atr_cnt(struct i40e_pf * pf)9846 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9847 {
9848 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9849 }
9850
9851 /**
9852 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9853 * @pf: board private structure
9854 **/
i40e_fdir_reinit_subtask(struct i40e_pf * pf)9855 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9856 {
9857
9858 /* if interface is down do nothing */
9859 if (test_bit(__I40E_DOWN, pf->state))
9860 return;
9861
9862 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9863 i40e_fdir_flush_and_replay(pf);
9864
9865 i40e_fdir_check_and_reenable(pf);
9866
9867 }
9868
9869 /**
9870 * i40e_vsi_link_event - notify VSI of a link event
9871 * @vsi: vsi to be notified
9872 * @link_up: link up or down
9873 **/
i40e_vsi_link_event(struct i40e_vsi * vsi,bool link_up)9874 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9875 {
9876 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9877 return;
9878
9879 switch (vsi->type) {
9880 case I40E_VSI_MAIN:
9881 if (!vsi->netdev || !vsi->netdev_registered)
9882 break;
9883
9884 if (link_up) {
9885 netif_carrier_on(vsi->netdev);
9886 netif_tx_wake_all_queues(vsi->netdev);
9887 } else {
9888 netif_carrier_off(vsi->netdev);
9889 netif_tx_stop_all_queues(vsi->netdev);
9890 }
9891 break;
9892
9893 case I40E_VSI_SRIOV:
9894 case I40E_VSI_VMDQ2:
9895 case I40E_VSI_CTRL:
9896 case I40E_VSI_IWARP:
9897 case I40E_VSI_MIRROR:
9898 default:
9899 /* there is no notification for other VSIs */
9900 break;
9901 }
9902 }
9903
9904 /**
9905 * i40e_veb_link_event - notify elements on the veb of a link event
9906 * @veb: veb to be notified
9907 * @link_up: link up or down
9908 **/
i40e_veb_link_event(struct i40e_veb * veb,bool link_up)9909 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9910 {
9911 struct i40e_pf *pf;
9912 int i;
9913
9914 if (!veb || !veb->pf)
9915 return;
9916 pf = veb->pf;
9917
9918 /* depth first... */
9919 for (i = 0; i < I40E_MAX_VEB; i++)
9920 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9921 i40e_veb_link_event(pf->veb[i], link_up);
9922
9923 /* ... now the local VSIs */
9924 for (i = 0; i < pf->num_alloc_vsi; i++)
9925 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9926 i40e_vsi_link_event(pf->vsi[i], link_up);
9927 }
9928
9929 /**
9930 * i40e_link_event - Update netif_carrier status
9931 * @pf: board private structure
9932 **/
i40e_link_event(struct i40e_pf * pf)9933 static void i40e_link_event(struct i40e_pf *pf)
9934 {
9935 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9936 u8 new_link_speed, old_link_speed;
9937 bool new_link, old_link;
9938 int status;
9939 #ifdef CONFIG_I40E_DCB
9940 int err;
9941 #endif /* CONFIG_I40E_DCB */
9942
9943 /* set this to force the get_link_status call to refresh state */
9944 pf->hw.phy.get_link_info = true;
9945 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9946 status = i40e_get_link_status(&pf->hw, &new_link);
9947
9948 /* On success, disable temp link polling */
9949 if (status == 0) {
9950 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9951 } else {
9952 /* Enable link polling temporarily until i40e_get_link_status
9953 * returns 0
9954 */
9955 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9956 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9957 status);
9958 return;
9959 }
9960
9961 old_link_speed = pf->hw.phy.link_info_old.link_speed;
9962 new_link_speed = pf->hw.phy.link_info.link_speed;
9963
9964 if (new_link == old_link &&
9965 new_link_speed == old_link_speed &&
9966 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9967 new_link == netif_carrier_ok(vsi->netdev)))
9968 return;
9969
9970 i40e_print_link_message(vsi, new_link);
9971
9972 /* Notify the base of the switch tree connected to
9973 * the link. Floating VEBs are not notified.
9974 */
9975 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9976 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9977 else
9978 i40e_vsi_link_event(vsi, new_link);
9979
9980 if (pf->vf)
9981 i40e_vc_notify_link_state(pf);
9982
9983 if (pf->flags & I40E_FLAG_PTP)
9984 i40e_ptp_set_increment(pf);
9985 #ifdef CONFIG_I40E_DCB
9986 if (new_link == old_link)
9987 return;
9988 /* Not SW DCB so firmware will take care of default settings */
9989 if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9990 return;
9991
9992 /* We cover here only link down, as after link up in case of SW DCB
9993 * SW LLDP agent will take care of setting it up
9994 */
9995 if (!new_link) {
9996 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9997 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9998 err = i40e_dcb_sw_default_config(pf);
9999 if (err) {
10000 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10001 I40E_FLAG_DCB_ENABLED);
10002 } else {
10003 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
10004 DCB_CAP_DCBX_VER_IEEE;
10005 pf->flags |= I40E_FLAG_DCB_CAPABLE;
10006 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
10007 }
10008 }
10009 #endif /* CONFIG_I40E_DCB */
10010 }
10011
10012 /**
10013 * i40e_watchdog_subtask - periodic checks not using event driven response
10014 * @pf: board private structure
10015 **/
i40e_watchdog_subtask(struct i40e_pf * pf)10016 static void i40e_watchdog_subtask(struct i40e_pf *pf)
10017 {
10018 int i;
10019
10020 /* if interface is down do nothing */
10021 if (test_bit(__I40E_DOWN, pf->state) ||
10022 test_bit(__I40E_CONFIG_BUSY, pf->state))
10023 return;
10024
10025 /* make sure we don't do these things too often */
10026 if (time_before(jiffies, (pf->service_timer_previous +
10027 pf->service_timer_period)))
10028 return;
10029 pf->service_timer_previous = jiffies;
10030
10031 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
10032 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
10033 i40e_link_event(pf);
10034
10035 /* Update the stats for active netdevs so the network stack
10036 * can look at updated numbers whenever it cares to
10037 */
10038 for (i = 0; i < pf->num_alloc_vsi; i++)
10039 if (pf->vsi[i] && pf->vsi[i]->netdev)
10040 i40e_update_stats(pf->vsi[i]);
10041
10042 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
10043 /* Update the stats for the active switching components */
10044 for (i = 0; i < I40E_MAX_VEB; i++)
10045 if (pf->veb[i])
10046 i40e_update_veb_stats(pf->veb[i]);
10047 }
10048
10049 i40e_ptp_rx_hang(pf);
10050 i40e_ptp_tx_hang(pf);
10051 }
10052
10053 /**
10054 * i40e_reset_subtask - Set up for resetting the device and driver
10055 * @pf: board private structure
10056 **/
i40e_reset_subtask(struct i40e_pf * pf)10057 static void i40e_reset_subtask(struct i40e_pf *pf)
10058 {
10059 u32 reset_flags = 0;
10060
10061 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
10062 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
10063 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
10064 }
10065 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
10066 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
10067 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
10068 }
10069 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
10070 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
10071 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
10072 }
10073 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
10074 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
10075 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
10076 }
10077 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
10078 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
10079 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
10080 }
10081
10082 /* If there's a recovery already waiting, it takes
10083 * precedence before starting a new reset sequence.
10084 */
10085 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
10086 i40e_prep_for_reset(pf);
10087 i40e_reset(pf);
10088 i40e_rebuild(pf, false, false);
10089 }
10090
10091 /* If we're already down or resetting, just bail */
10092 if (reset_flags &&
10093 !test_bit(__I40E_DOWN, pf->state) &&
10094 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
10095 i40e_do_reset(pf, reset_flags, false);
10096 }
10097 }
10098
10099 /**
10100 * i40e_handle_link_event - Handle link event
10101 * @pf: board private structure
10102 * @e: event info posted on ARQ
10103 **/
i40e_handle_link_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)10104 static void i40e_handle_link_event(struct i40e_pf *pf,
10105 struct i40e_arq_event_info *e)
10106 {
10107 struct i40e_aqc_get_link_status *status =
10108 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
10109
10110 /* Do a new status request to re-enable LSE reporting
10111 * and load new status information into the hw struct
10112 * This completely ignores any state information
10113 * in the ARQ event info, instead choosing to always
10114 * issue the AQ update link status command.
10115 */
10116 i40e_link_event(pf);
10117
10118 /* Check if module meets thermal requirements */
10119 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
10120 dev_err(&pf->pdev->dev,
10121 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
10122 dev_err(&pf->pdev->dev,
10123 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10124 } else {
10125 /* check for unqualified module, if link is down, suppress
10126 * the message if link was forced to be down.
10127 */
10128 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
10129 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
10130 (!(status->link_info & I40E_AQ_LINK_UP)) &&
10131 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
10132 dev_err(&pf->pdev->dev,
10133 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
10134 dev_err(&pf->pdev->dev,
10135 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10136 }
10137 }
10138 }
10139
10140 /**
10141 * i40e_clean_adminq_subtask - Clean the AdminQ rings
10142 * @pf: board private structure
10143 **/
i40e_clean_adminq_subtask(struct i40e_pf * pf)10144 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
10145 {
10146 struct i40e_arq_event_info event;
10147 struct i40e_hw *hw = &pf->hw;
10148 u16 pending, i = 0;
10149 u16 opcode;
10150 u32 oldval;
10151 int ret;
10152 u32 val;
10153
10154 /* Do not run clean AQ when PF reset fails */
10155 if (test_bit(__I40E_RESET_FAILED, pf->state))
10156 return;
10157
10158 /* check for error indications */
10159 val = rd32(&pf->hw, pf->hw.aq.arq.len);
10160 oldval = val;
10161 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
10162 if (hw->debug_mask & I40E_DEBUG_AQ)
10163 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
10164 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
10165 }
10166 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
10167 if (hw->debug_mask & I40E_DEBUG_AQ)
10168 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
10169 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
10170 pf->arq_overflows++;
10171 }
10172 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
10173 if (hw->debug_mask & I40E_DEBUG_AQ)
10174 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
10175 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
10176 }
10177 if (oldval != val)
10178 wr32(&pf->hw, pf->hw.aq.arq.len, val);
10179
10180 val = rd32(&pf->hw, pf->hw.aq.asq.len);
10181 oldval = val;
10182 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
10183 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10184 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
10185 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
10186 }
10187 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
10188 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10189 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
10190 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
10191 }
10192 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
10193 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10194 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
10195 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
10196 }
10197 if (oldval != val)
10198 wr32(&pf->hw, pf->hw.aq.asq.len, val);
10199
10200 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
10201 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
10202 if (!event.msg_buf)
10203 return;
10204
10205 do {
10206 ret = i40e_clean_arq_element(hw, &event, &pending);
10207 if (ret == -EALREADY)
10208 break;
10209 else if (ret) {
10210 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10211 break;
10212 }
10213
10214 opcode = le16_to_cpu(event.desc.opcode);
10215 switch (opcode) {
10216
10217 case i40e_aqc_opc_get_link_status:
10218 rtnl_lock();
10219 i40e_handle_link_event(pf, &event);
10220 rtnl_unlock();
10221 break;
10222 case i40e_aqc_opc_send_msg_to_pf:
10223 ret = i40e_vc_process_vf_msg(pf,
10224 le16_to_cpu(event.desc.retval),
10225 le32_to_cpu(event.desc.cookie_high),
10226 le32_to_cpu(event.desc.cookie_low),
10227 event.msg_buf,
10228 event.msg_len);
10229 break;
10230 case i40e_aqc_opc_lldp_update_mib:
10231 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10232 #ifdef CONFIG_I40E_DCB
10233 rtnl_lock();
10234 i40e_handle_lldp_event(pf, &event);
10235 rtnl_unlock();
10236 #endif /* CONFIG_I40E_DCB */
10237 break;
10238 case i40e_aqc_opc_event_lan_overflow:
10239 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10240 i40e_handle_lan_overflow_event(pf, &event);
10241 break;
10242 case i40e_aqc_opc_send_msg_to_peer:
10243 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10244 break;
10245 case i40e_aqc_opc_nvm_erase:
10246 case i40e_aqc_opc_nvm_update:
10247 case i40e_aqc_opc_oem_post_update:
10248 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10249 "ARQ NVM operation 0x%04x completed\n",
10250 opcode);
10251 break;
10252 default:
10253 dev_info(&pf->pdev->dev,
10254 "ARQ: Unknown event 0x%04x ignored\n",
10255 opcode);
10256 break;
10257 }
10258 } while (i++ < pf->adminq_work_limit);
10259
10260 if (i < pf->adminq_work_limit)
10261 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
10262
10263 /* re-enable Admin queue interrupt cause */
10264 val = rd32(hw, I40E_PFINT_ICR0_ENA);
10265 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
10266 wr32(hw, I40E_PFINT_ICR0_ENA, val);
10267 i40e_flush(hw);
10268
10269 kfree(event.msg_buf);
10270 }
10271
10272 /**
10273 * i40e_verify_eeprom - make sure eeprom is good to use
10274 * @pf: board private structure
10275 **/
i40e_verify_eeprom(struct i40e_pf * pf)10276 static void i40e_verify_eeprom(struct i40e_pf *pf)
10277 {
10278 int err;
10279
10280 err = i40e_diag_eeprom_test(&pf->hw);
10281 if (err) {
10282 /* retry in case of garbage read */
10283 err = i40e_diag_eeprom_test(&pf->hw);
10284 if (err) {
10285 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10286 err);
10287 set_bit(__I40E_BAD_EEPROM, pf->state);
10288 }
10289 }
10290
10291 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10292 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10293 clear_bit(__I40E_BAD_EEPROM, pf->state);
10294 }
10295 }
10296
10297 /**
10298 * i40e_enable_pf_switch_lb
10299 * @pf: pointer to the PF structure
10300 *
10301 * enable switch loop back or die - no point in a return value
10302 **/
i40e_enable_pf_switch_lb(struct i40e_pf * pf)10303 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10304 {
10305 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10306 struct i40e_vsi_context ctxt;
10307 int ret;
10308
10309 ctxt.seid = pf->main_vsi_seid;
10310 ctxt.pf_num = pf->hw.pf_id;
10311 ctxt.vf_num = 0;
10312 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10313 if (ret) {
10314 dev_info(&pf->pdev->dev,
10315 "couldn't get PF vsi config, err %pe aq_err %s\n",
10316 ERR_PTR(ret),
10317 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10318 return;
10319 }
10320 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10321 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10322 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10323
10324 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10325 if (ret) {
10326 dev_info(&pf->pdev->dev,
10327 "update vsi switch failed, err %pe aq_err %s\n",
10328 ERR_PTR(ret),
10329 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10330 }
10331 }
10332
10333 /**
10334 * i40e_disable_pf_switch_lb
10335 * @pf: pointer to the PF structure
10336 *
10337 * disable switch loop back or die - no point in a return value
10338 **/
i40e_disable_pf_switch_lb(struct i40e_pf * pf)10339 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10340 {
10341 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10342 struct i40e_vsi_context ctxt;
10343 int ret;
10344
10345 ctxt.seid = pf->main_vsi_seid;
10346 ctxt.pf_num = pf->hw.pf_id;
10347 ctxt.vf_num = 0;
10348 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10349 if (ret) {
10350 dev_info(&pf->pdev->dev,
10351 "couldn't get PF vsi config, err %pe aq_err %s\n",
10352 ERR_PTR(ret),
10353 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10354 return;
10355 }
10356 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10357 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10358 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10359
10360 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10361 if (ret) {
10362 dev_info(&pf->pdev->dev,
10363 "update vsi switch failed, err %pe aq_err %s\n",
10364 ERR_PTR(ret),
10365 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10366 }
10367 }
10368
10369 /**
10370 * i40e_config_bridge_mode - Configure the HW bridge mode
10371 * @veb: pointer to the bridge instance
10372 *
10373 * Configure the loop back mode for the LAN VSI that is downlink to the
10374 * specified HW bridge instance. It is expected this function is called
10375 * when a new HW bridge is instantiated.
10376 **/
i40e_config_bridge_mode(struct i40e_veb * veb)10377 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10378 {
10379 struct i40e_pf *pf = veb->pf;
10380
10381 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10382 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10383 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10384 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10385 i40e_disable_pf_switch_lb(pf);
10386 else
10387 i40e_enable_pf_switch_lb(pf);
10388 }
10389
10390 /**
10391 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10392 * @veb: pointer to the VEB instance
10393 *
10394 * This is a recursive function that first builds the attached VSIs then
10395 * recurses in to build the next layer of VEB. We track the connections
10396 * through our own index numbers because the seid's from the HW could
10397 * change across the reset.
10398 **/
i40e_reconstitute_veb(struct i40e_veb * veb)10399 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10400 {
10401 struct i40e_vsi *ctl_vsi = NULL;
10402 struct i40e_pf *pf = veb->pf;
10403 int v, veb_idx;
10404 int ret;
10405
10406 /* build VSI that owns this VEB, temporarily attached to base VEB */
10407 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10408 if (pf->vsi[v] &&
10409 pf->vsi[v]->veb_idx == veb->idx &&
10410 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10411 ctl_vsi = pf->vsi[v];
10412 break;
10413 }
10414 }
10415 if (!ctl_vsi) {
10416 dev_info(&pf->pdev->dev,
10417 "missing owner VSI for veb_idx %d\n", veb->idx);
10418 ret = -ENOENT;
10419 goto end_reconstitute;
10420 }
10421 if (ctl_vsi != pf->vsi[pf->lan_vsi])
10422 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10423 ret = i40e_add_vsi(ctl_vsi);
10424 if (ret) {
10425 dev_info(&pf->pdev->dev,
10426 "rebuild of veb_idx %d owner VSI failed: %d\n",
10427 veb->idx, ret);
10428 goto end_reconstitute;
10429 }
10430 i40e_vsi_reset_stats(ctl_vsi);
10431
10432 /* create the VEB in the switch and move the VSI onto the VEB */
10433 ret = i40e_add_veb(veb, ctl_vsi);
10434 if (ret)
10435 goto end_reconstitute;
10436
10437 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10438 veb->bridge_mode = BRIDGE_MODE_VEB;
10439 else
10440 veb->bridge_mode = BRIDGE_MODE_VEPA;
10441 i40e_config_bridge_mode(veb);
10442
10443 /* create the remaining VSIs attached to this VEB */
10444 for (v = 0; v < pf->num_alloc_vsi; v++) {
10445 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10446 continue;
10447
10448 if (pf->vsi[v]->veb_idx == veb->idx) {
10449 struct i40e_vsi *vsi = pf->vsi[v];
10450
10451 vsi->uplink_seid = veb->seid;
10452 ret = i40e_add_vsi(vsi);
10453 if (ret) {
10454 dev_info(&pf->pdev->dev,
10455 "rebuild of vsi_idx %d failed: %d\n",
10456 v, ret);
10457 goto end_reconstitute;
10458 }
10459 i40e_vsi_reset_stats(vsi);
10460 }
10461 }
10462
10463 /* create any VEBs attached to this VEB - RECURSION */
10464 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10465 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10466 pf->veb[veb_idx]->uplink_seid = veb->seid;
10467 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10468 if (ret)
10469 break;
10470 }
10471 }
10472
10473 end_reconstitute:
10474 return ret;
10475 }
10476
10477 /**
10478 * i40e_get_capabilities - get info about the HW
10479 * @pf: the PF struct
10480 * @list_type: AQ capability to be queried
10481 **/
i40e_get_capabilities(struct i40e_pf * pf,enum i40e_admin_queue_opc list_type)10482 static int i40e_get_capabilities(struct i40e_pf *pf,
10483 enum i40e_admin_queue_opc list_type)
10484 {
10485 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10486 u16 data_size;
10487 int buf_len;
10488 int err;
10489
10490 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10491 do {
10492 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10493 if (!cap_buf)
10494 return -ENOMEM;
10495
10496 /* this loads the data into the hw struct for us */
10497 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10498 &data_size, list_type,
10499 NULL);
10500 /* data loaded, buffer no longer needed */
10501 kfree(cap_buf);
10502
10503 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10504 /* retry with a larger buffer */
10505 buf_len = data_size;
10506 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10507 dev_info(&pf->pdev->dev,
10508 "capability discovery failed, err %pe aq_err %s\n",
10509 ERR_PTR(err),
10510 i40e_aq_str(&pf->hw,
10511 pf->hw.aq.asq_last_status));
10512 return -ENODEV;
10513 }
10514 } while (err);
10515
10516 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10517 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10518 dev_info(&pf->pdev->dev,
10519 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10520 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10521 pf->hw.func_caps.num_msix_vectors,
10522 pf->hw.func_caps.num_msix_vectors_vf,
10523 pf->hw.func_caps.fd_filters_guaranteed,
10524 pf->hw.func_caps.fd_filters_best_effort,
10525 pf->hw.func_caps.num_tx_qp,
10526 pf->hw.func_caps.num_vsis);
10527 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10528 dev_info(&pf->pdev->dev,
10529 "switch_mode=0x%04x, function_valid=0x%08x\n",
10530 pf->hw.dev_caps.switch_mode,
10531 pf->hw.dev_caps.valid_functions);
10532 dev_info(&pf->pdev->dev,
10533 "SR-IOV=%d, num_vfs for all function=%u\n",
10534 pf->hw.dev_caps.sr_iov_1_1,
10535 pf->hw.dev_caps.num_vfs);
10536 dev_info(&pf->pdev->dev,
10537 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10538 pf->hw.dev_caps.num_vsis,
10539 pf->hw.dev_caps.num_rx_qp,
10540 pf->hw.dev_caps.num_tx_qp);
10541 }
10542 }
10543 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10544 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10545 + pf->hw.func_caps.num_vfs)
10546 if (pf->hw.revision_id == 0 &&
10547 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10548 dev_info(&pf->pdev->dev,
10549 "got num_vsis %d, setting num_vsis to %d\n",
10550 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10551 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10552 }
10553 }
10554 return 0;
10555 }
10556
10557 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10558
10559 /**
10560 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10561 * @pf: board private structure
10562 **/
i40e_fdir_sb_setup(struct i40e_pf * pf)10563 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10564 {
10565 struct i40e_vsi *vsi;
10566
10567 /* quick workaround for an NVM issue that leaves a critical register
10568 * uninitialized
10569 */
10570 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10571 static const u32 hkey[] = {
10572 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10573 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10574 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10575 0x95b3a76d};
10576 int i;
10577
10578 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10579 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10580 }
10581
10582 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10583 return;
10584
10585 /* find existing VSI and see if it needs configuring */
10586 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10587
10588 /* create a new VSI if none exists */
10589 if (!vsi) {
10590 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10591 pf->vsi[pf->lan_vsi]->seid, 0);
10592 if (!vsi) {
10593 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10594 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10595 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10596 return;
10597 }
10598 }
10599
10600 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10601 }
10602
10603 /**
10604 * i40e_fdir_teardown - release the Flow Director resources
10605 * @pf: board private structure
10606 **/
i40e_fdir_teardown(struct i40e_pf * pf)10607 static void i40e_fdir_teardown(struct i40e_pf *pf)
10608 {
10609 struct i40e_vsi *vsi;
10610
10611 i40e_fdir_filter_exit(pf);
10612 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10613 if (vsi)
10614 i40e_vsi_release(vsi);
10615 }
10616
10617 /**
10618 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10619 * @vsi: PF main vsi
10620 * @seid: seid of main or channel VSIs
10621 *
10622 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10623 * existed before reset
10624 **/
i40e_rebuild_cloud_filters(struct i40e_vsi * vsi,u16 seid)10625 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10626 {
10627 struct i40e_cloud_filter *cfilter;
10628 struct i40e_pf *pf = vsi->back;
10629 struct hlist_node *node;
10630 int ret;
10631
10632 /* Add cloud filters back if they exist */
10633 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10634 cloud_node) {
10635 if (cfilter->seid != seid)
10636 continue;
10637
10638 if (cfilter->dst_port)
10639 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10640 true);
10641 else
10642 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10643
10644 if (ret) {
10645 dev_dbg(&pf->pdev->dev,
10646 "Failed to rebuild cloud filter, err %pe aq_err %s\n",
10647 ERR_PTR(ret),
10648 i40e_aq_str(&pf->hw,
10649 pf->hw.aq.asq_last_status));
10650 return ret;
10651 }
10652 }
10653 return 0;
10654 }
10655
10656 /**
10657 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10658 * @vsi: PF main vsi
10659 *
10660 * Rebuilds channel VSIs if they existed before reset
10661 **/
i40e_rebuild_channels(struct i40e_vsi * vsi)10662 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10663 {
10664 struct i40e_channel *ch, *ch_tmp;
10665 int ret;
10666
10667 if (list_empty(&vsi->ch_list))
10668 return 0;
10669
10670 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10671 if (!ch->initialized)
10672 break;
10673 /* Proceed with creation of channel (VMDq2) VSI */
10674 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10675 if (ret) {
10676 dev_info(&vsi->back->pdev->dev,
10677 "failed to rebuild channels using uplink_seid %u\n",
10678 vsi->uplink_seid);
10679 return ret;
10680 }
10681 /* Reconfigure TX queues using QTX_CTL register */
10682 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10683 if (ret) {
10684 dev_info(&vsi->back->pdev->dev,
10685 "failed to configure TX rings for channel %u\n",
10686 ch->seid);
10687 return ret;
10688 }
10689 /* update 'next_base_queue' */
10690 vsi->next_base_queue = vsi->next_base_queue +
10691 ch->num_queue_pairs;
10692 if (ch->max_tx_rate) {
10693 u64 credits = ch->max_tx_rate;
10694
10695 if (i40e_set_bw_limit(vsi, ch->seid,
10696 ch->max_tx_rate))
10697 return -EINVAL;
10698
10699 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10700 dev_dbg(&vsi->back->pdev->dev,
10701 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10702 ch->max_tx_rate,
10703 credits,
10704 ch->seid);
10705 }
10706 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10707 if (ret) {
10708 dev_dbg(&vsi->back->pdev->dev,
10709 "Failed to rebuild cloud filters for channel VSI %u\n",
10710 ch->seid);
10711 return ret;
10712 }
10713 }
10714 return 0;
10715 }
10716
10717 /**
10718 * i40e_clean_xps_state - clean xps state for every tx_ring
10719 * @vsi: ptr to the VSI
10720 **/
i40e_clean_xps_state(struct i40e_vsi * vsi)10721 static void i40e_clean_xps_state(struct i40e_vsi *vsi)
10722 {
10723 int i;
10724
10725 if (vsi->tx_rings)
10726 for (i = 0; i < vsi->num_queue_pairs; i++)
10727 if (vsi->tx_rings[i])
10728 clear_bit(__I40E_TX_XPS_INIT_DONE,
10729 vsi->tx_rings[i]->state);
10730 }
10731
10732 /**
10733 * i40e_prep_for_reset - prep for the core to reset
10734 * @pf: board private structure
10735 *
10736 * Close up the VFs and other things in prep for PF Reset.
10737 **/
i40e_prep_for_reset(struct i40e_pf * pf)10738 static void i40e_prep_for_reset(struct i40e_pf *pf)
10739 {
10740 struct i40e_hw *hw = &pf->hw;
10741 int ret = 0;
10742 u32 v;
10743
10744 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10745 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10746 return;
10747 if (i40e_check_asq_alive(&pf->hw))
10748 i40e_vc_notify_reset(pf);
10749
10750 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10751
10752 /* quiesce the VSIs and their queues that are not already DOWN */
10753 i40e_pf_quiesce_all_vsi(pf);
10754
10755 for (v = 0; v < pf->num_alloc_vsi; v++) {
10756 if (pf->vsi[v]) {
10757 i40e_clean_xps_state(pf->vsi[v]);
10758 pf->vsi[v]->seid = 0;
10759 }
10760 }
10761
10762 i40e_shutdown_adminq(&pf->hw);
10763
10764 /* call shutdown HMC */
10765 if (hw->hmc.hmc_obj) {
10766 ret = i40e_shutdown_lan_hmc(hw);
10767 if (ret)
10768 dev_warn(&pf->pdev->dev,
10769 "shutdown_lan_hmc failed: %d\n", ret);
10770 }
10771
10772 /* Save the current PTP time so that we can restore the time after the
10773 * reset completes.
10774 */
10775 i40e_ptp_save_hw_time(pf);
10776 }
10777
10778 /**
10779 * i40e_send_version - update firmware with driver version
10780 * @pf: PF struct
10781 */
i40e_send_version(struct i40e_pf * pf)10782 static void i40e_send_version(struct i40e_pf *pf)
10783 {
10784 struct i40e_driver_version dv;
10785
10786 dv.major_version = 0xff;
10787 dv.minor_version = 0xff;
10788 dv.build_version = 0xff;
10789 dv.subbuild_version = 0;
10790 strscpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10791 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10792 }
10793
10794 /**
10795 * i40e_get_oem_version - get OEM specific version information
10796 * @hw: pointer to the hardware structure
10797 **/
i40e_get_oem_version(struct i40e_hw * hw)10798 static void i40e_get_oem_version(struct i40e_hw *hw)
10799 {
10800 u16 block_offset = 0xffff;
10801 u16 block_length = 0;
10802 u16 capabilities = 0;
10803 u16 gen_snap = 0;
10804 u16 release = 0;
10805
10806 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
10807 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
10808 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
10809 #define I40E_NVM_OEM_GEN_OFFSET 0x02
10810 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
10811 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
10812 #define I40E_NVM_OEM_LENGTH 3
10813
10814 /* Check if pointer to OEM version block is valid. */
10815 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10816 if (block_offset == 0xffff)
10817 return;
10818
10819 /* Check if OEM version block has correct length. */
10820 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10821 &block_length);
10822 if (block_length < I40E_NVM_OEM_LENGTH)
10823 return;
10824
10825 /* Check if OEM version format is as expected. */
10826 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10827 &capabilities);
10828 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10829 return;
10830
10831 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10832 &gen_snap);
10833 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10834 &release);
10835 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
10836 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10837 }
10838
10839 /**
10840 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10841 * @pf: board private structure
10842 **/
i40e_reset(struct i40e_pf * pf)10843 static int i40e_reset(struct i40e_pf *pf)
10844 {
10845 struct i40e_hw *hw = &pf->hw;
10846 int ret;
10847
10848 ret = i40e_pf_reset(hw);
10849 if (ret) {
10850 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10851 set_bit(__I40E_RESET_FAILED, pf->state);
10852 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10853 } else {
10854 pf->pfr_count++;
10855 }
10856 return ret;
10857 }
10858
10859 /**
10860 * i40e_rebuild - rebuild using a saved config
10861 * @pf: board private structure
10862 * @reinit: if the Main VSI needs to re-initialized.
10863 * @lock_acquired: indicates whether or not the lock has been acquired
10864 * before this function was called.
10865 **/
i40e_rebuild(struct i40e_pf * pf,bool reinit,bool lock_acquired)10866 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10867 {
10868 const bool is_recovery_mode_reported = i40e_check_recovery_mode(pf);
10869 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10870 struct i40e_hw *hw = &pf->hw;
10871 int ret;
10872 u32 val;
10873 int v;
10874
10875 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10876 is_recovery_mode_reported)
10877 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10878
10879 if (test_bit(__I40E_DOWN, pf->state) &&
10880 !test_bit(__I40E_RECOVERY_MODE, pf->state))
10881 goto clear_recovery;
10882 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10883
10884 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10885 ret = i40e_init_adminq(&pf->hw);
10886 if (ret) {
10887 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %pe aq_err %s\n",
10888 ERR_PTR(ret),
10889 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10890 goto clear_recovery;
10891 }
10892 i40e_get_oem_version(&pf->hw);
10893
10894 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10895 /* The following delay is necessary for firmware update. */
10896 mdelay(1000);
10897 }
10898
10899 /* re-verify the eeprom if we just had an EMP reset */
10900 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10901 i40e_verify_eeprom(pf);
10902
10903 /* if we are going out of or into recovery mode we have to act
10904 * accordingly with regard to resources initialization
10905 * and deinitialization
10906 */
10907 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10908 if (i40e_get_capabilities(pf,
10909 i40e_aqc_opc_list_func_capabilities))
10910 goto end_unlock;
10911
10912 if (is_recovery_mode_reported) {
10913 /* we're staying in recovery mode so we'll reinitialize
10914 * misc vector here
10915 */
10916 if (i40e_setup_misc_vector_for_recovery_mode(pf))
10917 goto end_unlock;
10918 } else {
10919 if (!lock_acquired)
10920 rtnl_lock();
10921 /* we're going out of recovery mode so we'll free
10922 * the IRQ allocated specifically for recovery mode
10923 * and restore the interrupt scheme
10924 */
10925 free_irq(pf->pdev->irq, pf);
10926 i40e_clear_interrupt_scheme(pf);
10927 if (i40e_restore_interrupt_scheme(pf))
10928 goto end_unlock;
10929 }
10930
10931 /* tell the firmware that we're starting */
10932 i40e_send_version(pf);
10933
10934 /* bail out in case recovery mode was detected, as there is
10935 * no need for further configuration.
10936 */
10937 goto end_unlock;
10938 }
10939
10940 i40e_clear_pxe_mode(hw);
10941 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10942 if (ret)
10943 goto end_core_reset;
10944
10945 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10946 hw->func_caps.num_rx_qp, 0, 0);
10947 if (ret) {
10948 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10949 goto end_core_reset;
10950 }
10951 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10952 if (ret) {
10953 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10954 goto end_core_reset;
10955 }
10956
10957 #ifdef CONFIG_I40E_DCB
10958 /* Enable FW to write a default DCB config on link-up
10959 * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10960 * is not supported with new link speed
10961 */
10962 if (i40e_is_tc_mqprio_enabled(pf)) {
10963 i40e_aq_set_dcb_parameters(hw, false, NULL);
10964 } else {
10965 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10966 (hw->phy.link_info.link_speed &
10967 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10968 i40e_aq_set_dcb_parameters(hw, false, NULL);
10969 dev_warn(&pf->pdev->dev,
10970 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10971 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10972 } else {
10973 i40e_aq_set_dcb_parameters(hw, true, NULL);
10974 ret = i40e_init_pf_dcb(pf);
10975 if (ret) {
10976 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10977 ret);
10978 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10979 /* Continue without DCB enabled */
10980 }
10981 }
10982 }
10983
10984 #endif /* CONFIG_I40E_DCB */
10985 if (!lock_acquired)
10986 rtnl_lock();
10987 ret = i40e_setup_pf_switch(pf, reinit, true);
10988 if (ret)
10989 goto end_unlock;
10990
10991 /* The driver only wants link up/down and module qualification
10992 * reports from firmware. Note the negative logic.
10993 */
10994 ret = i40e_aq_set_phy_int_mask(&pf->hw,
10995 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10996 I40E_AQ_EVENT_MEDIA_NA |
10997 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10998 if (ret)
10999 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
11000 ERR_PTR(ret),
11001 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11002
11003 /* Rebuild the VSIs and VEBs that existed before reset.
11004 * They are still in our local switch element arrays, so only
11005 * need to rebuild the switch model in the HW.
11006 *
11007 * If there were VEBs but the reconstitution failed, we'll try
11008 * to recover minimal use by getting the basic PF VSI working.
11009 */
11010 if (vsi->uplink_seid != pf->mac_seid) {
11011 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
11012 /* find the one VEB connected to the MAC, and find orphans */
11013 for (v = 0; v < I40E_MAX_VEB; v++) {
11014 if (!pf->veb[v])
11015 continue;
11016
11017 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
11018 pf->veb[v]->uplink_seid == 0) {
11019 ret = i40e_reconstitute_veb(pf->veb[v]);
11020
11021 if (!ret)
11022 continue;
11023
11024 /* If Main VEB failed, we're in deep doodoo,
11025 * so give up rebuilding the switch and set up
11026 * for minimal rebuild of PF VSI.
11027 * If orphan failed, we'll report the error
11028 * but try to keep going.
11029 */
11030 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
11031 dev_info(&pf->pdev->dev,
11032 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
11033 ret);
11034 vsi->uplink_seid = pf->mac_seid;
11035 break;
11036 } else if (pf->veb[v]->uplink_seid == 0) {
11037 dev_info(&pf->pdev->dev,
11038 "rebuild of orphan VEB failed: %d\n",
11039 ret);
11040 }
11041 }
11042 }
11043 }
11044
11045 if (vsi->uplink_seid == pf->mac_seid) {
11046 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
11047 /* no VEB, so rebuild only the Main VSI */
11048 ret = i40e_add_vsi(vsi);
11049 if (ret) {
11050 dev_info(&pf->pdev->dev,
11051 "rebuild of Main VSI failed: %d\n", ret);
11052 goto end_unlock;
11053 }
11054 }
11055
11056 if (vsi->mqprio_qopt.max_rate[0]) {
11057 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
11058 vsi->mqprio_qopt.max_rate[0]);
11059 u64 credits = 0;
11060
11061 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
11062 if (ret)
11063 goto end_unlock;
11064
11065 credits = max_tx_rate;
11066 do_div(credits, I40E_BW_CREDIT_DIVISOR);
11067 dev_dbg(&vsi->back->pdev->dev,
11068 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
11069 max_tx_rate,
11070 credits,
11071 vsi->seid);
11072 }
11073
11074 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
11075 if (ret)
11076 goto end_unlock;
11077
11078 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
11079 * for this main VSI if they exist
11080 */
11081 ret = i40e_rebuild_channels(vsi);
11082 if (ret)
11083 goto end_unlock;
11084
11085 /* Reconfigure hardware for allowing smaller MSS in the case
11086 * of TSO, so that we avoid the MDD being fired and causing
11087 * a reset in the case of small MSS+TSO.
11088 */
11089 #define I40E_REG_MSS 0x000E64DC
11090 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
11091 #define I40E_64BYTE_MSS 0x400000
11092 val = rd32(hw, I40E_REG_MSS);
11093 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11094 val &= ~I40E_REG_MSS_MIN_MASK;
11095 val |= I40E_64BYTE_MSS;
11096 wr32(hw, I40E_REG_MSS, val);
11097 }
11098
11099 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
11100 msleep(75);
11101 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11102 if (ret)
11103 dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
11104 ERR_PTR(ret),
11105 i40e_aq_str(&pf->hw,
11106 pf->hw.aq.asq_last_status));
11107 }
11108 /* reinit the misc interrupt */
11109 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11110 ret = i40e_setup_misc_vector(pf);
11111 if (ret)
11112 goto end_unlock;
11113 }
11114
11115 /* Add a filter to drop all Flow control frames from any VSI from being
11116 * transmitted. By doing so we stop a malicious VF from sending out
11117 * PAUSE or PFC frames and potentially controlling traffic for other
11118 * PF/VF VSIs.
11119 * The FW can still send Flow control frames if enabled.
11120 */
11121 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11122 pf->main_vsi_seid);
11123
11124 /* restart the VSIs that were rebuilt and running before the reset */
11125 i40e_pf_unquiesce_all_vsi(pf);
11126
11127 /* Release the RTNL lock before we start resetting VFs */
11128 if (!lock_acquired)
11129 rtnl_unlock();
11130
11131 /* Restore promiscuous settings */
11132 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
11133 if (ret)
11134 dev_warn(&pf->pdev->dev,
11135 "Failed to restore promiscuous setting: %s, err %pe aq_err %s\n",
11136 pf->cur_promisc ? "on" : "off",
11137 ERR_PTR(ret),
11138 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11139
11140 i40e_reset_all_vfs(pf, true);
11141
11142 /* tell the firmware that we're starting */
11143 i40e_send_version(pf);
11144
11145 /* We've already released the lock, so don't do it again */
11146 goto end_core_reset;
11147
11148 end_unlock:
11149 if (!lock_acquired)
11150 rtnl_unlock();
11151 end_core_reset:
11152 clear_bit(__I40E_RESET_FAILED, pf->state);
11153 clear_recovery:
11154 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
11155 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
11156 }
11157
11158 /**
11159 * i40e_reset_and_rebuild - reset and rebuild using a saved config
11160 * @pf: board private structure
11161 * @reinit: if the Main VSI needs to re-initialized.
11162 * @lock_acquired: indicates whether or not the lock has been acquired
11163 * before this function was called.
11164 **/
i40e_reset_and_rebuild(struct i40e_pf * pf,bool reinit,bool lock_acquired)11165 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
11166 bool lock_acquired)
11167 {
11168 int ret;
11169
11170 if (test_bit(__I40E_IN_REMOVE, pf->state))
11171 return;
11172 /* Now we wait for GRST to settle out.
11173 * We don't have to delete the VEBs or VSIs from the hw switch
11174 * because the reset will make them disappear.
11175 */
11176 ret = i40e_reset(pf);
11177 if (!ret)
11178 i40e_rebuild(pf, reinit, lock_acquired);
11179 }
11180
11181 /**
11182 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
11183 * @pf: board private structure
11184 *
11185 * Close up the VFs and other things in prep for a Core Reset,
11186 * then get ready to rebuild the world.
11187 * @lock_acquired: indicates whether or not the lock has been acquired
11188 * before this function was called.
11189 **/
i40e_handle_reset_warning(struct i40e_pf * pf,bool lock_acquired)11190 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
11191 {
11192 i40e_prep_for_reset(pf);
11193 i40e_reset_and_rebuild(pf, false, lock_acquired);
11194 }
11195
11196 /**
11197 * i40e_handle_mdd_event
11198 * @pf: pointer to the PF structure
11199 *
11200 * Called from the MDD irq handler to identify possibly malicious vfs
11201 **/
i40e_handle_mdd_event(struct i40e_pf * pf)11202 static void i40e_handle_mdd_event(struct i40e_pf *pf)
11203 {
11204 struct i40e_hw *hw = &pf->hw;
11205 bool mdd_detected = false;
11206 struct i40e_vf *vf;
11207 u32 reg;
11208 int i;
11209
11210 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
11211 return;
11212
11213 /* find what triggered the MDD event */
11214 reg = rd32(hw, I40E_GL_MDET_TX);
11215 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
11216 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
11217 I40E_GL_MDET_TX_PF_NUM_SHIFT;
11218 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
11219 I40E_GL_MDET_TX_VF_NUM_SHIFT;
11220 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
11221 I40E_GL_MDET_TX_EVENT_SHIFT;
11222 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
11223 I40E_GL_MDET_TX_QUEUE_SHIFT) -
11224 pf->hw.func_caps.base_queue;
11225 if (netif_msg_tx_err(pf))
11226 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11227 event, queue, pf_num, vf_num);
11228 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
11229 mdd_detected = true;
11230 }
11231 reg = rd32(hw, I40E_GL_MDET_RX);
11232 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
11233 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
11234 I40E_GL_MDET_RX_FUNCTION_SHIFT;
11235 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
11236 I40E_GL_MDET_RX_EVENT_SHIFT;
11237 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
11238 I40E_GL_MDET_RX_QUEUE_SHIFT) -
11239 pf->hw.func_caps.base_queue;
11240 if (netif_msg_rx_err(pf))
11241 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11242 event, queue, func);
11243 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
11244 mdd_detected = true;
11245 }
11246
11247 if (mdd_detected) {
11248 reg = rd32(hw, I40E_PF_MDET_TX);
11249 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
11250 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
11251 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11252 }
11253 reg = rd32(hw, I40E_PF_MDET_RX);
11254 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
11255 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
11256 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11257 }
11258 }
11259
11260 /* see if one of the VFs needs its hand slapped */
11261 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11262 vf = &(pf->vf[i]);
11263 reg = rd32(hw, I40E_VP_MDET_TX(i));
11264 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
11265 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
11266 vf->num_mdd_events++;
11267 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
11268 i);
11269 dev_info(&pf->pdev->dev,
11270 "Use PF Control I/F to re-enable the VF\n");
11271 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11272 }
11273
11274 reg = rd32(hw, I40E_VP_MDET_RX(i));
11275 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
11276 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
11277 vf->num_mdd_events++;
11278 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
11279 i);
11280 dev_info(&pf->pdev->dev,
11281 "Use PF Control I/F to re-enable the VF\n");
11282 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11283 }
11284 }
11285
11286 /* re-enable mdd interrupt cause */
11287 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
11288 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
11289 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
11290 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
11291 i40e_flush(hw);
11292 }
11293
11294 /**
11295 * i40e_service_task - Run the driver's async subtasks
11296 * @work: pointer to work_struct containing our data
11297 **/
i40e_service_task(struct work_struct * work)11298 static void i40e_service_task(struct work_struct *work)
11299 {
11300 struct i40e_pf *pf = container_of(work,
11301 struct i40e_pf,
11302 service_task);
11303 unsigned long start_time = jiffies;
11304
11305 /* don't bother with service tasks if a reset is in progress */
11306 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11307 test_bit(__I40E_SUSPENDED, pf->state))
11308 return;
11309
11310 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
11311 return;
11312
11313 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11314 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
11315 i40e_sync_filters_subtask(pf);
11316 i40e_reset_subtask(pf);
11317 i40e_handle_mdd_event(pf);
11318 i40e_vc_process_vflr_event(pf);
11319 i40e_watchdog_subtask(pf);
11320 i40e_fdir_reinit_subtask(pf);
11321 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
11322 /* Client subtask will reopen next time through. */
11323 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
11324 true);
11325 } else {
11326 i40e_client_subtask(pf);
11327 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
11328 pf->state))
11329 i40e_notify_client_of_l2_param_changes(
11330 pf->vsi[pf->lan_vsi]);
11331 }
11332 i40e_sync_filters_subtask(pf);
11333 } else {
11334 i40e_reset_subtask(pf);
11335 }
11336
11337 i40e_clean_adminq_subtask(pf);
11338
11339 /* flush memory to make sure state is correct before next watchdog */
11340 smp_mb__before_atomic();
11341 clear_bit(__I40E_SERVICE_SCHED, pf->state);
11342
11343 /* If the tasks have taken longer than one timer cycle or there
11344 * is more work to be done, reschedule the service task now
11345 * rather than wait for the timer to tick again.
11346 */
11347 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11348 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
11349 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
11350 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11351 i40e_service_event_schedule(pf);
11352 }
11353
11354 /**
11355 * i40e_service_timer - timer callback
11356 * @t: timer list pointer
11357 **/
i40e_service_timer(struct timer_list * t)11358 static void i40e_service_timer(struct timer_list *t)
11359 {
11360 struct i40e_pf *pf = from_timer(pf, t, service_timer);
11361
11362 mod_timer(&pf->service_timer,
11363 round_jiffies(jiffies + pf->service_timer_period));
11364 i40e_service_event_schedule(pf);
11365 }
11366
11367 /**
11368 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
11369 * @vsi: the VSI being configured
11370 **/
i40e_set_num_rings_in_vsi(struct i40e_vsi * vsi)11371 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
11372 {
11373 struct i40e_pf *pf = vsi->back;
11374
11375 switch (vsi->type) {
11376 case I40E_VSI_MAIN:
11377 vsi->alloc_queue_pairs = pf->num_lan_qps;
11378 if (!vsi->num_tx_desc)
11379 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11380 I40E_REQ_DESCRIPTOR_MULTIPLE);
11381 if (!vsi->num_rx_desc)
11382 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11383 I40E_REQ_DESCRIPTOR_MULTIPLE);
11384 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11385 vsi->num_q_vectors = pf->num_lan_msix;
11386 else
11387 vsi->num_q_vectors = 1;
11388
11389 break;
11390
11391 case I40E_VSI_FDIR:
11392 vsi->alloc_queue_pairs = 1;
11393 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11394 I40E_REQ_DESCRIPTOR_MULTIPLE);
11395 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11396 I40E_REQ_DESCRIPTOR_MULTIPLE);
11397 vsi->num_q_vectors = pf->num_fdsb_msix;
11398 break;
11399
11400 case I40E_VSI_VMDQ2:
11401 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11402 if (!vsi->num_tx_desc)
11403 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11404 I40E_REQ_DESCRIPTOR_MULTIPLE);
11405 if (!vsi->num_rx_desc)
11406 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11407 I40E_REQ_DESCRIPTOR_MULTIPLE);
11408 vsi->num_q_vectors = pf->num_vmdq_msix;
11409 break;
11410
11411 case I40E_VSI_SRIOV:
11412 vsi->alloc_queue_pairs = pf->num_vf_qps;
11413 if (!vsi->num_tx_desc)
11414 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11415 I40E_REQ_DESCRIPTOR_MULTIPLE);
11416 if (!vsi->num_rx_desc)
11417 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11418 I40E_REQ_DESCRIPTOR_MULTIPLE);
11419 break;
11420
11421 default:
11422 WARN_ON(1);
11423 return -ENODATA;
11424 }
11425
11426 if (is_kdump_kernel()) {
11427 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11428 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11429 }
11430
11431 return 0;
11432 }
11433
11434 /**
11435 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11436 * @vsi: VSI pointer
11437 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11438 *
11439 * On error: returns error code (negative)
11440 * On success: returns 0
11441 **/
i40e_vsi_alloc_arrays(struct i40e_vsi * vsi,bool alloc_qvectors)11442 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11443 {
11444 struct i40e_ring **next_rings;
11445 int size;
11446 int ret = 0;
11447
11448 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11449 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11450 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11451 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11452 if (!vsi->tx_rings)
11453 return -ENOMEM;
11454 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11455 if (i40e_enabled_xdp_vsi(vsi)) {
11456 vsi->xdp_rings = next_rings;
11457 next_rings += vsi->alloc_queue_pairs;
11458 }
11459 vsi->rx_rings = next_rings;
11460
11461 if (alloc_qvectors) {
11462 /* allocate memory for q_vector pointers */
11463 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11464 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11465 if (!vsi->q_vectors) {
11466 ret = -ENOMEM;
11467 goto err_vectors;
11468 }
11469 }
11470 return ret;
11471
11472 err_vectors:
11473 kfree(vsi->tx_rings);
11474 return ret;
11475 }
11476
11477 /**
11478 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11479 * @pf: board private structure
11480 * @type: type of VSI
11481 *
11482 * On error: returns error code (negative)
11483 * On success: returns vsi index in PF (positive)
11484 **/
i40e_vsi_mem_alloc(struct i40e_pf * pf,enum i40e_vsi_type type)11485 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11486 {
11487 int ret = -ENODEV;
11488 struct i40e_vsi *vsi;
11489 int vsi_idx;
11490 int i;
11491
11492 /* Need to protect the allocation of the VSIs at the PF level */
11493 mutex_lock(&pf->switch_mutex);
11494
11495 /* VSI list may be fragmented if VSI creation/destruction has
11496 * been happening. We can afford to do a quick scan to look
11497 * for any free VSIs in the list.
11498 *
11499 * find next empty vsi slot, looping back around if necessary
11500 */
11501 i = pf->next_vsi;
11502 while (i < pf->num_alloc_vsi && pf->vsi[i])
11503 i++;
11504 if (i >= pf->num_alloc_vsi) {
11505 i = 0;
11506 while (i < pf->next_vsi && pf->vsi[i])
11507 i++;
11508 }
11509
11510 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11511 vsi_idx = i; /* Found one! */
11512 } else {
11513 ret = -ENODEV;
11514 goto unlock_pf; /* out of VSI slots! */
11515 }
11516 pf->next_vsi = ++i;
11517
11518 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11519 if (!vsi) {
11520 ret = -ENOMEM;
11521 goto unlock_pf;
11522 }
11523 vsi->type = type;
11524 vsi->back = pf;
11525 set_bit(__I40E_VSI_DOWN, vsi->state);
11526 vsi->flags = 0;
11527 vsi->idx = vsi_idx;
11528 vsi->int_rate_limit = 0;
11529 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11530 pf->rss_table_size : 64;
11531 vsi->netdev_registered = false;
11532 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11533 hash_init(vsi->mac_filter_hash);
11534 vsi->irqs_ready = false;
11535
11536 if (type == I40E_VSI_MAIN) {
11537 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11538 if (!vsi->af_xdp_zc_qps)
11539 goto err_rings;
11540 }
11541
11542 ret = i40e_set_num_rings_in_vsi(vsi);
11543 if (ret)
11544 goto err_rings;
11545
11546 ret = i40e_vsi_alloc_arrays(vsi, true);
11547 if (ret)
11548 goto err_rings;
11549
11550 /* Setup default MSIX irq handler for VSI */
11551 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11552
11553 /* Initialize VSI lock */
11554 spin_lock_init(&vsi->mac_filter_hash_lock);
11555 pf->vsi[vsi_idx] = vsi;
11556 ret = vsi_idx;
11557 goto unlock_pf;
11558
11559 err_rings:
11560 bitmap_free(vsi->af_xdp_zc_qps);
11561 pf->next_vsi = i - 1;
11562 kfree(vsi);
11563 unlock_pf:
11564 mutex_unlock(&pf->switch_mutex);
11565 return ret;
11566 }
11567
11568 /**
11569 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11570 * @vsi: VSI pointer
11571 * @free_qvectors: a bool to specify if q_vectors need to be freed.
11572 *
11573 * On error: returns error code (negative)
11574 * On success: returns 0
11575 **/
i40e_vsi_free_arrays(struct i40e_vsi * vsi,bool free_qvectors)11576 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11577 {
11578 /* free the ring and vector containers */
11579 if (free_qvectors) {
11580 kfree(vsi->q_vectors);
11581 vsi->q_vectors = NULL;
11582 }
11583 kfree(vsi->tx_rings);
11584 vsi->tx_rings = NULL;
11585 vsi->rx_rings = NULL;
11586 vsi->xdp_rings = NULL;
11587 }
11588
11589 /**
11590 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11591 * and lookup table
11592 * @vsi: Pointer to VSI structure
11593 */
i40e_clear_rss_config_user(struct i40e_vsi * vsi)11594 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11595 {
11596 if (!vsi)
11597 return;
11598
11599 kfree(vsi->rss_hkey_user);
11600 vsi->rss_hkey_user = NULL;
11601
11602 kfree(vsi->rss_lut_user);
11603 vsi->rss_lut_user = NULL;
11604 }
11605
11606 /**
11607 * i40e_vsi_clear - Deallocate the VSI provided
11608 * @vsi: the VSI being un-configured
11609 **/
i40e_vsi_clear(struct i40e_vsi * vsi)11610 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11611 {
11612 struct i40e_pf *pf;
11613
11614 if (!vsi)
11615 return 0;
11616
11617 if (!vsi->back)
11618 goto free_vsi;
11619 pf = vsi->back;
11620
11621 mutex_lock(&pf->switch_mutex);
11622 if (!pf->vsi[vsi->idx]) {
11623 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11624 vsi->idx, vsi->idx, vsi->type);
11625 goto unlock_vsi;
11626 }
11627
11628 if (pf->vsi[vsi->idx] != vsi) {
11629 dev_err(&pf->pdev->dev,
11630 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11631 pf->vsi[vsi->idx]->idx,
11632 pf->vsi[vsi->idx]->type,
11633 vsi->idx, vsi->type);
11634 goto unlock_vsi;
11635 }
11636
11637 /* updates the PF for this cleared vsi */
11638 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11639 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11640
11641 bitmap_free(vsi->af_xdp_zc_qps);
11642 i40e_vsi_free_arrays(vsi, true);
11643 i40e_clear_rss_config_user(vsi);
11644
11645 pf->vsi[vsi->idx] = NULL;
11646 if (vsi->idx < pf->next_vsi)
11647 pf->next_vsi = vsi->idx;
11648
11649 unlock_vsi:
11650 mutex_unlock(&pf->switch_mutex);
11651 free_vsi:
11652 kfree(vsi);
11653
11654 return 0;
11655 }
11656
11657 /**
11658 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11659 * @vsi: the VSI being cleaned
11660 **/
i40e_vsi_clear_rings(struct i40e_vsi * vsi)11661 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11662 {
11663 int i;
11664
11665 if (vsi->tx_rings && vsi->tx_rings[0]) {
11666 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11667 kfree_rcu(vsi->tx_rings[i], rcu);
11668 WRITE_ONCE(vsi->tx_rings[i], NULL);
11669 WRITE_ONCE(vsi->rx_rings[i], NULL);
11670 if (vsi->xdp_rings)
11671 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11672 }
11673 }
11674 }
11675
11676 /**
11677 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11678 * @vsi: the VSI being configured
11679 **/
i40e_alloc_rings(struct i40e_vsi * vsi)11680 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11681 {
11682 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11683 struct i40e_pf *pf = vsi->back;
11684 struct i40e_ring *ring;
11685
11686 /* Set basic values in the rings to be used later during open() */
11687 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11688 /* allocate space for both Tx and Rx in one shot */
11689 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11690 if (!ring)
11691 goto err_out;
11692
11693 ring->queue_index = i;
11694 ring->reg_idx = vsi->base_queue + i;
11695 ring->ring_active = false;
11696 ring->vsi = vsi;
11697 ring->netdev = vsi->netdev;
11698 ring->dev = &pf->pdev->dev;
11699 ring->count = vsi->num_tx_desc;
11700 ring->size = 0;
11701 ring->dcb_tc = 0;
11702 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11703 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11704 ring->itr_setting = pf->tx_itr_default;
11705 WRITE_ONCE(vsi->tx_rings[i], ring++);
11706
11707 if (!i40e_enabled_xdp_vsi(vsi))
11708 goto setup_rx;
11709
11710 ring->queue_index = vsi->alloc_queue_pairs + i;
11711 ring->reg_idx = vsi->base_queue + ring->queue_index;
11712 ring->ring_active = false;
11713 ring->vsi = vsi;
11714 ring->netdev = NULL;
11715 ring->dev = &pf->pdev->dev;
11716 ring->count = vsi->num_tx_desc;
11717 ring->size = 0;
11718 ring->dcb_tc = 0;
11719 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11720 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11721 set_ring_xdp(ring);
11722 ring->itr_setting = pf->tx_itr_default;
11723 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11724
11725 setup_rx:
11726 ring->queue_index = i;
11727 ring->reg_idx = vsi->base_queue + i;
11728 ring->ring_active = false;
11729 ring->vsi = vsi;
11730 ring->netdev = vsi->netdev;
11731 ring->dev = &pf->pdev->dev;
11732 ring->count = vsi->num_rx_desc;
11733 ring->size = 0;
11734 ring->dcb_tc = 0;
11735 ring->itr_setting = pf->rx_itr_default;
11736 WRITE_ONCE(vsi->rx_rings[i], ring);
11737 }
11738
11739 return 0;
11740
11741 err_out:
11742 i40e_vsi_clear_rings(vsi);
11743 return -ENOMEM;
11744 }
11745
11746 /**
11747 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11748 * @pf: board private structure
11749 * @vectors: the number of MSI-X vectors to request
11750 *
11751 * Returns the number of vectors reserved, or error
11752 **/
i40e_reserve_msix_vectors(struct i40e_pf * pf,int vectors)11753 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11754 {
11755 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11756 I40E_MIN_MSIX, vectors);
11757 if (vectors < 0) {
11758 dev_info(&pf->pdev->dev,
11759 "MSI-X vector reservation failed: %d\n", vectors);
11760 vectors = 0;
11761 }
11762
11763 return vectors;
11764 }
11765
11766 /**
11767 * i40e_init_msix - Setup the MSIX capability
11768 * @pf: board private structure
11769 *
11770 * Work with the OS to set up the MSIX vectors needed.
11771 *
11772 * Returns the number of vectors reserved or negative on failure
11773 **/
i40e_init_msix(struct i40e_pf * pf)11774 static int i40e_init_msix(struct i40e_pf *pf)
11775 {
11776 struct i40e_hw *hw = &pf->hw;
11777 int cpus, extra_vectors;
11778 int vectors_left;
11779 int v_budget, i;
11780 int v_actual;
11781 int iwarp_requested = 0;
11782
11783 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11784 return -ENODEV;
11785
11786 /* The number of vectors we'll request will be comprised of:
11787 * - Add 1 for "other" cause for Admin Queue events, etc.
11788 * - The number of LAN queue pairs
11789 * - Queues being used for RSS.
11790 * We don't need as many as max_rss_size vectors.
11791 * use rss_size instead in the calculation since that
11792 * is governed by number of cpus in the system.
11793 * - assumes symmetric Tx/Rx pairing
11794 * - The number of VMDq pairs
11795 * - The CPU count within the NUMA node if iWARP is enabled
11796 * Once we count this up, try the request.
11797 *
11798 * If we can't get what we want, we'll simplify to nearly nothing
11799 * and try again. If that still fails, we punt.
11800 */
11801 vectors_left = hw->func_caps.num_msix_vectors;
11802 v_budget = 0;
11803
11804 /* reserve one vector for miscellaneous handler */
11805 if (vectors_left) {
11806 v_budget++;
11807 vectors_left--;
11808 }
11809
11810 /* reserve some vectors for the main PF traffic queues. Initially we
11811 * only reserve at most 50% of the available vectors, in the case that
11812 * the number of online CPUs is large. This ensures that we can enable
11813 * extra features as well. Once we've enabled the other features, we
11814 * will use any remaining vectors to reach as close as we can to the
11815 * number of online CPUs.
11816 */
11817 cpus = num_online_cpus();
11818 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11819 vectors_left -= pf->num_lan_msix;
11820
11821 /* reserve one vector for sideband flow director */
11822 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11823 if (vectors_left) {
11824 pf->num_fdsb_msix = 1;
11825 v_budget++;
11826 vectors_left--;
11827 } else {
11828 pf->num_fdsb_msix = 0;
11829 }
11830 }
11831
11832 /* can we reserve enough for iWARP? */
11833 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11834 iwarp_requested = pf->num_iwarp_msix;
11835
11836 if (!vectors_left)
11837 pf->num_iwarp_msix = 0;
11838 else if (vectors_left < pf->num_iwarp_msix)
11839 pf->num_iwarp_msix = 1;
11840 v_budget += pf->num_iwarp_msix;
11841 vectors_left -= pf->num_iwarp_msix;
11842 }
11843
11844 /* any vectors left over go for VMDq support */
11845 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11846 if (!vectors_left) {
11847 pf->num_vmdq_msix = 0;
11848 pf->num_vmdq_qps = 0;
11849 } else {
11850 int vmdq_vecs_wanted =
11851 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11852 int vmdq_vecs =
11853 min_t(int, vectors_left, vmdq_vecs_wanted);
11854
11855 /* if we're short on vectors for what's desired, we limit
11856 * the queues per vmdq. If this is still more than are
11857 * available, the user will need to change the number of
11858 * queues/vectors used by the PF later with the ethtool
11859 * channels command
11860 */
11861 if (vectors_left < vmdq_vecs_wanted) {
11862 pf->num_vmdq_qps = 1;
11863 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11864 vmdq_vecs = min_t(int,
11865 vectors_left,
11866 vmdq_vecs_wanted);
11867 }
11868 pf->num_vmdq_msix = pf->num_vmdq_qps;
11869
11870 v_budget += vmdq_vecs;
11871 vectors_left -= vmdq_vecs;
11872 }
11873 }
11874
11875 /* On systems with a large number of SMP cores, we previously limited
11876 * the number of vectors for num_lan_msix to be at most 50% of the
11877 * available vectors, to allow for other features. Now, we add back
11878 * the remaining vectors. However, we ensure that the total
11879 * num_lan_msix will not exceed num_online_cpus(). To do this, we
11880 * calculate the number of vectors we can add without going over the
11881 * cap of CPUs. For systems with a small number of CPUs this will be
11882 * zero.
11883 */
11884 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11885 pf->num_lan_msix += extra_vectors;
11886 vectors_left -= extra_vectors;
11887
11888 WARN(vectors_left < 0,
11889 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11890
11891 v_budget += pf->num_lan_msix;
11892 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11893 GFP_KERNEL);
11894 if (!pf->msix_entries)
11895 return -ENOMEM;
11896
11897 for (i = 0; i < v_budget; i++)
11898 pf->msix_entries[i].entry = i;
11899 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11900
11901 if (v_actual < I40E_MIN_MSIX) {
11902 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11903 kfree(pf->msix_entries);
11904 pf->msix_entries = NULL;
11905 pci_disable_msix(pf->pdev);
11906 return -ENODEV;
11907
11908 } else if (v_actual == I40E_MIN_MSIX) {
11909 /* Adjust for minimal MSIX use */
11910 pf->num_vmdq_vsis = 0;
11911 pf->num_vmdq_qps = 0;
11912 pf->num_lan_qps = 1;
11913 pf->num_lan_msix = 1;
11914
11915 } else if (v_actual != v_budget) {
11916 /* If we have limited resources, we will start with no vectors
11917 * for the special features and then allocate vectors to some
11918 * of these features based on the policy and at the end disable
11919 * the features that did not get any vectors.
11920 */
11921 int vec;
11922
11923 dev_info(&pf->pdev->dev,
11924 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11925 v_actual, v_budget);
11926 /* reserve the misc vector */
11927 vec = v_actual - 1;
11928
11929 /* Scale vector usage down */
11930 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
11931 pf->num_vmdq_vsis = 1;
11932 pf->num_vmdq_qps = 1;
11933
11934 /* partition out the remaining vectors */
11935 switch (vec) {
11936 case 2:
11937 pf->num_lan_msix = 1;
11938 break;
11939 case 3:
11940 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11941 pf->num_lan_msix = 1;
11942 pf->num_iwarp_msix = 1;
11943 } else {
11944 pf->num_lan_msix = 2;
11945 }
11946 break;
11947 default:
11948 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11949 pf->num_iwarp_msix = min_t(int, (vec / 3),
11950 iwarp_requested);
11951 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11952 I40E_DEFAULT_NUM_VMDQ_VSI);
11953 } else {
11954 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11955 I40E_DEFAULT_NUM_VMDQ_VSI);
11956 }
11957 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11958 pf->num_fdsb_msix = 1;
11959 vec--;
11960 }
11961 pf->num_lan_msix = min_t(int,
11962 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11963 pf->num_lan_msix);
11964 pf->num_lan_qps = pf->num_lan_msix;
11965 break;
11966 }
11967 }
11968
11969 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11970 (pf->num_fdsb_msix == 0)) {
11971 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11972 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11973 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11974 }
11975 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11976 (pf->num_vmdq_msix == 0)) {
11977 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11978 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11979 }
11980
11981 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11982 (pf->num_iwarp_msix == 0)) {
11983 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11984 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11985 }
11986 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11987 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11988 pf->num_lan_msix,
11989 pf->num_vmdq_msix * pf->num_vmdq_vsis,
11990 pf->num_fdsb_msix,
11991 pf->num_iwarp_msix);
11992
11993 return v_actual;
11994 }
11995
11996 /**
11997 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11998 * @vsi: the VSI being configured
11999 * @v_idx: index of the vector in the vsi struct
12000 *
12001 * We allocate one q_vector. If allocation fails we return -ENOMEM.
12002 **/
i40e_vsi_alloc_q_vector(struct i40e_vsi * vsi,int v_idx)12003 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
12004 {
12005 struct i40e_q_vector *q_vector;
12006
12007 /* allocate q_vector */
12008 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
12009 if (!q_vector)
12010 return -ENOMEM;
12011
12012 q_vector->vsi = vsi;
12013 q_vector->v_idx = v_idx;
12014 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
12015
12016 if (vsi->netdev)
12017 netif_napi_add(vsi->netdev, &q_vector->napi, i40e_napi_poll);
12018
12019 /* tie q_vector and vsi together */
12020 vsi->q_vectors[v_idx] = q_vector;
12021
12022 return 0;
12023 }
12024
12025 /**
12026 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
12027 * @vsi: the VSI being configured
12028 *
12029 * We allocate one q_vector per queue interrupt. If allocation fails we
12030 * return -ENOMEM.
12031 **/
i40e_vsi_alloc_q_vectors(struct i40e_vsi * vsi)12032 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
12033 {
12034 struct i40e_pf *pf = vsi->back;
12035 int err, v_idx, num_q_vectors;
12036
12037 /* if not MSIX, give the one vector only to the LAN VSI */
12038 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
12039 num_q_vectors = vsi->num_q_vectors;
12040 else if (vsi == pf->vsi[pf->lan_vsi])
12041 num_q_vectors = 1;
12042 else
12043 return -EINVAL;
12044
12045 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
12046 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
12047 if (err)
12048 goto err_out;
12049 }
12050
12051 return 0;
12052
12053 err_out:
12054 while (v_idx--)
12055 i40e_free_q_vector(vsi, v_idx);
12056
12057 return err;
12058 }
12059
12060 /**
12061 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
12062 * @pf: board private structure to initialize
12063 **/
i40e_init_interrupt_scheme(struct i40e_pf * pf)12064 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
12065 {
12066 int vectors = 0;
12067 ssize_t size;
12068
12069 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12070 vectors = i40e_init_msix(pf);
12071 if (vectors < 0) {
12072 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
12073 I40E_FLAG_IWARP_ENABLED |
12074 I40E_FLAG_RSS_ENABLED |
12075 I40E_FLAG_DCB_CAPABLE |
12076 I40E_FLAG_DCB_ENABLED |
12077 I40E_FLAG_SRIOV_ENABLED |
12078 I40E_FLAG_FD_SB_ENABLED |
12079 I40E_FLAG_FD_ATR_ENABLED |
12080 I40E_FLAG_VMDQ_ENABLED);
12081 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12082
12083 /* rework the queue expectations without MSIX */
12084 i40e_determine_queue_usage(pf);
12085 }
12086 }
12087
12088 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
12089 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
12090 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
12091 vectors = pci_enable_msi(pf->pdev);
12092 if (vectors < 0) {
12093 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
12094 vectors);
12095 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
12096 }
12097 vectors = 1; /* one MSI or Legacy vector */
12098 }
12099
12100 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
12101 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
12102
12103 /* set up vector assignment tracking */
12104 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
12105 pf->irq_pile = kzalloc(size, GFP_KERNEL);
12106 if (!pf->irq_pile)
12107 return -ENOMEM;
12108
12109 pf->irq_pile->num_entries = vectors;
12110
12111 /* track first vector for misc interrupts, ignore return */
12112 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
12113
12114 return 0;
12115 }
12116
12117 /**
12118 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
12119 * @pf: private board data structure
12120 *
12121 * Restore the interrupt scheme that was cleared when we suspended the
12122 * device. This should be called during resume to re-allocate the q_vectors
12123 * and reacquire IRQs.
12124 */
i40e_restore_interrupt_scheme(struct i40e_pf * pf)12125 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
12126 {
12127 int err, i;
12128
12129 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
12130 * scheme. We need to re-enabled them here in order to attempt to
12131 * re-acquire the MSI or MSI-X vectors
12132 */
12133 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
12134
12135 err = i40e_init_interrupt_scheme(pf);
12136 if (err)
12137 return err;
12138
12139 /* Now that we've re-acquired IRQs, we need to remap the vectors and
12140 * rings together again.
12141 */
12142 for (i = 0; i < pf->num_alloc_vsi; i++) {
12143 if (pf->vsi[i]) {
12144 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
12145 if (err)
12146 goto err_unwind;
12147 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
12148 }
12149 }
12150
12151 err = i40e_setup_misc_vector(pf);
12152 if (err)
12153 goto err_unwind;
12154
12155 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
12156 i40e_client_update_msix_info(pf);
12157
12158 return 0;
12159
12160 err_unwind:
12161 while (i--) {
12162 if (pf->vsi[i])
12163 i40e_vsi_free_q_vectors(pf->vsi[i]);
12164 }
12165
12166 return err;
12167 }
12168
12169 /**
12170 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
12171 * non queue events in recovery mode
12172 * @pf: board private structure
12173 *
12174 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
12175 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
12176 * This is handled differently than in recovery mode since no Tx/Rx resources
12177 * are being allocated.
12178 **/
i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf * pf)12179 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
12180 {
12181 int err;
12182
12183 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12184 err = i40e_setup_misc_vector(pf);
12185
12186 if (err) {
12187 dev_info(&pf->pdev->dev,
12188 "MSI-X misc vector request failed, error %d\n",
12189 err);
12190 return err;
12191 }
12192 } else {
12193 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
12194
12195 err = request_irq(pf->pdev->irq, i40e_intr, flags,
12196 pf->int_name, pf);
12197
12198 if (err) {
12199 dev_info(&pf->pdev->dev,
12200 "MSI/legacy misc vector request failed, error %d\n",
12201 err);
12202 return err;
12203 }
12204 i40e_enable_misc_int_causes(pf);
12205 i40e_irq_dynamic_enable_icr0(pf);
12206 }
12207
12208 return 0;
12209 }
12210
12211 /**
12212 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
12213 * @pf: board private structure
12214 *
12215 * This sets up the handler for MSIX 0, which is used to manage the
12216 * non-queue interrupts, e.g. AdminQ and errors. This is not used
12217 * when in MSI or Legacy interrupt mode.
12218 **/
i40e_setup_misc_vector(struct i40e_pf * pf)12219 static int i40e_setup_misc_vector(struct i40e_pf *pf)
12220 {
12221 struct i40e_hw *hw = &pf->hw;
12222 int err = 0;
12223
12224 /* Only request the IRQ once, the first time through. */
12225 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
12226 err = request_irq(pf->msix_entries[0].vector,
12227 i40e_intr, 0, pf->int_name, pf);
12228 if (err) {
12229 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
12230 dev_info(&pf->pdev->dev,
12231 "request_irq for %s failed: %d\n",
12232 pf->int_name, err);
12233 return -EFAULT;
12234 }
12235 }
12236
12237 i40e_enable_misc_int_causes(pf);
12238
12239 /* associate no queues to the misc vector */
12240 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
12241 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
12242
12243 i40e_flush(hw);
12244
12245 i40e_irq_dynamic_enable_icr0(pf);
12246
12247 return err;
12248 }
12249
12250 /**
12251 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
12252 * @vsi: Pointer to vsi structure
12253 * @seed: Buffter to store the hash keys
12254 * @lut: Buffer to store the lookup table entries
12255 * @lut_size: Size of buffer to store the lookup table entries
12256 *
12257 * Return 0 on success, negative on failure
12258 */
i40e_get_rss_aq(struct i40e_vsi * vsi,const u8 * seed,u8 * lut,u16 lut_size)12259 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
12260 u8 *lut, u16 lut_size)
12261 {
12262 struct i40e_pf *pf = vsi->back;
12263 struct i40e_hw *hw = &pf->hw;
12264 int ret = 0;
12265
12266 if (seed) {
12267 ret = i40e_aq_get_rss_key(hw, vsi->id,
12268 (struct i40e_aqc_get_set_rss_key_data *)seed);
12269 if (ret) {
12270 dev_info(&pf->pdev->dev,
12271 "Cannot get RSS key, err %pe aq_err %s\n",
12272 ERR_PTR(ret),
12273 i40e_aq_str(&pf->hw,
12274 pf->hw.aq.asq_last_status));
12275 return ret;
12276 }
12277 }
12278
12279 if (lut) {
12280 bool pf_lut = vsi->type == I40E_VSI_MAIN;
12281
12282 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
12283 if (ret) {
12284 dev_info(&pf->pdev->dev,
12285 "Cannot get RSS lut, err %pe aq_err %s\n",
12286 ERR_PTR(ret),
12287 i40e_aq_str(&pf->hw,
12288 pf->hw.aq.asq_last_status));
12289 return ret;
12290 }
12291 }
12292
12293 return ret;
12294 }
12295
12296 /**
12297 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
12298 * @vsi: Pointer to vsi structure
12299 * @seed: RSS hash seed
12300 * @lut: Lookup table
12301 * @lut_size: Lookup table size
12302 *
12303 * Returns 0 on success, negative on failure
12304 **/
i40e_config_rss_reg(struct i40e_vsi * vsi,const u8 * seed,const u8 * lut,u16 lut_size)12305 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
12306 const u8 *lut, u16 lut_size)
12307 {
12308 struct i40e_pf *pf = vsi->back;
12309 struct i40e_hw *hw = &pf->hw;
12310 u16 vf_id = vsi->vf_id;
12311 u8 i;
12312
12313 /* Fill out hash function seed */
12314 if (seed) {
12315 u32 *seed_dw = (u32 *)seed;
12316
12317 if (vsi->type == I40E_VSI_MAIN) {
12318 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12319 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
12320 } else if (vsi->type == I40E_VSI_SRIOV) {
12321 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
12322 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
12323 } else {
12324 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12325 }
12326 }
12327
12328 if (lut) {
12329 u32 *lut_dw = (u32 *)lut;
12330
12331 if (vsi->type == I40E_VSI_MAIN) {
12332 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12333 return -EINVAL;
12334 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12335 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
12336 } else if (vsi->type == I40E_VSI_SRIOV) {
12337 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
12338 return -EINVAL;
12339 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12340 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
12341 } else {
12342 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12343 }
12344 }
12345 i40e_flush(hw);
12346
12347 return 0;
12348 }
12349
12350 /**
12351 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
12352 * @vsi: Pointer to VSI structure
12353 * @seed: Buffer to store the keys
12354 * @lut: Buffer to store the lookup table entries
12355 * @lut_size: Size of buffer to store the lookup table entries
12356 *
12357 * Returns 0 on success, negative on failure
12358 */
i40e_get_rss_reg(struct i40e_vsi * vsi,u8 * seed,u8 * lut,u16 lut_size)12359 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
12360 u8 *lut, u16 lut_size)
12361 {
12362 struct i40e_pf *pf = vsi->back;
12363 struct i40e_hw *hw = &pf->hw;
12364 u16 i;
12365
12366 if (seed) {
12367 u32 *seed_dw = (u32 *)seed;
12368
12369 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12370 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
12371 }
12372 if (lut) {
12373 u32 *lut_dw = (u32 *)lut;
12374
12375 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12376 return -EINVAL;
12377 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12378 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
12379 }
12380
12381 return 0;
12382 }
12383
12384 /**
12385 * i40e_config_rss - Configure RSS keys and lut
12386 * @vsi: Pointer to VSI structure
12387 * @seed: RSS hash seed
12388 * @lut: Lookup table
12389 * @lut_size: Lookup table size
12390 *
12391 * Returns 0 on success, negative on failure
12392 */
i40e_config_rss(struct i40e_vsi * vsi,u8 * seed,u8 * lut,u16 lut_size)12393 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12394 {
12395 struct i40e_pf *pf = vsi->back;
12396
12397 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12398 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12399 else
12400 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12401 }
12402
12403 /**
12404 * i40e_get_rss - Get RSS keys and lut
12405 * @vsi: Pointer to VSI structure
12406 * @seed: Buffer to store the keys
12407 * @lut: Buffer to store the lookup table entries
12408 * @lut_size: Size of buffer to store the lookup table entries
12409 *
12410 * Returns 0 on success, negative on failure
12411 */
i40e_get_rss(struct i40e_vsi * vsi,u8 * seed,u8 * lut,u16 lut_size)12412 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12413 {
12414 struct i40e_pf *pf = vsi->back;
12415
12416 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12417 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12418 else
12419 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12420 }
12421
12422 /**
12423 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12424 * @pf: Pointer to board private structure
12425 * @lut: Lookup table
12426 * @rss_table_size: Lookup table size
12427 * @rss_size: Range of queue number for hashing
12428 */
i40e_fill_rss_lut(struct i40e_pf * pf,u8 * lut,u16 rss_table_size,u16 rss_size)12429 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12430 u16 rss_table_size, u16 rss_size)
12431 {
12432 u16 i;
12433
12434 for (i = 0; i < rss_table_size; i++)
12435 lut[i] = i % rss_size;
12436 }
12437
12438 /**
12439 * i40e_pf_config_rss - Prepare for RSS if used
12440 * @pf: board private structure
12441 **/
i40e_pf_config_rss(struct i40e_pf * pf)12442 static int i40e_pf_config_rss(struct i40e_pf *pf)
12443 {
12444 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12445 u8 seed[I40E_HKEY_ARRAY_SIZE];
12446 u8 *lut;
12447 struct i40e_hw *hw = &pf->hw;
12448 u32 reg_val;
12449 u64 hena;
12450 int ret;
12451
12452 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12453 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12454 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12455 hena |= i40e_pf_get_default_rss_hena(pf);
12456
12457 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12458 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12459
12460 /* Determine the RSS table size based on the hardware capabilities */
12461 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12462 reg_val = (pf->rss_table_size == 512) ?
12463 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12464 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12465 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12466
12467 /* Determine the RSS size of the VSI */
12468 if (!vsi->rss_size) {
12469 u16 qcount;
12470 /* If the firmware does something weird during VSI init, we
12471 * could end up with zero TCs. Check for that to avoid
12472 * divide-by-zero. It probably won't pass traffic, but it also
12473 * won't panic.
12474 */
12475 qcount = vsi->num_queue_pairs /
12476 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12477 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12478 }
12479 if (!vsi->rss_size)
12480 return -EINVAL;
12481
12482 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12483 if (!lut)
12484 return -ENOMEM;
12485
12486 /* Use user configured lut if there is one, otherwise use default */
12487 if (vsi->rss_lut_user)
12488 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12489 else
12490 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12491
12492 /* Use user configured hash key if there is one, otherwise
12493 * use default.
12494 */
12495 if (vsi->rss_hkey_user)
12496 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12497 else
12498 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12499 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12500 kfree(lut);
12501
12502 return ret;
12503 }
12504
12505 /**
12506 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12507 * @pf: board private structure
12508 * @queue_count: the requested queue count for rss.
12509 *
12510 * returns 0 if rss is not enabled, if enabled returns the final rss queue
12511 * count which may be different from the requested queue count.
12512 * Note: expects to be called while under rtnl_lock()
12513 **/
i40e_reconfig_rss_queues(struct i40e_pf * pf,int queue_count)12514 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12515 {
12516 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12517 int new_rss_size;
12518
12519 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12520 return 0;
12521
12522 queue_count = min_t(int, queue_count, num_online_cpus());
12523 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12524
12525 if (queue_count != vsi->num_queue_pairs) {
12526 u16 qcount;
12527
12528 vsi->req_queue_pairs = queue_count;
12529 i40e_prep_for_reset(pf);
12530 if (test_bit(__I40E_IN_REMOVE, pf->state))
12531 return pf->alloc_rss_size;
12532
12533 pf->alloc_rss_size = new_rss_size;
12534
12535 i40e_reset_and_rebuild(pf, true, true);
12536
12537 /* Discard the user configured hash keys and lut, if less
12538 * queues are enabled.
12539 */
12540 if (queue_count < vsi->rss_size) {
12541 i40e_clear_rss_config_user(vsi);
12542 dev_dbg(&pf->pdev->dev,
12543 "discard user configured hash keys and lut\n");
12544 }
12545
12546 /* Reset vsi->rss_size, as number of enabled queues changed */
12547 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12548 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12549
12550 i40e_pf_config_rss(pf);
12551 }
12552 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
12553 vsi->req_queue_pairs, pf->rss_size_max);
12554 return pf->alloc_rss_size;
12555 }
12556
12557 /**
12558 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12559 * @pf: board private structure
12560 **/
i40e_get_partition_bw_setting(struct i40e_pf * pf)12561 int i40e_get_partition_bw_setting(struct i40e_pf *pf)
12562 {
12563 bool min_valid, max_valid;
12564 u32 max_bw, min_bw;
12565 int status;
12566
12567 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12568 &min_valid, &max_valid);
12569
12570 if (!status) {
12571 if (min_valid)
12572 pf->min_bw = min_bw;
12573 if (max_valid)
12574 pf->max_bw = max_bw;
12575 }
12576
12577 return status;
12578 }
12579
12580 /**
12581 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12582 * @pf: board private structure
12583 **/
i40e_set_partition_bw_setting(struct i40e_pf * pf)12584 int i40e_set_partition_bw_setting(struct i40e_pf *pf)
12585 {
12586 struct i40e_aqc_configure_partition_bw_data bw_data;
12587 int status;
12588
12589 memset(&bw_data, 0, sizeof(bw_data));
12590
12591 /* Set the valid bit for this PF */
12592 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12593 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12594 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12595
12596 /* Set the new bandwidths */
12597 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12598
12599 return status;
12600 }
12601
12602 /**
12603 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12604 * @pf: board private structure
12605 **/
i40e_commit_partition_bw_setting(struct i40e_pf * pf)12606 int i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12607 {
12608 /* Commit temporary BW setting to permanent NVM image */
12609 enum i40e_admin_queue_err last_aq_status;
12610 u16 nvm_word;
12611 int ret;
12612
12613 if (pf->hw.partition_id != 1) {
12614 dev_info(&pf->pdev->dev,
12615 "Commit BW only works on partition 1! This is partition %d",
12616 pf->hw.partition_id);
12617 ret = -EOPNOTSUPP;
12618 goto bw_commit_out;
12619 }
12620
12621 /* Acquire NVM for read access */
12622 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12623 last_aq_status = pf->hw.aq.asq_last_status;
12624 if (ret) {
12625 dev_info(&pf->pdev->dev,
12626 "Cannot acquire NVM for read access, err %pe aq_err %s\n",
12627 ERR_PTR(ret),
12628 i40e_aq_str(&pf->hw, last_aq_status));
12629 goto bw_commit_out;
12630 }
12631
12632 /* Read word 0x10 of NVM - SW compatibility word 1 */
12633 ret = i40e_aq_read_nvm(&pf->hw,
12634 I40E_SR_NVM_CONTROL_WORD,
12635 0x10, sizeof(nvm_word), &nvm_word,
12636 false, NULL);
12637 /* Save off last admin queue command status before releasing
12638 * the NVM
12639 */
12640 last_aq_status = pf->hw.aq.asq_last_status;
12641 i40e_release_nvm(&pf->hw);
12642 if (ret) {
12643 dev_info(&pf->pdev->dev, "NVM read error, err %pe aq_err %s\n",
12644 ERR_PTR(ret),
12645 i40e_aq_str(&pf->hw, last_aq_status));
12646 goto bw_commit_out;
12647 }
12648
12649 /* Wait a bit for NVM release to complete */
12650 msleep(50);
12651
12652 /* Acquire NVM for write access */
12653 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12654 last_aq_status = pf->hw.aq.asq_last_status;
12655 if (ret) {
12656 dev_info(&pf->pdev->dev,
12657 "Cannot acquire NVM for write access, err %pe aq_err %s\n",
12658 ERR_PTR(ret),
12659 i40e_aq_str(&pf->hw, last_aq_status));
12660 goto bw_commit_out;
12661 }
12662 /* Write it back out unchanged to initiate update NVM,
12663 * which will force a write of the shadow (alt) RAM to
12664 * the NVM - thus storing the bandwidth values permanently.
12665 */
12666 ret = i40e_aq_update_nvm(&pf->hw,
12667 I40E_SR_NVM_CONTROL_WORD,
12668 0x10, sizeof(nvm_word),
12669 &nvm_word, true, 0, NULL);
12670 /* Save off last admin queue command status before releasing
12671 * the NVM
12672 */
12673 last_aq_status = pf->hw.aq.asq_last_status;
12674 i40e_release_nvm(&pf->hw);
12675 if (ret)
12676 dev_info(&pf->pdev->dev,
12677 "BW settings NOT SAVED, err %pe aq_err %s\n",
12678 ERR_PTR(ret),
12679 i40e_aq_str(&pf->hw, last_aq_status));
12680 bw_commit_out:
12681
12682 return ret;
12683 }
12684
12685 /**
12686 * i40e_is_total_port_shutdown_enabled - read NVM and return value
12687 * if total port shutdown feature is enabled for this PF
12688 * @pf: board private structure
12689 **/
i40e_is_total_port_shutdown_enabled(struct i40e_pf * pf)12690 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12691 {
12692 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED BIT(4)
12693 #define I40E_FEATURES_ENABLE_PTR 0x2A
12694 #define I40E_CURRENT_SETTING_PTR 0x2B
12695 #define I40E_LINK_BEHAVIOR_WORD_OFFSET 0x2D
12696 #define I40E_LINK_BEHAVIOR_WORD_LENGTH 0x1
12697 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED BIT(0)
12698 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH 4
12699 u16 sr_emp_sr_settings_ptr = 0;
12700 u16 features_enable = 0;
12701 u16 link_behavior = 0;
12702 int read_status = 0;
12703 bool ret = false;
12704
12705 read_status = i40e_read_nvm_word(&pf->hw,
12706 I40E_SR_EMP_SR_SETTINGS_PTR,
12707 &sr_emp_sr_settings_ptr);
12708 if (read_status)
12709 goto err_nvm;
12710 read_status = i40e_read_nvm_word(&pf->hw,
12711 sr_emp_sr_settings_ptr +
12712 I40E_FEATURES_ENABLE_PTR,
12713 &features_enable);
12714 if (read_status)
12715 goto err_nvm;
12716 if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12717 read_status = i40e_read_nvm_module_data(&pf->hw,
12718 I40E_SR_EMP_SR_SETTINGS_PTR,
12719 I40E_CURRENT_SETTING_PTR,
12720 I40E_LINK_BEHAVIOR_WORD_OFFSET,
12721 I40E_LINK_BEHAVIOR_WORD_LENGTH,
12722 &link_behavior);
12723 if (read_status)
12724 goto err_nvm;
12725 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12726 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12727 }
12728 return ret;
12729
12730 err_nvm:
12731 dev_warn(&pf->pdev->dev,
12732 "total-port-shutdown feature is off due to read nvm error: %pe\n",
12733 ERR_PTR(read_status));
12734 return ret;
12735 }
12736
12737 /**
12738 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12739 * @pf: board private structure to initialize
12740 *
12741 * i40e_sw_init initializes the Adapter private data structure.
12742 * Fields are initialized based on PCI device information and
12743 * OS network device settings (MTU size).
12744 **/
i40e_sw_init(struct i40e_pf * pf)12745 static int i40e_sw_init(struct i40e_pf *pf)
12746 {
12747 int err = 0;
12748 int size;
12749 u16 pow;
12750
12751 /* Set default capability flags */
12752 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12753 I40E_FLAG_MSI_ENABLED |
12754 I40E_FLAG_MSIX_ENABLED;
12755
12756 /* Set default ITR */
12757 pf->rx_itr_default = I40E_ITR_RX_DEF;
12758 pf->tx_itr_default = I40E_ITR_TX_DEF;
12759
12760 /* Depending on PF configurations, it is possible that the RSS
12761 * maximum might end up larger than the available queues
12762 */
12763 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12764 pf->alloc_rss_size = 1;
12765 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12766 pf->rss_size_max = min_t(int, pf->rss_size_max,
12767 pf->hw.func_caps.num_tx_qp);
12768
12769 /* find the next higher power-of-2 of num cpus */
12770 pow = roundup_pow_of_two(num_online_cpus());
12771 pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12772
12773 if (pf->hw.func_caps.rss) {
12774 pf->flags |= I40E_FLAG_RSS_ENABLED;
12775 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12776 num_online_cpus());
12777 }
12778
12779 /* MFP mode enabled */
12780 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12781 pf->flags |= I40E_FLAG_MFP_ENABLED;
12782 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12783 if (i40e_get_partition_bw_setting(pf)) {
12784 dev_warn(&pf->pdev->dev,
12785 "Could not get partition bw settings\n");
12786 } else {
12787 dev_info(&pf->pdev->dev,
12788 "Partition BW Min = %8.8x, Max = %8.8x\n",
12789 pf->min_bw, pf->max_bw);
12790
12791 /* nudge the Tx scheduler */
12792 i40e_set_partition_bw_setting(pf);
12793 }
12794 }
12795
12796 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12797 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12798 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12799 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12800 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12801 pf->hw.num_partitions > 1)
12802 dev_info(&pf->pdev->dev,
12803 "Flow Director Sideband mode Disabled in MFP mode\n");
12804 else
12805 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12806 pf->fdir_pf_filter_count =
12807 pf->hw.func_caps.fd_filters_guaranteed;
12808 pf->hw.fdir_shared_filter_count =
12809 pf->hw.func_caps.fd_filters_best_effort;
12810 }
12811
12812 if (pf->hw.mac.type == I40E_MAC_X722) {
12813 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12814 I40E_HW_128_QP_RSS_CAPABLE |
12815 I40E_HW_ATR_EVICT_CAPABLE |
12816 I40E_HW_WB_ON_ITR_CAPABLE |
12817 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12818 I40E_HW_NO_PCI_LINK_CHECK |
12819 I40E_HW_USE_SET_LLDP_MIB |
12820 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12821 I40E_HW_PTP_L4_CAPABLE |
12822 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12823 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12824
12825 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12826 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12827 I40E_FDEVICT_PCTYPE_DEFAULT) {
12828 dev_warn(&pf->pdev->dev,
12829 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12830 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12831 }
12832 } else if ((pf->hw.aq.api_maj_ver > 1) ||
12833 ((pf->hw.aq.api_maj_ver == 1) &&
12834 (pf->hw.aq.api_min_ver > 4))) {
12835 /* Supported in FW API version higher than 1.4 */
12836 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12837 }
12838
12839 /* Enable HW ATR eviction if possible */
12840 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12841 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12842
12843 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12844 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12845 (pf->hw.aq.fw_maj_ver < 4))) {
12846 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12847 /* No DCB support for FW < v4.33 */
12848 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12849 }
12850
12851 /* Disable FW LLDP if FW < v4.3 */
12852 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12853 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12854 (pf->hw.aq.fw_maj_ver < 4)))
12855 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12856
12857 /* Use the FW Set LLDP MIB API if FW > v4.40 */
12858 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12859 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12860 (pf->hw.aq.fw_maj_ver >= 5)))
12861 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12862
12863 /* Enable PTP L4 if FW > v6.0 */
12864 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12865 pf->hw.aq.fw_maj_ver >= 6)
12866 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12867
12868 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12869 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12870 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12871 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12872 }
12873
12874 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12875 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12876 /* IWARP needs one extra vector for CQP just like MISC.*/
12877 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12878 }
12879 /* Stopping FW LLDP engine is supported on XL710 and X722
12880 * starting from FW versions determined in i40e_init_adminq.
12881 * Stopping the FW LLDP engine is not supported on XL710
12882 * if NPAR is functioning so unset this hw flag in this case.
12883 */
12884 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12885 pf->hw.func_caps.npar_enable &&
12886 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12887 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12888
12889 #ifdef CONFIG_PCI_IOV
12890 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12891 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12892 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12893 pf->num_req_vfs = min_t(int,
12894 pf->hw.func_caps.num_vfs,
12895 I40E_MAX_VF_COUNT);
12896 }
12897 #endif /* CONFIG_PCI_IOV */
12898 pf->eeprom_version = 0xDEAD;
12899 pf->lan_veb = I40E_NO_VEB;
12900 pf->lan_vsi = I40E_NO_VSI;
12901
12902 /* By default FW has this off for performance reasons */
12903 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12904
12905 /* set up queue assignment tracking */
12906 size = sizeof(struct i40e_lump_tracking)
12907 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12908 pf->qp_pile = kzalloc(size, GFP_KERNEL);
12909 if (!pf->qp_pile) {
12910 err = -ENOMEM;
12911 goto sw_init_done;
12912 }
12913 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12914
12915 pf->tx_timeout_recovery_level = 1;
12916
12917 if (pf->hw.mac.type != I40E_MAC_X722 &&
12918 i40e_is_total_port_shutdown_enabled(pf)) {
12919 /* Link down on close must be on when total port shutdown
12920 * is enabled for a given port
12921 */
12922 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12923 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12924 dev_info(&pf->pdev->dev,
12925 "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12926 }
12927 mutex_init(&pf->switch_mutex);
12928
12929 sw_init_done:
12930 return err;
12931 }
12932
12933 /**
12934 * i40e_set_ntuple - set the ntuple feature flag and take action
12935 * @pf: board private structure to initialize
12936 * @features: the feature set that the stack is suggesting
12937 *
12938 * returns a bool to indicate if reset needs to happen
12939 **/
i40e_set_ntuple(struct i40e_pf * pf,netdev_features_t features)12940 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12941 {
12942 bool need_reset = false;
12943
12944 /* Check if Flow Director n-tuple support was enabled or disabled. If
12945 * the state changed, we need to reset.
12946 */
12947 if (features & NETIF_F_NTUPLE) {
12948 /* Enable filters and mark for reset */
12949 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12950 need_reset = true;
12951 /* enable FD_SB only if there is MSI-X vector and no cloud
12952 * filters exist
12953 */
12954 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12955 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12956 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12957 }
12958 } else {
12959 /* turn off filters, mark for reset and clear SW filter list */
12960 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12961 need_reset = true;
12962 i40e_fdir_filter_exit(pf);
12963 }
12964 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12965 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12966 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12967
12968 /* reset fd counters */
12969 pf->fd_add_err = 0;
12970 pf->fd_atr_cnt = 0;
12971 /* if ATR was auto disabled it can be re-enabled. */
12972 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12973 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12974 (I40E_DEBUG_FD & pf->hw.debug_mask))
12975 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12976 }
12977 return need_reset;
12978 }
12979
12980 /**
12981 * i40e_clear_rss_lut - clear the rx hash lookup table
12982 * @vsi: the VSI being configured
12983 **/
i40e_clear_rss_lut(struct i40e_vsi * vsi)12984 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12985 {
12986 struct i40e_pf *pf = vsi->back;
12987 struct i40e_hw *hw = &pf->hw;
12988 u16 vf_id = vsi->vf_id;
12989 u8 i;
12990
12991 if (vsi->type == I40E_VSI_MAIN) {
12992 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12993 wr32(hw, I40E_PFQF_HLUT(i), 0);
12994 } else if (vsi->type == I40E_VSI_SRIOV) {
12995 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12996 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12997 } else {
12998 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12999 }
13000 }
13001
13002 /**
13003 * i40e_set_loopback - turn on/off loopback mode on underlying PF
13004 * @vsi: ptr to VSI
13005 * @ena: flag to indicate the on/off setting
13006 */
i40e_set_loopback(struct i40e_vsi * vsi,bool ena)13007 static int i40e_set_loopback(struct i40e_vsi *vsi, bool ena)
13008 {
13009 bool if_running = netif_running(vsi->netdev) &&
13010 !test_and_set_bit(__I40E_VSI_DOWN, vsi->state);
13011 int ret;
13012
13013 if (if_running)
13014 i40e_down(vsi);
13015
13016 ret = i40e_aq_set_mac_loopback(&vsi->back->hw, ena, NULL);
13017 if (ret)
13018 netdev_err(vsi->netdev, "Failed to toggle loopback state\n");
13019 if (if_running)
13020 i40e_up(vsi);
13021
13022 return ret;
13023 }
13024
13025 /**
13026 * i40e_set_features - set the netdev feature flags
13027 * @netdev: ptr to the netdev being adjusted
13028 * @features: the feature set that the stack is suggesting
13029 * Note: expects to be called while under rtnl_lock()
13030 **/
i40e_set_features(struct net_device * netdev,netdev_features_t features)13031 static int i40e_set_features(struct net_device *netdev,
13032 netdev_features_t features)
13033 {
13034 struct i40e_netdev_priv *np = netdev_priv(netdev);
13035 struct i40e_vsi *vsi = np->vsi;
13036 struct i40e_pf *pf = vsi->back;
13037 bool need_reset;
13038
13039 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
13040 i40e_pf_config_rss(pf);
13041 else if (!(features & NETIF_F_RXHASH) &&
13042 netdev->features & NETIF_F_RXHASH)
13043 i40e_clear_rss_lut(vsi);
13044
13045 if (features & NETIF_F_HW_VLAN_CTAG_RX)
13046 i40e_vlan_stripping_enable(vsi);
13047 else
13048 i40e_vlan_stripping_disable(vsi);
13049
13050 if (!(features & NETIF_F_HW_TC) &&
13051 (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
13052 dev_err(&pf->pdev->dev,
13053 "Offloaded tc filters active, can't turn hw_tc_offload off");
13054 return -EINVAL;
13055 }
13056
13057 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
13058 i40e_del_all_macvlans(vsi);
13059
13060 need_reset = i40e_set_ntuple(pf, features);
13061
13062 if (need_reset)
13063 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13064
13065 if ((features ^ netdev->features) & NETIF_F_LOOPBACK)
13066 return i40e_set_loopback(vsi, !!(features & NETIF_F_LOOPBACK));
13067
13068 return 0;
13069 }
13070
i40e_udp_tunnel_set_port(struct net_device * netdev,unsigned int table,unsigned int idx,struct udp_tunnel_info * ti)13071 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
13072 unsigned int table, unsigned int idx,
13073 struct udp_tunnel_info *ti)
13074 {
13075 struct i40e_netdev_priv *np = netdev_priv(netdev);
13076 struct i40e_hw *hw = &np->vsi->back->hw;
13077 u8 type, filter_index;
13078 int ret;
13079
13080 type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
13081 I40E_AQC_TUNNEL_TYPE_NGE;
13082
13083 ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
13084 NULL);
13085 if (ret) {
13086 netdev_info(netdev, "add UDP port failed, err %pe aq_err %s\n",
13087 ERR_PTR(ret),
13088 i40e_aq_str(hw, hw->aq.asq_last_status));
13089 return -EIO;
13090 }
13091
13092 udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
13093 return 0;
13094 }
13095
i40e_udp_tunnel_unset_port(struct net_device * netdev,unsigned int table,unsigned int idx,struct udp_tunnel_info * ti)13096 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
13097 unsigned int table, unsigned int idx,
13098 struct udp_tunnel_info *ti)
13099 {
13100 struct i40e_netdev_priv *np = netdev_priv(netdev);
13101 struct i40e_hw *hw = &np->vsi->back->hw;
13102 int ret;
13103
13104 ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
13105 if (ret) {
13106 netdev_info(netdev, "delete UDP port failed, err %pe aq_err %s\n",
13107 ERR_PTR(ret),
13108 i40e_aq_str(hw, hw->aq.asq_last_status));
13109 return -EIO;
13110 }
13111
13112 return 0;
13113 }
13114
i40e_get_phys_port_id(struct net_device * netdev,struct netdev_phys_item_id * ppid)13115 static int i40e_get_phys_port_id(struct net_device *netdev,
13116 struct netdev_phys_item_id *ppid)
13117 {
13118 struct i40e_netdev_priv *np = netdev_priv(netdev);
13119 struct i40e_pf *pf = np->vsi->back;
13120 struct i40e_hw *hw = &pf->hw;
13121
13122 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
13123 return -EOPNOTSUPP;
13124
13125 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
13126 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
13127
13128 return 0;
13129 }
13130
13131 /**
13132 * i40e_ndo_fdb_add - add an entry to the hardware database
13133 * @ndm: the input from the stack
13134 * @tb: pointer to array of nladdr (unused)
13135 * @dev: the net device pointer
13136 * @addr: the MAC address entry being added
13137 * @vid: VLAN ID
13138 * @flags: instructions from stack about fdb operation
13139 * @extack: netlink extended ack, unused currently
13140 */
i40e_ndo_fdb_add(struct ndmsg * ndm,struct nlattr * tb[],struct net_device * dev,const unsigned char * addr,u16 vid,u16 flags,struct netlink_ext_ack * extack)13141 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
13142 struct net_device *dev,
13143 const unsigned char *addr, u16 vid,
13144 u16 flags,
13145 struct netlink_ext_ack *extack)
13146 {
13147 struct i40e_netdev_priv *np = netdev_priv(dev);
13148 struct i40e_pf *pf = np->vsi->back;
13149 int err = 0;
13150
13151 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
13152 return -EOPNOTSUPP;
13153
13154 if (vid) {
13155 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
13156 return -EINVAL;
13157 }
13158
13159 /* Hardware does not support aging addresses so if a
13160 * ndm_state is given only allow permanent addresses
13161 */
13162 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
13163 netdev_info(dev, "FDB only supports static addresses\n");
13164 return -EINVAL;
13165 }
13166
13167 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
13168 err = dev_uc_add_excl(dev, addr);
13169 else if (is_multicast_ether_addr(addr))
13170 err = dev_mc_add_excl(dev, addr);
13171 else
13172 err = -EINVAL;
13173
13174 /* Only return duplicate errors if NLM_F_EXCL is set */
13175 if (err == -EEXIST && !(flags & NLM_F_EXCL))
13176 err = 0;
13177
13178 return err;
13179 }
13180
13181 /**
13182 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
13183 * @dev: the netdev being configured
13184 * @nlh: RTNL message
13185 * @flags: bridge flags
13186 * @extack: netlink extended ack
13187 *
13188 * Inserts a new hardware bridge if not already created and
13189 * enables the bridging mode requested (VEB or VEPA). If the
13190 * hardware bridge has already been inserted and the request
13191 * is to change the mode then that requires a PF reset to
13192 * allow rebuild of the components with required hardware
13193 * bridge mode enabled.
13194 *
13195 * Note: expects to be called while under rtnl_lock()
13196 **/
i40e_ndo_bridge_setlink(struct net_device * dev,struct nlmsghdr * nlh,u16 flags,struct netlink_ext_ack * extack)13197 static int i40e_ndo_bridge_setlink(struct net_device *dev,
13198 struct nlmsghdr *nlh,
13199 u16 flags,
13200 struct netlink_ext_ack *extack)
13201 {
13202 struct i40e_netdev_priv *np = netdev_priv(dev);
13203 struct i40e_vsi *vsi = np->vsi;
13204 struct i40e_pf *pf = vsi->back;
13205 struct i40e_veb *veb = NULL;
13206 struct nlattr *attr, *br_spec;
13207 int i, rem;
13208
13209 /* Only for PF VSI for now */
13210 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13211 return -EOPNOTSUPP;
13212
13213 /* Find the HW bridge for PF VSI */
13214 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13215 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13216 veb = pf->veb[i];
13217 }
13218
13219 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
13220 if (!br_spec)
13221 return -EINVAL;
13222
13223 nla_for_each_nested(attr, br_spec, rem) {
13224 __u16 mode;
13225
13226 if (nla_type(attr) != IFLA_BRIDGE_MODE)
13227 continue;
13228
13229 mode = nla_get_u16(attr);
13230 if ((mode != BRIDGE_MODE_VEPA) &&
13231 (mode != BRIDGE_MODE_VEB))
13232 return -EINVAL;
13233
13234 /* Insert a new HW bridge */
13235 if (!veb) {
13236 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
13237 vsi->tc_config.enabled_tc);
13238 if (veb) {
13239 veb->bridge_mode = mode;
13240 i40e_config_bridge_mode(veb);
13241 } else {
13242 /* No Bridge HW offload available */
13243 return -ENOENT;
13244 }
13245 break;
13246 } else if (mode != veb->bridge_mode) {
13247 /* Existing HW bridge but different mode needs reset */
13248 veb->bridge_mode = mode;
13249 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
13250 if (mode == BRIDGE_MODE_VEB)
13251 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
13252 else
13253 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
13254 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13255 break;
13256 }
13257 }
13258
13259 return 0;
13260 }
13261
13262 /**
13263 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
13264 * @skb: skb buff
13265 * @pid: process id
13266 * @seq: RTNL message seq #
13267 * @dev: the netdev being configured
13268 * @filter_mask: unused
13269 * @nlflags: netlink flags passed in
13270 *
13271 * Return the mode in which the hardware bridge is operating in
13272 * i.e VEB or VEPA.
13273 **/
i40e_ndo_bridge_getlink(struct sk_buff * skb,u32 pid,u32 seq,struct net_device * dev,u32 __always_unused filter_mask,int nlflags)13274 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
13275 struct net_device *dev,
13276 u32 __always_unused filter_mask,
13277 int nlflags)
13278 {
13279 struct i40e_netdev_priv *np = netdev_priv(dev);
13280 struct i40e_vsi *vsi = np->vsi;
13281 struct i40e_pf *pf = vsi->back;
13282 struct i40e_veb *veb = NULL;
13283 int i;
13284
13285 /* Only for PF VSI for now */
13286 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13287 return -EOPNOTSUPP;
13288
13289 /* Find the HW bridge for the PF VSI */
13290 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13291 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13292 veb = pf->veb[i];
13293 }
13294
13295 if (!veb)
13296 return 0;
13297
13298 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
13299 0, 0, nlflags, filter_mask, NULL);
13300 }
13301
13302 /**
13303 * i40e_features_check - Validate encapsulated packet conforms to limits
13304 * @skb: skb buff
13305 * @dev: This physical port's netdev
13306 * @features: Offload features that the stack believes apply
13307 **/
i40e_features_check(struct sk_buff * skb,struct net_device * dev,netdev_features_t features)13308 static netdev_features_t i40e_features_check(struct sk_buff *skb,
13309 struct net_device *dev,
13310 netdev_features_t features)
13311 {
13312 size_t len;
13313
13314 /* No point in doing any of this if neither checksum nor GSO are
13315 * being requested for this frame. We can rule out both by just
13316 * checking for CHECKSUM_PARTIAL
13317 */
13318 if (skb->ip_summed != CHECKSUM_PARTIAL)
13319 return features;
13320
13321 /* We cannot support GSO if the MSS is going to be less than
13322 * 64 bytes. If it is then we need to drop support for GSO.
13323 */
13324 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
13325 features &= ~NETIF_F_GSO_MASK;
13326
13327 /* MACLEN can support at most 63 words */
13328 len = skb_network_header(skb) - skb->data;
13329 if (len & ~(63 * 2))
13330 goto out_err;
13331
13332 /* IPLEN and EIPLEN can support at most 127 dwords */
13333 len = skb_transport_header(skb) - skb_network_header(skb);
13334 if (len & ~(127 * 4))
13335 goto out_err;
13336
13337 if (skb->encapsulation) {
13338 /* L4TUNLEN can support 127 words */
13339 len = skb_inner_network_header(skb) - skb_transport_header(skb);
13340 if (len & ~(127 * 2))
13341 goto out_err;
13342
13343 /* IPLEN can support at most 127 dwords */
13344 len = skb_inner_transport_header(skb) -
13345 skb_inner_network_header(skb);
13346 if (len & ~(127 * 4))
13347 goto out_err;
13348 }
13349
13350 /* No need to validate L4LEN as TCP is the only protocol with a
13351 * flexible value and we support all possible values supported
13352 * by TCP, which is at most 15 dwords
13353 */
13354
13355 return features;
13356 out_err:
13357 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
13358 }
13359
13360 /**
13361 * i40e_xdp_setup - add/remove an XDP program
13362 * @vsi: VSI to changed
13363 * @prog: XDP program
13364 * @extack: netlink extended ack
13365 **/
i40e_xdp_setup(struct i40e_vsi * vsi,struct bpf_prog * prog,struct netlink_ext_ack * extack)13366 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
13367 struct netlink_ext_ack *extack)
13368 {
13369 int frame_size = i40e_max_vsi_frame_size(vsi, prog);
13370 struct i40e_pf *pf = vsi->back;
13371 struct bpf_prog *old_prog;
13372 bool need_reset;
13373 int i;
13374
13375 /* VSI shall be deleted in a moment, block loading new programs */
13376 if (prog && test_bit(__I40E_IN_REMOVE, pf->state))
13377 return -EINVAL;
13378
13379 /* Don't allow frames that span over multiple buffers */
13380 if (vsi->netdev->mtu > frame_size - I40E_PACKET_HDR_PAD) {
13381 NL_SET_ERR_MSG_MOD(extack, "MTU too large for linear frames and XDP prog does not support frags");
13382 return -EINVAL;
13383 }
13384
13385 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
13386 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
13387 if (need_reset)
13388 i40e_prep_for_reset(pf);
13389
13390 old_prog = xchg(&vsi->xdp_prog, prog);
13391
13392 if (need_reset) {
13393 if (!prog) {
13394 xdp_features_clear_redirect_target(vsi->netdev);
13395 /* Wait until ndo_xsk_wakeup completes. */
13396 synchronize_rcu();
13397 }
13398 i40e_reset_and_rebuild(pf, true, true);
13399 }
13400
13401 if (!i40e_enabled_xdp_vsi(vsi) && prog) {
13402 if (i40e_realloc_rx_bi_zc(vsi, true))
13403 return -ENOMEM;
13404 } else if (i40e_enabled_xdp_vsi(vsi) && !prog) {
13405 if (i40e_realloc_rx_bi_zc(vsi, false))
13406 return -ENOMEM;
13407 }
13408
13409 for (i = 0; i < vsi->num_queue_pairs; i++)
13410 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
13411
13412 if (old_prog)
13413 bpf_prog_put(old_prog);
13414
13415 /* Kick start the NAPI context if there is an AF_XDP socket open
13416 * on that queue id. This so that receiving will start.
13417 */
13418 if (need_reset && prog) {
13419 for (i = 0; i < vsi->num_queue_pairs; i++)
13420 if (vsi->xdp_rings[i]->xsk_pool)
13421 (void)i40e_xsk_wakeup(vsi->netdev, i,
13422 XDP_WAKEUP_RX);
13423 xdp_features_set_redirect_target(vsi->netdev, true);
13424 }
13425
13426 return 0;
13427 }
13428
13429 /**
13430 * i40e_enter_busy_conf - Enters busy config state
13431 * @vsi: vsi
13432 *
13433 * Returns 0 on success, <0 for failure.
13434 **/
i40e_enter_busy_conf(struct i40e_vsi * vsi)13435 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13436 {
13437 struct i40e_pf *pf = vsi->back;
13438 int timeout = 50;
13439
13440 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13441 timeout--;
13442 if (!timeout)
13443 return -EBUSY;
13444 usleep_range(1000, 2000);
13445 }
13446
13447 return 0;
13448 }
13449
13450 /**
13451 * i40e_exit_busy_conf - Exits busy config state
13452 * @vsi: vsi
13453 **/
i40e_exit_busy_conf(struct i40e_vsi * vsi)13454 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13455 {
13456 struct i40e_pf *pf = vsi->back;
13457
13458 clear_bit(__I40E_CONFIG_BUSY, pf->state);
13459 }
13460
13461 /**
13462 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13463 * @vsi: vsi
13464 * @queue_pair: queue pair
13465 **/
i40e_queue_pair_reset_stats(struct i40e_vsi * vsi,int queue_pair)13466 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13467 {
13468 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13469 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13470 memset(&vsi->tx_rings[queue_pair]->stats, 0,
13471 sizeof(vsi->tx_rings[queue_pair]->stats));
13472 if (i40e_enabled_xdp_vsi(vsi)) {
13473 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13474 sizeof(vsi->xdp_rings[queue_pair]->stats));
13475 }
13476 }
13477
13478 /**
13479 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13480 * @vsi: vsi
13481 * @queue_pair: queue pair
13482 **/
i40e_queue_pair_clean_rings(struct i40e_vsi * vsi,int queue_pair)13483 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13484 {
13485 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13486 if (i40e_enabled_xdp_vsi(vsi)) {
13487 /* Make sure that in-progress ndo_xdp_xmit calls are
13488 * completed.
13489 */
13490 synchronize_rcu();
13491 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13492 }
13493 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13494 }
13495
13496 /**
13497 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13498 * @vsi: vsi
13499 * @queue_pair: queue pair
13500 * @enable: true for enable, false for disable
13501 **/
i40e_queue_pair_toggle_napi(struct i40e_vsi * vsi,int queue_pair,bool enable)13502 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13503 bool enable)
13504 {
13505 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13506 struct i40e_q_vector *q_vector = rxr->q_vector;
13507
13508 if (!vsi->netdev)
13509 return;
13510
13511 /* All rings in a qp belong to the same qvector. */
13512 if (q_vector->rx.ring || q_vector->tx.ring) {
13513 if (enable)
13514 napi_enable(&q_vector->napi);
13515 else
13516 napi_disable(&q_vector->napi);
13517 }
13518 }
13519
13520 /**
13521 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13522 * @vsi: vsi
13523 * @queue_pair: queue pair
13524 * @enable: true for enable, false for disable
13525 *
13526 * Returns 0 on success, <0 on failure.
13527 **/
i40e_queue_pair_toggle_rings(struct i40e_vsi * vsi,int queue_pair,bool enable)13528 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13529 bool enable)
13530 {
13531 struct i40e_pf *pf = vsi->back;
13532 int pf_q, ret = 0;
13533
13534 pf_q = vsi->base_queue + queue_pair;
13535 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13536 false /*is xdp*/, enable);
13537 if (ret) {
13538 dev_info(&pf->pdev->dev,
13539 "VSI seid %d Tx ring %d %sable timeout\n",
13540 vsi->seid, pf_q, (enable ? "en" : "dis"));
13541 return ret;
13542 }
13543
13544 i40e_control_rx_q(pf, pf_q, enable);
13545 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13546 if (ret) {
13547 dev_info(&pf->pdev->dev,
13548 "VSI seid %d Rx ring %d %sable timeout\n",
13549 vsi->seid, pf_q, (enable ? "en" : "dis"));
13550 return ret;
13551 }
13552
13553 /* Due to HW errata, on Rx disable only, the register can
13554 * indicate done before it really is. Needs 50ms to be sure
13555 */
13556 if (!enable)
13557 mdelay(50);
13558
13559 if (!i40e_enabled_xdp_vsi(vsi))
13560 return ret;
13561
13562 ret = i40e_control_wait_tx_q(vsi->seid, pf,
13563 pf_q + vsi->alloc_queue_pairs,
13564 true /*is xdp*/, enable);
13565 if (ret) {
13566 dev_info(&pf->pdev->dev,
13567 "VSI seid %d XDP Tx ring %d %sable timeout\n",
13568 vsi->seid, pf_q, (enable ? "en" : "dis"));
13569 }
13570
13571 return ret;
13572 }
13573
13574 /**
13575 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13576 * @vsi: vsi
13577 * @queue_pair: queue_pair
13578 **/
i40e_queue_pair_enable_irq(struct i40e_vsi * vsi,int queue_pair)13579 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13580 {
13581 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13582 struct i40e_pf *pf = vsi->back;
13583 struct i40e_hw *hw = &pf->hw;
13584
13585 /* All rings in a qp belong to the same qvector. */
13586 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13587 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13588 else
13589 i40e_irq_dynamic_enable_icr0(pf);
13590
13591 i40e_flush(hw);
13592 }
13593
13594 /**
13595 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13596 * @vsi: vsi
13597 * @queue_pair: queue_pair
13598 **/
i40e_queue_pair_disable_irq(struct i40e_vsi * vsi,int queue_pair)13599 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13600 {
13601 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13602 struct i40e_pf *pf = vsi->back;
13603 struct i40e_hw *hw = &pf->hw;
13604
13605 /* For simplicity, instead of removing the qp interrupt causes
13606 * from the interrupt linked list, we simply disable the interrupt, and
13607 * leave the list intact.
13608 *
13609 * All rings in a qp belong to the same qvector.
13610 */
13611 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13612 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13613
13614 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13615 i40e_flush(hw);
13616 synchronize_irq(pf->msix_entries[intpf].vector);
13617 } else {
13618 /* Legacy and MSI mode - this stops all interrupt handling */
13619 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13620 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13621 i40e_flush(hw);
13622 synchronize_irq(pf->pdev->irq);
13623 }
13624 }
13625
13626 /**
13627 * i40e_queue_pair_disable - Disables a queue pair
13628 * @vsi: vsi
13629 * @queue_pair: queue pair
13630 *
13631 * Returns 0 on success, <0 on failure.
13632 **/
i40e_queue_pair_disable(struct i40e_vsi * vsi,int queue_pair)13633 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13634 {
13635 int err;
13636
13637 err = i40e_enter_busy_conf(vsi);
13638 if (err)
13639 return err;
13640
13641 i40e_queue_pair_disable_irq(vsi, queue_pair);
13642 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13643 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13644 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13645 i40e_queue_pair_clean_rings(vsi, queue_pair);
13646 i40e_queue_pair_reset_stats(vsi, queue_pair);
13647
13648 return err;
13649 }
13650
13651 /**
13652 * i40e_queue_pair_enable - Enables a queue pair
13653 * @vsi: vsi
13654 * @queue_pair: queue pair
13655 *
13656 * Returns 0 on success, <0 on failure.
13657 **/
i40e_queue_pair_enable(struct i40e_vsi * vsi,int queue_pair)13658 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13659 {
13660 int err;
13661
13662 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13663 if (err)
13664 return err;
13665
13666 if (i40e_enabled_xdp_vsi(vsi)) {
13667 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13668 if (err)
13669 return err;
13670 }
13671
13672 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13673 if (err)
13674 return err;
13675
13676 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13677 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13678 i40e_queue_pair_enable_irq(vsi, queue_pair);
13679
13680 i40e_exit_busy_conf(vsi);
13681
13682 return err;
13683 }
13684
13685 /**
13686 * i40e_xdp - implements ndo_bpf for i40e
13687 * @dev: netdevice
13688 * @xdp: XDP command
13689 **/
i40e_xdp(struct net_device * dev,struct netdev_bpf * xdp)13690 static int i40e_xdp(struct net_device *dev,
13691 struct netdev_bpf *xdp)
13692 {
13693 struct i40e_netdev_priv *np = netdev_priv(dev);
13694 struct i40e_vsi *vsi = np->vsi;
13695
13696 if (vsi->type != I40E_VSI_MAIN)
13697 return -EINVAL;
13698
13699 switch (xdp->command) {
13700 case XDP_SETUP_PROG:
13701 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13702 case XDP_SETUP_XSK_POOL:
13703 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13704 xdp->xsk.queue_id);
13705 default:
13706 return -EINVAL;
13707 }
13708 }
13709
13710 static const struct net_device_ops i40e_netdev_ops = {
13711 .ndo_open = i40e_open,
13712 .ndo_stop = i40e_close,
13713 .ndo_start_xmit = i40e_lan_xmit_frame,
13714 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
13715 .ndo_set_rx_mode = i40e_set_rx_mode,
13716 .ndo_validate_addr = eth_validate_addr,
13717 .ndo_set_mac_address = i40e_set_mac,
13718 .ndo_change_mtu = i40e_change_mtu,
13719 .ndo_eth_ioctl = i40e_ioctl,
13720 .ndo_tx_timeout = i40e_tx_timeout,
13721 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
13722 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
13723 #ifdef CONFIG_NET_POLL_CONTROLLER
13724 .ndo_poll_controller = i40e_netpoll,
13725 #endif
13726 .ndo_setup_tc = __i40e_setup_tc,
13727 .ndo_select_queue = i40e_lan_select_queue,
13728 .ndo_set_features = i40e_set_features,
13729 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
13730 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
13731 .ndo_get_vf_stats = i40e_get_vf_stats,
13732 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
13733 .ndo_get_vf_config = i40e_ndo_get_vf_config,
13734 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
13735 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
13736 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
13737 .ndo_get_phys_port_id = i40e_get_phys_port_id,
13738 .ndo_fdb_add = i40e_ndo_fdb_add,
13739 .ndo_features_check = i40e_features_check,
13740 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
13741 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
13742 .ndo_bpf = i40e_xdp,
13743 .ndo_xdp_xmit = i40e_xdp_xmit,
13744 .ndo_xsk_wakeup = i40e_xsk_wakeup,
13745 .ndo_dfwd_add_station = i40e_fwd_add,
13746 .ndo_dfwd_del_station = i40e_fwd_del,
13747 };
13748
13749 /**
13750 * i40e_config_netdev - Setup the netdev flags
13751 * @vsi: the VSI being configured
13752 *
13753 * Returns 0 on success, negative value on failure
13754 **/
i40e_config_netdev(struct i40e_vsi * vsi)13755 static int i40e_config_netdev(struct i40e_vsi *vsi)
13756 {
13757 struct i40e_pf *pf = vsi->back;
13758 struct i40e_hw *hw = &pf->hw;
13759 struct i40e_netdev_priv *np;
13760 struct net_device *netdev;
13761 u8 broadcast[ETH_ALEN];
13762 u8 mac_addr[ETH_ALEN];
13763 int etherdev_size;
13764 netdev_features_t hw_enc_features;
13765 netdev_features_t hw_features;
13766
13767 etherdev_size = sizeof(struct i40e_netdev_priv);
13768 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13769 if (!netdev)
13770 return -ENOMEM;
13771
13772 vsi->netdev = netdev;
13773 np = netdev_priv(netdev);
13774 np->vsi = vsi;
13775
13776 hw_enc_features = NETIF_F_SG |
13777 NETIF_F_HW_CSUM |
13778 NETIF_F_HIGHDMA |
13779 NETIF_F_SOFT_FEATURES |
13780 NETIF_F_TSO |
13781 NETIF_F_TSO_ECN |
13782 NETIF_F_TSO6 |
13783 NETIF_F_GSO_GRE |
13784 NETIF_F_GSO_GRE_CSUM |
13785 NETIF_F_GSO_PARTIAL |
13786 NETIF_F_GSO_IPXIP4 |
13787 NETIF_F_GSO_IPXIP6 |
13788 NETIF_F_GSO_UDP_TUNNEL |
13789 NETIF_F_GSO_UDP_TUNNEL_CSUM |
13790 NETIF_F_GSO_UDP_L4 |
13791 NETIF_F_SCTP_CRC |
13792 NETIF_F_RXHASH |
13793 NETIF_F_RXCSUM |
13794 0;
13795
13796 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13797 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13798
13799 netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13800
13801 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13802
13803 netdev->hw_enc_features |= hw_enc_features;
13804
13805 /* record features VLANs can make use of */
13806 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13807
13808 #define I40E_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
13809 NETIF_F_GSO_GRE_CSUM | \
13810 NETIF_F_GSO_IPXIP4 | \
13811 NETIF_F_GSO_IPXIP6 | \
13812 NETIF_F_GSO_UDP_TUNNEL | \
13813 NETIF_F_GSO_UDP_TUNNEL_CSUM)
13814
13815 netdev->gso_partial_features = I40E_GSO_PARTIAL_FEATURES;
13816 netdev->features |= NETIF_F_GSO_PARTIAL |
13817 I40E_GSO_PARTIAL_FEATURES;
13818
13819 netdev->mpls_features |= NETIF_F_SG;
13820 netdev->mpls_features |= NETIF_F_HW_CSUM;
13821 netdev->mpls_features |= NETIF_F_TSO;
13822 netdev->mpls_features |= NETIF_F_TSO6;
13823 netdev->mpls_features |= I40E_GSO_PARTIAL_FEATURES;
13824
13825 /* enable macvlan offloads */
13826 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13827
13828 hw_features = hw_enc_features |
13829 NETIF_F_HW_VLAN_CTAG_TX |
13830 NETIF_F_HW_VLAN_CTAG_RX;
13831
13832 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13833 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13834
13835 netdev->hw_features |= hw_features | NETIF_F_LOOPBACK;
13836
13837 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13838 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13839
13840 netdev->features &= ~NETIF_F_HW_TC;
13841
13842 if (vsi->type == I40E_VSI_MAIN) {
13843 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13844 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13845 /* The following steps are necessary for two reasons. First,
13846 * some older NVM configurations load a default MAC-VLAN
13847 * filter that will accept any tagged packet, and we want to
13848 * replace this with a normal filter. Additionally, it is
13849 * possible our MAC address was provided by the platform using
13850 * Open Firmware or similar.
13851 *
13852 * Thus, we need to remove the default filter and install one
13853 * specific to the MAC address.
13854 */
13855 i40e_rm_default_mac_filter(vsi, mac_addr);
13856 spin_lock_bh(&vsi->mac_filter_hash_lock);
13857 i40e_add_mac_filter(vsi, mac_addr);
13858 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13859
13860 netdev->xdp_features = NETDEV_XDP_ACT_BASIC |
13861 NETDEV_XDP_ACT_REDIRECT |
13862 NETDEV_XDP_ACT_XSK_ZEROCOPY |
13863 NETDEV_XDP_ACT_RX_SG;
13864 netdev->xdp_zc_max_segs = I40E_MAX_BUFFER_TXD;
13865 } else {
13866 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13867 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13868 * the end, which is 4 bytes long, so force truncation of the
13869 * original name by IFNAMSIZ - 4
13870 */
13871 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13872 IFNAMSIZ - 4,
13873 pf->vsi[pf->lan_vsi]->netdev->name);
13874 eth_random_addr(mac_addr);
13875
13876 spin_lock_bh(&vsi->mac_filter_hash_lock);
13877 i40e_add_mac_filter(vsi, mac_addr);
13878 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13879 }
13880
13881 /* Add the broadcast filter so that we initially will receive
13882 * broadcast packets. Note that when a new VLAN is first added the
13883 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13884 * specific filters as part of transitioning into "vlan" operation.
13885 * When more VLANs are added, the driver will copy each existing MAC
13886 * filter and add it for the new VLAN.
13887 *
13888 * Broadcast filters are handled specially by
13889 * i40e_sync_filters_subtask, as the driver must to set the broadcast
13890 * promiscuous bit instead of adding this directly as a MAC/VLAN
13891 * filter. The subtask will update the correct broadcast promiscuous
13892 * bits as VLANs become active or inactive.
13893 */
13894 eth_broadcast_addr(broadcast);
13895 spin_lock_bh(&vsi->mac_filter_hash_lock);
13896 i40e_add_mac_filter(vsi, broadcast);
13897 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13898
13899 eth_hw_addr_set(netdev, mac_addr);
13900 ether_addr_copy(netdev->perm_addr, mac_addr);
13901
13902 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13903 netdev->neigh_priv_len = sizeof(u32) * 4;
13904
13905 netdev->priv_flags |= IFF_UNICAST_FLT;
13906 netdev->priv_flags |= IFF_SUPP_NOFCS;
13907 /* Setup netdev TC information */
13908 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13909
13910 netdev->netdev_ops = &i40e_netdev_ops;
13911 netdev->watchdog_timeo = 5 * HZ;
13912 i40e_set_ethtool_ops(netdev);
13913
13914 /* MTU range: 68 - 9706 */
13915 netdev->min_mtu = ETH_MIN_MTU;
13916 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13917
13918 return 0;
13919 }
13920
13921 /**
13922 * i40e_vsi_delete - Delete a VSI from the switch
13923 * @vsi: the VSI being removed
13924 *
13925 * Returns 0 on success, negative value on failure
13926 **/
i40e_vsi_delete(struct i40e_vsi * vsi)13927 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13928 {
13929 /* remove default VSI is not allowed */
13930 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13931 return;
13932
13933 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13934 }
13935
13936 /**
13937 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13938 * @vsi: the VSI being queried
13939 *
13940 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13941 **/
i40e_is_vsi_uplink_mode_veb(struct i40e_vsi * vsi)13942 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13943 {
13944 struct i40e_veb *veb;
13945 struct i40e_pf *pf = vsi->back;
13946
13947 /* Uplink is not a bridge so default to VEB */
13948 if (vsi->veb_idx >= I40E_MAX_VEB)
13949 return 1;
13950
13951 veb = pf->veb[vsi->veb_idx];
13952 if (!veb) {
13953 dev_info(&pf->pdev->dev,
13954 "There is no veb associated with the bridge\n");
13955 return -ENOENT;
13956 }
13957
13958 /* Uplink is a bridge in VEPA mode */
13959 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13960 return 0;
13961 } else {
13962 /* Uplink is a bridge in VEB mode */
13963 return 1;
13964 }
13965
13966 /* VEPA is now default bridge, so return 0 */
13967 return 0;
13968 }
13969
13970 /**
13971 * i40e_add_vsi - Add a VSI to the switch
13972 * @vsi: the VSI being configured
13973 *
13974 * This initializes a VSI context depending on the VSI type to be added and
13975 * passes it down to the add_vsi aq command.
13976 **/
i40e_add_vsi(struct i40e_vsi * vsi)13977 static int i40e_add_vsi(struct i40e_vsi *vsi)
13978 {
13979 int ret = -ENODEV;
13980 struct i40e_pf *pf = vsi->back;
13981 struct i40e_hw *hw = &pf->hw;
13982 struct i40e_vsi_context ctxt;
13983 struct i40e_mac_filter *f;
13984 struct hlist_node *h;
13985 int bkt;
13986
13987 u8 enabled_tc = 0x1; /* TC0 enabled */
13988 int f_count = 0;
13989
13990 memset(&ctxt, 0, sizeof(ctxt));
13991 switch (vsi->type) {
13992 case I40E_VSI_MAIN:
13993 /* The PF's main VSI is already setup as part of the
13994 * device initialization, so we'll not bother with
13995 * the add_vsi call, but we will retrieve the current
13996 * VSI context.
13997 */
13998 ctxt.seid = pf->main_vsi_seid;
13999 ctxt.pf_num = pf->hw.pf_id;
14000 ctxt.vf_num = 0;
14001 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
14002 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
14003 if (ret) {
14004 dev_info(&pf->pdev->dev,
14005 "couldn't get PF vsi config, err %pe aq_err %s\n",
14006 ERR_PTR(ret),
14007 i40e_aq_str(&pf->hw,
14008 pf->hw.aq.asq_last_status));
14009 return -ENOENT;
14010 }
14011 vsi->info = ctxt.info;
14012 vsi->info.valid_sections = 0;
14013
14014 vsi->seid = ctxt.seid;
14015 vsi->id = ctxt.vsi_number;
14016
14017 enabled_tc = i40e_pf_get_tc_map(pf);
14018
14019 /* Source pruning is enabled by default, so the flag is
14020 * negative logic - if it's set, we need to fiddle with
14021 * the VSI to disable source pruning.
14022 */
14023 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
14024 memset(&ctxt, 0, sizeof(ctxt));
14025 ctxt.seid = pf->main_vsi_seid;
14026 ctxt.pf_num = pf->hw.pf_id;
14027 ctxt.vf_num = 0;
14028 ctxt.info.valid_sections |=
14029 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14030 ctxt.info.switch_id =
14031 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
14032 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
14033 if (ret) {
14034 dev_info(&pf->pdev->dev,
14035 "update vsi failed, err %d aq_err %s\n",
14036 ret,
14037 i40e_aq_str(&pf->hw,
14038 pf->hw.aq.asq_last_status));
14039 ret = -ENOENT;
14040 goto err;
14041 }
14042 }
14043
14044 /* MFP mode setup queue map and update VSI */
14045 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
14046 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
14047 memset(&ctxt, 0, sizeof(ctxt));
14048 ctxt.seid = pf->main_vsi_seid;
14049 ctxt.pf_num = pf->hw.pf_id;
14050 ctxt.vf_num = 0;
14051 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
14052 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
14053 if (ret) {
14054 dev_info(&pf->pdev->dev,
14055 "update vsi failed, err %pe aq_err %s\n",
14056 ERR_PTR(ret),
14057 i40e_aq_str(&pf->hw,
14058 pf->hw.aq.asq_last_status));
14059 ret = -ENOENT;
14060 goto err;
14061 }
14062 /* update the local VSI info queue map */
14063 i40e_vsi_update_queue_map(vsi, &ctxt);
14064 vsi->info.valid_sections = 0;
14065 } else {
14066 /* Default/Main VSI is only enabled for TC0
14067 * reconfigure it to enable all TCs that are
14068 * available on the port in SFP mode.
14069 * For MFP case the iSCSI PF would use this
14070 * flow to enable LAN+iSCSI TC.
14071 */
14072 ret = i40e_vsi_config_tc(vsi, enabled_tc);
14073 if (ret) {
14074 /* Single TC condition is not fatal,
14075 * message and continue
14076 */
14077 dev_info(&pf->pdev->dev,
14078 "failed to configure TCs for main VSI tc_map 0x%08x, err %pe aq_err %s\n",
14079 enabled_tc,
14080 ERR_PTR(ret),
14081 i40e_aq_str(&pf->hw,
14082 pf->hw.aq.asq_last_status));
14083 }
14084 }
14085 break;
14086
14087 case I40E_VSI_FDIR:
14088 ctxt.pf_num = hw->pf_id;
14089 ctxt.vf_num = 0;
14090 ctxt.uplink_seid = vsi->uplink_seid;
14091 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14092 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
14093 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
14094 (i40e_is_vsi_uplink_mode_veb(vsi))) {
14095 ctxt.info.valid_sections |=
14096 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14097 ctxt.info.switch_id =
14098 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14099 }
14100 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14101 break;
14102
14103 case I40E_VSI_VMDQ2:
14104 ctxt.pf_num = hw->pf_id;
14105 ctxt.vf_num = 0;
14106 ctxt.uplink_seid = vsi->uplink_seid;
14107 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14108 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
14109
14110 /* This VSI is connected to VEB so the switch_id
14111 * should be set to zero by default.
14112 */
14113 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
14114 ctxt.info.valid_sections |=
14115 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14116 ctxt.info.switch_id =
14117 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14118 }
14119
14120 /* Setup the VSI tx/rx queue map for TC0 only for now */
14121 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14122 break;
14123
14124 case I40E_VSI_SRIOV:
14125 ctxt.pf_num = hw->pf_id;
14126 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
14127 ctxt.uplink_seid = vsi->uplink_seid;
14128 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14129 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
14130
14131 /* This VSI is connected to VEB so the switch_id
14132 * should be set to zero by default.
14133 */
14134 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
14135 ctxt.info.valid_sections |=
14136 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14137 ctxt.info.switch_id =
14138 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14139 }
14140
14141 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
14142 ctxt.info.valid_sections |=
14143 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
14144 ctxt.info.queueing_opt_flags |=
14145 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
14146 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
14147 }
14148
14149 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
14150 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
14151 if (pf->vf[vsi->vf_id].spoofchk) {
14152 ctxt.info.valid_sections |=
14153 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
14154 ctxt.info.sec_flags |=
14155 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
14156 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
14157 }
14158 /* Setup the VSI tx/rx queue map for TC0 only for now */
14159 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14160 break;
14161
14162 case I40E_VSI_IWARP:
14163 /* send down message to iWARP */
14164 break;
14165
14166 default:
14167 return -ENODEV;
14168 }
14169
14170 if (vsi->type != I40E_VSI_MAIN) {
14171 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
14172 if (ret) {
14173 dev_info(&vsi->back->pdev->dev,
14174 "add vsi failed, err %pe aq_err %s\n",
14175 ERR_PTR(ret),
14176 i40e_aq_str(&pf->hw,
14177 pf->hw.aq.asq_last_status));
14178 ret = -ENOENT;
14179 goto err;
14180 }
14181 vsi->info = ctxt.info;
14182 vsi->info.valid_sections = 0;
14183 vsi->seid = ctxt.seid;
14184 vsi->id = ctxt.vsi_number;
14185 }
14186
14187 spin_lock_bh(&vsi->mac_filter_hash_lock);
14188 vsi->active_filters = 0;
14189 /* If macvlan filters already exist, force them to get loaded */
14190 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
14191 f->state = I40E_FILTER_NEW;
14192 f_count++;
14193 }
14194 spin_unlock_bh(&vsi->mac_filter_hash_lock);
14195 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
14196
14197 if (f_count) {
14198 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
14199 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
14200 }
14201
14202 /* Update VSI BW information */
14203 ret = i40e_vsi_get_bw_info(vsi);
14204 if (ret) {
14205 dev_info(&pf->pdev->dev,
14206 "couldn't get vsi bw info, err %pe aq_err %s\n",
14207 ERR_PTR(ret),
14208 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14209 /* VSI is already added so not tearing that up */
14210 ret = 0;
14211 }
14212
14213 err:
14214 return ret;
14215 }
14216
14217 /**
14218 * i40e_vsi_release - Delete a VSI and free its resources
14219 * @vsi: the VSI being removed
14220 *
14221 * Returns 0 on success or < 0 on error
14222 **/
i40e_vsi_release(struct i40e_vsi * vsi)14223 int i40e_vsi_release(struct i40e_vsi *vsi)
14224 {
14225 struct i40e_mac_filter *f;
14226 struct hlist_node *h;
14227 struct i40e_veb *veb = NULL;
14228 struct i40e_pf *pf;
14229 u16 uplink_seid;
14230 int i, n, bkt;
14231
14232 pf = vsi->back;
14233
14234 /* release of a VEB-owner or last VSI is not allowed */
14235 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
14236 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
14237 vsi->seid, vsi->uplink_seid);
14238 return -ENODEV;
14239 }
14240 if (vsi == pf->vsi[pf->lan_vsi] &&
14241 !test_bit(__I40E_DOWN, pf->state)) {
14242 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
14243 return -ENODEV;
14244 }
14245 set_bit(__I40E_VSI_RELEASING, vsi->state);
14246 uplink_seid = vsi->uplink_seid;
14247 if (vsi->type != I40E_VSI_SRIOV) {
14248 if (vsi->netdev_registered) {
14249 vsi->netdev_registered = false;
14250 if (vsi->netdev) {
14251 /* results in a call to i40e_close() */
14252 unregister_netdev(vsi->netdev);
14253 }
14254 } else {
14255 i40e_vsi_close(vsi);
14256 }
14257 i40e_vsi_disable_irq(vsi);
14258 }
14259
14260 spin_lock_bh(&vsi->mac_filter_hash_lock);
14261
14262 /* clear the sync flag on all filters */
14263 if (vsi->netdev) {
14264 __dev_uc_unsync(vsi->netdev, NULL);
14265 __dev_mc_unsync(vsi->netdev, NULL);
14266 }
14267
14268 /* make sure any remaining filters are marked for deletion */
14269 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
14270 __i40e_del_filter(vsi, f);
14271
14272 spin_unlock_bh(&vsi->mac_filter_hash_lock);
14273
14274 i40e_sync_vsi_filters(vsi);
14275
14276 i40e_vsi_delete(vsi);
14277 i40e_vsi_free_q_vectors(vsi);
14278 if (vsi->netdev) {
14279 free_netdev(vsi->netdev);
14280 vsi->netdev = NULL;
14281 }
14282 i40e_vsi_clear_rings(vsi);
14283 i40e_vsi_clear(vsi);
14284
14285 /* If this was the last thing on the VEB, except for the
14286 * controlling VSI, remove the VEB, which puts the controlling
14287 * VSI onto the next level down in the switch.
14288 *
14289 * Well, okay, there's one more exception here: don't remove
14290 * the orphan VEBs yet. We'll wait for an explicit remove request
14291 * from up the network stack.
14292 */
14293 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
14294 if (pf->vsi[i] &&
14295 pf->vsi[i]->uplink_seid == uplink_seid &&
14296 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14297 n++; /* count the VSIs */
14298 }
14299 }
14300 for (i = 0; i < I40E_MAX_VEB; i++) {
14301 if (!pf->veb[i])
14302 continue;
14303 if (pf->veb[i]->uplink_seid == uplink_seid)
14304 n++; /* count the VEBs */
14305 if (pf->veb[i]->seid == uplink_seid)
14306 veb = pf->veb[i];
14307 }
14308 if (n == 0 && veb && veb->uplink_seid != 0)
14309 i40e_veb_release(veb);
14310
14311 return 0;
14312 }
14313
14314 /**
14315 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
14316 * @vsi: ptr to the VSI
14317 *
14318 * This should only be called after i40e_vsi_mem_alloc() which allocates the
14319 * corresponding SW VSI structure and initializes num_queue_pairs for the
14320 * newly allocated VSI.
14321 *
14322 * Returns 0 on success or negative on failure
14323 **/
i40e_vsi_setup_vectors(struct i40e_vsi * vsi)14324 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
14325 {
14326 int ret = -ENOENT;
14327 struct i40e_pf *pf = vsi->back;
14328
14329 if (vsi->q_vectors[0]) {
14330 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14331 vsi->seid);
14332 return -EEXIST;
14333 }
14334
14335 if (vsi->base_vector) {
14336 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14337 vsi->seid, vsi->base_vector);
14338 return -EEXIST;
14339 }
14340
14341 ret = i40e_vsi_alloc_q_vectors(vsi);
14342 if (ret) {
14343 dev_info(&pf->pdev->dev,
14344 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
14345 vsi->num_q_vectors, vsi->seid, ret);
14346 vsi->num_q_vectors = 0;
14347 goto vector_setup_out;
14348 }
14349
14350 /* In Legacy mode, we do not have to get any other vector since we
14351 * piggyback on the misc/ICR0 for queue interrupts.
14352 */
14353 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
14354 return ret;
14355 if (vsi->num_q_vectors)
14356 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
14357 vsi->num_q_vectors, vsi->idx);
14358 if (vsi->base_vector < 0) {
14359 dev_info(&pf->pdev->dev,
14360 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
14361 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
14362 i40e_vsi_free_q_vectors(vsi);
14363 ret = -ENOENT;
14364 goto vector_setup_out;
14365 }
14366
14367 vector_setup_out:
14368 return ret;
14369 }
14370
14371 /**
14372 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
14373 * @vsi: pointer to the vsi.
14374 *
14375 * This re-allocates a vsi's queue resources.
14376 *
14377 * Returns pointer to the successfully allocated and configured VSI sw struct
14378 * on success, otherwise returns NULL on failure.
14379 **/
i40e_vsi_reinit_setup(struct i40e_vsi * vsi)14380 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
14381 {
14382 u16 alloc_queue_pairs;
14383 struct i40e_pf *pf;
14384 u8 enabled_tc;
14385 int ret;
14386
14387 if (!vsi)
14388 return NULL;
14389
14390 pf = vsi->back;
14391
14392 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
14393 i40e_vsi_clear_rings(vsi);
14394
14395 i40e_vsi_free_arrays(vsi, false);
14396 i40e_set_num_rings_in_vsi(vsi);
14397 ret = i40e_vsi_alloc_arrays(vsi, false);
14398 if (ret)
14399 goto err_vsi;
14400
14401 alloc_queue_pairs = vsi->alloc_queue_pairs *
14402 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14403
14404 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14405 if (ret < 0) {
14406 dev_info(&pf->pdev->dev,
14407 "failed to get tracking for %d queues for VSI %d err %d\n",
14408 alloc_queue_pairs, vsi->seid, ret);
14409 goto err_vsi;
14410 }
14411 vsi->base_queue = ret;
14412
14413 /* Update the FW view of the VSI. Force a reset of TC and queue
14414 * layout configurations.
14415 */
14416 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14417 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14418 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14419 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14420 if (vsi->type == I40E_VSI_MAIN)
14421 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
14422
14423 /* assign it some queues */
14424 ret = i40e_alloc_rings(vsi);
14425 if (ret)
14426 goto err_rings;
14427
14428 /* map all of the rings to the q_vectors */
14429 i40e_vsi_map_rings_to_vectors(vsi);
14430 return vsi;
14431
14432 err_rings:
14433 i40e_vsi_free_q_vectors(vsi);
14434 if (vsi->netdev_registered) {
14435 vsi->netdev_registered = false;
14436 unregister_netdev(vsi->netdev);
14437 free_netdev(vsi->netdev);
14438 vsi->netdev = NULL;
14439 }
14440 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14441 err_vsi:
14442 i40e_vsi_clear(vsi);
14443 return NULL;
14444 }
14445
14446 /**
14447 * i40e_vsi_setup - Set up a VSI by a given type
14448 * @pf: board private structure
14449 * @type: VSI type
14450 * @uplink_seid: the switch element to link to
14451 * @param1: usage depends upon VSI type. For VF types, indicates VF id
14452 *
14453 * This allocates the sw VSI structure and its queue resources, then add a VSI
14454 * to the identified VEB.
14455 *
14456 * Returns pointer to the successfully allocated and configure VSI sw struct on
14457 * success, otherwise returns NULL on failure.
14458 **/
i40e_vsi_setup(struct i40e_pf * pf,u8 type,u16 uplink_seid,u32 param1)14459 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14460 u16 uplink_seid, u32 param1)
14461 {
14462 struct i40e_vsi *vsi = NULL;
14463 struct i40e_veb *veb = NULL;
14464 u16 alloc_queue_pairs;
14465 int ret, i;
14466 int v_idx;
14467
14468 /* The requested uplink_seid must be either
14469 * - the PF's port seid
14470 * no VEB is needed because this is the PF
14471 * or this is a Flow Director special case VSI
14472 * - seid of an existing VEB
14473 * - seid of a VSI that owns an existing VEB
14474 * - seid of a VSI that doesn't own a VEB
14475 * a new VEB is created and the VSI becomes the owner
14476 * - seid of the PF VSI, which is what creates the first VEB
14477 * this is a special case of the previous
14478 *
14479 * Find which uplink_seid we were given and create a new VEB if needed
14480 */
14481 for (i = 0; i < I40E_MAX_VEB; i++) {
14482 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14483 veb = pf->veb[i];
14484 break;
14485 }
14486 }
14487
14488 if (!veb && uplink_seid != pf->mac_seid) {
14489
14490 for (i = 0; i < pf->num_alloc_vsi; i++) {
14491 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14492 vsi = pf->vsi[i];
14493 break;
14494 }
14495 }
14496 if (!vsi) {
14497 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14498 uplink_seid);
14499 return NULL;
14500 }
14501
14502 if (vsi->uplink_seid == pf->mac_seid)
14503 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14504 vsi->tc_config.enabled_tc);
14505 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14506 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14507 vsi->tc_config.enabled_tc);
14508 if (veb) {
14509 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14510 dev_info(&vsi->back->pdev->dev,
14511 "New VSI creation error, uplink seid of LAN VSI expected.\n");
14512 return NULL;
14513 }
14514 /* We come up by default in VEPA mode if SRIOV is not
14515 * already enabled, in which case we can't force VEPA
14516 * mode.
14517 */
14518 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14519 veb->bridge_mode = BRIDGE_MODE_VEPA;
14520 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14521 }
14522 i40e_config_bridge_mode(veb);
14523 }
14524 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14525 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14526 veb = pf->veb[i];
14527 }
14528 if (!veb) {
14529 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14530 return NULL;
14531 }
14532
14533 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14534 uplink_seid = veb->seid;
14535 }
14536
14537 /* get vsi sw struct */
14538 v_idx = i40e_vsi_mem_alloc(pf, type);
14539 if (v_idx < 0)
14540 goto err_alloc;
14541 vsi = pf->vsi[v_idx];
14542 if (!vsi)
14543 goto err_alloc;
14544 vsi->type = type;
14545 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14546
14547 if (type == I40E_VSI_MAIN)
14548 pf->lan_vsi = v_idx;
14549 else if (type == I40E_VSI_SRIOV)
14550 vsi->vf_id = param1;
14551 /* assign it some queues */
14552 alloc_queue_pairs = vsi->alloc_queue_pairs *
14553 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14554
14555 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14556 if (ret < 0) {
14557 dev_info(&pf->pdev->dev,
14558 "failed to get tracking for %d queues for VSI %d err=%d\n",
14559 alloc_queue_pairs, vsi->seid, ret);
14560 goto err_vsi;
14561 }
14562 vsi->base_queue = ret;
14563
14564 /* get a VSI from the hardware */
14565 vsi->uplink_seid = uplink_seid;
14566 ret = i40e_add_vsi(vsi);
14567 if (ret)
14568 goto err_vsi;
14569
14570 switch (vsi->type) {
14571 /* setup the netdev if needed */
14572 case I40E_VSI_MAIN:
14573 case I40E_VSI_VMDQ2:
14574 ret = i40e_config_netdev(vsi);
14575 if (ret)
14576 goto err_netdev;
14577 ret = i40e_netif_set_realnum_tx_rx_queues(vsi);
14578 if (ret)
14579 goto err_netdev;
14580 ret = register_netdev(vsi->netdev);
14581 if (ret)
14582 goto err_netdev;
14583 vsi->netdev_registered = true;
14584 netif_carrier_off(vsi->netdev);
14585 #ifdef CONFIG_I40E_DCB
14586 /* Setup DCB netlink interface */
14587 i40e_dcbnl_setup(vsi);
14588 #endif /* CONFIG_I40E_DCB */
14589 fallthrough;
14590 case I40E_VSI_FDIR:
14591 /* set up vectors and rings if needed */
14592 ret = i40e_vsi_setup_vectors(vsi);
14593 if (ret)
14594 goto err_msix;
14595
14596 ret = i40e_alloc_rings(vsi);
14597 if (ret)
14598 goto err_rings;
14599
14600 /* map all of the rings to the q_vectors */
14601 i40e_vsi_map_rings_to_vectors(vsi);
14602
14603 i40e_vsi_reset_stats(vsi);
14604 break;
14605 default:
14606 /* no netdev or rings for the other VSI types */
14607 break;
14608 }
14609
14610 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14611 (vsi->type == I40E_VSI_VMDQ2)) {
14612 ret = i40e_vsi_config_rss(vsi);
14613 }
14614 return vsi;
14615
14616 err_rings:
14617 i40e_vsi_free_q_vectors(vsi);
14618 err_msix:
14619 if (vsi->netdev_registered) {
14620 vsi->netdev_registered = false;
14621 unregister_netdev(vsi->netdev);
14622 free_netdev(vsi->netdev);
14623 vsi->netdev = NULL;
14624 }
14625 err_netdev:
14626 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14627 err_vsi:
14628 i40e_vsi_clear(vsi);
14629 err_alloc:
14630 return NULL;
14631 }
14632
14633 /**
14634 * i40e_veb_get_bw_info - Query VEB BW information
14635 * @veb: the veb to query
14636 *
14637 * Query the Tx scheduler BW configuration data for given VEB
14638 **/
i40e_veb_get_bw_info(struct i40e_veb * veb)14639 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14640 {
14641 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14642 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14643 struct i40e_pf *pf = veb->pf;
14644 struct i40e_hw *hw = &pf->hw;
14645 u32 tc_bw_max;
14646 int ret = 0;
14647 int i;
14648
14649 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14650 &bw_data, NULL);
14651 if (ret) {
14652 dev_info(&pf->pdev->dev,
14653 "query veb bw config failed, err %pe aq_err %s\n",
14654 ERR_PTR(ret),
14655 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14656 goto out;
14657 }
14658
14659 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14660 &ets_data, NULL);
14661 if (ret) {
14662 dev_info(&pf->pdev->dev,
14663 "query veb bw ets config failed, err %pe aq_err %s\n",
14664 ERR_PTR(ret),
14665 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14666 goto out;
14667 }
14668
14669 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14670 veb->bw_max_quanta = ets_data.tc_bw_max;
14671 veb->is_abs_credits = bw_data.absolute_credits_enable;
14672 veb->enabled_tc = ets_data.tc_valid_bits;
14673 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14674 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14675 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14676 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14677 veb->bw_tc_limit_credits[i] =
14678 le16_to_cpu(bw_data.tc_bw_limits[i]);
14679 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14680 }
14681
14682 out:
14683 return ret;
14684 }
14685
14686 /**
14687 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14688 * @pf: board private structure
14689 *
14690 * On error: returns error code (negative)
14691 * On success: returns vsi index in PF (positive)
14692 **/
i40e_veb_mem_alloc(struct i40e_pf * pf)14693 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14694 {
14695 int ret = -ENOENT;
14696 struct i40e_veb *veb;
14697 int i;
14698
14699 /* Need to protect the allocation of switch elements at the PF level */
14700 mutex_lock(&pf->switch_mutex);
14701
14702 /* VEB list may be fragmented if VEB creation/destruction has
14703 * been happening. We can afford to do a quick scan to look
14704 * for any free slots in the list.
14705 *
14706 * find next empty veb slot, looping back around if necessary
14707 */
14708 i = 0;
14709 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14710 i++;
14711 if (i >= I40E_MAX_VEB) {
14712 ret = -ENOMEM;
14713 goto err_alloc_veb; /* out of VEB slots! */
14714 }
14715
14716 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14717 if (!veb) {
14718 ret = -ENOMEM;
14719 goto err_alloc_veb;
14720 }
14721 veb->pf = pf;
14722 veb->idx = i;
14723 veb->enabled_tc = 1;
14724
14725 pf->veb[i] = veb;
14726 ret = i;
14727 err_alloc_veb:
14728 mutex_unlock(&pf->switch_mutex);
14729 return ret;
14730 }
14731
14732 /**
14733 * i40e_switch_branch_release - Delete a branch of the switch tree
14734 * @branch: where to start deleting
14735 *
14736 * This uses recursion to find the tips of the branch to be
14737 * removed, deleting until we get back to and can delete this VEB.
14738 **/
i40e_switch_branch_release(struct i40e_veb * branch)14739 static void i40e_switch_branch_release(struct i40e_veb *branch)
14740 {
14741 struct i40e_pf *pf = branch->pf;
14742 u16 branch_seid = branch->seid;
14743 u16 veb_idx = branch->idx;
14744 int i;
14745
14746 /* release any VEBs on this VEB - RECURSION */
14747 for (i = 0; i < I40E_MAX_VEB; i++) {
14748 if (!pf->veb[i])
14749 continue;
14750 if (pf->veb[i]->uplink_seid == branch->seid)
14751 i40e_switch_branch_release(pf->veb[i]);
14752 }
14753
14754 /* Release the VSIs on this VEB, but not the owner VSI.
14755 *
14756 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14757 * the VEB itself, so don't use (*branch) after this loop.
14758 */
14759 for (i = 0; i < pf->num_alloc_vsi; i++) {
14760 if (!pf->vsi[i])
14761 continue;
14762 if (pf->vsi[i]->uplink_seid == branch_seid &&
14763 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14764 i40e_vsi_release(pf->vsi[i]);
14765 }
14766 }
14767
14768 /* There's one corner case where the VEB might not have been
14769 * removed, so double check it here and remove it if needed.
14770 * This case happens if the veb was created from the debugfs
14771 * commands and no VSIs were added to it.
14772 */
14773 if (pf->veb[veb_idx])
14774 i40e_veb_release(pf->veb[veb_idx]);
14775 }
14776
14777 /**
14778 * i40e_veb_clear - remove veb struct
14779 * @veb: the veb to remove
14780 **/
i40e_veb_clear(struct i40e_veb * veb)14781 static void i40e_veb_clear(struct i40e_veb *veb)
14782 {
14783 if (!veb)
14784 return;
14785
14786 if (veb->pf) {
14787 struct i40e_pf *pf = veb->pf;
14788
14789 mutex_lock(&pf->switch_mutex);
14790 if (pf->veb[veb->idx] == veb)
14791 pf->veb[veb->idx] = NULL;
14792 mutex_unlock(&pf->switch_mutex);
14793 }
14794
14795 kfree(veb);
14796 }
14797
14798 /**
14799 * i40e_veb_release - Delete a VEB and free its resources
14800 * @veb: the VEB being removed
14801 **/
i40e_veb_release(struct i40e_veb * veb)14802 void i40e_veb_release(struct i40e_veb *veb)
14803 {
14804 struct i40e_vsi *vsi = NULL;
14805 struct i40e_pf *pf;
14806 int i, n = 0;
14807
14808 pf = veb->pf;
14809
14810 /* find the remaining VSI and check for extras */
14811 for (i = 0; i < pf->num_alloc_vsi; i++) {
14812 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14813 n++;
14814 vsi = pf->vsi[i];
14815 }
14816 }
14817 if (n != 1) {
14818 dev_info(&pf->pdev->dev,
14819 "can't remove VEB %d with %d VSIs left\n",
14820 veb->seid, n);
14821 return;
14822 }
14823
14824 /* move the remaining VSI to uplink veb */
14825 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14826 if (veb->uplink_seid) {
14827 vsi->uplink_seid = veb->uplink_seid;
14828 if (veb->uplink_seid == pf->mac_seid)
14829 vsi->veb_idx = I40E_NO_VEB;
14830 else
14831 vsi->veb_idx = veb->veb_idx;
14832 } else {
14833 /* floating VEB */
14834 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14835 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14836 }
14837
14838 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14839 i40e_veb_clear(veb);
14840 }
14841
14842 /**
14843 * i40e_add_veb - create the VEB in the switch
14844 * @veb: the VEB to be instantiated
14845 * @vsi: the controlling VSI
14846 **/
i40e_add_veb(struct i40e_veb * veb,struct i40e_vsi * vsi)14847 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14848 {
14849 struct i40e_pf *pf = veb->pf;
14850 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14851 int ret;
14852
14853 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14854 veb->enabled_tc, false,
14855 &veb->seid, enable_stats, NULL);
14856
14857 /* get a VEB from the hardware */
14858 if (ret) {
14859 dev_info(&pf->pdev->dev,
14860 "couldn't add VEB, err %pe aq_err %s\n",
14861 ERR_PTR(ret),
14862 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14863 return -EPERM;
14864 }
14865
14866 /* get statistics counter */
14867 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14868 &veb->stats_idx, NULL, NULL, NULL);
14869 if (ret) {
14870 dev_info(&pf->pdev->dev,
14871 "couldn't get VEB statistics idx, err %pe aq_err %s\n",
14872 ERR_PTR(ret),
14873 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14874 return -EPERM;
14875 }
14876 ret = i40e_veb_get_bw_info(veb);
14877 if (ret) {
14878 dev_info(&pf->pdev->dev,
14879 "couldn't get VEB bw info, err %pe aq_err %s\n",
14880 ERR_PTR(ret),
14881 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14882 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14883 return -ENOENT;
14884 }
14885
14886 vsi->uplink_seid = veb->seid;
14887 vsi->veb_idx = veb->idx;
14888 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14889
14890 return 0;
14891 }
14892
14893 /**
14894 * i40e_veb_setup - Set up a VEB
14895 * @pf: board private structure
14896 * @flags: VEB setup flags
14897 * @uplink_seid: the switch element to link to
14898 * @vsi_seid: the initial VSI seid
14899 * @enabled_tc: Enabled TC bit-map
14900 *
14901 * This allocates the sw VEB structure and links it into the switch
14902 * It is possible and legal for this to be a duplicate of an already
14903 * existing VEB. It is also possible for both uplink and vsi seids
14904 * to be zero, in order to create a floating VEB.
14905 *
14906 * Returns pointer to the successfully allocated VEB sw struct on
14907 * success, otherwise returns NULL on failure.
14908 **/
i40e_veb_setup(struct i40e_pf * pf,u16 flags,u16 uplink_seid,u16 vsi_seid,u8 enabled_tc)14909 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14910 u16 uplink_seid, u16 vsi_seid,
14911 u8 enabled_tc)
14912 {
14913 struct i40e_veb *veb, *uplink_veb = NULL;
14914 int vsi_idx, veb_idx;
14915 int ret;
14916
14917 /* if one seid is 0, the other must be 0 to create a floating relay */
14918 if ((uplink_seid == 0 || vsi_seid == 0) &&
14919 (uplink_seid + vsi_seid != 0)) {
14920 dev_info(&pf->pdev->dev,
14921 "one, not both seid's are 0: uplink=%d vsi=%d\n",
14922 uplink_seid, vsi_seid);
14923 return NULL;
14924 }
14925
14926 /* make sure there is such a vsi and uplink */
14927 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14928 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14929 break;
14930 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14931 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14932 vsi_seid);
14933 return NULL;
14934 }
14935
14936 if (uplink_seid && uplink_seid != pf->mac_seid) {
14937 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14938 if (pf->veb[veb_idx] &&
14939 pf->veb[veb_idx]->seid == uplink_seid) {
14940 uplink_veb = pf->veb[veb_idx];
14941 break;
14942 }
14943 }
14944 if (!uplink_veb) {
14945 dev_info(&pf->pdev->dev,
14946 "uplink seid %d not found\n", uplink_seid);
14947 return NULL;
14948 }
14949 }
14950
14951 /* get veb sw struct */
14952 veb_idx = i40e_veb_mem_alloc(pf);
14953 if (veb_idx < 0)
14954 goto err_alloc;
14955 veb = pf->veb[veb_idx];
14956 veb->flags = flags;
14957 veb->uplink_seid = uplink_seid;
14958 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14959 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14960
14961 /* create the VEB in the switch */
14962 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14963 if (ret)
14964 goto err_veb;
14965 if (vsi_idx == pf->lan_vsi)
14966 pf->lan_veb = veb->idx;
14967
14968 return veb;
14969
14970 err_veb:
14971 i40e_veb_clear(veb);
14972 err_alloc:
14973 return NULL;
14974 }
14975
14976 /**
14977 * i40e_setup_pf_switch_element - set PF vars based on switch type
14978 * @pf: board private structure
14979 * @ele: element we are building info from
14980 * @num_reported: total number of elements
14981 * @printconfig: should we print the contents
14982 *
14983 * helper function to assist in extracting a few useful SEID values.
14984 **/
i40e_setup_pf_switch_element(struct i40e_pf * pf,struct i40e_aqc_switch_config_element_resp * ele,u16 num_reported,bool printconfig)14985 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14986 struct i40e_aqc_switch_config_element_resp *ele,
14987 u16 num_reported, bool printconfig)
14988 {
14989 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14990 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14991 u8 element_type = ele->element_type;
14992 u16 seid = le16_to_cpu(ele->seid);
14993
14994 if (printconfig)
14995 dev_info(&pf->pdev->dev,
14996 "type=%d seid=%d uplink=%d downlink=%d\n",
14997 element_type, seid, uplink_seid, downlink_seid);
14998
14999 switch (element_type) {
15000 case I40E_SWITCH_ELEMENT_TYPE_MAC:
15001 pf->mac_seid = seid;
15002 break;
15003 case I40E_SWITCH_ELEMENT_TYPE_VEB:
15004 /* Main VEB? */
15005 if (uplink_seid != pf->mac_seid)
15006 break;
15007 if (pf->lan_veb >= I40E_MAX_VEB) {
15008 int v;
15009
15010 /* find existing or else empty VEB */
15011 for (v = 0; v < I40E_MAX_VEB; v++) {
15012 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
15013 pf->lan_veb = v;
15014 break;
15015 }
15016 }
15017 if (pf->lan_veb >= I40E_MAX_VEB) {
15018 v = i40e_veb_mem_alloc(pf);
15019 if (v < 0)
15020 break;
15021 pf->lan_veb = v;
15022 }
15023 }
15024 if (pf->lan_veb >= I40E_MAX_VEB)
15025 break;
15026
15027 pf->veb[pf->lan_veb]->seid = seid;
15028 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
15029 pf->veb[pf->lan_veb]->pf = pf;
15030 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
15031 break;
15032 case I40E_SWITCH_ELEMENT_TYPE_VSI:
15033 if (num_reported != 1)
15034 break;
15035 /* This is immediately after a reset so we can assume this is
15036 * the PF's VSI
15037 */
15038 pf->mac_seid = uplink_seid;
15039 pf->pf_seid = downlink_seid;
15040 pf->main_vsi_seid = seid;
15041 if (printconfig)
15042 dev_info(&pf->pdev->dev,
15043 "pf_seid=%d main_vsi_seid=%d\n",
15044 pf->pf_seid, pf->main_vsi_seid);
15045 break;
15046 case I40E_SWITCH_ELEMENT_TYPE_PF:
15047 case I40E_SWITCH_ELEMENT_TYPE_VF:
15048 case I40E_SWITCH_ELEMENT_TYPE_EMP:
15049 case I40E_SWITCH_ELEMENT_TYPE_BMC:
15050 case I40E_SWITCH_ELEMENT_TYPE_PE:
15051 case I40E_SWITCH_ELEMENT_TYPE_PA:
15052 /* ignore these for now */
15053 break;
15054 default:
15055 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
15056 element_type, seid);
15057 break;
15058 }
15059 }
15060
15061 /**
15062 * i40e_fetch_switch_configuration - Get switch config from firmware
15063 * @pf: board private structure
15064 * @printconfig: should we print the contents
15065 *
15066 * Get the current switch configuration from the device and
15067 * extract a few useful SEID values.
15068 **/
i40e_fetch_switch_configuration(struct i40e_pf * pf,bool printconfig)15069 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
15070 {
15071 struct i40e_aqc_get_switch_config_resp *sw_config;
15072 u16 next_seid = 0;
15073 int ret = 0;
15074 u8 *aq_buf;
15075 int i;
15076
15077 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
15078 if (!aq_buf)
15079 return -ENOMEM;
15080
15081 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
15082 do {
15083 u16 num_reported, num_total;
15084
15085 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
15086 I40E_AQ_LARGE_BUF,
15087 &next_seid, NULL);
15088 if (ret) {
15089 dev_info(&pf->pdev->dev,
15090 "get switch config failed err %d aq_err %s\n",
15091 ret,
15092 i40e_aq_str(&pf->hw,
15093 pf->hw.aq.asq_last_status));
15094 kfree(aq_buf);
15095 return -ENOENT;
15096 }
15097
15098 num_reported = le16_to_cpu(sw_config->header.num_reported);
15099 num_total = le16_to_cpu(sw_config->header.num_total);
15100
15101 if (printconfig)
15102 dev_info(&pf->pdev->dev,
15103 "header: %d reported %d total\n",
15104 num_reported, num_total);
15105
15106 for (i = 0; i < num_reported; i++) {
15107 struct i40e_aqc_switch_config_element_resp *ele =
15108 &sw_config->element[i];
15109
15110 i40e_setup_pf_switch_element(pf, ele, num_reported,
15111 printconfig);
15112 }
15113 } while (next_seid != 0);
15114
15115 kfree(aq_buf);
15116 return ret;
15117 }
15118
15119 /**
15120 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
15121 * @pf: board private structure
15122 * @reinit: if the Main VSI needs to re-initialized.
15123 * @lock_acquired: indicates whether or not the lock has been acquired
15124 *
15125 * Returns 0 on success, negative value on failure
15126 **/
i40e_setup_pf_switch(struct i40e_pf * pf,bool reinit,bool lock_acquired)15127 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
15128 {
15129 u16 flags = 0;
15130 int ret;
15131
15132 /* find out what's out there already */
15133 ret = i40e_fetch_switch_configuration(pf, false);
15134 if (ret) {
15135 dev_info(&pf->pdev->dev,
15136 "couldn't fetch switch config, err %pe aq_err %s\n",
15137 ERR_PTR(ret),
15138 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15139 return ret;
15140 }
15141 i40e_pf_reset_stats(pf);
15142
15143 /* set the switch config bit for the whole device to
15144 * support limited promisc or true promisc
15145 * when user requests promisc. The default is limited
15146 * promisc.
15147 */
15148
15149 if ((pf->hw.pf_id == 0) &&
15150 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
15151 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
15152 pf->last_sw_conf_flags = flags;
15153 }
15154
15155 if (pf->hw.pf_id == 0) {
15156 u16 valid_flags;
15157
15158 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
15159 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
15160 NULL);
15161 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
15162 dev_info(&pf->pdev->dev,
15163 "couldn't set switch config bits, err %pe aq_err %s\n",
15164 ERR_PTR(ret),
15165 i40e_aq_str(&pf->hw,
15166 pf->hw.aq.asq_last_status));
15167 /* not a fatal problem, just keep going */
15168 }
15169 pf->last_sw_conf_valid_flags = valid_flags;
15170 }
15171
15172 /* first time setup */
15173 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
15174 struct i40e_vsi *vsi = NULL;
15175 u16 uplink_seid;
15176
15177 /* Set up the PF VSI associated with the PF's main VSI
15178 * that is already in the HW switch
15179 */
15180 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
15181 uplink_seid = pf->veb[pf->lan_veb]->seid;
15182 else
15183 uplink_seid = pf->mac_seid;
15184 if (pf->lan_vsi == I40E_NO_VSI)
15185 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
15186 else if (reinit)
15187 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
15188 if (!vsi) {
15189 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
15190 i40e_cloud_filter_exit(pf);
15191 i40e_fdir_teardown(pf);
15192 return -EAGAIN;
15193 }
15194 } else {
15195 /* force a reset of TC and queue layout configurations */
15196 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
15197
15198 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
15199 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
15200 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
15201 }
15202 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
15203
15204 i40e_fdir_sb_setup(pf);
15205
15206 /* Setup static PF queue filter control settings */
15207 ret = i40e_setup_pf_filter_control(pf);
15208 if (ret) {
15209 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
15210 ret);
15211 /* Failure here should not stop continuing other steps */
15212 }
15213
15214 /* enable RSS in the HW, even for only one queue, as the stack can use
15215 * the hash
15216 */
15217 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
15218 i40e_pf_config_rss(pf);
15219
15220 /* fill in link information and enable LSE reporting */
15221 i40e_link_event(pf);
15222
15223 /* Initialize user-specific link properties */
15224 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
15225 I40E_AQ_AN_COMPLETED) ? true : false);
15226
15227 i40e_ptp_init(pf);
15228
15229 if (!lock_acquired)
15230 rtnl_lock();
15231
15232 /* repopulate tunnel port filters */
15233 udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
15234
15235 if (!lock_acquired)
15236 rtnl_unlock();
15237
15238 return ret;
15239 }
15240
15241 /**
15242 * i40e_determine_queue_usage - Work out queue distribution
15243 * @pf: board private structure
15244 **/
i40e_determine_queue_usage(struct i40e_pf * pf)15245 static void i40e_determine_queue_usage(struct i40e_pf *pf)
15246 {
15247 int queues_left;
15248 int q_max;
15249
15250 pf->num_lan_qps = 0;
15251
15252 /* Find the max queues to be put into basic use. We'll always be
15253 * using TC0, whether or not DCB is running, and TC0 will get the
15254 * big RSS set.
15255 */
15256 queues_left = pf->hw.func_caps.num_tx_qp;
15257
15258 if ((queues_left == 1) ||
15259 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
15260 /* one qp for PF, no queues for anything else */
15261 queues_left = 0;
15262 pf->alloc_rss_size = pf->num_lan_qps = 1;
15263
15264 /* make sure all the fancies are disabled */
15265 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15266 I40E_FLAG_IWARP_ENABLED |
15267 I40E_FLAG_FD_SB_ENABLED |
15268 I40E_FLAG_FD_ATR_ENABLED |
15269 I40E_FLAG_DCB_CAPABLE |
15270 I40E_FLAG_DCB_ENABLED |
15271 I40E_FLAG_SRIOV_ENABLED |
15272 I40E_FLAG_VMDQ_ENABLED);
15273 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15274 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
15275 I40E_FLAG_FD_SB_ENABLED |
15276 I40E_FLAG_FD_ATR_ENABLED |
15277 I40E_FLAG_DCB_CAPABLE))) {
15278 /* one qp for PF */
15279 pf->alloc_rss_size = pf->num_lan_qps = 1;
15280 queues_left -= pf->num_lan_qps;
15281
15282 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15283 I40E_FLAG_IWARP_ENABLED |
15284 I40E_FLAG_FD_SB_ENABLED |
15285 I40E_FLAG_FD_ATR_ENABLED |
15286 I40E_FLAG_DCB_ENABLED |
15287 I40E_FLAG_VMDQ_ENABLED);
15288 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15289 } else {
15290 /* Not enough queues for all TCs */
15291 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
15292 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
15293 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
15294 I40E_FLAG_DCB_ENABLED);
15295 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15296 }
15297
15298 /* limit lan qps to the smaller of qps, cpus or msix */
15299 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15300 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15301 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15302 pf->num_lan_qps = q_max;
15303
15304 queues_left -= pf->num_lan_qps;
15305 }
15306
15307 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15308 if (queues_left > 1) {
15309 queues_left -= 1; /* save 1 queue for FD */
15310 } else {
15311 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
15312 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15313 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15314 }
15315 }
15316
15317 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15318 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15319 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15320 (queues_left / pf->num_vf_qps));
15321 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15322 }
15323
15324 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
15325 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15326 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15327 (queues_left / pf->num_vmdq_qps));
15328 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15329 }
15330
15331 pf->queues_left = queues_left;
15332 dev_dbg(&pf->pdev->dev,
15333 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
15334 pf->hw.func_caps.num_tx_qp,
15335 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
15336 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15337 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15338 queues_left);
15339 }
15340
15341 /**
15342 * i40e_setup_pf_filter_control - Setup PF static filter control
15343 * @pf: PF to be setup
15344 *
15345 * i40e_setup_pf_filter_control sets up a PF's initial filter control
15346 * settings. If PE/FCoE are enabled then it will also set the per PF
15347 * based filter sizes required for them. It also enables Flow director,
15348 * ethertype and macvlan type filter settings for the pf.
15349 *
15350 * Returns 0 on success, negative on failure
15351 **/
i40e_setup_pf_filter_control(struct i40e_pf * pf)15352 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15353 {
15354 struct i40e_filter_control_settings *settings = &pf->filter_settings;
15355
15356 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
15357
15358 /* Flow Director is enabled */
15359 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
15360 settings->enable_fdir = true;
15361
15362 /* Ethtype and MACVLAN filters enabled for PF */
15363 settings->enable_ethtype = true;
15364 settings->enable_macvlan = true;
15365
15366 if (i40e_set_filter_control(&pf->hw, settings))
15367 return -ENOENT;
15368
15369 return 0;
15370 }
15371
15372 #define INFO_STRING_LEN 255
15373 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
i40e_print_features(struct i40e_pf * pf)15374 static void i40e_print_features(struct i40e_pf *pf)
15375 {
15376 struct i40e_hw *hw = &pf->hw;
15377 char *buf;
15378 int i;
15379
15380 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
15381 if (!buf)
15382 return;
15383
15384 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
15385 #ifdef CONFIG_PCI_IOV
15386 i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
15387 #endif
15388 i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
15389 pf->hw.func_caps.num_vsis,
15390 pf->vsi[pf->lan_vsi]->num_queue_pairs);
15391 if (pf->flags & I40E_FLAG_RSS_ENABLED)
15392 i += scnprintf(&buf[i], REMAIN(i), " RSS");
15393 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
15394 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
15395 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15396 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
15397 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
15398 }
15399 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
15400 i += scnprintf(&buf[i], REMAIN(i), " DCB");
15401 i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
15402 i += scnprintf(&buf[i], REMAIN(i), " Geneve");
15403 if (pf->flags & I40E_FLAG_PTP)
15404 i += scnprintf(&buf[i], REMAIN(i), " PTP");
15405 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
15406 i += scnprintf(&buf[i], REMAIN(i), " VEB");
15407 else
15408 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
15409
15410 dev_info(&pf->pdev->dev, "%s\n", buf);
15411 kfree(buf);
15412 WARN_ON(i > INFO_STRING_LEN);
15413 }
15414
15415 /**
15416 * i40e_get_platform_mac_addr - get platform-specific MAC address
15417 * @pdev: PCI device information struct
15418 * @pf: board private structure
15419 *
15420 * Look up the MAC address for the device. First we'll try
15421 * eth_platform_get_mac_address, which will check Open Firmware, or arch
15422 * specific fallback. Otherwise, we'll default to the stored value in
15423 * firmware.
15424 **/
i40e_get_platform_mac_addr(struct pci_dev * pdev,struct i40e_pf * pf)15425 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15426 {
15427 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
15428 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
15429 }
15430
15431 /**
15432 * i40e_set_fec_in_flags - helper function for setting FEC options in flags
15433 * @fec_cfg: FEC option to set in flags
15434 * @flags: ptr to flags in which we set FEC option
15435 **/
i40e_set_fec_in_flags(u8 fec_cfg,u32 * flags)15436 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
15437 {
15438 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
15439 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
15440 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
15441 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
15442 *flags |= I40E_FLAG_RS_FEC;
15443 *flags &= ~I40E_FLAG_BASE_R_FEC;
15444 }
15445 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
15446 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
15447 *flags |= I40E_FLAG_BASE_R_FEC;
15448 *flags &= ~I40E_FLAG_RS_FEC;
15449 }
15450 if (fec_cfg == 0)
15451 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
15452 }
15453
15454 /**
15455 * i40e_check_recovery_mode - check if we are running transition firmware
15456 * @pf: board private structure
15457 *
15458 * Check registers indicating the firmware runs in recovery mode. Sets the
15459 * appropriate driver state.
15460 *
15461 * Returns true if the recovery mode was detected, false otherwise
15462 **/
i40e_check_recovery_mode(struct i40e_pf * pf)15463 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15464 {
15465 u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15466
15467 if (val & I40E_GL_FWSTS_FWS1B_MASK) {
15468 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15469 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15470 set_bit(__I40E_RECOVERY_MODE, pf->state);
15471
15472 return true;
15473 }
15474 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15475 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15476
15477 return false;
15478 }
15479
15480 /**
15481 * i40e_pf_loop_reset - perform reset in a loop.
15482 * @pf: board private structure
15483 *
15484 * This function is useful when a NIC is about to enter recovery mode.
15485 * When a NIC's internal data structures are corrupted the NIC's
15486 * firmware is going to enter recovery mode.
15487 * Right after a POR it takes about 7 minutes for firmware to enter
15488 * recovery mode. Until that time a NIC is in some kind of intermediate
15489 * state. After that time period the NIC almost surely enters
15490 * recovery mode. The only way for a driver to detect intermediate
15491 * state is to issue a series of pf-resets and check a return value.
15492 * If a PF reset returns success then the firmware could be in recovery
15493 * mode so the caller of this code needs to check for recovery mode
15494 * if this function returns success. There is a little chance that
15495 * firmware will hang in intermediate state forever.
15496 * Since waiting 7 minutes is quite a lot of time this function waits
15497 * 10 seconds and then gives up by returning an error.
15498 *
15499 * Return 0 on success, negative on failure.
15500 **/
i40e_pf_loop_reset(struct i40e_pf * pf)15501 static int i40e_pf_loop_reset(struct i40e_pf *pf)
15502 {
15503 /* wait max 10 seconds for PF reset to succeed */
15504 const unsigned long time_end = jiffies + 10 * HZ;
15505 struct i40e_hw *hw = &pf->hw;
15506 int ret;
15507
15508 ret = i40e_pf_reset(hw);
15509 while (ret != 0 && time_before(jiffies, time_end)) {
15510 usleep_range(10000, 20000);
15511 ret = i40e_pf_reset(hw);
15512 }
15513
15514 if (ret == 0)
15515 pf->pfr_count++;
15516 else
15517 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15518
15519 return ret;
15520 }
15521
15522 /**
15523 * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15524 * @pf: board private structure
15525 *
15526 * Check FW registers to determine if FW issued unexpected EMP Reset.
15527 * Every time when unexpected EMP Reset occurs the FW increments
15528 * a counter of unexpected EMP Resets. When the counter reaches 10
15529 * the FW should enter the Recovery mode
15530 *
15531 * Returns true if FW issued unexpected EMP Reset
15532 **/
i40e_check_fw_empr(struct i40e_pf * pf)15533 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15534 {
15535 const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15536 I40E_GL_FWSTS_FWS1B_MASK;
15537 return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15538 (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15539 }
15540
15541 /**
15542 * i40e_handle_resets - handle EMP resets and PF resets
15543 * @pf: board private structure
15544 *
15545 * Handle both EMP resets and PF resets and conclude whether there are
15546 * any issues regarding these resets. If there are any issues then
15547 * generate log entry.
15548 *
15549 * Return 0 if NIC is healthy or negative value when there are issues
15550 * with resets
15551 **/
i40e_handle_resets(struct i40e_pf * pf)15552 static int i40e_handle_resets(struct i40e_pf *pf)
15553 {
15554 const int pfr = i40e_pf_loop_reset(pf);
15555 const bool is_empr = i40e_check_fw_empr(pf);
15556
15557 if (is_empr || pfr != 0)
15558 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15559
15560 return is_empr ? -EIO : pfr;
15561 }
15562
15563 /**
15564 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15565 * @pf: board private structure
15566 * @hw: ptr to the hardware info
15567 *
15568 * This function does a minimal setup of all subsystems needed for running
15569 * recovery mode.
15570 *
15571 * Returns 0 on success, negative on failure
15572 **/
i40e_init_recovery_mode(struct i40e_pf * pf,struct i40e_hw * hw)15573 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15574 {
15575 struct i40e_vsi *vsi;
15576 int err;
15577 int v_idx;
15578
15579 pci_set_drvdata(pf->pdev, pf);
15580 pci_save_state(pf->pdev);
15581
15582 /* set up periodic task facility */
15583 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15584 pf->service_timer_period = HZ;
15585
15586 INIT_WORK(&pf->service_task, i40e_service_task);
15587 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15588
15589 err = i40e_init_interrupt_scheme(pf);
15590 if (err)
15591 goto err_switch_setup;
15592
15593 /* The number of VSIs reported by the FW is the minimum guaranteed
15594 * to us; HW supports far more and we share the remaining pool with
15595 * the other PFs. We allocate space for more than the guarantee with
15596 * the understanding that we might not get them all later.
15597 */
15598 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15599 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15600 else
15601 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15602
15603 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15604 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15605 GFP_KERNEL);
15606 if (!pf->vsi) {
15607 err = -ENOMEM;
15608 goto err_switch_setup;
15609 }
15610
15611 /* We allocate one VSI which is needed as absolute minimum
15612 * in order to register the netdev
15613 */
15614 v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15615 if (v_idx < 0) {
15616 err = v_idx;
15617 goto err_switch_setup;
15618 }
15619 pf->lan_vsi = v_idx;
15620 vsi = pf->vsi[v_idx];
15621 if (!vsi) {
15622 err = -EFAULT;
15623 goto err_switch_setup;
15624 }
15625 vsi->alloc_queue_pairs = 1;
15626 err = i40e_config_netdev(vsi);
15627 if (err)
15628 goto err_switch_setup;
15629 err = register_netdev(vsi->netdev);
15630 if (err)
15631 goto err_switch_setup;
15632 vsi->netdev_registered = true;
15633 i40e_dbg_pf_init(pf);
15634
15635 err = i40e_setup_misc_vector_for_recovery_mode(pf);
15636 if (err)
15637 goto err_switch_setup;
15638
15639 /* tell the firmware that we're starting */
15640 i40e_send_version(pf);
15641
15642 /* since everything's happy, start the service_task timer */
15643 mod_timer(&pf->service_timer,
15644 round_jiffies(jiffies + pf->service_timer_period));
15645
15646 return 0;
15647
15648 err_switch_setup:
15649 i40e_reset_interrupt_capability(pf);
15650 timer_shutdown_sync(&pf->service_timer);
15651 i40e_shutdown_adminq(hw);
15652 iounmap(hw->hw_addr);
15653 pci_release_mem_regions(pf->pdev);
15654 pci_disable_device(pf->pdev);
15655 kfree(pf);
15656
15657 return err;
15658 }
15659
15660 /**
15661 * i40e_set_subsystem_device_id - set subsystem device id
15662 * @hw: pointer to the hardware info
15663 *
15664 * Set PCI subsystem device id either from a pci_dev structure or
15665 * a specific FW register.
15666 **/
i40e_set_subsystem_device_id(struct i40e_hw * hw)15667 static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15668 {
15669 struct i40e_pf *pf = i40e_hw_to_pf(hw);
15670
15671 hw->subsystem_device_id = pf->pdev->subsystem_device ?
15672 pf->pdev->subsystem_device :
15673 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15674 }
15675
15676 /**
15677 * i40e_probe - Device initialization routine
15678 * @pdev: PCI device information struct
15679 * @ent: entry in i40e_pci_tbl
15680 *
15681 * i40e_probe initializes a PF identified by a pci_dev structure.
15682 * The OS initialization, configuring of the PF private structure,
15683 * and a hardware reset occur.
15684 *
15685 * Returns 0 on success, negative on failure
15686 **/
i40e_probe(struct pci_dev * pdev,const struct pci_device_id * ent)15687 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15688 {
15689 struct i40e_aq_get_phy_abilities_resp abilities;
15690 #ifdef CONFIG_I40E_DCB
15691 enum i40e_get_fw_lldp_status_resp lldp_status;
15692 #endif /* CONFIG_I40E_DCB */
15693 struct i40e_pf *pf;
15694 struct i40e_hw *hw;
15695 static u16 pfs_found;
15696 u16 wol_nvm_bits;
15697 u16 link_status;
15698 #ifdef CONFIG_I40E_DCB
15699 int status;
15700 #endif /* CONFIG_I40E_DCB */
15701 int err;
15702 u32 val;
15703 u32 i;
15704
15705 err = pci_enable_device_mem(pdev);
15706 if (err)
15707 return err;
15708
15709 /* set up for high or low dma */
15710 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15711 if (err) {
15712 dev_err(&pdev->dev,
15713 "DMA configuration failed: 0x%x\n", err);
15714 goto err_dma;
15715 }
15716
15717 /* set up pci connections */
15718 err = pci_request_mem_regions(pdev, i40e_driver_name);
15719 if (err) {
15720 dev_info(&pdev->dev,
15721 "pci_request_selected_regions failed %d\n", err);
15722 goto err_pci_reg;
15723 }
15724
15725 pci_set_master(pdev);
15726
15727 /* Now that we have a PCI connection, we need to do the
15728 * low level device setup. This is primarily setting up
15729 * the Admin Queue structures and then querying for the
15730 * device's current profile information.
15731 */
15732 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
15733 if (!pf) {
15734 err = -ENOMEM;
15735 goto err_pf_alloc;
15736 }
15737 pf->next_vsi = 0;
15738 pf->pdev = pdev;
15739 set_bit(__I40E_DOWN, pf->state);
15740
15741 hw = &pf->hw;
15742
15743 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15744 I40E_MAX_CSR_SPACE);
15745 /* We believe that the highest register to read is
15746 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15747 * is not less than that before mapping to prevent a
15748 * kernel panic.
15749 */
15750 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15751 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15752 pf->ioremap_len);
15753 err = -ENOMEM;
15754 goto err_ioremap;
15755 }
15756 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15757 if (!hw->hw_addr) {
15758 err = -EIO;
15759 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15760 (unsigned int)pci_resource_start(pdev, 0),
15761 pf->ioremap_len, err);
15762 goto err_ioremap;
15763 }
15764 hw->vendor_id = pdev->vendor;
15765 hw->device_id = pdev->device;
15766 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15767 hw->subsystem_vendor_id = pdev->subsystem_vendor;
15768 i40e_set_subsystem_device_id(hw);
15769 hw->bus.device = PCI_SLOT(pdev->devfn);
15770 hw->bus.func = PCI_FUNC(pdev->devfn);
15771 hw->bus.bus_id = pdev->bus->number;
15772 pf->instance = pfs_found;
15773
15774 /* Select something other than the 802.1ad ethertype for the
15775 * switch to use internally and drop on ingress.
15776 */
15777 hw->switch_tag = 0xffff;
15778 hw->first_tag = ETH_P_8021AD;
15779 hw->second_tag = ETH_P_8021Q;
15780
15781 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15782 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15783 INIT_LIST_HEAD(&pf->ddp_old_prof);
15784
15785 /* set up the locks for the AQ, do this only once in probe
15786 * and destroy them only once in remove
15787 */
15788 mutex_init(&hw->aq.asq_mutex);
15789 mutex_init(&hw->aq.arq_mutex);
15790
15791 pf->msg_enable = netif_msg_init(debug,
15792 NETIF_MSG_DRV |
15793 NETIF_MSG_PROBE |
15794 NETIF_MSG_LINK);
15795 if (debug < -1)
15796 pf->hw.debug_mask = debug;
15797
15798 /* do a special CORER for clearing PXE mode once at init */
15799 if (hw->revision_id == 0 &&
15800 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15801 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15802 i40e_flush(hw);
15803 msleep(200);
15804 pf->corer_count++;
15805
15806 i40e_clear_pxe_mode(hw);
15807 }
15808
15809 /* Reset here to make sure all is clean and to define PF 'n' */
15810 i40e_clear_hw(hw);
15811
15812 err = i40e_set_mac_type(hw);
15813 if (err) {
15814 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15815 err);
15816 goto err_pf_reset;
15817 }
15818
15819 err = i40e_handle_resets(pf);
15820 if (err)
15821 goto err_pf_reset;
15822
15823 i40e_check_recovery_mode(pf);
15824
15825 if (is_kdump_kernel()) {
15826 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15827 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15828 } else {
15829 hw->aq.num_arq_entries = I40E_AQ_LEN;
15830 hw->aq.num_asq_entries = I40E_AQ_LEN;
15831 }
15832 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15833 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15834 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15835
15836 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15837 "%s-%s:misc",
15838 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15839
15840 err = i40e_init_shared_code(hw);
15841 if (err) {
15842 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15843 err);
15844 goto err_pf_reset;
15845 }
15846
15847 /* set up a default setting for link flow control */
15848 pf->hw.fc.requested_mode = I40E_FC_NONE;
15849
15850 err = i40e_init_adminq(hw);
15851 if (err) {
15852 if (err == -EIO)
15853 dev_info(&pdev->dev,
15854 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15855 hw->aq.api_maj_ver,
15856 hw->aq.api_min_ver,
15857 I40E_FW_API_VERSION_MAJOR,
15858 I40E_FW_MINOR_VERSION(hw));
15859 else
15860 dev_info(&pdev->dev,
15861 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15862
15863 goto err_pf_reset;
15864 }
15865 i40e_get_oem_version(hw);
15866
15867 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15868 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15869 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15870 hw->aq.api_maj_ver, hw->aq.api_min_ver,
15871 i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
15872 hw->subsystem_vendor_id, hw->subsystem_device_id);
15873
15874 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15875 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15876 dev_dbg(&pdev->dev,
15877 "The driver for the device detected a newer version of the NVM image v%u.%u than v%u.%u.\n",
15878 hw->aq.api_maj_ver,
15879 hw->aq.api_min_ver,
15880 I40E_FW_API_VERSION_MAJOR,
15881 I40E_FW_MINOR_VERSION(hw));
15882 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15883 dev_info(&pdev->dev,
15884 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15885 hw->aq.api_maj_ver,
15886 hw->aq.api_min_ver,
15887 I40E_FW_API_VERSION_MAJOR,
15888 I40E_FW_MINOR_VERSION(hw));
15889
15890 i40e_verify_eeprom(pf);
15891
15892 /* Rev 0 hardware was never productized */
15893 if (hw->revision_id < 1)
15894 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15895
15896 i40e_clear_pxe_mode(hw);
15897
15898 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15899 if (err)
15900 goto err_adminq_setup;
15901
15902 err = i40e_sw_init(pf);
15903 if (err) {
15904 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15905 goto err_sw_init;
15906 }
15907
15908 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15909 return i40e_init_recovery_mode(pf, hw);
15910
15911 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15912 hw->func_caps.num_rx_qp, 0, 0);
15913 if (err) {
15914 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15915 goto err_init_lan_hmc;
15916 }
15917
15918 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15919 if (err) {
15920 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15921 err = -ENOENT;
15922 goto err_configure_lan_hmc;
15923 }
15924
15925 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15926 * Ignore error return codes because if it was already disabled via
15927 * hardware settings this will fail
15928 */
15929 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15930 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15931 i40e_aq_stop_lldp(hw, true, false, NULL);
15932 }
15933
15934 /* allow a platform config to override the HW addr */
15935 i40e_get_platform_mac_addr(pdev, pf);
15936
15937 if (!is_valid_ether_addr(hw->mac.addr)) {
15938 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15939 err = -EIO;
15940 goto err_mac_addr;
15941 }
15942 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15943 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15944 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15945 if (is_valid_ether_addr(hw->mac.port_addr))
15946 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15947
15948 i40e_ptp_alloc_pins(pf);
15949 pci_set_drvdata(pdev, pf);
15950 pci_save_state(pdev);
15951
15952 #ifdef CONFIG_I40E_DCB
15953 status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15954 (!status &&
15955 lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15956 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15957 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15958 dev_info(&pdev->dev,
15959 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15960 "FW LLDP is disabled\n" :
15961 "FW LLDP is enabled\n");
15962
15963 /* Enable FW to write default DCB config on link-up */
15964 i40e_aq_set_dcb_parameters(hw, true, NULL);
15965
15966 err = i40e_init_pf_dcb(pf);
15967 if (err) {
15968 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15969 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15970 /* Continue without DCB enabled */
15971 }
15972 #endif /* CONFIG_I40E_DCB */
15973
15974 /* set up periodic task facility */
15975 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15976 pf->service_timer_period = HZ;
15977
15978 INIT_WORK(&pf->service_task, i40e_service_task);
15979 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15980
15981 /* NVM bit on means WoL disabled for the port */
15982 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15983 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15984 pf->wol_en = false;
15985 else
15986 pf->wol_en = true;
15987 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15988
15989 /* set up the main switch operations */
15990 i40e_determine_queue_usage(pf);
15991 err = i40e_init_interrupt_scheme(pf);
15992 if (err)
15993 goto err_switch_setup;
15994
15995 /* Reduce Tx and Rx pairs for kdump
15996 * When MSI-X is enabled, it's not allowed to use more TC queue
15997 * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15998 * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15999 */
16000 if (is_kdump_kernel())
16001 pf->num_lan_msix = 1;
16002
16003 pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
16004 pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
16005 pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
16006 pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
16007 pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
16008 pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
16009 UDP_TUNNEL_TYPE_GENEVE;
16010
16011 /* The number of VSIs reported by the FW is the minimum guaranteed
16012 * to us; HW supports far more and we share the remaining pool with
16013 * the other PFs. We allocate space for more than the guarantee with
16014 * the understanding that we might not get them all later.
16015 */
16016 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
16017 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
16018 else
16019 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
16020 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
16021 dev_warn(&pf->pdev->dev,
16022 "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
16023 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
16024 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
16025 }
16026
16027 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
16028 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
16029 GFP_KERNEL);
16030 if (!pf->vsi) {
16031 err = -ENOMEM;
16032 goto err_switch_setup;
16033 }
16034
16035 #ifdef CONFIG_PCI_IOV
16036 /* prep for VF support */
16037 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
16038 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
16039 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
16040 if (pci_num_vf(pdev))
16041 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
16042 }
16043 #endif
16044 err = i40e_setup_pf_switch(pf, false, false);
16045 if (err) {
16046 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
16047 goto err_vsis;
16048 }
16049 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
16050
16051 /* if FDIR VSI was set up, start it now */
16052 for (i = 0; i < pf->num_alloc_vsi; i++) {
16053 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
16054 i40e_vsi_open(pf->vsi[i]);
16055 break;
16056 }
16057 }
16058
16059 /* The driver only wants link up/down and module qualification
16060 * reports from firmware. Note the negative logic.
16061 */
16062 err = i40e_aq_set_phy_int_mask(&pf->hw,
16063 ~(I40E_AQ_EVENT_LINK_UPDOWN |
16064 I40E_AQ_EVENT_MEDIA_NA |
16065 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
16066 if (err)
16067 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
16068 ERR_PTR(err),
16069 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16070
16071 /* Reconfigure hardware for allowing smaller MSS in the case
16072 * of TSO, so that we avoid the MDD being fired and causing
16073 * a reset in the case of small MSS+TSO.
16074 */
16075 val = rd32(hw, I40E_REG_MSS);
16076 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
16077 val &= ~I40E_REG_MSS_MIN_MASK;
16078 val |= I40E_64BYTE_MSS;
16079 wr32(hw, I40E_REG_MSS, val);
16080 }
16081
16082 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
16083 msleep(75);
16084 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
16085 if (err)
16086 dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
16087 ERR_PTR(err),
16088 i40e_aq_str(&pf->hw,
16089 pf->hw.aq.asq_last_status));
16090 }
16091 /* The main driver is (mostly) up and happy. We need to set this state
16092 * before setting up the misc vector or we get a race and the vector
16093 * ends up disabled forever.
16094 */
16095 clear_bit(__I40E_DOWN, pf->state);
16096
16097 /* In case of MSIX we are going to setup the misc vector right here
16098 * to handle admin queue events etc. In case of legacy and MSI
16099 * the misc functionality and queue processing is combined in
16100 * the same vector and that gets setup at open.
16101 */
16102 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
16103 err = i40e_setup_misc_vector(pf);
16104 if (err) {
16105 dev_info(&pdev->dev,
16106 "setup of misc vector failed: %d\n", err);
16107 i40e_cloud_filter_exit(pf);
16108 i40e_fdir_teardown(pf);
16109 goto err_vsis;
16110 }
16111 }
16112
16113 #ifdef CONFIG_PCI_IOV
16114 /* prep for VF support */
16115 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
16116 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
16117 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
16118 /* disable link interrupts for VFs */
16119 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
16120 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
16121 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
16122 i40e_flush(hw);
16123
16124 if (pci_num_vf(pdev)) {
16125 dev_info(&pdev->dev,
16126 "Active VFs found, allocating resources.\n");
16127 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
16128 if (err)
16129 dev_info(&pdev->dev,
16130 "Error %d allocating resources for existing VFs\n",
16131 err);
16132 }
16133 }
16134 #endif /* CONFIG_PCI_IOV */
16135
16136 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16137 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
16138 pf->num_iwarp_msix,
16139 I40E_IWARP_IRQ_PILE_ID);
16140 if (pf->iwarp_base_vector < 0) {
16141 dev_info(&pdev->dev,
16142 "failed to get tracking for %d vectors for IWARP err=%d\n",
16143 pf->num_iwarp_msix, pf->iwarp_base_vector);
16144 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
16145 }
16146 }
16147
16148 i40e_dbg_pf_init(pf);
16149
16150 /* tell the firmware that we're starting */
16151 i40e_send_version(pf);
16152
16153 /* since everything's happy, start the service_task timer */
16154 mod_timer(&pf->service_timer,
16155 round_jiffies(jiffies + pf->service_timer_period));
16156
16157 /* add this PF to client device list and launch a client service task */
16158 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16159 err = i40e_lan_add_device(pf);
16160 if (err)
16161 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
16162 err);
16163 }
16164
16165 #define PCI_SPEED_SIZE 8
16166 #define PCI_WIDTH_SIZE 8
16167 /* Devices on the IOSF bus do not have this information
16168 * and will report PCI Gen 1 x 1 by default so don't bother
16169 * checking them.
16170 */
16171 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
16172 char speed[PCI_SPEED_SIZE] = "Unknown";
16173 char width[PCI_WIDTH_SIZE] = "Unknown";
16174
16175 /* Get the negotiated link width and speed from PCI config
16176 * space
16177 */
16178 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
16179 &link_status);
16180
16181 i40e_set_pci_config_data(hw, link_status);
16182
16183 switch (hw->bus.speed) {
16184 case i40e_bus_speed_8000:
16185 strscpy(speed, "8.0", PCI_SPEED_SIZE); break;
16186 case i40e_bus_speed_5000:
16187 strscpy(speed, "5.0", PCI_SPEED_SIZE); break;
16188 case i40e_bus_speed_2500:
16189 strscpy(speed, "2.5", PCI_SPEED_SIZE); break;
16190 default:
16191 break;
16192 }
16193 switch (hw->bus.width) {
16194 case i40e_bus_width_pcie_x8:
16195 strscpy(width, "8", PCI_WIDTH_SIZE); break;
16196 case i40e_bus_width_pcie_x4:
16197 strscpy(width, "4", PCI_WIDTH_SIZE); break;
16198 case i40e_bus_width_pcie_x2:
16199 strscpy(width, "2", PCI_WIDTH_SIZE); break;
16200 case i40e_bus_width_pcie_x1:
16201 strscpy(width, "1", PCI_WIDTH_SIZE); break;
16202 default:
16203 break;
16204 }
16205
16206 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
16207 speed, width);
16208
16209 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
16210 hw->bus.speed < i40e_bus_speed_8000) {
16211 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
16212 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
16213 }
16214 }
16215
16216 /* get the requested speeds from the fw */
16217 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
16218 if (err)
16219 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %pe last_status = %s\n",
16220 ERR_PTR(err),
16221 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16222 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
16223
16224 /* set the FEC config due to the board capabilities */
16225 i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
16226
16227 /* get the supported phy types from the fw */
16228 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
16229 if (err)
16230 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %pe last_status = %s\n",
16231 ERR_PTR(err),
16232 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16233
16234 /* make sure the MFS hasn't been set lower than the default */
16235 #define MAX_FRAME_SIZE_DEFAULT 0x2600
16236 val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
16237 I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
16238 if (val < MAX_FRAME_SIZE_DEFAULT)
16239 dev_warn(&pdev->dev, "MFS for port %x (%d) has been set below the default (%d)\n",
16240 pf->hw.port, val, MAX_FRAME_SIZE_DEFAULT);
16241
16242 /* Add a filter to drop all Flow control frames from any VSI from being
16243 * transmitted. By doing so we stop a malicious VF from sending out
16244 * PAUSE or PFC frames and potentially controlling traffic for other
16245 * PF/VF VSIs.
16246 * The FW can still send Flow control frames if enabled.
16247 */
16248 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
16249 pf->main_vsi_seid);
16250
16251 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
16252 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
16253 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
16254 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
16255 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
16256 /* print a string summarizing features */
16257 i40e_print_features(pf);
16258
16259 return 0;
16260
16261 /* Unwind what we've done if something failed in the setup */
16262 err_vsis:
16263 set_bit(__I40E_DOWN, pf->state);
16264 i40e_clear_interrupt_scheme(pf);
16265 kfree(pf->vsi);
16266 err_switch_setup:
16267 i40e_reset_interrupt_capability(pf);
16268 timer_shutdown_sync(&pf->service_timer);
16269 err_mac_addr:
16270 err_configure_lan_hmc:
16271 (void)i40e_shutdown_lan_hmc(hw);
16272 err_init_lan_hmc:
16273 kfree(pf->qp_pile);
16274 err_sw_init:
16275 err_adminq_setup:
16276 err_pf_reset:
16277 iounmap(hw->hw_addr);
16278 err_ioremap:
16279 kfree(pf);
16280 err_pf_alloc:
16281 pci_release_mem_regions(pdev);
16282 err_pci_reg:
16283 err_dma:
16284 pci_disable_device(pdev);
16285 return err;
16286 }
16287
16288 /**
16289 * i40e_remove - Device removal routine
16290 * @pdev: PCI device information struct
16291 *
16292 * i40e_remove is called by the PCI subsystem to alert the driver
16293 * that is should release a PCI device. This could be caused by a
16294 * Hot-Plug event, or because the driver is going to be removed from
16295 * memory.
16296 **/
i40e_remove(struct pci_dev * pdev)16297 static void i40e_remove(struct pci_dev *pdev)
16298 {
16299 struct i40e_pf *pf = pci_get_drvdata(pdev);
16300 struct i40e_hw *hw = &pf->hw;
16301 int ret_code;
16302 int i;
16303
16304 i40e_dbg_pf_exit(pf);
16305
16306 i40e_ptp_stop(pf);
16307
16308 /* Disable RSS in hw */
16309 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
16310 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
16311
16312 /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
16313 * flags, once they are set, i40e_rebuild should not be called as
16314 * i40e_prep_for_reset always returns early.
16315 */
16316 while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
16317 usleep_range(1000, 2000);
16318 set_bit(__I40E_IN_REMOVE, pf->state);
16319
16320 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
16321 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
16322 i40e_free_vfs(pf);
16323 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
16324 }
16325 /* no more scheduling of any task */
16326 set_bit(__I40E_SUSPENDED, pf->state);
16327 set_bit(__I40E_DOWN, pf->state);
16328 if (pf->service_timer.function)
16329 timer_shutdown_sync(&pf->service_timer);
16330 if (pf->service_task.func)
16331 cancel_work_sync(&pf->service_task);
16332
16333 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16334 struct i40e_vsi *vsi = pf->vsi[0];
16335
16336 /* We know that we have allocated only one vsi for this PF,
16337 * it was just for registering netdevice, so the interface
16338 * could be visible in the 'ifconfig' output
16339 */
16340 unregister_netdev(vsi->netdev);
16341 free_netdev(vsi->netdev);
16342
16343 goto unmap;
16344 }
16345
16346 /* Client close must be called explicitly here because the timer
16347 * has been stopped.
16348 */
16349 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16350
16351 i40e_fdir_teardown(pf);
16352
16353 /* If there is a switch structure or any orphans, remove them.
16354 * This will leave only the PF's VSI remaining.
16355 */
16356 for (i = 0; i < I40E_MAX_VEB; i++) {
16357 if (!pf->veb[i])
16358 continue;
16359
16360 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
16361 pf->veb[i]->uplink_seid == 0)
16362 i40e_switch_branch_release(pf->veb[i]);
16363 }
16364
16365 /* Now we can shutdown the PF's VSIs, just before we kill
16366 * adminq and hmc.
16367 */
16368 for (i = pf->num_alloc_vsi; i--;)
16369 if (pf->vsi[i]) {
16370 i40e_vsi_close(pf->vsi[i]);
16371 i40e_vsi_release(pf->vsi[i]);
16372 pf->vsi[i] = NULL;
16373 }
16374
16375 i40e_cloud_filter_exit(pf);
16376
16377 /* remove attached clients */
16378 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16379 ret_code = i40e_lan_del_device(pf);
16380 if (ret_code)
16381 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
16382 ret_code);
16383 }
16384
16385 /* shutdown and destroy the HMC */
16386 if (hw->hmc.hmc_obj) {
16387 ret_code = i40e_shutdown_lan_hmc(hw);
16388 if (ret_code)
16389 dev_warn(&pdev->dev,
16390 "Failed to destroy the HMC resources: %d\n",
16391 ret_code);
16392 }
16393
16394 unmap:
16395 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16396 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16397 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16398 free_irq(pf->pdev->irq, pf);
16399
16400 /* shutdown the adminq */
16401 i40e_shutdown_adminq(hw);
16402
16403 /* destroy the locks only once, here */
16404 mutex_destroy(&hw->aq.arq_mutex);
16405 mutex_destroy(&hw->aq.asq_mutex);
16406
16407 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
16408 rtnl_lock();
16409 i40e_clear_interrupt_scheme(pf);
16410 for (i = 0; i < pf->num_alloc_vsi; i++) {
16411 if (pf->vsi[i]) {
16412 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16413 i40e_vsi_clear_rings(pf->vsi[i]);
16414 i40e_vsi_clear(pf->vsi[i]);
16415 pf->vsi[i] = NULL;
16416 }
16417 }
16418 rtnl_unlock();
16419
16420 for (i = 0; i < I40E_MAX_VEB; i++) {
16421 kfree(pf->veb[i]);
16422 pf->veb[i] = NULL;
16423 }
16424
16425 kfree(pf->qp_pile);
16426 kfree(pf->vsi);
16427
16428 iounmap(hw->hw_addr);
16429 kfree(pf);
16430 pci_release_mem_regions(pdev);
16431
16432 pci_disable_device(pdev);
16433 }
16434
16435 /**
16436 * i40e_pci_error_detected - warning that something funky happened in PCI land
16437 * @pdev: PCI device information struct
16438 * @error: the type of PCI error
16439 *
16440 * Called to warn that something happened and the error handling steps
16441 * are in progress. Allows the driver to quiesce things, be ready for
16442 * remediation.
16443 **/
i40e_pci_error_detected(struct pci_dev * pdev,pci_channel_state_t error)16444 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
16445 pci_channel_state_t error)
16446 {
16447 struct i40e_pf *pf = pci_get_drvdata(pdev);
16448
16449 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
16450
16451 if (!pf) {
16452 dev_info(&pdev->dev,
16453 "Cannot recover - error happened during device probe\n");
16454 return PCI_ERS_RESULT_DISCONNECT;
16455 }
16456
16457 /* shutdown all operations */
16458 if (!test_bit(__I40E_SUSPENDED, pf->state))
16459 i40e_prep_for_reset(pf);
16460
16461 /* Request a slot reset */
16462 return PCI_ERS_RESULT_NEED_RESET;
16463 }
16464
16465 /**
16466 * i40e_pci_error_slot_reset - a PCI slot reset just happened
16467 * @pdev: PCI device information struct
16468 *
16469 * Called to find if the driver can work with the device now that
16470 * the pci slot has been reset. If a basic connection seems good
16471 * (registers are readable and have sane content) then return a
16472 * happy little PCI_ERS_RESULT_xxx.
16473 **/
i40e_pci_error_slot_reset(struct pci_dev * pdev)16474 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
16475 {
16476 struct i40e_pf *pf = pci_get_drvdata(pdev);
16477 pci_ers_result_t result;
16478 u32 reg;
16479
16480 dev_dbg(&pdev->dev, "%s\n", __func__);
16481 if (pci_enable_device_mem(pdev)) {
16482 dev_info(&pdev->dev,
16483 "Cannot re-enable PCI device after reset.\n");
16484 result = PCI_ERS_RESULT_DISCONNECT;
16485 } else {
16486 pci_set_master(pdev);
16487 pci_restore_state(pdev);
16488 pci_save_state(pdev);
16489 pci_wake_from_d3(pdev, false);
16490
16491 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16492 if (reg == 0)
16493 result = PCI_ERS_RESULT_RECOVERED;
16494 else
16495 result = PCI_ERS_RESULT_DISCONNECT;
16496 }
16497
16498 return result;
16499 }
16500
16501 /**
16502 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16503 * @pdev: PCI device information struct
16504 */
i40e_pci_error_reset_prepare(struct pci_dev * pdev)16505 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16506 {
16507 struct i40e_pf *pf = pci_get_drvdata(pdev);
16508
16509 i40e_prep_for_reset(pf);
16510 }
16511
16512 /**
16513 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16514 * @pdev: PCI device information struct
16515 */
i40e_pci_error_reset_done(struct pci_dev * pdev)16516 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16517 {
16518 struct i40e_pf *pf = pci_get_drvdata(pdev);
16519
16520 if (test_bit(__I40E_IN_REMOVE, pf->state))
16521 return;
16522
16523 i40e_reset_and_rebuild(pf, false, false);
16524 #ifdef CONFIG_PCI_IOV
16525 i40e_restore_all_vfs_msi_state(pdev);
16526 #endif /* CONFIG_PCI_IOV */
16527 }
16528
16529 /**
16530 * i40e_pci_error_resume - restart operations after PCI error recovery
16531 * @pdev: PCI device information struct
16532 *
16533 * Called to allow the driver to bring things back up after PCI error
16534 * and/or reset recovery has finished.
16535 **/
i40e_pci_error_resume(struct pci_dev * pdev)16536 static void i40e_pci_error_resume(struct pci_dev *pdev)
16537 {
16538 struct i40e_pf *pf = pci_get_drvdata(pdev);
16539
16540 dev_dbg(&pdev->dev, "%s\n", __func__);
16541 if (test_bit(__I40E_SUSPENDED, pf->state))
16542 return;
16543
16544 i40e_handle_reset_warning(pf, false);
16545 }
16546
16547 /**
16548 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16549 * using the mac_address_write admin q function
16550 * @pf: pointer to i40e_pf struct
16551 **/
i40e_enable_mc_magic_wake(struct i40e_pf * pf)16552 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16553 {
16554 struct i40e_hw *hw = &pf->hw;
16555 u8 mac_addr[6];
16556 u16 flags = 0;
16557 int ret;
16558
16559 /* Get current MAC address in case it's an LAA */
16560 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16561 ether_addr_copy(mac_addr,
16562 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16563 } else {
16564 dev_err(&pf->pdev->dev,
16565 "Failed to retrieve MAC address; using default\n");
16566 ether_addr_copy(mac_addr, hw->mac.addr);
16567 }
16568
16569 /* The FW expects the mac address write cmd to first be called with
16570 * one of these flags before calling it again with the multicast
16571 * enable flags.
16572 */
16573 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16574
16575 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16576 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16577
16578 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16579 if (ret) {
16580 dev_err(&pf->pdev->dev,
16581 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16582 return;
16583 }
16584
16585 flags = I40E_AQC_MC_MAG_EN
16586 | I40E_AQC_WOL_PRESERVE_ON_PFR
16587 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16588 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16589 if (ret)
16590 dev_err(&pf->pdev->dev,
16591 "Failed to enable Multicast Magic Packet wake up\n");
16592 }
16593
16594 /**
16595 * i40e_shutdown - PCI callback for shutting down
16596 * @pdev: PCI device information struct
16597 **/
i40e_shutdown(struct pci_dev * pdev)16598 static void i40e_shutdown(struct pci_dev *pdev)
16599 {
16600 struct i40e_pf *pf = pci_get_drvdata(pdev);
16601 struct i40e_hw *hw = &pf->hw;
16602
16603 set_bit(__I40E_SUSPENDED, pf->state);
16604 set_bit(__I40E_DOWN, pf->state);
16605
16606 del_timer_sync(&pf->service_timer);
16607 cancel_work_sync(&pf->service_task);
16608 i40e_cloud_filter_exit(pf);
16609 i40e_fdir_teardown(pf);
16610
16611 /* Client close must be called explicitly here because the timer
16612 * has been stopped.
16613 */
16614 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16615
16616 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16617 i40e_enable_mc_magic_wake(pf);
16618
16619 i40e_prep_for_reset(pf);
16620
16621 wr32(hw, I40E_PFPM_APM,
16622 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16623 wr32(hw, I40E_PFPM_WUFC,
16624 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16625
16626 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16627 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16628 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16629 free_irq(pf->pdev->irq, pf);
16630
16631 /* Since we're going to destroy queues during the
16632 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16633 * whole section
16634 */
16635 rtnl_lock();
16636 i40e_clear_interrupt_scheme(pf);
16637 rtnl_unlock();
16638
16639 if (system_state == SYSTEM_POWER_OFF) {
16640 pci_wake_from_d3(pdev, pf->wol_en);
16641 pci_set_power_state(pdev, PCI_D3hot);
16642 }
16643 }
16644
16645 /**
16646 * i40e_suspend - PM callback for moving to D3
16647 * @dev: generic device information structure
16648 **/
i40e_suspend(struct device * dev)16649 static int __maybe_unused i40e_suspend(struct device *dev)
16650 {
16651 struct i40e_pf *pf = dev_get_drvdata(dev);
16652 struct i40e_hw *hw = &pf->hw;
16653
16654 /* If we're already suspended, then there is nothing to do */
16655 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16656 return 0;
16657
16658 set_bit(__I40E_DOWN, pf->state);
16659
16660 /* Ensure service task will not be running */
16661 del_timer_sync(&pf->service_timer);
16662 cancel_work_sync(&pf->service_task);
16663
16664 /* Client close must be called explicitly here because the timer
16665 * has been stopped.
16666 */
16667 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16668
16669 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16670 i40e_enable_mc_magic_wake(pf);
16671
16672 /* Since we're going to destroy queues during the
16673 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16674 * whole section
16675 */
16676 rtnl_lock();
16677
16678 i40e_prep_for_reset(pf);
16679
16680 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16681 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16682
16683 /* Clear the interrupt scheme and release our IRQs so that the system
16684 * can safely hibernate even when there are a large number of CPUs.
16685 * Otherwise hibernation might fail when mapping all the vectors back
16686 * to CPU0.
16687 */
16688 i40e_clear_interrupt_scheme(pf);
16689
16690 rtnl_unlock();
16691
16692 return 0;
16693 }
16694
16695 /**
16696 * i40e_resume - PM callback for waking up from D3
16697 * @dev: generic device information structure
16698 **/
i40e_resume(struct device * dev)16699 static int __maybe_unused i40e_resume(struct device *dev)
16700 {
16701 struct i40e_pf *pf = dev_get_drvdata(dev);
16702 int err;
16703
16704 /* If we're not suspended, then there is nothing to do */
16705 if (!test_bit(__I40E_SUSPENDED, pf->state))
16706 return 0;
16707
16708 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16709 * since we're going to be restoring queues
16710 */
16711 rtnl_lock();
16712
16713 /* We cleared the interrupt scheme when we suspended, so we need to
16714 * restore it now to resume device functionality.
16715 */
16716 err = i40e_restore_interrupt_scheme(pf);
16717 if (err) {
16718 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16719 err);
16720 }
16721
16722 clear_bit(__I40E_DOWN, pf->state);
16723 i40e_reset_and_rebuild(pf, false, true);
16724
16725 rtnl_unlock();
16726
16727 /* Clear suspended state last after everything is recovered */
16728 clear_bit(__I40E_SUSPENDED, pf->state);
16729
16730 /* Restart the service task */
16731 mod_timer(&pf->service_timer,
16732 round_jiffies(jiffies + pf->service_timer_period));
16733
16734 return 0;
16735 }
16736
16737 static const struct pci_error_handlers i40e_err_handler = {
16738 .error_detected = i40e_pci_error_detected,
16739 .slot_reset = i40e_pci_error_slot_reset,
16740 .reset_prepare = i40e_pci_error_reset_prepare,
16741 .reset_done = i40e_pci_error_reset_done,
16742 .resume = i40e_pci_error_resume,
16743 };
16744
16745 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16746
16747 static struct pci_driver i40e_driver = {
16748 .name = i40e_driver_name,
16749 .id_table = i40e_pci_tbl,
16750 .probe = i40e_probe,
16751 .remove = i40e_remove,
16752 .driver = {
16753 .pm = &i40e_pm_ops,
16754 },
16755 .shutdown = i40e_shutdown,
16756 .err_handler = &i40e_err_handler,
16757 .sriov_configure = i40e_pci_sriov_configure,
16758 };
16759
16760 /**
16761 * i40e_init_module - Driver registration routine
16762 *
16763 * i40e_init_module is the first routine called when the driver is
16764 * loaded. All it does is register with the PCI subsystem.
16765 **/
i40e_init_module(void)16766 static int __init i40e_init_module(void)
16767 {
16768 int err;
16769
16770 pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16771 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16772
16773 /* There is no need to throttle the number of active tasks because
16774 * each device limits its own task using a state bit for scheduling
16775 * the service task, and the device tasks do not interfere with each
16776 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16777 * since we need to be able to guarantee forward progress even under
16778 * memory pressure.
16779 */
16780 i40e_wq = alloc_workqueue("%s", 0, 0, i40e_driver_name);
16781 if (!i40e_wq) {
16782 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16783 return -ENOMEM;
16784 }
16785
16786 i40e_dbg_init();
16787 err = pci_register_driver(&i40e_driver);
16788 if (err) {
16789 destroy_workqueue(i40e_wq);
16790 i40e_dbg_exit();
16791 return err;
16792 }
16793
16794 return 0;
16795 }
16796 module_init(i40e_init_module);
16797
16798 /**
16799 * i40e_exit_module - Driver exit cleanup routine
16800 *
16801 * i40e_exit_module is called just before the driver is removed
16802 * from memory.
16803 **/
i40e_exit_module(void)16804 static void __exit i40e_exit_module(void)
16805 {
16806 pci_unregister_driver(&i40e_driver);
16807 destroy_workqueue(i40e_wq);
16808 ida_destroy(&i40e_client_ida);
16809 i40e_dbg_exit();
16810 }
16811 module_exit(i40e_exit_module);
16812