xref: /openbmc/qemu/hw/arm/npcm7xx_boards.c (revision 467c6f84)
1 /*
2  * Machine definitions for boards featuring an NPCM7xx SoC.
3  *
4  * Copyright 2020 Google LLC
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14  * for more details.
15  */
16 
17 #include "qemu/osdep.h"
18 
19 #include "hw/arm/npcm7xx.h"
20 #include "hw/core/cpu.h"
21 #include "hw/i2c/i2c_mux_pca954x.h"
22 #include "hw/i2c/smbus_eeprom.h"
23 #include "hw/loader.h"
24 #include "hw/nvram/eeprom_at24c.h"
25 #include "hw/qdev-core.h"
26 #include "hw/qdev-properties.h"
27 #include "qapi/error.h"
28 #include "qemu/datadir.h"
29 #include "qemu/units.h"
30 #include "sysemu/blockdev.h"
31 #include "sysemu/sysemu.h"
32 #include "sysemu/block-backend.h"
33 #include "qemu/error-report.h"
34 
35 
36 #define NPCM7XX_POWER_ON_STRAPS_DEFAULT (           \
37         NPCM7XX_PWRON_STRAP_SPI0F18 |               \
38         NPCM7XX_PWRON_STRAP_SFAB |                  \
39         NPCM7XX_PWRON_STRAP_BSPA |                  \
40         NPCM7XX_PWRON_STRAP_FUP(FUP_NORM_UART2) |   \
41         NPCM7XX_PWRON_STRAP_SECEN |                 \
42         NPCM7XX_PWRON_STRAP_HIZ |                   \
43         NPCM7XX_PWRON_STRAP_ECC |                   \
44         NPCM7XX_PWRON_STRAP_RESERVE1 |              \
45         NPCM7XX_PWRON_STRAP_J2EN |                  \
46         NPCM7XX_PWRON_STRAP_CKFRQ(CKFRQ_DEFAULT))
47 
48 #define NPCM750_EVB_POWER_ON_STRAPS ( \
49         NPCM7XX_POWER_ON_STRAPS_DEFAULT & ~NPCM7XX_PWRON_STRAP_J2EN)
50 #define QUANTA_GSJ_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT
51 #define QUANTA_GBS_POWER_ON_STRAPS ( \
52         NPCM7XX_POWER_ON_STRAPS_DEFAULT & ~NPCM7XX_PWRON_STRAP_SFAB)
53 #define KUDO_BMC_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT
54 #define MORI_BMC_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT
55 
56 static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin";
57 
npcm7xx_load_bootrom(MachineState * machine,NPCM7xxState * soc)58 static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc)
59 {
60     const char *bios_name = machine->firmware ?: npcm7xx_default_bootrom;
61     g_autofree char *filename = NULL;
62     int ret;
63 
64     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
65     if (!filename) {
66         error_report("Could not find ROM image '%s'", bios_name);
67         if (!machine->kernel_filename) {
68             /* We can't boot without a bootrom or a kernel image. */
69             exit(1);
70         }
71         return;
72     }
73     ret = load_image_mr(filename, &soc->irom);
74     if (ret < 0) {
75         error_report("Failed to load ROM image '%s'", filename);
76         exit(1);
77     }
78 }
79 
npcm7xx_connect_flash(NPCM7xxFIUState * fiu,int cs_no,const char * flash_type,DriveInfo * dinfo)80 static void npcm7xx_connect_flash(NPCM7xxFIUState *fiu, int cs_no,
81                                   const char *flash_type, DriveInfo *dinfo)
82 {
83     DeviceState *flash;
84     qemu_irq flash_cs;
85 
86     flash = qdev_new(flash_type);
87     if (dinfo) {
88         qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo));
89     }
90     qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal);
91 
92     flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0);
93     qdev_connect_gpio_out_named(DEVICE(fiu), "cs", cs_no, flash_cs);
94 }
95 
npcm7xx_connect_dram(NPCM7xxState * soc,MemoryRegion * dram)96 static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram)
97 {
98     memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA, dram);
99 
100     object_property_set_link(OBJECT(soc), "dram-mr", OBJECT(dram),
101                              &error_abort);
102 }
103 
sdhci_attach_drive(SDHCIState * sdhci,int unit)104 static void sdhci_attach_drive(SDHCIState *sdhci, int unit)
105 {
106         DriveInfo *di = drive_get(IF_SD, 0, unit);
107         BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
108 
109         BusState *bus = qdev_get_child_bus(DEVICE(sdhci), "sd-bus");
110         if (bus == NULL) {
111             error_report("No SD bus found in SOC object");
112             exit(1);
113         }
114 
115         DeviceState *carddev = qdev_new(TYPE_SD_CARD);
116         qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
117         qdev_realize_and_unref(carddev, bus, &error_fatal);
118 }
119 
npcm7xx_create_soc(MachineState * machine,uint32_t hw_straps)120 static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
121                                         uint32_t hw_straps)
122 {
123     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
124     Object *obj;
125 
126     obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
127                                 &error_abort, NULL);
128     object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
129 
130     return NPCM7XX(obj);
131 }
132 
npcm7xx_i2c_get_bus(NPCM7xxState * soc,uint32_t num)133 static I2CBus *npcm7xx_i2c_get_bus(NPCM7xxState *soc, uint32_t num)
134 {
135     g_assert(num < ARRAY_SIZE(soc->smbus));
136     return I2C_BUS(qdev_get_child_bus(DEVICE(&soc->smbus[num]), "i2c-bus"));
137 }
138 
npcm7xx_init_pwm_splitter(NPCM7xxMachine * machine,NPCM7xxState * soc,const int * fan_counts)139 static void npcm7xx_init_pwm_splitter(NPCM7xxMachine *machine,
140                                       NPCM7xxState *soc, const int *fan_counts)
141 {
142     SplitIRQ *splitters = machine->fan_splitter;
143 
144     /*
145      * PWM 0~3 belong to module 0 output 0~3.
146      * PWM 4~7 belong to module 1 output 0~3.
147      */
148     for (int i = 0; i < NPCM7XX_NR_PWM_MODULES; ++i) {
149         for (int j = 0; j < NPCM7XX_PWM_PER_MODULE; ++j) {
150             int splitter_no = i * NPCM7XX_PWM_PER_MODULE + j;
151             DeviceState *splitter;
152 
153             if (fan_counts[splitter_no] < 1) {
154                 continue;
155             }
156             object_initialize_child(OBJECT(machine), "fan-splitter[*]",
157                                     &splitters[splitter_no], TYPE_SPLIT_IRQ);
158             splitter = DEVICE(&splitters[splitter_no]);
159             qdev_prop_set_uint16(splitter, "num-lines",
160                                  fan_counts[splitter_no]);
161             qdev_realize(splitter, NULL, &error_abort);
162             qdev_connect_gpio_out_named(DEVICE(&soc->pwm[i]), "duty-gpio-out",
163                                         j, qdev_get_gpio_in(splitter, 0));
164         }
165     }
166 }
167 
npcm7xx_connect_pwm_fan(NPCM7xxState * soc,SplitIRQ * splitter,int fan_no,int output_no)168 static void npcm7xx_connect_pwm_fan(NPCM7xxState *soc, SplitIRQ *splitter,
169                                     int fan_no, int output_no)
170 {
171     DeviceState *fan;
172     int fan_input;
173     qemu_irq fan_duty_gpio;
174 
175     g_assert(fan_no >= 0 && fan_no <= NPCM7XX_MFT_MAX_FAN_INPUT);
176     /*
177      * Fan 0~1 belong to module 0 input 0~1.
178      * Fan 2~3 belong to module 1 input 0~1.
179      * ...
180      * Fan 14~15 belong to module 7 input 0~1.
181      * Fan 16~17 belong to module 0 input 2~3.
182      * Fan 18~19 belong to module 1 input 2~3.
183      */
184     if (fan_no < 16) {
185         fan = DEVICE(&soc->mft[fan_no / 2]);
186         fan_input = fan_no % 2;
187     } else {
188         fan = DEVICE(&soc->mft[(fan_no - 16) / 2]);
189         fan_input = fan_no % 2 + 2;
190     }
191 
192     /* Connect the Fan to PWM module */
193     fan_duty_gpio = qdev_get_gpio_in_named(fan, "duty", fan_input);
194     qdev_connect_gpio_out(DEVICE(splitter), output_no, fan_duty_gpio);
195 }
196 
npcm750_evb_i2c_init(NPCM7xxState * soc)197 static void npcm750_evb_i2c_init(NPCM7xxState *soc)
198 {
199     /* lm75 temperature sensor on SVB, tmp105 is compatible */
200     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 0), "tmp105", 0x48);
201     /* lm75 temperature sensor on EB, tmp105 is compatible */
202     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), "tmp105", 0x48);
203     /* tmp100 temperature sensor on EB, tmp105 is compatible */
204     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 2), "tmp105", 0x48);
205     /* tmp100 temperature sensor on SVB, tmp105 is compatible */
206     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 6), "tmp105", 0x48);
207 }
208 
npcm750_evb_fan_init(NPCM7xxMachine * machine,NPCM7xxState * soc)209 static void npcm750_evb_fan_init(NPCM7xxMachine *machine, NPCM7xxState *soc)
210 {
211     SplitIRQ *splitter = machine->fan_splitter;
212     static const int fan_counts[] = {2, 2, 2, 2, 2, 2, 2, 2};
213 
214     npcm7xx_init_pwm_splitter(machine, soc, fan_counts);
215     npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x00, 0);
216     npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x01, 1);
217     npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x02, 0);
218     npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x03, 1);
219     npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x04, 0);
220     npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x05, 1);
221     npcm7xx_connect_pwm_fan(soc, &splitter[3], 0x06, 0);
222     npcm7xx_connect_pwm_fan(soc, &splitter[3], 0x07, 1);
223     npcm7xx_connect_pwm_fan(soc, &splitter[4], 0x08, 0);
224     npcm7xx_connect_pwm_fan(soc, &splitter[4], 0x09, 1);
225     npcm7xx_connect_pwm_fan(soc, &splitter[5], 0x0a, 0);
226     npcm7xx_connect_pwm_fan(soc, &splitter[5], 0x0b, 1);
227     npcm7xx_connect_pwm_fan(soc, &splitter[6], 0x0c, 0);
228     npcm7xx_connect_pwm_fan(soc, &splitter[6], 0x0d, 1);
229     npcm7xx_connect_pwm_fan(soc, &splitter[7], 0x0e, 0);
230     npcm7xx_connect_pwm_fan(soc, &splitter[7], 0x0f, 1);
231 }
232 
quanta_gsj_i2c_init(NPCM7xxState * soc)233 static void quanta_gsj_i2c_init(NPCM7xxState *soc)
234 {
235     /* GSJ machine have 4 max31725 temperature sensors, tmp105 is compatible. */
236     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), "tmp105", 0x5c);
237     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 2), "tmp105", 0x5c);
238     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 3), "tmp105", 0x5c);
239     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 4), "tmp105", 0x5c);
240 
241     at24c_eeprom_init(npcm7xx_i2c_get_bus(soc, 9), 0x55, 8192);
242     at24c_eeprom_init(npcm7xx_i2c_get_bus(soc, 10), 0x55, 8192);
243 
244     /*
245      * i2c-11:
246      * - power-brick@36: delta,dps800
247      * - hotswap@15: ti,lm5066i
248      */
249 
250     /*
251      * i2c-12:
252      * - ucd90160@6b
253      */
254 
255     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 15), "pca9548", 0x75);
256 }
257 
quanta_gsj_fan_init(NPCM7xxMachine * machine,NPCM7xxState * soc)258 static void quanta_gsj_fan_init(NPCM7xxMachine *machine, NPCM7xxState *soc)
259 {
260     SplitIRQ *splitter = machine->fan_splitter;
261     static const int fan_counts[] = {2, 2, 2, 0, 0, 0, 0, 0};
262 
263     npcm7xx_init_pwm_splitter(machine, soc, fan_counts);
264     npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x00, 0);
265     npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x01, 1);
266     npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x02, 0);
267     npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x03, 1);
268     npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x04, 0);
269     npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x05, 1);
270 }
271 
quanta_gbs_i2c_init(NPCM7xxState * soc)272 static void quanta_gbs_i2c_init(NPCM7xxState *soc)
273 {
274     /*
275      * i2c-0:
276      *     pca9546@71
277      *
278      * i2c-1:
279      *     pca9535@24
280      *     pca9535@20
281      *     pca9535@21
282      *     pca9535@22
283      *     pca9535@23
284      *     pca9535@25
285      *     pca9535@26
286      *
287      * i2c-2:
288      *     sbtsi@4c
289      *
290      * i2c-5:
291      *     atmel,24c64@50 mb_fru
292      *     pca9546@71
293      *         - channel 0: max31725@54
294      *         - channel 1: max31725@55
295      *         - channel 2: max31725@5d
296      *                      atmel,24c64@51 fan_fru
297      *         - channel 3: atmel,24c64@52 hsbp_fru
298      *
299      * i2c-6:
300      *     pca9545@73
301      *
302      * i2c-7:
303      *     pca9545@72
304      *
305      * i2c-8:
306      *     adi,adm1272@10
307      *
308      * i2c-9:
309      *     pca9546@71
310      *         - channel 0: isil,isl68137@60
311      *         - channel 1: isil,isl68137@61
312      *         - channel 2: isil,isl68137@63
313      *         - channel 3: isil,isl68137@45
314      *
315      * i2c-10:
316      *     pca9545@71
317      *
318      * i2c-11:
319      *     pca9545@76
320      *
321      * i2c-12:
322      *     maxim,max34451@4e
323      *     isil,isl68137@5d
324      *     isil,isl68137@5e
325      *
326      * i2c-14:
327      *     pca9545@70
328      */
329 }
330 
kudo_bmc_i2c_init(NPCM7xxState * soc)331 static void kudo_bmc_i2c_init(NPCM7xxState *soc)
332 {
333     I2CSlave *i2c_mux;
334 
335     i2c_mux = i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1),
336                                       TYPE_PCA9548, 0x75);
337 
338     /* tmp105 is compatible with the lm75 */
339     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 4), "tmp105", 0x5c);
340     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), "tmp105", 0x5c);
341     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6), "tmp105", 0x5c);
342     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), "tmp105", 0x5c);
343 
344     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), TYPE_PCA9548, 0x77);
345 
346     i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 4), TYPE_PCA9548, 0x77);
347 
348     at24c_eeprom_init(npcm7xx_i2c_get_bus(soc, 4), 0x50, 8192); /* mbfru */
349 
350     i2c_mux = i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 13),
351                                       TYPE_PCA9548, 0x77);
352 
353     /* tmp105 is compatible with the lm75 */
354     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 2), "tmp105", 0x48);
355     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 3), "tmp105", 0x49);
356     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 4), "tmp105", 0x48);
357     i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), "tmp105", 0x49);
358 
359     at24c_eeprom_init(npcm7xx_i2c_get_bus(soc, 14), 0x55, 8192); /* bmcfru */
360 
361     /* TODO: Add remaining i2c devices. */
362 }
363 
npcm750_evb_init(MachineState * machine)364 static void npcm750_evb_init(MachineState *machine)
365 {
366     NPCM7xxState *soc;
367 
368     soc = npcm7xx_create_soc(machine, NPCM750_EVB_POWER_ON_STRAPS);
369     npcm7xx_connect_dram(soc, machine->ram);
370     qdev_realize(DEVICE(soc), NULL, &error_fatal);
371 
372     npcm7xx_load_bootrom(machine, soc);
373     npcm7xx_connect_flash(&soc->fiu[0], 0, "w25q256", drive_get(IF_MTD, 0, 0));
374     npcm750_evb_i2c_init(soc);
375     npcm750_evb_fan_init(NPCM7XX_MACHINE(machine), soc);
376     npcm7xx_load_kernel(machine, soc);
377 }
378 
quanta_gsj_init(MachineState * machine)379 static void quanta_gsj_init(MachineState *machine)
380 {
381     NPCM7xxState *soc;
382 
383     soc = npcm7xx_create_soc(machine, QUANTA_GSJ_POWER_ON_STRAPS);
384     npcm7xx_connect_dram(soc, machine->ram);
385     qdev_realize(DEVICE(soc), NULL, &error_fatal);
386 
387     npcm7xx_load_bootrom(machine, soc);
388     npcm7xx_connect_flash(&soc->fiu[0], 0, "mx25l25635e",
389                           drive_get(IF_MTD, 0, 0));
390     quanta_gsj_i2c_init(soc);
391     quanta_gsj_fan_init(NPCM7XX_MACHINE(machine), soc);
392     npcm7xx_load_kernel(machine, soc);
393 }
394 
quanta_gbs_init(MachineState * machine)395 static void quanta_gbs_init(MachineState *machine)
396 {
397     NPCM7xxState *soc;
398 
399     soc = npcm7xx_create_soc(machine, QUANTA_GBS_POWER_ON_STRAPS);
400     npcm7xx_connect_dram(soc, machine->ram);
401     qdev_realize(DEVICE(soc), NULL, &error_fatal);
402 
403     npcm7xx_load_bootrom(machine, soc);
404 
405     npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f",
406                           drive_get(IF_MTD, 0, 0));
407 
408     quanta_gbs_i2c_init(soc);
409     sdhci_attach_drive(&soc->mmc.sdhci, 0);
410     npcm7xx_load_kernel(machine, soc);
411 }
412 
kudo_bmc_init(MachineState * machine)413 static void kudo_bmc_init(MachineState *machine)
414 {
415     NPCM7xxState *soc;
416 
417     soc = npcm7xx_create_soc(machine, KUDO_BMC_POWER_ON_STRAPS);
418     npcm7xx_connect_dram(soc, machine->ram);
419     qdev_realize(DEVICE(soc), NULL, &error_fatal);
420 
421     npcm7xx_load_bootrom(machine, soc);
422     npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f",
423                           drive_get(IF_MTD, 0, 0));
424     npcm7xx_connect_flash(&soc->fiu[1], 0, "mx66u51235f",
425                           drive_get(IF_MTD, 3, 0));
426 
427     kudo_bmc_i2c_init(soc);
428     sdhci_attach_drive(&soc->mmc.sdhci, 0);
429     npcm7xx_load_kernel(machine, soc);
430 }
431 
mori_bmc_init(MachineState * machine)432 static void mori_bmc_init(MachineState *machine)
433 {
434     NPCM7xxState *soc;
435 
436     soc = npcm7xx_create_soc(machine, MORI_BMC_POWER_ON_STRAPS);
437     npcm7xx_connect_dram(soc, machine->ram);
438     qdev_realize(DEVICE(soc), NULL, &error_fatal);
439 
440     npcm7xx_load_bootrom(machine, soc);
441     npcm7xx_connect_flash(&soc->fiu[1], 0, "mx66u51235f",
442                           drive_get(IF_MTD, 3, 0));
443 
444     npcm7xx_load_kernel(machine, soc);
445 }
446 
npcm7xx_set_soc_type(NPCM7xxMachineClass * nmc,const char * type)447 static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
448 {
449     NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type));
450     MachineClass *mc = MACHINE_CLASS(nmc);
451 
452     nmc->soc_type = type;
453     mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus;
454 }
455 
npcm7xx_machine_class_init(ObjectClass * oc,void * data)456 static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
457 {
458     MachineClass *mc = MACHINE_CLASS(oc);
459     static const char * const valid_cpu_types[] = {
460         ARM_CPU_TYPE_NAME("cortex-a9"),
461         NULL
462     };
463 
464     mc->no_floppy = 1;
465     mc->no_cdrom = 1;
466     mc->no_parallel = 1;
467     mc->default_ram_id = "ram";
468     mc->valid_cpu_types = valid_cpu_types;
469 }
470 
471 /*
472  * Schematics:
473  * https://github.com/Nuvoton-Israel/nuvoton-info/blob/master/npcm7xx-poleg/evaluation-board/board_deliverables/NPCM750x_EB_ver.A1.1_COMPLETE.pdf
474  */
npcm750_evb_machine_class_init(ObjectClass * oc,void * data)475 static void npcm750_evb_machine_class_init(ObjectClass *oc, void *data)
476 {
477     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
478     MachineClass *mc = MACHINE_CLASS(oc);
479 
480     npcm7xx_set_soc_type(nmc, TYPE_NPCM750);
481 
482     mc->desc = "Nuvoton NPCM750 Evaluation Board (Cortex-A9)";
483     mc->init = npcm750_evb_init;
484     mc->default_ram_size = 512 * MiB;
485 };
486 
gsj_machine_class_init(ObjectClass * oc,void * data)487 static void gsj_machine_class_init(ObjectClass *oc, void *data)
488 {
489     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
490     MachineClass *mc = MACHINE_CLASS(oc);
491 
492     npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
493 
494     mc->desc = "Quanta GSJ (Cortex-A9)";
495     mc->init = quanta_gsj_init;
496     mc->default_ram_size = 512 * MiB;
497 };
498 
gbs_bmc_machine_class_init(ObjectClass * oc,void * data)499 static void gbs_bmc_machine_class_init(ObjectClass *oc, void *data)
500 {
501     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
502     MachineClass *mc = MACHINE_CLASS(oc);
503 
504     npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
505 
506     mc->desc = "Quanta GBS (Cortex-A9)";
507     mc->init = quanta_gbs_init;
508     mc->default_ram_size = 1 * GiB;
509 }
510 
kudo_bmc_machine_class_init(ObjectClass * oc,void * data)511 static void kudo_bmc_machine_class_init(ObjectClass *oc, void *data)
512 {
513     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
514     MachineClass *mc = MACHINE_CLASS(oc);
515 
516     npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
517 
518     mc->desc = "Kudo BMC (Cortex-A9)";
519     mc->init = kudo_bmc_init;
520     mc->default_ram_size = 1 * GiB;
521 };
522 
mori_bmc_machine_class_init(ObjectClass * oc,void * data)523 static void mori_bmc_machine_class_init(ObjectClass *oc, void *data)
524 {
525     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
526     MachineClass *mc = MACHINE_CLASS(oc);
527 
528     npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
529 
530     mc->desc = "Mori BMC (Cortex-A9)";
531     mc->init = mori_bmc_init;
532     mc->default_ram_size = 1 * GiB;
533 }
534 
535 static const TypeInfo npcm7xx_machine_types[] = {
536     {
537         .name           = TYPE_NPCM7XX_MACHINE,
538         .parent         = TYPE_MACHINE,
539         .instance_size  = sizeof(NPCM7xxMachine),
540         .class_size     = sizeof(NPCM7xxMachineClass),
541         .class_init     = npcm7xx_machine_class_init,
542         .abstract       = true,
543     }, {
544         .name           = MACHINE_TYPE_NAME("npcm750-evb"),
545         .parent         = TYPE_NPCM7XX_MACHINE,
546         .class_init     = npcm750_evb_machine_class_init,
547     }, {
548         .name           = MACHINE_TYPE_NAME("quanta-gsj"),
549         .parent         = TYPE_NPCM7XX_MACHINE,
550         .class_init     = gsj_machine_class_init,
551     }, {
552         .name           = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
553         .parent         = TYPE_NPCM7XX_MACHINE,
554         .class_init     = gbs_bmc_machine_class_init,
555     }, {
556         .name           = MACHINE_TYPE_NAME("kudo-bmc"),
557         .parent         = TYPE_NPCM7XX_MACHINE,
558         .class_init     = kudo_bmc_machine_class_init,
559     }, {
560         .name           = MACHINE_TYPE_NAME("mori-bmc"),
561         .parent         = TYPE_NPCM7XX_MACHINE,
562         .class_init     = mori_bmc_machine_class_init,
563     },
564 };
565 
566 DEFINE_TYPES(npcm7xx_machine_types)
567