1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __STARFIVE_STR_H__ 3 #define __STARFIVE_STR_H__ 4 5 #include <crypto/aes.h> 6 #include <crypto/hash.h> 7 #include <crypto/scatterwalk.h> 8 #include <crypto/sha2.h> 9 #include <crypto/sm3.h> 10 #include <linux/delay.h> 11 #include <linux/dma-mapping.h> 12 #include <linux/dmaengine.h> 13 #include <linux/interrupt.h> 14 15 #define STARFIVE_ALG_CR_OFFSET 0x0 16 #define STARFIVE_ALG_FIFO_OFFSET 0x4 17 #define STARFIVE_IE_MASK_OFFSET 0x8 18 #define STARFIVE_IE_FLAG_OFFSET 0xc 19 #define STARFIVE_DMA_IN_LEN_OFFSET 0x10 20 #define STARFIVE_DMA_OUT_LEN_OFFSET 0x14 21 22 #define STARFIVE_IE_MASK_AES_DONE 0x1 23 #define STARFIVE_IE_MASK_HASH_DONE 0x4 24 #define STARFIVE_IE_MASK_PKA_DONE 0x8 25 #define STARFIVE_IE_FLAG_AES_DONE 0x1 26 #define STARFIVE_IE_FLAG_HASH_DONE 0x4 27 #define STARFIVE_IE_FLAG_PKA_DONE 0x8 28 29 #define STARFIVE_MSG_BUFFER_SIZE SZ_16K 30 #define MAX_KEY_SIZE SHA512_BLOCK_SIZE 31 #define STARFIVE_AES_IV_LEN AES_BLOCK_SIZE 32 #define STARFIVE_AES_CTR_LEN AES_BLOCK_SIZE 33 #define STARFIVE_RSA_MAX_KEYSZ 256 34 35 union starfive_aes_csr { 36 u32 v; 37 struct { 38 u32 cmode :1; 39 #define STARFIVE_AES_KEYMODE_128 0x0 40 #define STARFIVE_AES_KEYMODE_192 0x1 41 #define STARFIVE_AES_KEYMODE_256 0x2 42 u32 keymode :2; 43 #define STARFIVE_AES_BUSY BIT(3) 44 u32 busy :1; 45 u32 done :1; 46 #define STARFIVE_AES_KEY_DONE BIT(5) 47 u32 krdy :1; 48 u32 aesrst :1; 49 u32 ie :1; 50 #define STARFIVE_AES_CCM_START BIT(8) 51 u32 ccm_start :1; 52 #define STARFIVE_AES_MODE_ECB 0x0 53 #define STARFIVE_AES_MODE_CBC 0x1 54 #define STARFIVE_AES_MODE_CFB 0x2 55 #define STARFIVE_AES_MODE_OFB 0x3 56 #define STARFIVE_AES_MODE_CTR 0x4 57 #define STARFIVE_AES_MODE_CCM 0x5 58 #define STARFIVE_AES_MODE_GCM 0x6 59 u32 mode :3; 60 #define STARFIVE_AES_GCM_START BIT(12) 61 u32 gcm_start :1; 62 #define STARFIVE_AES_GCM_DONE BIT(13) 63 u32 gcm_done :1; 64 u32 delay_aes :1; 65 u32 vaes_start :1; 66 u32 rsvd_0 :8; 67 #define STARFIVE_AES_MODE_XFB_1 0x0 68 #define STARFIVE_AES_MODE_XFB_128 0x5 69 u32 stmode :3; 70 u32 rsvd_1 :5; 71 }; 72 }; 73 74 union starfive_hash_csr { 75 u32 v; 76 struct { 77 u32 start :1; 78 u32 reset :1; 79 u32 ie :1; 80 u32 firstb :1; 81 #define STARFIVE_HASH_SM3 0x0 82 #define STARFIVE_HASH_SHA224 0x3 83 #define STARFIVE_HASH_SHA256 0x4 84 #define STARFIVE_HASH_SHA384 0x5 85 #define STARFIVE_HASH_SHA512 0x6 86 #define STARFIVE_HASH_MODE_MASK 0x7 87 u32 mode :3; 88 u32 rsvd_1 :1; 89 u32 final :1; 90 u32 rsvd_2 :2; 91 #define STARFIVE_HASH_HMAC_FLAGS 0x800 92 u32 hmac :1; 93 u32 rsvd_3 :1; 94 #define STARFIVE_HASH_KEY_DONE BIT(13) 95 u32 key_done :1; 96 u32 key_flag :1; 97 u32 hmac_done :1; 98 #define STARFIVE_HASH_BUSY BIT(16) 99 u32 busy :1; 100 u32 hashdone :1; 101 u32 rsvd_4 :14; 102 }; 103 }; 104 105 union starfive_pka_cacr { 106 u32 v; 107 struct { 108 u32 start :1; 109 u32 reset :1; 110 u32 ie :1; 111 u32 rsvd_0 :1; 112 u32 fifo_mode :1; 113 u32 not_r2 :1; 114 u32 ecc_sub :1; 115 u32 pre_expf :1; 116 u32 cmd :4; 117 u32 rsvd_1 :1; 118 u32 ctrl_dummy :1; 119 u32 ctrl_false :1; 120 u32 cln_done :1; 121 u32 opsize :6; 122 u32 rsvd_2 :2; 123 u32 exposize :6; 124 u32 rsvd_3 :1; 125 u32 bigendian :1; 126 }; 127 }; 128 129 struct starfive_rsa_key { 130 u8 *n; 131 u8 *e; 132 u8 *d; 133 int e_bitlen; 134 int d_bitlen; 135 int bitlen; 136 size_t key_sz; 137 }; 138 139 union starfive_alg_cr { 140 u32 v; 141 struct { 142 u32 start :1; 143 u32 aes_dma_en :1; 144 u32 rsvd_0 :1; 145 u32 hash_dma_en :1; 146 u32 alg_done :1; 147 u32 rsvd_1 :3; 148 u32 clear :1; 149 u32 rsvd_2 :23; 150 }; 151 }; 152 153 struct starfive_cryp_ctx { 154 struct starfive_cryp_dev *cryp; 155 struct starfive_cryp_request_ctx *rctx; 156 157 unsigned int hash_mode; 158 u8 key[MAX_KEY_SIZE]; 159 int keylen; 160 bool is_hmac; 161 struct starfive_rsa_key rsa_key; 162 struct crypto_akcipher *akcipher_fbk; 163 struct crypto_ahash *ahash_fbk; 164 struct crypto_aead *aead_fbk; 165 }; 166 167 struct starfive_cryp_dev { 168 struct list_head list; 169 struct device *dev; 170 struct clk *hclk; 171 struct clk *ahb; 172 struct reset_control *rst; 173 174 void __iomem *base; 175 phys_addr_t phys_base; 176 177 u32 dma_maxburst; 178 struct dma_chan *tx; 179 struct dma_chan *rx; 180 struct dma_slave_config cfg_in; 181 struct dma_slave_config cfg_out; 182 struct scatter_walk in_walk; 183 struct scatter_walk out_walk; 184 struct crypto_engine *engine; 185 struct tasklet_struct aes_done; 186 struct tasklet_struct hash_done; 187 struct completion pka_done; 188 size_t assoclen; 189 size_t total_in; 190 size_t total_out; 191 u32 tag_in[4]; 192 u32 tag_out[4]; 193 unsigned int authsize; 194 unsigned long flags; 195 int err; 196 bool side_chan; 197 union starfive_alg_cr alg_cr; 198 union { 199 struct ahash_request *hreq; 200 struct aead_request *areq; 201 struct skcipher_request *sreq; 202 } req; 203 }; 204 205 struct starfive_cryp_request_ctx { 206 union { 207 union starfive_hash_csr hash; 208 union starfive_pka_cacr pka; 209 union starfive_aes_csr aes; 210 } csr; 211 212 struct scatterlist *in_sg; 213 struct scatterlist *out_sg; 214 struct ahash_request ahash_fbk_req; 215 size_t total; 216 unsigned int blksize; 217 unsigned int digsize; 218 unsigned long in_sg_len; 219 unsigned char *adata; 220 u8 rsa_data[STARFIVE_RSA_MAX_KEYSZ] __aligned(sizeof(u32)); 221 }; 222 223 struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx); 224 225 int starfive_hash_register_algs(void); 226 void starfive_hash_unregister_algs(void); 227 228 int starfive_rsa_register_algs(void); 229 void starfive_rsa_unregister_algs(void); 230 231 int starfive_aes_register_algs(void); 232 void starfive_aes_unregister_algs(void); 233 234 void starfive_hash_done_task(unsigned long param); 235 void starfive_aes_done_task(unsigned long param); 236 #endif 237