| /openbmc/linux/drivers/clk/uniphier/ |
| H A D | clk-uniphier.h | 110 #define UNIPHIER_CLK_DIV2(parent, div0, div1) \ argument
114 #define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \ argument
118 #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ argument
122 #define UNIPHIER_CLK_DIV5(parent, div0, div1, div2, div3, div4) \ argument
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-cpu.c | 140 unsigned long div0; in exynos_set_safe_div() local
155 unsigned long div0, div1 = 0, mux_reg; in exynos_cpuclk_pre_rate_change() local
268 unsigned long div0; in exynos5433_set_safe_div() local
283 unsigned long div0, div1 = 0, mux_reg; in exynos5433_cpuclk_pre_rate_change() local
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| H A D | clk-cpu.h | 27 unsigned long div0; member
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| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_zynq.c | 227 u32 clk_ctrl, div0, div1; in zynq_clk_get_dci_rate() local
243 u32 clk_ctrl, div0; in zynq_clk_get_peripheral_rate() local
289 u32 *div0, u32 *div1) in zynq_clk_calc_peripheral_two_divs()
318 u32 clk_ctrl, div0 = 0, div1 = 0; in zynq_clk_set_peripheral_rate() local
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| H A D | clk_zynqmp.c | 419 u32 clk_ctrl, div0; in zynqmp_clk_get_peripheral_rate() local
454 u32 clk_ctrl, div0; in zynqmp_clk_get_wdt_rate() local
495 u32 *div0, u32 *div1) in zynqmp_clk_calc_peripheral_two_divs()
524 u32 clk_ctrl, div0 = 0, div1 = 0; in zynqmp_clk_set_peripheral_rate() local
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| /openbmc/linux/arch/microblaze/lib/ |
| H A D | udivsi3.S | 51 div0: label
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| H A D | umodsi3.S | 53 div0: label
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| H A D | divsi3.S | 37 div0: label
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| /openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
| H A D | clock.h | 28 unsigned int div0; member
64 unsigned int div0; member
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| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dpll_mgr.h | 204 u32 div0; member
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gf100.c | 278 u32 src0, div0, div1D, div1P = 0; in calc_clk() local
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| H A D | gk104.c | 292 u32 src0, div0, div1D, div1P = 0; in calc_clk() local
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| /openbmc/linux/drivers/clk/x86/ |
| H A D | clk-cgu.c | 395 unsigned int div0, div1, exdiv; in lgm_clk_ddiv_recalc_rate() local
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| /openbmc/linux/drivers/i2c/busses/ |
| H A D | i2c-sprd.c | 338 u32 div0 = I2C_ADDR_DVD0_CALC(high, low); in sprd_i2c_set_clk() local
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| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun50i_h6.h | 239 #define CCM_PLL5_CTRL_DIV2(div0) ((div0) << 1) argument
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| /openbmc/linux/sound/pci/ |
| H A D | es1938.c | 448 unsigned int bits, div0; in snd_es1938_rate_set() local
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| /openbmc/linux/sound/isa/ |
| H A D | es18xx.c | 399 unsigned int bits, div0; in snd_es18xx_rate_set() local
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| /openbmc/linux/drivers/clk/nxp/ |
| H A D | clk-lpc32xx.c | 1436 struct clk_hw_proto0 *mux0, *div0, *gate0; in lpc32xx_clk_register() local
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